JP4090670B2 - Battery protection circuit - Google Patents
Battery protection circuit Download PDFInfo
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- JP4090670B2 JP4090670B2 JP2000174172A JP2000174172A JP4090670B2 JP 4090670 B2 JP4090670 B2 JP 4090670B2 JP 2000174172 A JP2000174172 A JP 2000174172A JP 2000174172 A JP2000174172 A JP 2000174172A JP 4090670 B2 JP4090670 B2 JP 4090670B2
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- battery
- pnp transistor
- channel fet
- voltage
- protection circuit
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- 238000010586 diagram Methods 0.000 description 5
- 230000036962 time dependent Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
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- Secondary Cells (AREA)
- Protection Of Static Devices (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Description
【０００１】
【発明の属する技術分野】
本発明は、バッテリー保護回路に関するものである。
【０００２】
【従来の技術】
従来の過電圧保護装置は図２の回路図のようなものであり、充電制御用素子であるＰＮＰトランジスタＱ１のバッテリー側の電圧を検出し、過電圧が印加された時、充電回路を制御し、ＰＮＰトランジスタＱ１をオフさせていたが、ＰＮＰトランジスタＱ１が破損して過電圧が印加されると、ＰＮＰトランジスタＱ１をオフすることができず、バッテリーに過電圧が印加されるという問題があった。
【０００３】
【発明が解決しようとする課題】
上記のような問題があったため、充電制御用素子であるＰＮＰトランジスタＱ１が破損して過電圧が印加された時でも、入力側とバッテリー間を確実に遮断でき、バッテリーを過電圧から保護することができる回路が要求されていた。
【０００４】
【課題を解決するための手段】
本発明は、上記課題を解決するものであり、ＰＮＰトランジスタＱ１とバッテリーの間にＰチャンネル形ＦＥＴＱ２を接続し、電圧検出用素子である定電圧ダイオードＤ１で、Ｐチャネル形ＦＥＴＱ２のソース側の電圧を検出し、充電制御用素子であるＰＮＰトランジスタＱ１が破損して過電圧になっても、Ｐチャネル形ＦＥＴＱ２をオフすることにより、入力側とバッテリー間を確実に遮断することができ、バッテリーを過電圧から保護することができるバッテリー保護回路である。すなわち、第１のＰＮＰトランジスタＱ１のエミッタを入力側に、ベースを充電回路に、コレクタをバッテリーに接続してなるバッテリー保護回路において、第１のＰＮＰトランジスタＱ１のコレクタとバッテリーとの間にＰチャネル形ＦＥＴＱ２を接続し、該ＦＥＴＱ２のゲート・ソース間に第２のＰＮＰトランジスタＱ３を接続し、該トランジスタＱ３のコレクタに抵抗Ｒ１を接続して接地し、ベースに定電圧ダイオードＤ１のカソードを接続して該定電圧ダイオードＤ１をアノード接地し、エミッタを前記第１のＰＮＰトランジスタＱ１のコレクタおよびＰチャネル形ＦＥＴＱ２のソースに接続し、該Ｐチャネル形ＦＥＴＱ２のドレインをバッテリーの正極に接続してなることを特徴とするバッテリー保護回路である。
【０００５】
【発明の実施の形態】
第１のＰＮＰトランジスタＱ１のコレクタとバッテリーとの間にＰチャネル形ＦＥＴ Ｑ２を接続し、該ＦＥＴ Ｑ２のゲート・ソース間に第２のＰＮＰトランジスタＱ３を接続し、該トランジスタＱ３のコレクタに抵抗Ｒ１、ベースに定電圧ダイオードを接続して接地する。
第２のＰＮＰトランジスタＱ３のベースを定電圧ダイオードＤ１のカソードに、エミッタを第１のＰＮＰトランジスタＱ１のコレクタおよびＰチャネル形ＦＥＴ Ｑ２のソースに接続し、上記定電圧ダイオードをアノード接地し、上記Ｐチャネル形ＦＥＴ Ｑ２のドレインをバッテリーの正極に接続する。
電圧を検出しているＰチャネル形ＦＥＴ Ｑ２のソース側の電圧Ｖ１が、定電圧ダイオードＤ１の電圧より高くなると、ＰＮＰトランジスタＱ３がオンし、Ｐチャネル形ＦＥＴ Ｑ２がオフになって、入力側とバッテリー間が確実に遮断されるので、バッテリーを過電圧から保護することができる。
【０００６】
【実施例】
本発明の実施例によるバッテリー保護回路の回路図を図１に、従来例の回路図を図２に示す。図１の実施例における過電圧印加時のＰチャネル形ＦＥＴ Ｑ２のソース側の電圧とドレイン側の電圧の変化を表わすと、図３のようになる。
図３において、（ａ）はＰチャネル形ＦＥＴ Ｑ２のソース側の電圧の経時変化を、（ｄ）は該ＦＥＴ Ｑ２のドレイン側の電圧の経時変化を表し、（ｂ）は第２のＰＮＰトランジスタ Ｑ３の動作状態のタイミングチャートを、（ｃ）はＰチャネル形ＦＥＴ Ｑ２の動作状態のタイミングチャートを表している。以下、図３により、充電制御用素子であるＰＮＰトランジスタＱ１が破損して過電圧になった時のバッテリーの保護状態を説明する。
▲１▼図１のＰチャネル形ＦＥＴ Ｑ２は、ゲートが抵抗Ｒ１を介して接地しており、ゲート・ソース間に電圧が印加されるため、過電圧が印加されない時間ｔまではオンしているが、第２のＰＮＰトランジスタＱ３はベースに定電圧ダイオードＤ１が接続されているため、時間ｔまではベース電流が流れず、オフ状態にある。
このＰチャネル形ＦＥＴ Ｑ２のオン状態により、該ＦＥＴ Ｑ２のドレイン側の電圧Ｖ２も、時間ｔまではソース側の電圧Ｖ１とともに上昇する（図３（ｄ））。
▲２▼第１のＰＮＰトランジスタ Ｑ１が破損し、コレクタ−エミッタ間が短絡状態になると、Ｐチャネル形ＦＥＴ Ｑ２のソース側の電圧Ｖ１は、入力電圧Ｖinと同様の動作状態となり、時間ｔ以降も直線的に上昇する（図３（ａ））。
▲３▼上記Ｐチャネル形ＦＥＴ Ｑ２の電圧Ｖ１が定電圧ダイオードＤ１の値（ＶD1）を超えると、第２のＰＮＰトランジスタＱ３がオンになり（図３（ｂ））、Ｐチャネル形ＦＥＴ Ｑ２のゲート・ソース間が短絡状態になるので、該ＦＥＴ Ｑ２がオフ状態になる（図３（ｃ））。
このため、Ｐチャネル形ＦＥＴ Ｑ２のドレイン側の電圧Ｖ２がドロップする（図３（ｄ））（時間ｔ以降）。
上記より明らかなように、本発明の実施例によるバッテリー保護回路は、充電制御用素子であるＰＮＰトランジスタＱ１が破損して過電圧になっても、Ｐチャネル形ＦＥＴ Ｑ２がオフしバッテリーを保護することができる。
【０００７】
【発明の効果】
本発明により、充電制御用素子であるＰＮＰトランジスタＱ１が破損して過電圧が印加された時でも、Ｐチャネル形ＦＥＴ Ｑ２をオフすることにより、入力側とバッテリー間を確実に遮断することができ、バッテリーを過電圧から保護することができる。
【図面の簡単な説明】
【図１】本発明の実施例によるバッテリー保護回路の回路図である。
【図２】従来例によるバッテリー保護回路の回路図である。
【図３】図３の（ａ）はＰチャネル形ＦＥＴ Ｑ２のソース側の電圧の経時変化、（ｄ）は該ＦＥＴ Ｑ２のドレイン側の電圧の経時変化を表し、（ｂ）は第２のＰＮＰトランジスタ Ｑ３の動作状態のタイミングチャート、（ｃ）はＰチャネル形ＦＥＴ Ｑ２の動作状態のタイミングチャートである。
【符号の説明】
Ｖin 入力電圧
Ｒ１ 抵抗
Ｄ１ 定電圧ダイオード
Ｑ１ ＰＮＰトランジスタ
Ｑ２ Ｐチャネル形ＦＥＴ
Ｑ３ ＰＮＰトランジスタ
Ｖ１ Ｐチャネル形ＦＥＴ Ｑ２のソース側の電圧
Ｖ２ Ｐチャネル形ＦＥＴ Ｑ２のドレイン側の電圧
ＶD1 定電圧ダイオードＤ１の電圧[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a battery protection circuit.
[0002]
[Prior art]
The conventional overvoltage protection device is as shown in the circuit diagram of FIG. 2, which detects the voltage on the battery side of the PNP transistor Q1, which is a charge control element, and controls the charging circuit when an overvoltage is applied. Although the transistor Q1 was turned off, there was a problem that when the PNP transistor Q1 was damaged and an overvoltage was applied, the PNP transistor Q1 could not be turned off and an overvoltage was applied to the battery.
[0003]
[Problems to be solved by the invention]
Due to the above problems, even when the overvoltage is applied due to the damage of the PNP transistor Q1 as the charge control element, the input side and the battery can be reliably disconnected, and the battery can be protected from the overvoltage. A circuit was required.
[0004]
[Means for Solving the Problems]
The present invention solves the above-mentioned problem. A P-channel FET Q2 is connected between a PNP transistor Q1 and a battery, and a voltage on the source side of the P-channel FET Q2 is detected by a constant voltage diode D1 as a voltage detecting element. Even if the PNP transistor Q1, which is the charge control element, is damaged and becomes overvoltage, the P-channel FET Q2 is turned off, so that the input side and the battery can be reliably disconnected, and the battery is overvoltage. It is a battery protection circuit that can be protected from. That is, in the battery protection circuit in which the emitter of the first PNP transistor Q1 is connected to the input side, the base is connected to the charging circuit, and the collector is connected to the battery, the P channel is connected between the collector of the first PNP transistor Q1 and the battery. The FET Q2 is connected, the second PNP transistor Q3 is connected between the gate and source of the FET Q2, the resistor R1 is connected to the ground of the transistor Q3, and the cathode of the constant voltage diode D1 is connected to the base. The anode of the constant voltage diode D1 is grounded , the emitter is connected to the collector of the first PNP transistor Q1 and the source of the P-channel FET Q2, and the drain of the P-channel FET Q2 is connected to the positive electrode of the battery. The battery protection circuit characterized by the above.
[0005]
DETAILED DESCRIPTION OF THE INVENTION
A P-channel FET Q2 is connected between the collector of the first PNP transistor Q1 and the battery, a second PNP transistor Q3 is connected between the gate and source of the FET Q2, and a resistor R1 is connected to the collector of the transistor Q3. Connect a constant voltage diode to the base and ground it.
The base of the second PNP transistor Q3 is connected to the cathode of the constant voltage diode D1, the emitter is connected to the collector of the first PNP transistor Q1 and the source of the P-channel FET Q2, the constant voltage diode is anode-grounded, and the P The drain of the channel FET Q2 is connected to the positive electrode of the battery.
When the voltage V1 on the source side of the P-channel FET Q2 detecting the voltage is higher than the voltage of the constant voltage diode D1, the PNP transistor Q3 is turned on and the P-channel FET Q2 is turned off. Since the battery is reliably disconnected, the battery can be protected from overvoltage.
[0006]
【Example】
A circuit diagram of a battery protection circuit according to an embodiment of the present invention is shown in FIG. 1, and a circuit diagram of a conventional example is shown in FIG. FIG. 3 shows changes in the source-side voltage and the drain-side voltage of the P-channel FET Q2 when the overvoltage is applied in the embodiment of FIG.
In FIG. 3, (a) shows the change with time of the voltage on the source side of the P-channel FET Q2, (d) shows the change with time of the voltage on the drain side of the FET Q2, and (b) shows the second PNP transistor. A timing chart of the operating state of Q3, (c) represents a timing chart of the operating state of the P-channel FET Q2. Hereinafter, the protection state of the battery when the PNP transistor Q1, which is the charge control element, is damaged and becomes overvoltage will be described with reference to FIG.
(1) The P-channel FET Q2 in FIG. 1 is on until time t when no overvoltage is applied because the gate is grounded via the resistor R1 and a voltage is applied between the gate and the source. Since the constant voltage diode D1 is connected to the base of the second PNP transistor Q3, the base current does not flow until time t and is in the off state.
Due to the ON state of the P-channel FET Q2, the drain-side voltage V2 of the FET Q2 also increases with the source-side voltage V1 until time t (FIG. 3D).
(2) When the first PNP transistor Q1 is damaged and the collector-emitter is short-circuited, the voltage V1 on the source side of the P-channel FET Q2 becomes the same operating state as the input voltage Vin, and after the time t It rises linearly (FIG. 3 (a)).
(3) When the voltage V1 of the P-channel FET Q2 exceeds the value (VD1) of the constant voltage diode D1, the second PNP transistor Q3 is turned on (FIG. 3B), and the P-channel FET Q2 is turned on. Since the gate and the source are short-circuited, the FET Q2 is turned off (FIG. 3C).
For this reason, the voltage V2 on the drain side of the P-channel FET Q2 drops (FIG. 3 (d)) (after time t).
As is apparent from the above, the battery protection circuit according to the embodiment of the present invention protects the battery by turning off the P-channel FET Q2 even when the PNP transistor Q1 as the charge control element is damaged and becomes overvoltage. Can do.
[0007]
【The invention's effect】
According to the present invention, even when the PNP transistor Q1 which is a charge control element is damaged and an overvoltage is applied, by turning off the P-channel FET Q2, the input side and the battery can be reliably cut off. The battery can be protected from overvoltage.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of a battery protection circuit according to an embodiment of the present invention.
FIG. 2 is a circuit diagram of a conventional battery protection circuit.
3A is a time-dependent change of the voltage on the source side of the P-channel FET Q2, FIG. 3D is a time-dependent change of a voltage on the drain side of the FET Q2, and FIG. The timing chart of the operating state of the PNP transistor Q3, (c) is the timing chart of the operating state of the P-channel FET Q2.
[Explanation of symbols]
Vin input voltage R1 resistor D1 constant voltage diode Q1 PNP transistor Q2 P-channel FET
Q3 PNP transistor V1 P channel FET Q2 source side voltage V2 P channel FET Q2 drain side voltage VD1 Constant voltage diode D1 voltage
Claims (1)
第１のＰＮＰトランジスタのコレクタとバッテリーとの間にＰチャネル形ＦＥＴを接続し、該ＦＥＴのゲート・ソース間に第２のＰＮＰトランジスタを接続し、該トランジスタのコレクタに抵抗を接続して接地し、ベースに定電圧ダイオードのカソードを接続して該定電圧ダイオードをアノード接地し、エミッタを前記第１のＰＮＰトランジスタのコレクタおよび前記Ｐチャネル形ＦＥＴのソースに接続し、該Ｐチャネル形ＦＥＴのドレインをバッテリーの正極に接続してなることを特徴とするバッテリー保護回路。In a battery protection circuit in which the emitter of the first PNP transistor is connected to the input side, the base is connected to the charging circuit, and the collector is connected to the battery.
A P-channel FET is connected between the collector of the first PNP transistor and the battery, a second PNP transistor is connected between the gate and source of the FET, a resistor is connected to the collector of the transistor, and grounded. The cathode of the constant voltage diode is connected to the base, the anode of the constant voltage diode is grounded , the emitter is connected to the collector of the first PNP transistor and the source of the P channel FET, and the drain of the P channel FET A battery protection circuit comprising a battery connected to a positive electrode of a battery.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000174172A JP4090670B2 (en) | 2000-06-09 | 2000-06-09 | Battery protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000174172A JP4090670B2 (en) | 2000-06-09 | 2000-06-09 | Battery protection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001352665A JP2001352665A (en) | 2001-12-21 |
| JP4090670B2 true JP4090670B2 (en) | 2008-05-28 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000174172A Expired - Fee Related JP4090670B2 (en) | 2000-06-09 | 2000-06-09 | Battery protection circuit |
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| Country | Link |
|---|---|
| JP (1) | JP4090670B2 (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4899760B2 (en) * | 2006-09-29 | 2012-03-21 | パナソニック株式会社 | Induction heating cooker |
| CN101783503B (en) * | 2009-01-16 | 2014-02-26 | 鸿富锦精密工业（深圳）有限公司 | Overvoltage protection circuit |
| JP5130429B2 (en) * | 2010-05-23 | 2013-01-30 | 拓 岩佐 | Storage battery control circuit, storage battery control device, and independent power system |
| JP5495217B1 (en) * | 2013-09-14 | 2014-05-21 | 拓 岩佐 | Overcharge prevention circuit, overdischarge prevention circuit, storage battery control device, independent power supply system and battery pack |
| KR101724025B1 (en) | 2015-10-01 | 2017-04-18 | 주식회사 모브릭 | Battery protection apparatus for breaking power at high temperature or high current based on metal-insulator transition |
| KR102757430B1 (en) | 2019-12-05 | 2025-01-17 | 주식회사 엘지에너지솔루션 | Battery pack including multiple current paths |
-
2000
- 2000-06-09 JP JP2000174172A patent/JP4090670B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2001352665A (en) | 2001-12-21 |
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Free format text: JAPANESE INTERMEDIATE CODE: R250 |
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| LAPS | Cancellation because of no payment of annual fees |