JP4096416B2 - Field effect semiconductor device and method for manufacturing the same - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a field effect semiconductor device.
[0002]
[Prior art]
In recent years, for the purpose of improving the performance of complementary field effect transistors, field effect transistors using SiGe / Si heterostructures that can be expected to have high carrier mobility and current driving capability have been studied. This is because a two-dimensional carrier gas is used as a channel, and a phenomenon of a decrease in mobility due to carrier impurity scattering occurs. This means that when the amount of impurities increases, carriers are difficult to flow, and as a result, the mobility is lowered.
[0003]
On the other hand, as a technique for solving this problem, there can be mentioned a technique using so-called δ doping or modulation doping, in which a region of several tens of nanometers from the atomic level is doped as a carrier supply layer in the upper layer or lower layer of the channel.
[0004]
[Problems to be solved by the invention]
However, the steepness of the doping profile of the carrier supply layer formed by the epitaxial growth method is destroyed by the diffusion of impurities up and down during the heat treatment in the subsequent gate oxide film formation, and the required transistor characteristics are obtained. There was no problem. That is, if the dopant in the carrier supply layer is diffused by the heat treatment, the effective film thickness of the spacer layer is reduced, the influence of carrier impurity scattering is increased, and the mobility is lowered. For example, People et al. Vac. Sci. Technol. A, Vol. In 3,1985, between the film thickness of the spacer layer sandwiched carrier supplying layer and the channel is 0Nm～40nm, hole mobility at room temperature, each about 360cm ² / V · sec~ about 850cm ² / V · sec It has been reported that the hole mobility decreases as the thickness of the spacer layer decreases.
[0005]
As a technique for solving this problem, a method of suppressing the diffusion of dopant contained in the carrier supply layer into the upper and lower layers by lowering the temperature of the heat treatment in epitaxial growth and gate oxide film formation has been adopted. Yes. A typical technique for forming an insulating film at a low temperature is a plasma CVD method, but an insulating film formed by a plasma CVD method has an interface at a semiconductor / insulator interface as compared with that formed by a thermal oxidation method. There are drawbacks in that the level density is large and the breakdown voltage is low. Moreover, there is a possibility that good crystallinity cannot be obtained due to the low temperature of epitaxial growth.
[0006]
On the other hand, the diffusion of the dopant by the heat treatment is mainly due to a mechanism in which Si and the dopant existing between the lattices diffuse while moving each other between the lattice positions and the interlattice positions. In particular, dopants that diffuse by this mechanism include B, P, As, and the like.
[0007]
Therefore, the present invention suppresses the diffusion of the dopant contained in the carrier supply layer having a steep doping profile, which has been performed in order to avoid a decrease in mobility due to carrier impurity scattering, without lowering the crystal growth temperature. The main object of the present invention is to provide a field-effect semiconductor device and a method for manufacturing the same, which have superior electrical characteristics without deteriorating crystallinity compared to the prior art.
[0008]
[Means for Solving the Problems]
In order to achieve the above object, the present invention introduces an electrically neutral impurity into a carrier supply layer having a steep doping profile, which is applied to avoid a decrease in mobility due to impurity scattering of carriers. This is intended to suppress the diffusion of the dopant.
[0009]
Specifically, a field effect semiconductor device according to a first aspect of the present invention includes a channel layer formed on a substrate and a carrier supply layer that suppresses a decrease in mobility due to impurity scattering of carriers. and, in electrically not that electric field effect type semiconductor device is contained in neutral element suppressing diffusion of dopant into the carrier supply layer, the dopant used for the carrier supply layer is B, P, from among as The configuration is characterized in that it is at least one selected .
[0010]
A field effect semiconductor device according to a second aspect of the present invention includes a channel layer formed on a substrate and a carrier supply layer that suppresses a decrease in mobility due to impurity scattering of carriers, in the electric field effect type semiconductor device in which a layer electrically neutral element to suppress the diffusion of the dopant is contained in the channel layer side of the carrier supply layer, the dopant used for the carrier supply layer B , P, As. At least one selected from the group consisting of P and As .
[0011]
According to this configuration, it is possible to prevent the dopant contained in the carrier supply layer from diffusing at least to the channel layer side without having to lower the growth temperature of each layer.
[0012]
The method for manufacturing a field effect semiconductor device according to the present invention further includes a channel layer formed on a substrate and a carrier supply layer that suppresses a decrease in mobility due to impurity scattering of carriers, and the carrier supply layer is epitaxially grown. Accordingly, the dopant which have a step of forming by doping p-type or n-type dopant and an electrically neutral element suppressing diffusion simultaneously used for the carrier supply layer is B, P, from among as The configuration is characterized in that it is at least one selected . Alternatively, it has a channel layer formed on the substrate and a carrier supply layer that suppresses a decrease in mobility due to impurity scattering of carriers, and at least the carrier supply layer is electrically grown by epitaxial growth on the channel layer side. at least one of the diffusion to have a step of forming a suppressing layer, the dopant used for the carrier supply layer selected B, P, from the as dopant by simultaneously doping a neutral element It is the structure characterized by this.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
(Embodiment 1)
The field effect semiconductor device according to the first embodiment of the present invention will be described below with reference to the drawings.
[0014]
FIG. 1 is a cross-sectional view showing the configuration of the field effect semiconductor device in this embodiment. Here, as an example of a field effect semiconductor device, a carrier supply layer is provided and a two-dimensional hole gas is used as a channel. 1 shows a structural cross-sectional view of a conventional p-channel field effect transistor. In FIG. 1, 101 is a semiconductor substrate, 102 is a buffer layer, 103 is a carrier supply layer, 104 is a spacer layer, 105 is a channel layer, 106 is a cap layer, 107 is a gate oxide film, 108 is a gate, 109 is a source / drain. Is shown. A feature of the present invention is a portion of the carrier supply layer 103. According to the present invention, the carrier supply layer 103 includes an electrically neutral element that suppresses diffusion of the dopant.
[0015]
According to this structure, as will be described in detail later, in the heat treatment such as gate oxide film formation, it is possible to suppress the diffusion of the dopant in the carrier supply layer, and the electrical characteristics are excellent without destroying the impurity doping profile. A field effect semiconductor device can be provided.
[0016]
Then, next, the manufacturing method of the field effect type semiconductor device of this Embodiment shown in FIG. 1 is demonstrated, referring manufacturing process sectional drawing shown in FIG. 2A to 2D show a manufacturing process prior to gate oxide film formation in a manufacturing process of a p-channel field effect transistor having a carrier supply layer and using a two-dimensional hole gas as a channel. Since the subsequent manufacturing process is the same as the conventional process, description thereof will be omitted here.
[0017]
First, a buffer layer 102 made of, for example, Si is formed on a semiconductor substrate 101 made of, for example, Si by epitaxial growth at a substrate temperature of 550 ° C. by about 1000 nm by UHV-CVD using, for example, disilane. Next, as the carrier supply layer 103 containing an electrically neutral element (in this case, C) that suppresses the diffusion of the dopant, for example, a B- and C-doped Si layer is replaced with UHV- using, for example, disilane, diborane, or methylsilane. It is formed by epitaxial growth with a substrate temperature of 550 ° C. by about 10 nm by the CVD method (FIG. 2A). At this time, by adjusting the gas partial pressure, the dose of B is about 5 × 10 ¹⁸ cm ⁻³ to 1 × 10 ²⁰ cm ⁻³ , and the dose of C is about 1 × 10 ¹⁹ cm ⁻³ to 1. × 10 ²⁰ cm ^-3 is desirable.
[0018]
Next, the spacer layer 104 made of Si or the like is formed by epitaxial growth of about 3 nm at a substrate temperature of 550 ° C. by, for example, UHV-CVD using disilane (FIG. 2B). Subsequently, a channel layer 105 made of Si _0.7 Ge _0.3 or the like is formed by epitaxial growth of about 5 nm at a substrate temperature of 550 ° C. by, for example, UHV-CVD using disilane and monogermane (FIG. 2C).
[0019]
Thereafter, a cap layer 106 made of Si or the like is formed by epitaxial growth of about 10 nm at a substrate temperature of 550 ° C. by UHV-CVD using disilane, for example (FIG. 2D). Thereafter, a field effect transistor is formed by a conventionally known process.
[0020]
As described above, according to the present embodiment, by introducing C, which is an electrically neutral element that suppresses dopant diffusion, into the carrier supply layer, carriers in heat treatment such as subsequent gate oxide film formation are performed. The dopant diffusion in the supply layer can be suppressed. As a result, the effective spacer layer thickness reduction is eliminated, the hole mobility can be increased to about twice that of the prior art, and a field effect semiconductor device having excellent electrical characteristics can be provided.
[0021]
In addition, in order to eliminate the effective thickness reduction of the spacer layer based on the diffusion of the dopant in the carrier supply layer, a method different from the present invention can be considered. The first is a method of introducing a considerable amount of dopant into the carrier supply layer in advance so that the dopant concentration in the carrier supply layer is sufficient even if diffused, and the second is from the carrier supply layer. This is a method of forming a spacer layer having a film thickness that can secure a sufficient thickness even when dopant diffusion occurs. However, since the first method introduces a large amount of dopant into the carrier supply layer, the crystallinity of the carrier supply layer itself deteriorates, and the second method functions as a spacer layer. The thickness may become too large, and sufficient carriers cannot be supplied from the carrier supply layer. Therefore, it can be said that the method of the present invention is most effective.
[0022]
(Embodiment 2)
Hereinafter, the field effect semiconductor device according to the second embodiment of the present invention will be described with reference to the manufacturing process sectional view shown in FIG. The present embodiment is different from the above-described first embodiment in that, in the first embodiment, an electrically neutral element for suppressing the diffusion of the dopant in the carrier supply layer is introduced into the carrier supply layer. On the other hand, in this embodiment, not the carrier supply layer but a layer containing an electrically neutral element is provided in contact with the carrier supply layer.
[0023]
The field effect semiconductor device according to the present embodiment can be formed as follows.
[0024]
First, a layer 301a containing an electrically neutral element (here, C) that suppresses diffusion is formed on the buffer layer 102 of about 1000 nm formed on the semiconductor substrate 101 in the same manner as in the first embodiment. For example, a C-doped Si layer is formed by epitaxial growth of about 3 nm at a substrate temperature of 550 ° C. by UHV-CVD using, for example, disilane or methylsilane (FIG. 3A). At this time, by adjusting the gas partial pressure, the dose of C is preferably about 1 × 10 ¹⁹ cm ⁻³ to 1 × 10 ²⁰ cm ⁻³ .
[0025]
Next, as the carrier supply layer 302, for example, a B-doped Si layer is formed by epitaxial growth of about 10 nm at a substrate temperature of 550 ° C. by, for example, UHV-CVD using disilane (FIG. 3B). At this time, by adjusting the gas partial pressure, the dose of B is preferably about 5 × 10 ¹⁸ cm ⁻³ to 1 × 10 ²⁰ cm ⁻³ .
[0026]
Further, as a layer 301b containing an electrically neutral element that suppresses diffusion, for example, a C-doped Si layer is formed by epitaxial growth by about 3 nm at a substrate temperature of 550 ° C. by UHV-CVD using, for example, disilane or methylsilane. (FIG. 3C). At this time, by adjusting the gas partial pressure, the dose of C is preferably about 1 × 10 ¹⁹ cm ⁻³ to 1 × 10 ²⁰ cm ⁻³ .
[0027]
Next, a spacer layer 104 made of Si or the like is formed by epitaxial growth of about 3 nm at a substrate temperature of 550 ° C. by, for example, UHV-CVD using disilane (FIG. 3D). Subsequently, in the same manner as in the first embodiment, a channel layer 105 made of Si _0.7 Ge _0.3 or the like is formed by epitaxial growth at a substrate temperature of 550 ° C. at a substrate temperature of 550 ° C. by, for example, UHV-CVD using disilane and monogermane ( FIG. 3 (e)). Further, a cap layer 106 made of Si or the like is formed by epitaxial growth of about 10 nm at a substrate temperature of 550 ° C. by, for example, UHV-CVD using disilane (FIG. 3F). Thereafter, a field effect transistor is formed by a conventionally known process.
[0028]
With the above configuration, in the second embodiment of the present invention, an electrically neutral element that suppresses dopant diffusion is introduced into the upper and lower layers of the carrier supply layer, thereby forming a later gate oxide film. In the heat treatment such as the above, the dopant diffusion of the carrier supply layer can be suppressed. As a result, the effective spacer layer thickness reduction is eliminated, the hole mobility can be increased to about twice that of the prior art, and a field effect semiconductor device having excellent electrical characteristics can be provided.
[0029]
Although the field effect semiconductor device of the present invention has been described together with the embodiment, the method for forming the field effect transistor having these carrier supply layers in the above first and second embodiments is only a p-channel. Needless to say, n-type dopants such as P and As can also be applied to the n-channel, and F, N, etc. are used in addition to C as electrically neutral elements that suppress diffusion. be able to.
[0030]
Further, in Embodiment Mode 2, layers containing electrically neutral elements that suppress diffusion are formed on the upper and lower layers of the dopant layer. However, it is effective if they are formed at least on the channel layer side with respect to the carrier supply layer. Can be obtained.
[0031]
Further, as shown in the first embodiment, an electrically neutral element is added as shown in the second embodiment while an electrically neutral element is added to the carrier supply layer. If a layer is formed, a further effect can be obtained.
[0032]
【The invention's effect】
As described above, according to the field effect semiconductor device of the present invention, at least the carrier supply layer of the carrier supply layer applied in order to avoid a decrease in mobility due to carrier impurity scattering or the layer in contact with the upper and lower sides of the carrier layer. On the other hand, the layer in contact with the channel layer side contains an electrically neutral element that suppresses the diffusion of the dopant, thereby suppressing the diffusion of the dopant in the carrier supply layer in the subsequent heat treatment such as gate oxide film formation. Thus, a field effect semiconductor device having excellent electrical characteristics can be obtained without destroying the impurity doping profile.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a field effect semiconductor device according to a first embodiment of the present invention. FIG. 2 is a cross-sectional view of a manufacturing process prior to a gate oxide film of the field effect semiconductor device according to a first embodiment of the present invention. 3 is a cross-sectional view of the manufacturing process before the gate oxide film of the field effect semiconductor device according to the second embodiment of the present invention.
DESCRIPTION OF SYMBOLS 101 Semiconductor substrate 102 Buffer layer 103 Carrier supply layer containing dopant diffusion suppressing element 104 Spacer layer 105 Channel layer 106 Cap layer 107 Gate oxide film 108 Gate 109 Source / drain 301a Dopant diffusion suppressing layer 301b Dopant diffusion suppressing layer 302 Carrier supplying layer

Claims (7)

A channel layer formed on the substrate and a carrier supply layer that suppresses a decrease in mobility due to impurity scattering of carriers, and an electrically neutral element that suppresses diffusion of the dopant is contained in the carrier supply layer. in that is contained electric field effect type semiconductor device,
The field effect semiconductor device, wherein a dopant used for the carrier supply layer is at least one selected from B, P, and As.   The field effect semiconductor device according to claim 1, wherein the carrier supply layer is made of epitaxial silicon or epitaxial silicon germanium. A channel layer formed on the substrate, and a carrier supply layer that suppresses a decrease in mobility due to impurity scattering of carriers, and at least an electricity that suppresses diffusion of dopants toward the channel layer with respect to the carrier supply layer to the electric field effect type semiconductor device in which a layer neutral element is contained,
The field effect semiconductor device, wherein a dopant used for the carrier supply layer is at least one selected from B, P, and As.   4. The field effect semiconductor device according to claim 3, wherein the layer containing an electrically neutral element is made of epitaxial silicon or epitaxial silicon germanium.   5. The field effect semiconductor according to claim 1, wherein the electrically neutral element that suppresses the diffusion of the dopant is at least one selected from C, F, and N. apparatus. A method of manufacturing a field effect semiconductor device having a channel layer formed on a substrate and a carrier supply layer that suppresses a decrease in mobility due to impurity scattering of carriers, wherein the carrier supply layer is formed by epitaxial growth to form a p-type. or have a step of forming by electrically simultaneously doping the neutral element to suppress an n-type dopant and diffusion,
A method of manufacturing a field effect semiconductor device, wherein a dopant used for the carrier supply layer is at least one selected from B, P, and As . A method for manufacturing a field effect semiconductor device, comprising: a channel layer formed on a substrate; and a carrier supply layer that suppresses a decrease in mobility due to impurity scattering of carriers, the channel being at least with respect to the carrier supply layer by epitaxial growth layer side, electrically possess the step of forming the suppressing layer dopant diffusion by simultaneously doping a neutral element, the dopant used for the carrier supply layer B, P, from among as A method of manufacturing a field effect semiconductor device, wherein the method is at least one selected .

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