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JP4096492B2 - Flat semiconductor device and manufacturing method thereof - Google Patents
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JP4096492B2 - Flat semiconductor device and manufacturing method thereof - Google Patents

Flat semiconductor device and manufacturing method thereof Download PDF

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Publication number
JP4096492B2
JP4096492B2 JP2000109216A JP2000109216A JP4096492B2 JP 4096492 B2 JP4096492 B2 JP 4096492B2 JP 2000109216 A JP2000109216 A JP 2000109216A JP 2000109216 A JP2000109216 A JP 2000109216A JP 4096492 B2 JP4096492 B2 JP 4096492B2
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Japan
Prior art keywords
plate
buffer plate
semiconductor chip
thickness adjusting
flat
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JP2000109216A
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JP2001291824A (en
Inventor
恭一 卜部
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Fuji Electric Co Ltd
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Fuji Electric Device Technology Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors

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Description

【0001】
【発明の属する技術分野】
この発明は、複数個の半導体チップを一括して圧接した構造の平型絶縁ゲート型バイポーラトランジスタなどの平型半導体装置に関する。
【0002】
【従来の技術】
図6は、従来の平型半導体装置の要部断面図である。平型構造の絶縁ゲート型バイポーラトランジスタ(以下、IGBTと称す)など、複数個の半導体チップ1(例えば、IGBTチップとフリーホイールダイオードチップ)を一括して圧接した状態で使用する平型半導体装置は、対向する2つの圧接電極板76、67の間に、半導体チップ61と、その上下両面に熱緩衝板62、63を重ねたものを挟み込む構造となっており、特開平8−88240号に開示されている。
【0003】
この半導体チップ61の両面に重ねられる熱緩衝板62、63は、熱伝導が良好な厚み1〜3mmのMo板からなり、半導体チップ61で発生した熱を、半導体チップ61の上下両面から放散する働きがあり、いわゆる、両面冷却を可能としている。前記の特開平8−88240号では、さらに半導体チップ61や熱緩衝板62、63に厚みのばらつきや片加圧が生じた場合、圧接する圧力にばらつきが生じる。そうすると、半導体チップ61、熱緩衝板61、63、圧接電極板間66、67の良好な電気的接触を得ることが困難となる。それを解消するために、圧接電極板66、67と熱緩衝板62、63の間に、Ag箔の軟金属シートからなる厚み補正板64、65を介在させ、半導体チップ61、熱緩衝板62、63、圧接電極板66、67の良好な電気的接触を確保している。
【0004】
【発明が解決しようとする課題】
しかし、これらの技術には問題がある。半導体チップ61、熱緩衝板62、63は互いに分離した状態で、圧接電極板66、67間に組み込まれるため、加圧状態以外では、位置ずれを生じる可能性がある。これを防止するために、前記の特開平8−88240号では、半導体チップ61、熱緩衝板62、63を位置決めフレーム65内に収納し、保持する構造としている。この場合、確かに位置ずれは生じにくくなるが、半導体チップ61、熱緩衝板62、63が密着固定されていないため、位置ずれ防止策としては十分でない。
【0005】
また、半導体チップ61など構成部材の厚みのばらつきを補正するために、一度加圧し、厚み補正板64、65のAg箔を減少させた後で、再度加圧する場合、この位置ずれがあると、再加圧後の厚み調整は困難となる。
この発明の目的は、前記の課題を解決して、半導体チップおよび熱緩衝板などの構成部材を圧接電極間に挟み込んで組み立てた後、加圧時はもちろんのこと、加圧除去時においても、組み込まれた構成部材の位置ずれを生ずることなく、安定した構成部材の厚み調整が可能となる平型半導体装置およびその製造方法を提供することである。
【0006】
【課題を解決するための手段】
前記の目的を達成するために、同一平面上に配設された複数の半導体チップと、該半導体チップごとに、その両主面に重ねて設けた熱緩衝板と、これらを挟持する2つの圧接電極板とを具備する平型半導体装置において、前記半導体チップと前記熱緩衝板との間に、黒鉛シートで形成された第1厚み調整板をそれぞれ挟み込み、加圧加熱により前記半導体チップと前記熱緩衝板とを第1厚み調整板を介して互いに密着させた構成とする。
【0007】
また、前記半導体チップと前記熱緩衝板とが前記第1厚み調整板により互いに位置決めされる構成とするとよい。
また、前記第1厚み調整板は前記半導体チップおよび前記熱緩衝板との接触面に凹部を有し、該凹部の内周により、前記半導体チップおよび前記熱緩衝板の外周部を位置決めする構成とするとよい。
【0008】
また、前記熱緩衝板と前記圧接電極板との間に、黒鉛シートで形成された第2厚み調整板をそれぞれ挟む込み、加熱加圧により前記熱緩衝板と前記圧接電極板とを第2厚み調整板を介して互いに密着させた構成とするとよい。
また、
前記第1厚み調整板が、前記半導体チップと前記熱緩衝板より大きく、前記半導体チップと前記熱緩衝板に接触しない前記第1厚み調整板の外周部が、凸部形状となり、前記第2厚み調整板が、前記熱緩衝板より大きく、前記熱緩衝板に接触しない前記第2厚み調整板の外周部が、凸部形状となるとよい。
【0009】
造方法としては、水を含んだ膨張黒鉛シートを所定の大きさに切断する工程と、前記半導体チップと前記熱緩衝板との間に、前記切断した膨張黒鉛シートをそれぞれ挟み込む工程とこれらを加圧加熱して前記半導体チップと前記熱緩衝板との間を前記黒鉛シートを介して互いに密着させる工程とを含むものとし、さらに、前記挟み込む工程は、前記熱緩衝板と前記圧接電極板との間にも、前記切断した膨張黒鉛シートをそれぞれ挟み込むものであり、前記密着させる工程は、前記加熱加圧により、前記熱緩衝板と前記圧接電極板との間も前記黒鉛シートを介して互いに密着させる工程を含む製造方法とする。
【0010】
【発明の実施の形態】
図1は、この発明の第1実施例の平型半導体装置の要部断面図である。IGBTチップやフリーホイールダイオードチップなどの半導体チップ1の上下に、それぞれ厚み調整板6、7を介して熱緩衝板2、3を重ねて、コレクタ電極板である圧接接触板4とエミッタ電極板である圧接接触板5の間に挟持されている。
【0011】
厚み調整板6、7(従来技術の厚み補正板と同意語)は、半導体チップ1、熱緩衝板2、3の厚みにばらつきがある場合、その厚みを調整して、圧接電極板4、5間に配置された複数個の半導体チップ1に均等な加圧力が加わるよう設けたものである。厚み調整板6、7は、黒鉛シート(厚み0.1mm〜0.3mm)からなる。
【0012】
この黒鉛シートの製作方法を説明する。天然黒鉛を濃硫酸によって酸処理すると、層状のカーボンの層間に硫酸が吸収される。これを1000℃以上の高温の炉内にて、急速に加熱することにより、吸収された硫酸が蒸発離脱し、そのとき黒鉛が膨張して、膨張化黒鉛が得られる。この膨張化黒鉛をロール圧延することにより、厚みを1/10〜1/100まで圧縮し、厚み0.5mm〜3mmの黒鉛シートを得る。これをさらに圧縮して厚み0.2mm〜2mmの黒鉛シートとする。
【0013】
つぎに、この黒鉛シートを、チップの大きさ相当の大きさに切断して得た厚み調整板を、水中に浸漬して、水を含漬させる。この水を含漬した厚み調整板を、熱緩衝板2、3と半導体チップ1(IGBTチップおよびFRDチップ)の間に挟み込んで、さらに、これらを圧接電極板4、5間に挟持する。さらに、温度100℃〜200℃にて、この圧接電極板4、5間に、1個の半導体チップあたり10N〜41Nの加圧力を加える。この加圧加熱により、厚み調整板6、7に含漬した水が蒸発するとともに、厚み調整板6、7は圧縮され、このとき、半導体チップ1の厚みのばらつき、熱緩衝板2、3の厚みのばらつきが、厚み調整板6、7の圧縮量によって調整される。以上の工程により、半導体チップ1および熱緩衝板2、3は、その間に挟んだ厚み調整板6、7によって、それぞれの厚みのばらつきが調整されるとともに、黒鉛シートから形成された厚み調整板6、7を介して密着することになる。
【0014】
この密着は、平型半導体装置が無加圧のときも、密着しており、運搬などの通常の振動では離れることはない。そのため、完成した平型半導体装置には、前記した特開平8−88240号で不可欠であった位置決めガイド65は不要となる。
図2は、この発明の第2実施例の平型半導体装置の要部断面図である。半導体チップ1、熱緩衝板12、13の間に厚み調整板17、18の他、熱緩衝板12、13と2つの圧接電極板4、5間にも、厚み調整板19、20を設ける。熱緩衝板12、13と圧接電極板4、5の間にも厚さ調整板19、20を挿入することで、半導体チップ1や熱緩衝板12、13の厚みばらつきが大きい場合でも厚みの調整ができる。
【0015】
図3は、この発明の第3実施例の平型半導体装置の要部断面図である。図2との違いは、熱緩衝板22、23と圧接電極板4、5の間に挟み込む厚み調整板29、30が、熱緩衝板22、23と個別に密着している点である。この場合も図2と同様の効果が期待できる。尚、図中の27、28は厚み調整板で、図2の17、18に相当している。
【0016】
図4は、この発明の第4実施例の平型半導体装置の要部断面図である。半導体チップ1、熱緩衝板32、33と、圧接電極板4、5とそれぞれ接する厚み調整板37、38、39、40について、半導体チップ1、熱緩衝板32、33を側面から位置決めするように、厚み調整板32、33の端部Aを凸部形状とする。この端部を凸部形状とするには、図2の場合より、厚み調整板を半導体チップ1、熱緩衝板32、33、圧接電極板4、5の間に挟み込んだ後、加圧加熱するときの加圧力を高くする。この加圧力は、例えば5N〜10Nにする。このように厚み調整板37、38、39、40の端部Aを凸部形状とすることによって、平型半導体装置に強い衝撃が与えられた場合でも、半導体チップ1、熱緩衝板32、33の位置ずれを確実に防止できる。
【0017】
また、このように、黒鉛シートを厚み調整板37、38、39、40として用いることで、図6で必要とされた位置決めフレーム65が不要となり、製造コストを低減できる。
図5は、この発明の第5実施例の平型半導体装置の要部断面図である。図4との違いは、圧接電極板4と密着する厚み調整板49が1枚である点であることである。この場合も図4と同様の効果が期待できる。尚、図中の47、48、50は厚み調整板で図5の37、38、40に相当している。
【0018】
【発明の効果】
この発明によれば、圧接電極板間に挟持されて平型半導体装置を構成する半導体チップおよび熱緩衝板間に膨張黒鉛シートで形成した厚み調整板を用いることにより、半導体チップおよび熱緩衝板の厚みのばらつきの調整が容易にできるとともに、半導体チップおよび熱緩衝板とを密着させることができる。この密着によって、半導体チップと熱緩衝板が一体化されるため、加圧が除去された状態にても半導体チップと熱緩衝板が分離して位置ずれを起こすことがなくなり、厚み調整板による厚み調整機能を安定して得ることが可能となる。さらに、厚み調整板を熱緩衝板と圧接電極板間にも配設することで、半導体チップ、熱緩衝板と圧接電極板が密着することになり、厚み調整機能がより安定して得ることができる。また、厚み調整板の端部が凸部になるようにすることで、半導体チップと熱緩衝板の位置決めが容易になり、また、強い衝撃があった場合でも、位置ずれを防止できる。また、半導体チップ、熱緩衝板の位置を固定する位置決めフレームを不要し、製造コストを低減できる。
【図面の簡単な説明】
【図1】この発明の第1実施例の平型半導体装置の要部断面図
【図2】この発明の第2実施例の平型半導体装置の要部断面図
【図3】この発明の第3実施例の平型半導体装置の要部断面図
【図4】この発明の第4実施例の平型半導体装置の要部断面図
【図5】この発明の第5実施例の平型半導体装置の要部断面図
【図6】従来の平型半導体装置の要部断面図
【符号の説明】
1 半導体チップ
2、3、12、13、22、23 熱緩衝板
32、33、42、43 熱緩衝板
4、5 圧接電極板
6、7、16、17、19、20 厚み調整板
27、28、29、30、37、38、39、40 厚み調整板
47、48、49、50 厚み調整板
A 端部
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a flat semiconductor device such as a flat insulated gate bipolar transistor having a structure in which a plurality of semiconductor chips are pressed together.
[0002]
[Prior art]
FIG. 6 is a cross-sectional view of a main part of a conventional flat semiconductor device. A flat semiconductor device that uses a plurality of semiconductor chips 1 (for example, an IGBT chip and a freewheel diode chip) in a pressure-contact state at once, such as a flat structure insulated gate bipolar transistor (hereinafter referred to as an IGBT). The semiconductor chip 61 is sandwiched between two opposing pressure contact electrode plates 76 and 67 and the heat buffer plates 62 and 63 are stacked on both upper and lower surfaces thereof, which is disclosed in JP-A-8-88240. Has been.
[0003]
The heat buffer plates 62 and 63 stacked on both surfaces of the semiconductor chip 61 are made of a Mo plate having a thickness of 1 to 3 mm with good heat conduction, and dissipate heat generated in the semiconductor chip 61 from the upper and lower surfaces of the semiconductor chip 61. It has a function and enables so-called double-sided cooling. In the above-mentioned JP-A-8-88240, when the semiconductor chip 61 and the heat buffer plates 62 and 63 are subjected to thickness variations or one-side pressurization, variations occur in the pressure to be pressed. Then, it becomes difficult to obtain good electrical contact between the semiconductor chip 61, the heat buffer plates 61 and 63, and the pressure contact electrode plates 66 and 67. In order to solve this problem, the thickness correction plates 64 and 65 made of a soft metal sheet of Ag foil are interposed between the pressure contact electrode plates 66 and 67 and the thermal buffer plates 62 and 63, so that the semiconductor chip 61 and the thermal buffer plate 62 are interposed. 63, and the press contact electrode plates 66 and 67 ensure good electrical contact.
[0004]
[Problems to be solved by the invention]
However, there are problems with these technologies. Since the semiconductor chip 61 and the heat buffer plates 62 and 63 are incorporated between the pressure contact electrode plates 66 and 67 in a state of being separated from each other, there is a possibility of causing a positional deviation except in a pressurized state. In order to prevent this, Japanese Patent Laid-Open No. 8-88240 has a structure in which the semiconductor chip 61 and the heat buffer plates 62 and 63 are housed and held in the positioning frame 65. In this case, the positional deviation is hardly generated, but since the semiconductor chip 61 and the heat buffer plates 62 and 63 are not closely fixed, it is not sufficient as a positional deviation prevention measure.
[0005]
In addition, in order to correct the variation in the thickness of the constituent members such as the semiconductor chip 61, when the pressure is once applied, the Ag foil of the thickness correction plates 64 and 65 is reduced, and then the pressure is applied again, if there is this misalignment, It becomes difficult to adjust the thickness after repressurization.
The object of the present invention is to solve the above-mentioned problems, and after assembling the components such as the semiconductor chip and the heat buffer plate between the press contact electrodes, not only during pressurization but also during pressure removal, It is an object of the present invention to provide a flat semiconductor device and a method for manufacturing the same, in which the thickness of the constituent member can be adjusted stably without causing a positional shift of the incorporated constituent member.
[0006]
[Means for Solving the Problems]
In order to achieve the above-mentioned object, a plurality of semiconductor chips arranged on the same plane, a thermal buffer plate provided on each of the principal surfaces of each of the semiconductor chips, and two press-contacts sandwiching them. in the flat type semiconductor device including an electrode plate, between the heat buffer plate and the semiconductor chip sandwiched first thickness adjusting plate formed of graphite sheet, respectively, the heat of the semiconductor chip by pressure and heat The buffer plate is configured to be in close contact with each other via the first thickness adjusting plate .
[0007]
Further, it is preferable that before Symbol semiconductor chip and the heat buffer plate is configured to be positioned with respect to each other by said first thickness adjusting plate.
The first thickness adjusting plate has a recess in a contact surface between the semiconductor chip and the thermal buffer plate, and an outer periphery of the semiconductor chip and the thermal buffer plate is positioned by an inner periphery of the recess. Good.
[0008]
Also, between the heat buffer plate and the pressure-contact electrode plates, write sandwiching second thickness adjusting plate formed of graphite sheet, respectively, the second thickness and the pressure-contacting electrode plate and the heat buffer plate by heating and pressurizing It is good to set it as the structure mutually stuck through the adjustment board .
Also,
The first thickness adjusting plate is larger than the semiconductor chip and the thermal buffer plate, and an outer peripheral portion of the first thickness adjusting plate that does not contact the semiconductor chip and the thermal buffer plate has a convex shape, and the second thickness. adjusting plate is greater Ri by the heat buffer plate, the outer peripheral portion of the second thickness adjusting plate not in contact with the heat buffer plate, it may become convex shape.
[0009]
The manufacturing method includes the step of cutting the expanded graphite sheet containing water to a predetermined size, between the semiconductor chip and the heat buffer plate, and the cut expanded graphite sheet was sandwiched respectively write no step And a step of pressurizing and heating them to bring the semiconductor chip and the thermal buffer plate into close contact with each other via the graphite sheet , and the step of sandwiching includes the step of pressing the thermal buffer plate and the press contact The cut expanded graphite sheet is sandwiched between the electrode plates, and the step of adhering is performed by heating and pressurizing the graphite sheet between the thermal buffer plate and the pressure contact electrode plate. The manufacturing method includes a step of closely contacting each other .
[0010]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a cross-sectional view of an essential part of a flat semiconductor device according to a first embodiment of the present invention. Heat buffer plates 2 and 3 are stacked on top and bottom of a semiconductor chip 1 such as an IGBT chip or a free wheel diode chip via thickness adjusting plates 6 and 7, respectively, and a pressure contact plate 4 and an emitter electrode plate which are collector electrode plates. It is sandwiched between some pressure contact plates 5.
[0011]
When the thickness adjustment plates 6 and 7 (synonymous with the thickness correction plate of the prior art) vary in the thickness of the semiconductor chip 1 and the heat buffer plates 2 and 3, the thickness adjustment plates 6 and 7 are adjusted to adjust the thickness of the pressure contact electrode plates 4 and 5. It is provided so that a uniform pressing force is applied to a plurality of semiconductor chips 1 arranged therebetween. The thickness adjusting plates 6 and 7 are made of graphite sheets (thickness 0.1 mm to 0.3 mm).
[0012]
A method for producing the graphite sheet will be described. When natural graphite is acid-treated with concentrated sulfuric acid, sulfuric acid is absorbed between layered carbon layers. By rapidly heating this in a furnace at a high temperature of 1000 ° C. or higher, the absorbed sulfuric acid is evaporated and separated, and at that time, the graphite expands to obtain expanded graphite. By rolling the expanded graphite, the thickness is compressed to 1/10 to 1/100 to obtain a graphite sheet having a thickness of 0.5 mm to 3 mm. This is further compressed into a graphite sheet having a thickness of 0.2 mm to 2 mm.
[0013]
Next, a thickness adjusting plate obtained by cutting the graphite sheet into a size corresponding to the size of the chip is immersed in water to impregnate water. The thickness adjusting plate containing water is sandwiched between the thermal buffer plates 2 and 3 and the semiconductor chip 1 (IGBT chip and FRD chip), and these are further sandwiched between the press contact electrode plates 4 and 5. Further, a pressurizing force of 10 N to 41 N is applied between the pressure contact electrode plates 4 and 5 at a temperature of 100 ° C. to 200 ° C. per semiconductor chip. By this pressure heating, the water contained in the thickness adjusting plates 6 and 7 evaporates and the thickness adjusting plates 6 and 7 are compressed. At this time, the thickness variation of the semiconductor chip 1, the heat buffer plates 2 and 3 The variation in thickness is adjusted by the compression amount of the thickness adjusting plates 6 and 7. Through the above steps, the semiconductor chip 1 and the heat buffer plates 2 and 3 are adjusted in thickness variation by the thickness adjusting plates 6 and 7 sandwiched therebetween, and the thickness adjusting plate 6 formed from a graphite sheet. , 7 will be in close contact.
[0014]
This close contact is in close contact even when the flat semiconductor device is not pressurized, and is not separated by normal vibration such as transportation. Therefore, the completed flat semiconductor device does not require the positioning guide 65 that is indispensable in Japanese Patent Laid-Open No. 8-88240.
FIG. 2 is a cross-sectional view of an essential part of a flat semiconductor device according to the second embodiment of the present invention. In addition to the thickness adjusting plates 17 and 18 between the semiconductor chip 1 and the heat buffer plates 12 and 13, thickness adjusting plates 19 and 20 are also provided between the heat buffer plates 12 and 13 and the two press contact electrode plates 4 and 5. Thickness adjustment plates 19 and 20 are also inserted between the thermal buffer plates 12 and 13 and the pressure contact electrode plates 4 and 5 to adjust the thickness even when the semiconductor chip 1 and the thermal buffer plates 12 and 13 have large thickness variations. Can do.
[0015]
FIG. 3 is a sectional view showing the principal part of a flat semiconductor device according to a third embodiment of the present invention. The difference from FIG. 2 is that the thickness adjusting plates 29 and 30 sandwiched between the thermal buffer plates 22 and 23 and the pressure contact electrode plates 4 and 5 are in close contact with the thermal buffer plates 22 and 23 individually. In this case, the same effect as in FIG. 2 can be expected. In the figure, reference numerals 27 and 28 denote thickness adjusting plates, which correspond to 17 and 18 in FIG.
[0016]
FIG. 4 is a sectional view showing the principal part of a flat semiconductor device according to the fourth embodiment of the present invention. The semiconductor chip 1 and the heat buffer plates 32 and 33 and the thickness adjusting plates 37, 38, 39 and 40 which are in contact with the pressure contact electrode plates 4 and 5 are positioned so that the semiconductor chip 1 and the heat buffer plates 32 and 33 are positioned from the side. The end portions A of the thickness adjusting plates 32 and 33 have a convex shape. In order to make this end portion into a convex shape, the thickness adjusting plate is sandwiched between the semiconductor chip 1, the heat buffer plates 32 and 33, and the pressure contact electrode plates 4 and 5, and then pressurized and heated as compared with the case of FIG. 2. Increase the applied pressure. This applied pressure is, for example, 5N to 10N. As described above, by forming the end A of the thickness adjusting plates 37, 38, 39, and 40 into a convex shape, even when a strong impact is applied to the flat semiconductor device, the semiconductor chip 1 and the heat buffer plates 32 and 33 are provided. Can be reliably prevented.
[0017]
Further, by using the graphite sheet as the thickness adjusting plates 37, 38, 39, and 40 in this way, the positioning frame 65 required in FIG. 6 is not necessary, and the manufacturing cost can be reduced.
FIG. 5 is a sectional view showing the principal part of a flat semiconductor device according to a fifth embodiment of the present invention. The difference from FIG. 4 is that the thickness adjusting plate 49 in close contact with the pressure contact electrode plate 4 is one. In this case, the same effect as in FIG. 4 can be expected. In the figure, reference numerals 47, 48 and 50 denote thickness adjusting plates which correspond to 37, 38 and 40 in FIG.
[0018]
【The invention's effect】
According to this invention, by using the thickness adjusting plate formed of the expanded graphite sheet between the semiconductor chip and the thermal buffer plate sandwiched between the pressure contact electrode plates and constituting the flat semiconductor device, the semiconductor chip and the thermal buffer plate The thickness variation can be easily adjusted, and the semiconductor chip and the heat buffer plate can be brought into close contact with each other. Since the semiconductor chip and the heat buffer plate are integrated by this close contact, the semiconductor chip and the heat buffer plate do not separate even when the pressure is removed, and the thickness does not shift. The adjustment function can be obtained stably. Furthermore, by disposing the thickness adjusting plate between the heat buffer plate and the press contact electrode plate, the semiconductor chip, the heat buffer plate and the press contact electrode plate are brought into close contact, and the thickness adjusting function can be obtained more stably. it can. In addition, by making the end portion of the thickness adjusting plate a convex portion, the positioning of the semiconductor chip and the heat buffer plate can be facilitated, and even when there is a strong impact, displacement can be prevented. Further, a positioning frame for fixing the positions of the semiconductor chip and the heat buffer plate is not required, and the manufacturing cost can be reduced.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of main parts of a flat semiconductor device according to a first embodiment of the present invention. FIG. 2 is a cross-sectional view of main parts of a flat semiconductor device according to a second embodiment of the invention. FIG. 4 is a fragmentary cross-sectional view of a flat semiconductor device according to a third embodiment. FIG. 4 is a fragmentary cross-sectional view of a flat semiconductor device according to a fourth embodiment of the invention. FIG. 6 is a cross-sectional view of a main part of a conventional flat semiconductor device.
1 Semiconductor chip 2, 3, 12, 13, 22, 23 Thermal buffer plate 32, 33, 42, 43 Thermal buffer plate 4, 5 Press-contact electrode plate 6, 7, 16, 17, 19, 20 Thickness adjusting plates 27, 28 , 29, 30, 37, 38, 39, 40 Thickness adjusting plates 47, 48, 49, 50 Thickness adjusting plate A End

Claims (7)

同一平面上に配設された複数の半導体チップと、該半導体チップごとに、その両主面に重ねて設けた熱緩衝板と、これらを挟持する2つの圧接電極板とを具備する平型半導体装置において、前記半導体チップと前記熱緩衝板との間に、黒鉛シートで形成された第1厚み調整板をそれぞれ挟み込み、加圧加熱により前記半導体チップと前記熱緩衝板とを第1厚み調整板を介して互いに密着させたことを特徴とする平型半導体装置。A flat semiconductor comprising a plurality of semiconductor chips arranged on the same plane, a thermal buffer plate provided on each principal surface of each of the semiconductor chips, and two press-contact electrode plates sandwiching them. In the apparatus, a first thickness adjusting plate formed of a graphite sheet is sandwiched between the semiconductor chip and the thermal buffer plate, and the semiconductor chip and the thermal buffer plate are bonded to each other by pressure heating. flat type semiconductor device which is characterized in that is in close contact with each other through a. 前記半導体チップと前記熱緩衝板とが前記第1厚み調整板により互いに位置決めされることを特徴とする請求項1に記載の平型半導体装置。The flat semiconductor device according to claim 1, wherein the semiconductor chip and the heat buffer plate are positioned with respect to each other by the first thickness adjusting plate. 前記第1厚み調整板は前記半導体チップおよび前記熱緩衝板との接触面に凹部を有し、該凹部の内周により、前記半導体チップおよび前記熱緩衝板の外周部を位置決めすることを特徴とする請求項1に記載の平型半導体装置。The first thickness adjusting plate has a recess in a contact surface between the semiconductor chip and the heat buffer plate, and an outer periphery of the semiconductor chip and the heat buffer plate is positioned by an inner periphery of the recess. The flat semiconductor device according to claim 1. 前記熱緩衝板と前記圧接電極板との間に、黒鉛シートで形成された第2厚み調整板をそれぞれ込み、加熱加圧により前記熱緩衝板と前記圧接電極板とを第2厚み調整板を介して互いに密着させたことを特徴とする請求項1に記載の平型半導体装置。Between the pressure contact electrode plate and the heat buffer plate, the second thickness adjusting plate formed of graphite sheet respectively narrowing seen today the pressure electrode plate and a second thickness adjusting and the heat buffer plate by heating and pressurizing 2. The flat semiconductor device according to claim 1, wherein the flat semiconductor devices are in close contact with each other via a plate . 前記第1厚み調整板が、前記半導体チップと前記熱緩衝板より大きく、前記半導体チップと前記熱緩衝板に接触しない前記第1厚み調整板の外周部が、凸部形状となり、前記第2厚み調整板が、前記熱緩衝板より大きく、前記熱緩衝板に接触しない前記第2厚み調整板の外周部が、凸部形状となることを特徴とする請求項4に記載の平型半導体装置。The first thickness adjusting plate is larger than the semiconductor chip and the thermal buffer plate, and an outer peripheral portion of the first thickness adjusting plate that does not contact the semiconductor chip and the thermal buffer plate has a convex shape, and the second thickness. adjusting plate is greater Ri by the heat buffer plate, the flat type semiconductor device according to claim 4, the outer peripheral portion of the second thickness adjusting plate not in contact with the heat buffer plate, characterized in that the convex shape . 同一平面上に配設された複数の半導体チップと、該半導体チップごとに、その両主面に重ねて設けた熱緩衝板と、これらを挟持する2つの圧接電極板とを具備する平型半導体装置の製造方法において、
水を含んだ膨張黒鉛シートを所定の大きさに切断する工程と、前記半導体チップと前記熱緩衝板との間に、前記切断した膨張黒鉛シートをそれぞれ挟み込む工程とこれらを加圧加熱して前記半導体チップと前記熱緩衝板との間を前記黒鉛シートを介して互いに密着させる工程とを含むことを特徴とする平型半導体装置の製造方法。
A flat semiconductor comprising a plurality of semiconductor chips arranged on the same plane, a thermal buffer plate provided on each principal surface of each of the semiconductor chips, and two press-contact electrode plates sandwiching them. In the device manufacturing method,
A step of cutting the expanded graphite sheet containing water to a predetermined size, wherein between the semiconductor chip and the heat buffer plate, the cutting and the respective scissors write No step expanded graphite sheet was, these pressure heating And a step of bringing the semiconductor chip and the thermal buffer plate into close contact with each other via the graphite sheet .
前記挟み込む工程は、前記熱緩衝板と前記圧接電極板との間にも、前記切断した膨張黒鉛シートをそれぞれ挟み込むものであり、The sandwiching step includes sandwiching the cut expanded graphite sheet between the thermal buffer plate and the pressure contact electrode plate,
前記密着させる工程は、前記加熱加圧により、前記熱緩衝板と前記圧接電極板との間も前記黒鉛シートを介して互いに密着させる工程であることを特徴とする請求項6に記載の平型半導体装置の製造方法。  The flat mold according to claim 6, wherein the closely contacting step is a step of closely contacting the thermal buffer plate and the press-contact electrode plate through the graphite sheet by the heating and pressing. A method for manufacturing a semiconductor device.
JP2000109216A 2000-04-11 2000-04-11 Flat semiconductor device and manufacturing method thereof Expired - Fee Related JP4096492B2 (en)

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