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JP4109645B2 - Manufacturing method of chip resistor - Google Patents
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JP4109645B2 - Manufacturing method of chip resistor - Google Patents

Manufacturing method of chip resistor Download PDF

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JP4109645B2
JP4109645B2 JP2004096315A JP2004096315A JP4109645B2 JP 4109645 B2 JP4109645 B2 JP 4109645B2 JP 2004096315 A JP2004096315 A JP 2004096315A JP 2004096315 A JP2004096315 A JP 2004096315A JP 4109645 B2 JP4109645 B2 JP 4109645B2
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electrode
chip resistor
insulating substrate
resistor
film
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JP2005286016A (en
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和夫 北原
健太郎 松本
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Koa Corp
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Description

本発明は、角形絶縁基板の両端部に一対の電極を備え、その電極間に厚膜等の抵抗体を配置し、該抵抗体を保護膜で被覆した構造のチップ抵抗器、及びその製造方法に関する。   The present invention provides a chip resistor having a structure in which a pair of electrodes is provided at both ends of a rectangular insulating substrate, a resistor such as a thick film is disposed between the electrodes, and the resistor is covered with a protective film, and a method for manufacturing the chip resistor About.

従来から、上記構造のチップ抵抗器が各種の電子機器等に搭載され、各種産業分野において広く使用されている。係るチップ抵抗器は、アルミナ等の角形の絶縁基板表裏面に一対の表面電極および裏面電極を設け、その表面電極に接続するように絶縁基板の表面側に抵抗体を配置し、該抵抗体を保護膜で被覆し、絶縁基板の両端部の表面、側面、裏面にめっき層を含む電極を形成することにより構成されている(例えば特許文献1参照)。
実用新案登録第2545546号公報
Conventionally, the chip resistor having the above structure is mounted on various electronic devices and is widely used in various industrial fields. Such a chip resistor is provided with a pair of front and back electrodes on the front and back surfaces of a rectangular insulating substrate such as alumina, and a resistor is disposed on the surface side of the insulating substrate so as to be connected to the front surface electrode. It is configured by covering with a protective film and forming electrodes including plating layers on the front, side, and back surfaces of both ends of the insulating substrate (see, for example, Patent Document 1).
Utility Model Registration No. 2545546

係るチップ抵抗器のサイズは、例えば3.2mm×1.6mm程度の比較的大きなものから、0.4mm×0.2mm程度の小さなものまで各種のサイズが揃えられ、チップ抵抗器のサイズは徐々に微小化していく傾向にある。   The size of the chip resistor is varied from a relatively large size of, for example, about 3.2 mm × 1.6 mm to a small size of about 0.4 mm × 0.2 mm, and the size of the chip resistor is gradually increased. It tends to be miniaturized.

図8は、従来のチップ抵抗器の構成例を示す。角形絶縁基板11の表面側両端部に表面電極12,13が配置され、これに接続する抵抗体16が表面電極12,13間に配置されている。そして、抵抗体16を被覆して保護する保護膜17,18が配置されている。   FIG. 8 shows a configuration example of a conventional chip resistor. Surface electrodes 12 and 13 are disposed at both end portions on the surface side of the rectangular insulating substrate 11, and a resistor 16 connected to the surface electrodes 12 and 13 is disposed between the surface electrodes 12 and 13. Then, protective films 17 and 18 for covering and protecting the resistor 16 are disposed.

上記チップ抵抗器においては、大判の絶縁基板を準備し、各チップ区画毎に電極や抵抗膜や保護膜をスクリーン印刷等により一括して形成し、その後大判の絶縁基板を多数のチップ区画に対応した絶縁基板に分割または切断することにより、個々のチップ抵抗器を製造している。このため、チップ抵抗器のサイズが微小化してくるにしたがい、絶縁基板11の厚さも薄くなる傾向にある。そして、保護膜18の表面もチップサイズが微小化してくるに伴い丸みを帯びてくる傾向にある。このため、チップ抵抗器の最も高い部分である頂部Aが、保護膜17,18の中央部付近に形成される。   In the above chip resistor, a large-sized insulating substrate is prepared, and electrodes, resistance films, and protective films are collectively formed by screen printing for each chip section, and then a large-sized insulating substrate is supported for a large number of chip sections. Individual chip resistors are manufactured by dividing or cutting the insulating substrate. For this reason, the thickness of the insulating substrate 11 tends to become thinner as the size of the chip resistor becomes smaller. The surface of the protective film 18 also tends to be rounded as the chip size becomes smaller. For this reason, the top part A which is the highest part of the chip resistor is formed in the vicinity of the central part of the protective films 17 and 18.

チップ抵抗器のプリント基板等への実装に際して、吸着ノズルでチップ抵抗器を真空吸着し、該チップ抵抗器をプリント基板上の所定のランドに搭載する。この搭載に際して、バキュームノズルで押圧すると、チップ抵抗器表面側の丸みを帯びた保護膜16の頂部Aに押圧力が集中し、チップ抵抗器に割れが生じる場合がある。   When the chip resistor is mounted on a printed board or the like, the chip resistor is vacuum-sucked by a suction nozzle, and the chip resistor is mounted on a predetermined land on the printed board. In this mounting, if the vacuum nozzle is pressed, the pressing force concentrates on the top portion A of the rounded protective film 16 on the chip resistor surface side, and the chip resistor may be cracked.

本発明は、上述した事情に鑑みて為されたもので、チップ抵抗器をプリント基板等に搭載するに際して、実装の安定性に優れたチップ抵抗器及びその製造方法を提供することを目的とする。   The present invention has been made in view of the above-described circumstances, and an object of the present invention is to provide a chip resistor excellent in mounting stability and a method for manufacturing the chip resistor when the chip resistor is mounted on a printed circuit board or the like. .

上記課題を解決するため、本発明のチップ抵抗器は、絶縁基板と、上記絶縁基板の表面側に形成された一対の厚膜電極材料からなる表面電極と、上記絶縁基板の裏面側に形成された一対の厚膜電極材料からなる裏面電極と、上記絶縁基板の表面側に上記表面電極に接続して形成された厚膜抵抗体材料からなる抵抗体と、上記抵抗体を被覆して保護する保護膜とを備えたチップ抵抗器において、上記保護膜の両端部に補助膜を形成し、上記補助膜は上記絶縁基板の端面から離れた位置に形成され、上記補助膜は裏面電極の範囲内にそれぞれ位置するように形成され、上記補助膜は上記保護膜の中央部と同じ高さかこれよりも高くなるように形成したことを特徴とするものである。 In order to solve the above problems, a chip resistor of the present invention is formed on an insulating substrate, a surface electrode made of a pair of thick film electrode materials formed on the surface side of the insulating substrate, and a back surface side of the insulating substrate. A back electrode made of a pair of thick film electrode materials , a resistor made of a thick film resistor material formed on the surface side of the insulating substrate and connected to the surface electrode, and covering and protecting the resistor In a chip resistor comprising a protective film, an auxiliary film is formed at both ends of the protective film, the auxiliary film is formed at a position away from the end face of the insulating substrate, and the auxiliary film is within the range of the back electrode. The auxiliary film is formed so as to be at the same height as or higher than the central portion of the protective film .

本発明のチップ抵抗器によれば、保護膜の平面視両端部に2列の直線状の頂部が補助膜により形成される。これにより、従来の丸みを帯びた1点の頂部に対して、本発明の2列の直線状の頂部により、吸着ノズルに安定に吸着することができる。そして、プリント基板の所定のランドに搭載するに際して、吸着ノズルの押圧力を上記補助膜の下方に位置する裏面電極に直接印加することができる。これにより、チップ抵抗器の割れの発生という問題が防止できる。   According to the chip resistor of the present invention, two rows of linear apexes are formed of the auxiliary film at both ends of the protective film in plan view. Thereby, it can adsorb | suck stably to an adsorption | suction nozzle with the linear top part of 2 rows of this invention with respect to the conventional one point of roundness. And when mounting on the predetermined land of a printed circuit board, the pressing force of a suction nozzle can be directly applied to the back surface electrode located under the said auxiliary | assistant film | membrane. Thereby, the problem of occurrence of cracks in the chip resistor can be prevented.

また、本発明のチップ抵抗器の製造方法は、大判の絶縁基板の表裏面にそれぞれ表面電極および裏面電極を厚膜電極材料を用いて形成する工程と、前記絶縁基板の表面側に、前記表面電極に接続して抵抗体を厚膜抵抗材料を用いて形成する工程と、前記抵抗体を保護膜で被覆する工程と、前記保護膜の両端部であって、前記絶縁基板の端面から離れた位置の前記裏面電極の上方にその高さが前記保護膜の中央部と同じ高さかこれよりも高くなる平面視直線状の補助膜を形成する工程と、前記大判の絶縁基板を短冊状に分割する工程と、短冊状に分割された複数の絶縁基板を、補助膜と下面電極とが接触するように積重ねる工程と、積重ねられた前記絶縁基板の端面側からスパッタリングを行い、絶縁基板の端面において、前記表面電極と裏面電極とを短絡させるとともに、絶縁基板の隙間からスパッタリングによる膜が表面電極上に回り込むように端面電極を形成する工程と、短冊状に分割された絶縁基板をチップ状に分割する工程と、前記表面電極と裏面電極および端面電極の表面にめっきを施す工程と、を備えたことを特徴とするものである。 Further, the method of manufacturing a chip resistor according to the present invention includes a step of forming a surface electrode and a back electrode on the front and back surfaces of a large insulating substrate using a thick film electrode material, and the surface of the insulating substrate on the surface side. A step of forming a resistor using a thick film resistor material in connection with an electrode; a step of covering the resistor with a protective film; and both ends of the protective film, separated from an end surface of the insulating substrate A step of forming an auxiliary film having a straight line shape in plan view, the height of which is equal to or higher than that of the central portion of the protective film, above the back electrode at a position, and dividing the large insulating substrate into strips A step of stacking a plurality of insulating substrates divided into strips so that the auxiliary film and the lower electrode are in contact with each other, sputtering is performed from the end surface side of the stacked insulating substrate, and the end surface of the insulating substrate In the surface electrode and the back surface A step of dividing causes short-circuiting the poles, a step of film by sputtering from the gap of the insulating substrate to form an end face electrode wraps around on the surface electrode, the insulating substrate is divided into strips into chips, the surface And a step of plating the surfaces of the electrode, the back electrode, and the end electrode.

本発明によれば、チップ抵抗器の保護膜両端部に設けた補助膜により、2列の表面側頂部が形成され、実装の安定性に優れたチップ抵抗器が提供される。   According to the present invention, a chip resistor having excellent mounting stability is provided in which two rows of top portions are formed by the auxiliary films provided at both ends of the protective film of the chip resistor.

以下、本発明の実施形態について、添付図面を参照して説明する。なお、各図中、同一の作用または機能を有する部材または要素には、同一の符号を付して重複した説明を省略する。   Embodiments of the present invention will be described below with reference to the accompanying drawings. In addition, in each figure, the same code | symbol is attached | subjected to the member or element which has the same effect | action or function, and the overlapping description is abbreviate | omitted.

図1は、本発明の第1の実施形態のチップ抵抗器の構成例を示す。このチップ抵抗器は、アルミナ等の角形絶縁基板11の表裏面に表面電極12,13及び裏面電極14,15を備えている。これらの電極は、銀パラジウム等の厚膜電極材料をスクリーン印刷によりパターン形成し、高温で焼成することにより形成される。絶縁基板11の表面側の電極12,13間にこれらの電極に接続するように厚膜抵抗体16が配置されている。この抵抗体16も、酸化ルテニウム等の厚膜抵抗体材料をスクリーン印刷によりパターン形成し、焼成することにより形成される。   FIG. 1 shows a configuration example of the chip resistor according to the first embodiment of the present invention. This chip resistor includes front surface electrodes 12 and 13 and back surface electrodes 14 and 15 on the front and back surfaces of a rectangular insulating substrate 11 such as alumina. These electrodes are formed by patterning a thick film electrode material such as silver palladium by screen printing and baking at a high temperature. A thick film resistor 16 is disposed between the electrodes 12 and 13 on the surface side of the insulating substrate 11 so as to be connected to these electrodes. The resistor 16 is also formed by patterning and baking a thick film resistor material such as ruthenium oxide by screen printing.

抵抗体16の表面には、保護膜を構成するガラスコート17及び樹脂コート(オーバコート)18が抵抗体16を被覆するように形成されている。ガラスコート17はガラス材料をスクリーン印刷によりパターン形成し、焼成することにより形成される。樹脂コート18も樹脂材料をスクリーン印刷によりパターン形成し、加温硬化することにより形成される。ガラスコート17及び樹脂コート18は抵抗体16を被覆して保護する役割を果たしている。   A glass coat 17 and a resin coat (overcoat) 18 constituting a protective film are formed on the surface of the resistor 16 so as to cover the resistor 16. The glass coat 17 is formed by patterning and baking a glass material by screen printing. The resin coat 18 is also formed by patterning a resin material by screen printing and heating and curing. The glass coat 17 and the resin coat 18 serve to cover and protect the resistor 16.

絶縁基板11の両端部の端面には、スパッタリングによる側面電極21,22が形成され、表面電極12,13と裏面電極14,15とを接続している。そして、一方の端部の表面電極12、側面電極21、裏面電極14の表面には、それぞれの電極表面を被覆するめっき電極23が形成されている。同様に、他方の端部の表面電極13、側面電極22、裏面電極15の表面には、それぞれの電極表面を被覆するめっき電極24が形成されている。   Side electrodes 21 and 22 are formed by sputtering on the end surfaces of both ends of the insulating substrate 11 to connect the surface electrodes 12 and 13 and the back electrodes 14 and 15. And the plating electrode 23 which coat | covers each electrode surface is formed in the surface of the surface electrode 12, the side electrode 21, and the back surface electrode 14 of one edge part. Similarly, on the surface of the surface electrode 13, the side electrode 22, and the back electrode 15 at the other end, a plating electrode 24 that covers each electrode surface is formed.

本発明のチップ抵抗器においては、保護膜17,18の両端部に補助膜19,20を形成している。補助膜19,20は嵩上げ層であり、例えばエポキシ樹脂材料のスクリーン印刷によりパターン形成し、加温硬化することにより形成される。その膜厚を厚く形成することにより、丸みを帯びた保護膜17,18の中央部と略同じ高さ、好ましくは、これよりも高くなるように嵩上げ部を平面視2列形成する。この嵩上げ部である補助膜19,20を設けることで、チップ抵抗器表面側の最も高い2列の頂部A,Aが保護膜17,18の両端部に形成される。この補助膜19,20は、それぞれ裏面電極14,15の上方位置に配置される。詳しくは、裏面電極14,15を覆うめっき電極23,24の表面は、チップ抵抗器の裏面側において最も高い頂部を形成している。即ち、補助膜19,20は、チップ抵抗器の裏面側における頂部を構成する裏面電極14,15の範囲内にそれぞれ位置するように形成されている。   In the chip resistor of the present invention, auxiliary films 19 and 20 are formed on both ends of the protective films 17 and 18. The auxiliary films 19 and 20 are raised layers, and are formed, for example, by forming a pattern by screen printing of an epoxy resin material and heating and curing. By forming the film thick, the raised portions are formed in two rows in plan view so as to be substantially the same height as the central portions of the rounded protective films 17 and 18, preferably higher than this. By providing the auxiliary films 19 and 20 as the raised portions, the two highest rows of apexes A and A on the surface side of the chip resistor are formed at both ends of the protective films 17 and 18. The auxiliary films 19 and 20 are disposed above the back electrodes 14 and 15, respectively. Specifically, the surfaces of the plating electrodes 23 and 24 covering the back electrodes 14 and 15 form the highest peak on the back side of the chip resistor. That is, the auxiliary films 19 and 20 are formed so as to be positioned within the range of the back electrodes 14 and 15 constituting the top part on the back side of the chip resistor, respectively.

図2(a)(b)は、チップ抵抗器を実装に際して吸着ノズルに吸着したときの状態を示す。チップ抵抗器のプリント基板等への実装にあたっては、真空吸着ノズル30を用いてチップ抵抗器を真空吸引し、プリント基板の所定の実装部位に移動する。図2(a)は本発明のチップ抵抗器10を吸着した状態を示す。図示するように本発明のチップ抵抗器10は2列の直線状頂部A,Aを備えているので、安定に吸着ノズル30に真空吸引により吸着することができる。これに対して、図2(b)は従来のチップ抵抗器1を吸着した状態を示す。従来のチップ抵抗器1は丸みを帯びた保護膜に1点の頂部Aが存在するので、吸着ノズル30に吸着した状態が図示するように不安定となる。   FIGS. 2A and 2B show a state when the chip resistor is sucked by the suction nozzle when mounted. When mounting the chip resistor on a printed circuit board or the like, the chip resistor is vacuum-sucked using the vacuum suction nozzle 30 and moved to a predetermined mounting site on the printed circuit board. FIG. 2A shows a state where the chip resistor 10 of the present invention is attracted. As shown in the figure, the chip resistor 10 of the present invention includes two rows of linear top portions A and A, and therefore can be stably adsorbed to the adsorption nozzle 30 by vacuum suction. In contrast, FIG. 2B shows a state in which the conventional chip resistor 1 is attracted. Since the conventional chip resistor 1 has one point A on the rounded protective film, the state adsorbed by the adsorption nozzle 30 becomes unstable as shown in the figure.

図3(a)(b)は、チップ抵抗器のプリント基板への搭載の状態を示す。図3(a)は本発明のチップ抵抗器の搭載状態を示し、(b)は比較のため従来例のチップ抵抗器の搭載状態を示す。プリント基板への搭載は、プリント基板31の実装部位であるランド32,33にあらかじめクリームはんだ等をスクリーン印刷等により塗布しておき、そのランド32,33にチップ抵抗器10の裏面電極14,15が位置するようにチップ抵抗器の表面側を吸着した吸着ノズル30を降ろし、さらにチップ抵抗器10を所定の圧力で押圧する。   FIGS. 3A and 3B show a state where the chip resistor is mounted on a printed circuit board. 3A shows the mounting state of the chip resistor of the present invention, and FIG. 3B shows the mounting state of the conventional chip resistor for comparison. For mounting on the printed board, cream solder or the like is applied in advance to the lands 32 and 33 which are mounting portions of the printed board 31 by screen printing or the like, and the back electrodes 14 and 15 of the chip resistor 10 are applied to the lands 32 and 33. The suction nozzle 30 that sucks the surface side of the chip resistor is lowered so that is positioned, and the chip resistor 10 is pressed with a predetermined pressure.

この押圧に際して、保護膜17,18の両端部に2列の嵩上げ補助膜19,20を配置し、保護膜の両端部にチップ抵抗器表面側の2列の頂部A,Aを形成しているので、吸着ノズル30の押圧力が2列の頂部A,Aに印加される。このため、吸着ノズル30の押圧力のかかる部位が、チップ抵抗器の両端部側にシフトし、分散されるため、チップ抵抗器の割れを抑制できる。更に、本実施の形態では、2列の補助膜19,20は、それぞれ裏面電極14,15の上方に位置しているので、吸着ノズル30の押圧力が裏面電極14,15に直接加えられる。したがって、吸着ノズル30の押圧力による荷重が裏面電極14,15に直接印加されるので、チップ抵抗器の割れを抑制できる。   At the time of this pressing, two rows of raising auxiliary films 19 and 20 are arranged at both ends of the protective films 17 and 18, and two rows of apexes A and A on the chip resistor surface side are formed at both ends of the protective film. Therefore, the pressing force of the suction nozzle 30 is applied to the top portions A and A of the two rows. For this reason, since the site | part to which the pressing force of the suction nozzle 30 applies is shifted and distributed to the both ends of a chip resistor, the crack of a chip resistor can be suppressed. Further, in the present embodiment, the two rows of auxiliary films 19 and 20 are positioned above the back electrodes 14 and 15, respectively, so that the pressing force of the suction nozzle 30 is directly applied to the back electrodes 14 and 15. Therefore, since the load due to the pressing force of the suction nozzle 30 is directly applied to the back electrodes 14 and 15, the chip resistor can be prevented from cracking.

これに対して、従来例のチップ抵抗器1の場合には、図3(b)に示すようにチップ抵抗器の頂部Aが保護膜17,18の中央部の一点に存在するため、ここに吸着ノズル30の押圧力が印加され、この荷重が裏面電極14,15間の絶縁基板11の略中央部に集中する。このため、実装時に割れが生じやすいという問題があった。上述したように、本発明のチップ抵抗器10では、2列の直線状頂部A,Aを裏面電極の上方に位置させているので、吸着ノズルの荷重が分散され、かつ直接裏面電極14,15の上に直接印加される。これにより、チップ抵抗器の裏面側電極部分をランドパターンに安定にかつ確実に搭載することができる。   On the other hand, in the case of the chip resistor 1 of the conventional example, the top portion A of the chip resistor exists at one point in the central portion of the protective films 17 and 18 as shown in FIG. The pressing force of the suction nozzle 30 is applied, and this load is concentrated at the substantially central portion of the insulating substrate 11 between the back electrodes 14 and 15. For this reason, there was a problem that cracks are likely to occur during mounting. As described above, in the chip resistor 10 of the present invention, since the two rows of linear apexes A and A are positioned above the back electrode, the load of the suction nozzle is dispersed and the back electrodes 14 and 15 are directly used. Is applied directly on top of. Thereby, the back side electrode portion of the chip resistor can be stably and reliably mounted on the land pattern.

次に、図4を参照して、本発明のチップ抵抗器の製造方法について説明する。まず、大判のアルミナ等の絶縁基板を準備する。この大判の絶縁基板は、多数個取りの基板であり、後にチップ抵抗器となる一チップ区画11のみを図4(a)に示す。そして図4(b)に示すように、絶縁基板11の裏面側に銀パラジウム等の厚膜電極ペーストをスクリーン印刷によりパターン形成し、焼成して裏面電極14,15を形成する。次に、図4(c)に示すように、絶縁基板11の表面側に銀パラジウム等の厚膜電極ペーストをスクリーン印刷等によりパターン形成し、焼成して表面電極12,13を形成する。なお、表面電極と裏面電極とは、表面電極を先に形成し、その後裏面電極を形成するようにしてもよい。   Next, with reference to FIG. 4, the manufacturing method of the chip resistor of this invention is demonstrated. First, a large-sized insulating substrate such as alumina is prepared. This large-sized insulating substrate is a multi-piece substrate, and only one chip section 11 that will later become a chip resistor is shown in FIG. 4B, a thick film electrode paste such as silver palladium is formed on the back surface of the insulating substrate 11 by screen printing and baked to form the back electrodes 14 and 15. Next, as shown in FIG. 4C, a thick film electrode paste such as silver palladium is patterned on the surface side of the insulating substrate 11 by screen printing or the like, and baked to form the surface electrodes 12 and 13. In addition, a surface electrode and a back surface electrode may form a surface electrode previously, and you may make it form a back surface electrode after that.

次に、図4(d)に示すように、絶縁基板11の表面側の表面電極12,13に一部重畳接続するように、厚膜抵抗体14を配置する。抵抗体14は、酸化ルテニウム等の厚膜抵抗用ペーストをスクリーン印刷によりパターン形成し、高温で焼成することにより形成する。次に、図4(e)に示すように、抵抗体16を被覆するガラスコート17を形成する。ガラスコート17は下層保護膜を構成し、ガラス材料ペーストをスクリーン印刷によりパターン形成し、焼成することにより形成する。次に、図4(f)に示すように、ガラスコート17を更に被覆する樹脂コート(オーバコート)18を配置する。樹脂コート18は、例えばエポキシ等の樹脂材料ペーストをスクリーン印刷によりパターン形成し、加温硬化することにより形成する。樹脂コート18は上層保護膜を構成する。   Next, as shown in FIG. 4D, the thick film resistor 14 is disposed so as to be partially connected to the surface electrodes 12 and 13 on the surface side of the insulating substrate 11. The resistor 14 is formed by patterning a thick film resistor paste such as ruthenium oxide by screen printing and baking at a high temperature. Next, as shown in FIG. 4E, a glass coat 17 that covers the resistor 16 is formed. The glass coat 17 constitutes a lower protective film, and is formed by patterning and baking a glass material paste by screen printing. Next, as shown in FIG. 4F, a resin coat (overcoat) 18 that further covers the glass coat 17 is disposed. The resin coat 18 is formed by patterning a resin material paste such as epoxy, for example, by screen printing and heating and curing. The resin coat 18 constitutes an upper protective film.

次に、図4(g)に示すように、オーバコート18の両端部に2列の嵩上げ部である補助膜19,20を形成する。補助膜19,20は、上記と同様にエポキシ等の樹脂材料ペーストを用いスクリーン印刷によりパターン形成し、加温硬化することにより形成する。ここで、補助膜19,20は裏面電極14,15の上方に位置するように形成する。そして、補助膜19,20は、嵩上げ部であり、チップ抵抗器の表面側で最も高い頂部を形成するように厚く形成する。なお、補助膜の形状の安定化のため、粘性の高いペースト材料を用いるようにしてもよい。   Next, as shown in FIG. 4G, auxiliary films 19 and 20 that are two rows of raised portions are formed on both ends of the overcoat 18. The auxiliary films 19 and 20 are formed by patterning by screen printing using a resin material paste such as epoxy as described above, followed by heat curing. Here, the auxiliary films 19 and 20 are formed so as to be located above the back electrodes 14 and 15. And the auxiliary | assistant films | membranes 19 and 20 are the raising parts, and are formed thickly so that the highest top part may be formed in the surface side of a chip resistor. A highly viscous paste material may be used to stabilize the shape of the auxiliary film.

次に、大判の絶縁基板を短冊状に分割又は切断する。図4(h)に示すように、短冊状に分割された絶縁基板の端面において、表面電極12,13と裏面電極14,15とを短絡させる端面電極21,22を、NiCr等の金属材料のスパッタリングにより形成する。そして、短冊状に分割又は切断された絶縁基板を、個々のチップに分割又は切断する。次に、図4(i)に示すように、表面電極12,13、裏面電極14,15、及び端面電極21,22の表面にニッケルめっき及びはんだめっき等を施し、めっき電極23,24を形成する。   Next, the large insulating substrate is divided or cut into strips. As shown in FIG. 4 (h), the end electrodes 21 and 22 for short-circuiting the front electrodes 12 and 13 and the back electrodes 14 and 15 on the end surface of the insulating substrate divided into strips are made of a metal material such as NiCr. It is formed by sputtering. Then, the insulating substrate divided or cut into strips is divided or cut into individual chips. Next, as shown in FIG. 4 (i), the surfaces of the surface electrodes 12, 13, the back electrodes 14, 15, and the end electrodes 21, 22 are subjected to nickel plating, solder plating, and the like to form plated electrodes 23, 24. To do.

これにより、角形絶縁基板11の両端部に電極22,23を備え、表面電極12,13間に抵抗体16が配置され、その抵抗体がガラスコート及び樹脂コートから成る保護膜17,18により被覆保護され、さらに保護膜17,18の両端部に嵩上げ部である補助膜19,20を備えたチップ抵抗器10が完成する。   Thus, the electrodes 22 and 23 are provided at both ends of the rectangular insulating substrate 11, the resistor 16 is disposed between the surface electrodes 12 and 13, and the resistor is covered with the protective films 17 and 18 made of glass coat and resin coat. Further, the chip resistor 10 which is protected and has auxiliary films 19 and 20 which are raised portions at both ends of the protective films 17 and 18 is completed.

上記端面電極のスパッタリングによる形成に際して、本発明のチップ抵抗器においては、スパッタリング膜の表裏面電極側への回り込みを精度良く形成することができる。すなわち、図5(a)に示すように、上記スパッタリングの工程において、本発明のチップ抵抗器は、補助膜19,20が隣接するチップ抵抗器の下面電極14,15に接触するように治具に装填される。このため、隣接するチップ抵抗器間の隙間Sから回り込んで表面電極上に形成されるスパッタリング膜が、略直線状の頂部の隣接する裏面電極との接触部により、符号Gで示されるように略直線状に形成される。このため、スパッタリング膜上に被着するめっき電極23,24が、ばらつきを生じることなく、良好な形状で形成される。   When forming the end face electrode by sputtering, in the chip resistor of the present invention, it is possible to accurately form the wraparound of the sputtering film to the front and back electrode sides. That is, as shown in FIG. 5 (a), in the sputtering step, the chip resistor of the present invention has a jig so that the auxiliary films 19 and 20 are in contact with the lower surface electrodes 14 and 15 of the adjacent chip resistors. Is loaded. For this reason, the sputtering film formed on the front surface electrode around the gap S between the adjacent chip resistors is indicated by the symbol G due to the contact portion with the adjacent back surface electrode on the substantially linear top. It is formed in a substantially linear shape. For this reason, the plating electrodes 23 and 24 deposited on the sputtering film are formed in a good shape without causing variations.

これに対して、従来のチップ抵抗器では、上述したように保護膜の表面が丸みを帯びている。このため、下面電極14,15のエッジ部と保護膜18との接触部が一部分に限られ、保護膜の両側方に隙間が生じる。このため、表面電極12,13上に回り込むスパッタリング膜が符号Gで示すように直線状にならなくなる。また、保護膜の膜厚のばらつきから、スパッタリング膜もその分布がばらつく。このため、めっき電極を形成すると、めっき電極がチップ抵抗器の保護膜両側面側で曲線状となり、めっき電極形状が不安定となるという問題もあった。   In contrast, in the conventional chip resistor, the surface of the protective film is rounded as described above. For this reason, the contact part between the edge part of the lower surface electrodes 14 and 15 and the protective film 18 is limited to a part, and a gap is generated on both sides of the protective film. For this reason, the sputtering film that wraps around the surface electrodes 12 and 13 does not become linear as indicated by the symbol G. Further, the distribution of the sputtering film also varies due to variations in the thickness of the protective film. For this reason, when the plating electrode is formed, the plating electrode has a curved shape on both sides of the protective film of the chip resistor, and there is a problem that the shape of the plating electrode becomes unstable.

図6は、本発明の第2の実施形態のチップ抵抗器を示す。このチップ抵抗器においては、嵩上げ部である補助膜27,28が樹脂コート18の両端部に形成されている。ここで、保護膜は抵抗体16の全面を被覆する下層のガラスコート17と、ガラスコート17の中央部分を部分的に被覆する樹脂コート18とから構成され、補助膜27,28がこれに隣接して形成されている。この実施形態においても、補助膜27,28は保護膜17,18の両端部に平面視略直線状に配置されている。これにより、実装時に吸着ノズルに真空吸着して、プリント基板の所定部位にチップ抵抗器を搭載するに際して、裏面電極14,15に均等な荷重が与えることができる点は上記実施形態と共通である。   FIG. 6 shows a chip resistor according to a second embodiment of the present invention. In this chip resistor, auxiliary films 27 and 28 that are raised portions are formed at both ends of the resin coat 18. Here, the protective film is composed of a lower glass coat 17 covering the entire surface of the resistor 16 and a resin coat 18 partially covering the central portion of the glass coat 17, and auxiliary films 27 and 28 are adjacent thereto. Is formed. Also in this embodiment, the auxiliary films 27 and 28 are arranged substantially linearly in plan view at both ends of the protective films 17 and 18. Thus, when mounting the chip resistor on a predetermined portion of the printed circuit board by vacuum suction to the suction nozzle during mounting, it is common to the above embodiment that an equal load can be applied to the back electrodes 14 and 15. .

この実施形態においては、補助膜27,28が主として平面性の高いガラスコート17及び表面電極12,13上に形成されるため、補助膜27,28の高さを精度良く形成することができる。また、補助膜27,28は保護コート18と同質の材料を用いることで、樹脂コート18と同様の保護機能を果たすことができる。   In this embodiment, since the auxiliary films 27 and 28 are mainly formed on the glass coat 17 and the surface electrodes 12 and 13 having high flatness, the height of the auxiliary films 27 and 28 can be formed with high accuracy. Further, the auxiliary films 27 and 28 can perform the same protective function as the resin coat 18 by using the same material as the protective coat 18.

図7は、本発明の第3の実施形態のチップ抵抗器を示す。このチップ抵抗器においては、嵩上げ部である補助膜27,28がガラスコート17の両端部に形成されていて、さらに樹脂コート18により被覆されている。この実施形態においては、補助膜27,28は保護膜17,18の両端部に、挟み込むように、平面視略直線状に配置されている。従って、頂部A,Aは、樹脂コート18の最高部分として形成されている。これにより、実装時に吸着ノズルに真空吸着して、プリント基板の所定部位にチップ抵抗器を搭載するに際して、裏面電極14,15に均等な荷重が与えることができる点は上記実施形態と共通である。   FIG. 7 shows a chip resistor according to a third embodiment of the present invention. In this chip resistor, auxiliary films 27 and 28 which are raised portions are formed on both ends of the glass coat 17 and further covered with the resin coat 18. In this embodiment, the auxiliary films 27 and 28 are arranged substantially linearly in plan view so as to be sandwiched between both ends of the protective films 17 and 18. Therefore, the top portions A and A are formed as the highest portion of the resin coat 18. Thus, when mounting the chip resistor on a predetermined portion of the printed circuit board by vacuum suction to the suction nozzle during mounting, it is common to the above embodiment that an equal load can be applied to the back electrodes 14 and 15. .

これらの実施形態では、いずれも頂部A,Aが樹脂材料の被膜により形成されている。このため、実装に際して吸着ノズルに樹脂材料の被膜が当接することになる。従って、電極めっき部分が吸着ノズル表面に当接することが無く、めっき部分が吸着ノズル表面に付着してしまうという問題が防止される。なお、従来のチップ抵抗器では、電極めっきを厚く形成することで、この部分を保護膜18の頂部Aよりも高く形成することも考えられるが、本発明のチップ抵抗器によれば、係る吸着ノズルへの付着の問題発生を抑制することができる。   In these embodiments, the top portions A and A are both formed of a resin material film. For this reason, the film of the resin material comes into contact with the suction nozzle during mounting. Therefore, the problem that the electrode plating part does not contact the surface of the suction nozzle and the plating part adheres to the surface of the suction nozzle is prevented. In the conventional chip resistor, it is conceivable that this portion is formed higher than the top portion A of the protective film 18 by forming the electrode plating thick. However, according to the chip resistor of the present invention, such adsorption is performed. It is possible to suppress the occurrence of the problem of adhesion to the nozzle.

なお、これまで本発明の一実施形態について説明したが、本発明は上記の実施形態に限定されず、その技術的思想の範囲内において種々異なる形態にて実施されてよいことは言うまでもない。   In addition, although one Embodiment of this invention was described so far, it cannot be overemphasized that this invention is not limited to said Embodiment, In the range of the technical idea, it may be implemented with a different form.

本発明の第1の実施形態のチップ抵抗器の構成例を示す断面図である。It is sectional drawing which shows the structural example of the chip resistor of the 1st Embodiment of this invention. 吸着ノズルにチップ抵抗器を吸着した状態を示し、(a)は本発明のチップ抵抗器の場合を示し、(b)は従来例のチップ抵抗器の場合を示す。The state where the chip resistor is sucked to the suction nozzle is shown, (a) shows the case of the chip resistor of the present invention, and (b) shows the case of the chip resistor of the conventional example. チップ抵抗器の搭載時の状態を示す図であり、(a)は本発明のチップ抵抗器を搭載する場合を示し、(b)は従来のチップ抵抗器を搭載する場合を示す。It is a figure which shows the state at the time of mounting of a chip resistor, (a) shows the case where the chip resistor of this invention is mounted, (b) shows the case where the conventional chip resistor is mounted. 本発明のチップ抵抗器の製造方法を示す図であり、左側の列は平面図を示し、右側の列は断面図を示す。It is a figure which shows the manufacturing method of the chip resistor of this invention, the left column shows a top view, and the right column shows sectional drawing. 端面電極の形成のためのスパッタリング工程におけるスパッタリング膜の回り込みについて説明する図であり、(a)は本発明のチップ抵抗器の場合を示し、(b)は従来例のチップ抵抗器の場合を示す。It is a figure explaining the wraparound of the sputtering film | membrane in the sputtering process for formation of an end surface electrode, (a) shows the case of the chip resistor of this invention, (b) shows the case of the chip resistor of a prior art example. . 本発明の第2の実施形態のチップ抵抗器の構成例を示す断面図である。It is sectional drawing which shows the structural example of the chip resistor of the 2nd Embodiment of this invention. 本発明の第3の実施形態のチップ抵抗器の構成例を示す断面図である。It is sectional drawing which shows the structural example of the chip resistor of the 3rd Embodiment of this invention. 従来例のチップ抵抗器の構成例を示す断面図である。It is sectional drawing which shows the structural example of the chip resistor of a prior art example.

符号の説明Explanation of symbols

1,10 チップ抵抗器
11 絶縁基板(チップ区画)
12,13 表面電極
14,15 裏面電極
16 抵抗体
17 ガラスコート(保護膜)
18 樹脂コート(保護膜)
19,20,27,28 補助膜
21,22 側面電極
23,24 めっき電極
30 吸着ノズル
31 プリント基板
32,33 ランド
A 頂部
G スパッタリング膜(めっき電極)の境界部
S 隙間
1,10 Chip resistor 11 Insulating substrate (chip section)
12, 13 Front electrode 14, 15 Back electrode 16 Resistor 17 Glass coat (protective film)
18 Resin coat (protective film)
19, 20, 27, 28 Auxiliary films 21, 22 Side electrodes 23, 24 Plating electrode 30 Suction nozzle 31 Printed circuit board 32, 33 Land A Top G Sputtering film (plating electrode) boundary S Sap

Claims (1)

大判の絶縁基板の表裏面にそれぞれ表面電極および裏面電極を厚膜電極材料を用いて形成する工程と、
前記絶縁基板の表面側に、前記表面電極に接続して抵抗体を厚膜抵抗材料を用いて形成する工程と、
前記抵抗体を保護膜で被覆する工程と、
前記保護膜の両端部であって、前記絶縁基板の端面から離れた位置の前記裏面電極の上方にその高さが前記保護膜の中央部と同じ高さかこれよりも高くなる平面視直線状の補助膜を形成する工程と、
前記大判の絶縁基板を短冊状に分割する工程と、
短冊状に分割された複数の絶縁基板を、補助膜と下面電極とが接触するように積重ねる工程と、
積重ねられた前記絶縁基板の端面側からスパッタリングを行い、絶縁基板の端面において、前記表面電極と裏面電極とを短絡させるとともに、絶縁基板の隙間からスパッタリングによる膜が表面電極上に回り込むように端面電極を形成する工程と、
短冊状に分割された絶縁基板をチップ状に分割する工程と、
前記表面電極と裏面電極および端面電極の表面にめっきを施す工程と、
を備えたことを特徴とするチップ抵抗器の製造方法。
Forming a front electrode and a back electrode on the front and back surfaces of a large-sized insulating substrate using a thick film electrode material,
Forming a resistor on the surface side of the insulating substrate using a thick film resistor material connected to the surface electrode;
Coating the resistor with a protective film;
Both ends of the protective film, above the back electrode at a position away from the end face of the insulating substrate, the height of the protective film is the same as or higher than the central part of the protective film . Forming an auxiliary film;
Dividing the large insulating substrate into strips;
Stacking a plurality of insulating substrates divided into strips so that the auxiliary film and the bottom electrode are in contact with each other;
Sputtering is performed from the end surface side of the stacked insulating substrate, and the front surface electrode and the back surface electrode are short-circuited at the end surface of the insulating substrate, and the end surface electrode is formed so that the film formed by sputtering wraps around the front surface electrode from the gap between the insulating substrates. Forming a step;
Dividing the insulating substrate divided into strips into chips, and
Plating the surfaces of the front electrode, the back electrode and the end electrode; and
A method of manufacturing a chip resistor, comprising:
JP2004096315A 2004-03-29 2004-03-29 Manufacturing method of chip resistor Expired - Lifetime JP4109645B2 (en)

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