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JP4130620B2 - Resin-sealed semiconductor device - Google Patents
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JP4130620B2 - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device Download PDF

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JP4130620B2
JP4130620B2 JP2003356223A JP2003356223A JP4130620B2 JP 4130620 B2 JP4130620 B2 JP 4130620B2 JP 2003356223 A JP2003356223 A JP 2003356223A JP 2003356223 A JP2003356223 A JP 2003356223A JP 4130620 B2 JP4130620 B2 JP 4130620B2
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resin
semiconductor device
pad
wire
dummy
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JP2005123379A (en
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克良 松本
隆幸 吉田
和彦 松村
憲幸 戒能
毅 川端
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Panasonic Corp
Panasonic Holdings Corp
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Panasonic Corp
Matsushita Electric Industrial Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07551Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
    • H10W72/07552Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting changes in structures or sizes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07551Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
    • H10W72/07553Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting changes in shapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/521Structures or relative sizes of bond wires
    • H10W72/527Multiple bond wires having different sizes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/537Multiple bond wires having different shapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • H10W72/932Plan-view shape, i.e. in top view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

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  • Wire Bonding (AREA)

Description

本発明は、半導体基板にワイヤーボンディングを用いて半導体素子を接続する構造を有し、この構造を樹脂封止する樹脂封止型半導体装置に関するものである。   The present invention relates to a resin-sealed semiconductor device having a structure in which a semiconductor element is connected to a semiconductor substrate using wire bonding, and this structure is resin-sealed.

従来の半導体装置をボールグリッドアレイタイプの半導体装置を例にして、図9,図10,図11を参照して説明する。   A conventional semiconductor device will be described with reference to FIGS. 9, 10, and 11 by taking a ball grid array type semiconductor device as an example.

図9(a)は樹脂封止する前の半導体装置の正面図、図9(b)は樹脂封止後の半導体装置の断面図であり、図10はワイヤーボンディング後に樹脂封止をする工程を示し、図10(a)〜(d)は全て断面図であって、図10(a)はワイヤーボンディング後、図10(b)は金型キャビティ7に挿入後、図10(c)は樹脂封止途中、図10(d)は樹脂封止後における半導体装置をそれぞれ示している。   9A is a front view of the semiconductor device before resin sealing, FIG. 9B is a cross-sectional view of the semiconductor device after resin sealing, and FIG. 10 shows the step of resin sealing after wire bonding. 10 (a) to 10 (d) are all sectional views, FIG. 10 (a) is after wire bonding, FIG. 10 (b) is inserted into the mold cavity 7, and FIG. 10 (c) is resin. During the sealing, FIG. 10D shows the semiconductor device after the resin sealing.

各図において、1は半導体基板、2は半導体基板1に搭載した半導体素子、4は半導体基板1上の電極、5は半導体素子2上のパッド、3は電極4とパッド5をワイヤーボンディング接続したワイヤー、6は封止樹脂である。   In each figure, 1 is a semiconductor substrate, 2 is a semiconductor element mounted on the semiconductor substrate 1, 4 is an electrode on the semiconductor substrate 1, 5 is a pad on the semiconductor element 2, and 3 is a wire bonding connection between the electrode 4 and the pad 5. A wire 6 is a sealing resin.

従来のボールグリッドアレイタイプの半導体装置では、図10(a)のように、半導体素子2のパッド5と半導体基板上の電極4の間はワイヤーボンディング構造で接続される。さらに図10(b)のように、金型キャビティ7に挿入され、図10(c)のように、金型キャビティ7のゲート8部分から樹脂が注入されて樹脂封止される。樹脂封止が完了すると、図10(d)のように半導体装置が完成する。   In the conventional ball grid array type semiconductor device, as shown in FIG. 10A, the pad 5 of the semiconductor element 2 and the electrode 4 on the semiconductor substrate are connected by a wire bonding structure. Further, as shown in FIG. 10B, the resin is inserted into the mold cavity 7, and as shown in FIG. 10C, resin is injected from the gate 8 portion of the mold cavity 7 to be sealed with resin. When the resin sealing is completed, the semiconductor device is completed as shown in FIG.

この際、図11に示すように、封止樹脂6中に大きなカーボン粒子9が発生してワイヤー3間に挟まりリーク現象が発生することがある。   At this time, as shown in FIG. 11, large carbon particles 9 may be generated in the sealing resin 6 and may be sandwiched between the wires 3 to cause a leak phenomenon.

また、動作周波数の向上により、半導体素子2やワイヤー3から放出される電磁波が外部に影響を与えたり、外部の電磁波が半導体素子2やワイヤー3内の信号に影響を与えることがある。これに対して従来技術としては、シールドを内蔵させるものがあった(例えば特許文献1参照)。   Further, due to the improvement of the operating frequency, electromagnetic waves emitted from the semiconductor element 2 or the wire 3 may affect the outside, or external electromagnetic waves may affect the signals in the semiconductor element 2 or the wire 3. On the other hand, as a prior art, there is one that incorporates a shield (see, for example, Patent Document 1).

図12は特許文献1に記載された従来のシールド内蔵によって電磁波の影響を防ぐ構造を示したものであって、図示されるように、アイランド18に搭載した半導体チップ19の上下方向から籠形に成形したメッシュ状金属板22を被せて接地ピンに接続し、メッシュ状金属板22を樹脂体23内に含めてモールドする構造になっている。20はリード、21はボンディングワイヤを示す。
特開平07−321254号公報
FIG. 12 shows a structure for preventing the influence of electromagnetic waves by incorporating a conventional shield described in Patent Document 1. As shown in the figure, the semiconductor chip 19 mounted on the island 18 has a bowl shape from the vertical direction. The mesh-shaped metal plate 22 is covered and connected to the ground pin, and the mesh-shaped metal plate 22 is included in the resin body 23 and molded. Reference numeral 20 denotes a lead, and 21 denotes a bonding wire.
JP 07-32254 A

ところで、従来の技術において次のような課題がある。第1の課題としては、封止樹脂中の成分にはカーボンが含まれることが多いが、このカーボンが樹脂自体の製造ばらつきや保存状態などによって大きなカーボン粒子の固まりになることがあり、このカーボン粒子がワイヤー間に挟まり、ワイヤー間のリーク不良の原因となり、半導体回路の誤動作を招いている。   By the way, there are the following problems in the conventional technology. As a first problem, carbon is often contained in the component in the sealing resin, but this carbon may become a mass of large carbon particles due to manufacturing variations and storage conditions of the resin itself. Particles are sandwiched between wires, causing a leak failure between the wires and causing malfunction of the semiconductor circuit.

この課題を解決することは、半導体回路の誤動作を防ぐだけではなく、製造ばらつきの大きい樹脂を利用することを可能にし、保存管理の条件を緩めることを可能にするため、非常に有効である。   Solving this problem is very effective because it not only prevents malfunction of the semiconductor circuit, but also makes it possible to use a resin with a large manufacturing variation and relax the conditions for storage management.

また、第2の課題としては、動作周波数の向上により、半導体素子やワイヤーから放出される電磁波が外部に影響を与えたり、外部の電磁波が半導体素子やワイヤー内の信号に影響を与え、半導体回路の誤動作を招いていることが問題になっている。   Further, as a second problem, due to the improvement of the operating frequency, the electromagnetic wave emitted from the semiconductor element or the wire affects the outside, or the external electromagnetic wave affects the signal in the semiconductor element or the wire. It has become a problem to have caused a malfunction.

これらの課題を解決することは、半導体回路の誤動作を防ぐことになり、非常に有効である。   Solving these problems prevents the malfunction of the semiconductor circuit and is very effective.

上記課題を解決するために、本発明の樹脂封止型半導体装置は、複数列のパッドを有する半導体素子と、複数列の電極を有し、前記半導体素子を上面に載置する半導体基板と、前記半導体素子と前記半導体基板とを封止する封止樹脂とからなる樹脂封止型半導体装置であって、前記複数列のパッドの内、最内側列の前記パッドと、前記複数列の電極の内、最外側列の前記電極とを接続するダミーワイヤーと、前記最内側列のパッドより外側列に位置する前記パッドと、前記最外側列の電極より内側列に位置する前記電極とを接続するワイヤーとを備えることにより、前記ダミーワイヤーを、前記ワイヤーより本数を多くし、狭い間隔で張るように構成したことを特徴とする。
また、本発明の樹脂封止型半導体装置は、上面の周辺部にパッドを有する半導体素子と、複数列の電極を有し、前記半導体素子を上面に載置する半導体基板と、前記半導体素子と前記半導体基板とを封止する封止樹脂とからなる樹脂封止型半導体装置であって、前記半導体素子の上面の前記パッドより内側に載置されたプレーン状パッドと、前記プレーン状パッドと、前記複数列の電極の内、最外側列の前記電極とを接続するダミーワイヤーと、前記パッドと、前記最外側列の電極より内側列に位置する前記電極とを接続するワイヤーとを備えることにより、前記ダミーワイヤーを、前記ワイヤーより本数を多くし、狭い間隔で張るように構成したことを特徴とする。
In order to solve the above problem, a resin-encapsulated semiconductor device of the present invention includes a semiconductor element having a plurality of rows of pads, a semiconductor substrate having a plurality of rows of electrodes, and mounting the semiconductor elements on the upper surface, A resin-encapsulated semiconductor device comprising a sealing resin that seals the semiconductor element and the semiconductor substrate, wherein the pads in the innermost row and the electrodes in the plurality of rows among the plurality of rows of pads. A dummy wire that connects the electrodes in the outermost row, the pad located in the outer row from the pad in the innermost row, and the electrode located in the inner row from the electrode in the outermost row by providing a wire, the dummy wire, wherein to increase the number from wire, characterized by being configured to stretch in a narrow interval.
According to another aspect of the present invention, there is provided a resin-encapsulated semiconductor device comprising: a semiconductor element having a pad on the periphery of the upper surface; a semiconductor substrate having a plurality of rows of electrodes; A resin-encapsulated semiconductor device comprising a sealing resin that seals the semiconductor substrate, the plain pad placed inside the pad on the upper surface of the semiconductor element, the plain pad, By providing a dummy wire that connects the electrodes in the outermost row among the electrodes in the plurality of rows, a wire that connects the pads and the electrodes located in an inner row from the electrodes in the outermost row. The dummy wires are configured to have a larger number than the wires and to be stretched at a narrow interval.

以上説明したように、本発明によれば、半導体装置の封止樹脂中に含まれるカーボン粒子によるワイヤー間のリーク不良を低減することができ、また電磁シールド効果を発揮することができ、誤動作を防ぐために有効である。   As described above, according to the present invention, it is possible to reduce leakage defects between wires due to the carbon particles contained in the sealing resin of the semiconductor device, and to exhibit an electromagnetic shielding effect. It is effective to prevent.

以下、本発明の実施形態について図面を参照して説明する。なお、以下の説明において、図9〜図11にて説明した部材に対応する部材には同一符号を付した。   Embodiments of the present invention will be described below with reference to the drawings. In the following description, members corresponding to those described in FIGS. 9 to 11 are denoted by the same reference numerals.

図1(a)は本発明の実施形態1における樹脂封止型半導体装置の正面図、図1(b)は図1(a)の樹脂封止型半導体装置の断面図である。   FIG. 1A is a front view of a resin-encapsulated semiconductor device according to Embodiment 1 of the present invention, and FIG. 1B is a cross-sectional view of the resin-encapsulated semiconductor device of FIG.

実施形態1では、従来の構造に加えて、ワイヤー3の外側にワイヤー3よりも狭いピッチでダミーワイヤー10が設けられている。このダミーワイヤー10は、半導体素子2上ではワイヤー3のための半導体素子2上のパッド5より内側に設けられたダミーワイヤー用パッド12に接続され、半導体基板1上ではワイヤー3のための電極4の外側に設けられたダミーワイヤー用電極11に接続される。さらにダミーワイヤー10は、ワイヤー3の全体を覆うように外側に、かつワイヤー3より狭いピッチで、ワイヤー3より多い本数が張られている。   In the first embodiment, in addition to the conventional structure, dummy wires 10 are provided outside the wire 3 at a pitch narrower than that of the wire 3. The dummy wire 10 is connected to a dummy wire pad 12 provided inside the pad 5 on the semiconductor element 2 for the wire 3 on the semiconductor element 2, and the electrode 4 for the wire 3 on the semiconductor substrate 1. Are connected to the dummy wire electrode 11 provided on the outside. Furthermore, the dummy wires 10 are stretched on the outside so as to cover the entire wire 3 and at a pitch narrower than that of the wires 3 and more than the wires 3.

このような構成にすることによって、カーボン粒子9が存在しても、図2に示すように、カーボン粒子9は、ダミーワイヤー10の間隔よりも大きなものであれば、内部への進入が不可能になって、ワイヤー3間にリークを発生させるに至らない。   With this configuration, even if carbon particles 9 are present, as shown in FIG. 2, if the carbon particles 9 are larger than the interval between the dummy wires 10, they cannot enter the interior. Thus, no leakage occurs between the wires 3.

また図3に示すように、カーボン粒子9が、ダミーワイヤー10の間隔よりも小さなものであれば、内部への進入が可能であるが、ワイヤー3の間隔よりも小さいために、ワイヤー3間にリークを発生させるに至らない。   Further, as shown in FIG. 3, if the carbon particles 9 are smaller than the interval between the dummy wires 10, the carbon particles 9 can enter the inside, but since the interval is smaller than the interval between the wires 3, It does not lead to leaks.

図4(a)は本発明の実施形態2における半導体装置の正面図、図4(b)は図4(a)の半導体装置の断面図である。   4A is a front view of the semiconductor device according to the second embodiment of the present invention, and FIG. 4B is a cross-sectional view of the semiconductor device of FIG.

実施形態2が実施形態1と異なる点は、半導体基板1上にダミーワイヤー用電極11を個々のダミーワイヤー10ごとに設けるのではなく、何本ものダミーワイヤー10を共通接続するための長いダミーワイヤー用電極13を辺ごとに設けた構成である。なお、図5に示すように、ダミーワイヤー用電極13を辺ごとではなく、リング状のダミーワイヤー用電極15としてもよい。   The second embodiment differs from the first embodiment in that a dummy wire electrode 11 is not provided for each dummy wire 10 on the semiconductor substrate 1 but a long dummy wire for connecting a number of dummy wires 10 in common. It is the structure which provided the electrode 13 for every edge | side. As shown in FIG. 5, the dummy wire electrode 13 may be a ring-shaped dummy wire electrode 15 instead of each side.

このため実施形態2では、半導体素子2が異なっても、同様のパッドを配置することが可能になり、半導体基板設計の共用化が促進される。   Therefore, in the second embodiment, even if the semiconductor elements 2 are different, it is possible to arrange the same pads, and the common use of the semiconductor substrate design is promoted.

図6(a)は本発明の実施形態3における半導体装置の正面図、図6(b)は図6(a)の半導体装置の断面図である。   FIG. 6A is a front view of a semiconductor device according to Embodiment 3 of the present invention, and FIG. 6B is a cross-sectional view of the semiconductor device of FIG.

実施形態3が実施形態1と異なる点は、半導体素子2上にダミーワイヤー用パッド12を個々のダミーワイヤー10ごとに設けるのではなく、何本ものダミーワイヤー10を共通接続するための長いダミーワイヤー用パッド14を辺ごとに設けた構成である。なお、図7に示すように、ダミーワイヤー用パッド14を辺ごとではなく、リング状のダミーワイヤー用パッド16としてもよい。   The third embodiment is different from the first embodiment in that a dummy wire pad 12 is not provided for each dummy wire 10 on the semiconductor element 2 but a long dummy wire for connecting a number of dummy wires 10 in common. It is the structure which provided the pad 14 for every edge | side. As shown in FIG. 7, the dummy wire pad 14 may be a ring-shaped dummy wire pad 16 instead of each side.

このため実施形態3では、半導体基板1が異なっても、同様のパッドを配置することが可能になり、半導体基板設計の共用化が促進される。   Therefore, in the third embodiment, even if the semiconductor substrate 1 is different, it is possible to arrange the same pads, and the common use of the semiconductor substrate design is promoted.

図8(a)は本発明の実施形態4における半導体装置の正面図、図8(b)は図8(a)の半導体装置の断面図である。図8はプレーン状のダミーワイヤー用基板上パッドを有する場合を示している。   FIG. 8A is a front view of a semiconductor device according to Embodiment 4 of the present invention, and FIG. 8B is a cross-sectional view of the semiconductor device of FIG. FIG. 8 shows a case where a dummy dummy wire substrate pad is provided.

実施形態4では、実施形態1と比較してプレーン状のダミーワイヤー用半導体素子上パッド17が設けられており、このプレーン状のダミーワイヤー用パッド17が定電位に接続されることによって、ダミーワイヤー用パッド17に加えてダミーワイヤー10全てが定電位に保たれる。   In the fourth embodiment, compared to the first embodiment, a plane-like dummy wire semiconductor element upper pad 17 is provided. By connecting the plane-like dummy wire pad 17 to a constant potential, a dummy wire is provided. In addition to the pad 17, all the dummy wires 10 are kept at a constant potential.

このため実施形態4では、半導体素子2またはワイヤー3から放出される電磁波に対して電磁シールドの効果と、外部から半導体素子2やワイヤー3に進入する電磁波に対しての電磁シールドの効果が得られる。   For this reason, in Embodiment 4, the effect of an electromagnetic shield with respect to the electromagnetic wave emitted from the semiconductor element 2 or the wire 3 and the effect of the electromagnetic shield with respect to the electromagnetic wave entering the semiconductor element 2 or the wire 3 from the outside are obtained. .

本発明は、半導体基板にワイヤーボンディングを用いて半導体素子を接続する部位を樹脂封止する樹脂封止型半導体装置に適用され、特に封止樹脂中に含まれるカーボン粒子によるワイヤー間のリーク不良を低減し、また電磁シールド効果を発揮して、誤動作を防ぐ樹脂封止型半導体装置に実施して有効である。   The present invention is applied to a resin-encapsulated semiconductor device in which a portion where a semiconductor element is connected to a semiconductor substrate using wire bonding is resin-encapsulated, and in particular, leakage defects between wires due to carbon particles contained in the encapsulating resin are reduced. It is effective when applied to a resin-encapsulated semiconductor device that reduces and prevents electromagnetic malfunction by exhibiting an electromagnetic shielding effect.

(a)は本発明の実施形態1における樹脂封止型半導体装置の正面図、(b)は(a)の樹脂封止型半導体装置の断面図(A) is a front view of the resin-encapsulated semiconductor device in Embodiment 1 of the present invention, and (b) is a cross-sectional view of the resin-encapsulated semiconductor device of (a). 実施形態1においてカーボン粒子がワイヤー間隔よりも大きい場合の現象を示す概略図Schematic which shows the phenomenon when carbon particles are larger than a wire space | interval in Embodiment 1. 実施形態1においてカーボン粒子がダミーワイヤー間隔よりも小さい場合の現象を示す概略図Schematic which shows the phenomenon in case carbon particles are smaller than a dummy wire space | interval in Embodiment 1. (a)は本発明の実施形態2における樹脂封止型半導体装置の正面図、(b)は(a)の樹脂封止型半導体装置の断面図(A) is a front view of the resin-encapsulated semiconductor device according to Embodiment 2 of the present invention, and (b) is a cross-sectional view of the resin-encapsulated semiconductor device of (a). 実施形態2における変形例を示す正面図、(b)は(a)の変形例の断面図The front view which shows the modification in Embodiment 2, (b) is sectional drawing of the modification of (a). (a)は本発明の実施形態3における樹脂封止型半導体装置の正面図、(b)は(a)の樹脂封止型半導体装置の断面図(A) is a front view of the resin-encapsulated semiconductor device according to Embodiment 3 of the present invention, and (b) is a cross-sectional view of the resin-encapsulated semiconductor device of (a). 実施形態3における変形例を示す正面図、(b)は(a)の変形例の断面図The front view which shows the modification in Embodiment 3, (b) is sectional drawing of the modification of (a). (a)は本発明の実施形態4における半導体装置の正面図、(b)は(a)の半導体装置の断面図(A) is a front view of the semiconductor device in Embodiment 4 of this invention, (b) is sectional drawing of the semiconductor device of (a). (a)は従来の半導体装置における樹脂封止する前を示す正面図、(b)は(a)の半導体装置における樹脂封止後を示す断面図(A) is a front view which shows before resin sealing in the conventional semiconductor device, (b) is sectional drawing which shows after resin sealing in the semiconductor device of (a) (a)〜(d)は従来の半導体装置の製造方法の工程を示す概略図(A)-(d) is schematic which shows the process of the manufacturing method of the conventional semiconductor device. (a)は従来の樹脂封止型半導体装置においてカーボン粒子がワイヤー間に挟まった場合を示す正面図、(b)は(a)の状態の樹脂封止型半導体装置の断面図(A) is a front view showing a case where carbon particles are sandwiched between wires in a conventional resin-encapsulated semiconductor device, and (b) is a cross-sectional view of the resin-encapsulated semiconductor device in the state (a). 従来のシールド内蔵によって電磁波の影響を防ぐ構造の半導体装置を示す断面図Sectional view showing a semiconductor device with a structure that prevents the influence of electromagnetic waves by incorporating a conventional shield

符号の説明Explanation of symbols

1 半導体基板
2 半導体素子
3 ワイヤー
4 電極
5 パッド
6 封止樹脂
9 カーボン粒子
10 ダミーワイヤー
11,13,15 ダミーワイヤー用電極
12,14,16,17 ダミーワイヤー用パッド
DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Semiconductor element 3 Wire 4 Electrode 5 Pad 6 Sealing resin 9 Carbon particle 10 Dummy wire 11, 13, 15 Dummy wire electrode 12, 14, 16, 17 Dummy wire pad

Claims (6)

複数列のパッドを有する半導体素子と、
複数列の電極を有し、前記半導体素子を上面に載置する半導体基板と、
前記半導体素子と前記半導体基板とを封止する封止樹脂とからなる樹脂封止型半導体装置であって、
前記複数列のパッドの内、最内側列の前記パッドと、前記複数列の電極の内、最外側列の前記電極とを接続するダミーワイヤーと、
前記最内側列のパッドより外側列に位置する前記パッドと、前記最外側列の電極より内側列に位置する前記電極とを接続するワイヤーとを備え、
前記ダミーワイヤーは前記ワイヤーより本数が多く、かつ狭い間隔で張られていることを特徴とする樹脂封止型半導体装置。
A semiconductor element having a plurality of rows of pads;
A semiconductor substrate having a plurality of rows of electrodes and mounting the semiconductor element on an upper surface;
A resin-encapsulated semiconductor device comprising a sealing resin that seals the semiconductor element and the semiconductor substrate,
Among the plurality of pads, a dummy wire that connects the pad in the innermost row and the electrode in the outermost row among the electrodes in the plurality of rows,
A wire connecting the pad located in the outer row from the pad in the innermost row and the electrode located in the inner row from the electrode in the outermost row;
The dummy wire is resin-sealed semiconductor device characterized by being stretched in front Symbol number is more than a wire, and closely spaced.
前記最外側列の電極を直線状またはリング状とすることを特徴とする請求項1記載の樹脂封止型半導体装置。 The resin-encapsulated semiconductor device according to claim 1, wherein the outermost row of electrodes is linear or ring-shaped . 前記最内側列のパッドを直線状またはリング状とすることを特徴とする請求項1記載の樹脂封止型半導体装置。 2. The resin-encapsulated semiconductor device according to claim 1, wherein the innermost pads are linear or ring-shaped . 上面の周辺部にパッドを有する半導体素子と、  A semiconductor element having a pad on the periphery of the upper surface;
複数列の電極を有し、前記半導体素子を上面に載置する半導体基板と、  A semiconductor substrate having a plurality of rows of electrodes and mounting the semiconductor element on an upper surface;
前記半導体素子と前記半導体基板とを封止する封止樹脂とからなる樹脂封止型半導体装置であって、  A resin-encapsulated semiconductor device comprising an encapsulating resin that encapsulates the semiconductor element and the semiconductor substrate,
前記半導体素子の上面の前記パッドより内側に載置されたプレーン状パッドと、  A plain pad placed inside the pad on the upper surface of the semiconductor element;
前記プレーン状パッドと、前記複数列の電極の内、最外側列の前記電極とを接続するダミーワイヤーと、  A dummy wire connecting the plain pad and the electrode in the outermost row of the plurality of rows of electrodes;
前記パッドと、前記最外側列の電極より内側列に位置する前記電極とを接続するワイヤーとを備え、  A wire connecting the pad and the electrode located in the inner row from the electrode in the outermost row;
前記ダミーワイヤーは前記ワイヤーより本数が多く、かつ狭い間隔で張られていることを特徴とする樹脂封止型半導体装置。  The resin-encapsulated semiconductor device is characterized in that the dummy wires are larger in number than the wires and are stretched at a narrow interval.
すべての前記ダミーワイヤーを定電位にすることを特徴とする請求項1乃至5のいずれか1項に記載の樹脂封止型半導体装置。 All of the resin-encapsulated semiconductor device according dummy wire to any one of claims 1 to 5, characterized in that the constant potential. 前記ダミーワイヤーの間隔は、前記封止樹脂中のカーボン粒子の大きさより小さいことを特徴とする請求項1乃至5のいずれか1項に記載の樹脂封止型半導体装置。 6. The resin-encapsulated semiconductor device according to claim 1 , wherein an interval between the dummy wires is smaller than a size of carbon particles in the encapsulating resin .
JP2003356223A 2003-10-16 2003-10-16 Resin-sealed semiconductor device Expired - Fee Related JP4130620B2 (en)

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