JP4150702B2 - Image processing device - Google Patents

Description

  The present invention relates to an image processing apparatus that performs processing on an image signal output from an image input apparatus such as a scanner, and more particularly to a connection configuration of a background removal unit and an image area separation unit for an image signal.

  FIG. 2 is a diagram of the prior art showing the overall configuration of an image processing apparatus that performs image processing on an image signal from a scanner, and FIG. 3 is a diagram showing the internal configuration of the image processing apparatus shown in FIG.

  2 and 3, the RGB image signal from the scanner is received by the image processing apparatus 10 including the first half of image processing 30, the second half of image processing 40, the image area separation unit 104, and the PCI interface controller system 50. After image processing is performed, it is input to the controller 20 as a YMCK image signal, subjected to necessary processing, and temporarily stored in the memory. Next, the YMCK image signal read from the memory becomes a write signal to the printer through the PCI interface controller system 50.

  The first half of image processing 30 includes a background removal unit 102 having a background detection unit and a background correction unit, and the image signal subjected to other image processing or background removal in 30 in the first half of image processing is a character of a document image. After being input to the image separation unit 104 for identifying the line drawing area and the pattern area and subjected to necessary processing, the image processing latter part 40 takes over.

  However, as shown in FIG. 3, the circuit configuration of the image processing apparatus showing the above-described prior art has the background removal unit 102 disposed after the shading unit 101 and before the image area separation unit 104. By performing the image area separation 104 using the removed image signal, the accuracy of the image area separation may be lowered (the reason will be described in detail later).

  As described above, when the background removal portion as shown in FIG. 3 is arranged in front of the image area separation section, a problem arises from the viewpoint of improving the accuracy of the image area separation.

  The object of the present invention is to improve the accuracy of image area separation by arranging the background removal section on the downstream side of the image area separation section, and to meet the various requirements for the accuracy of image area separation. An object of the present invention is to provide an image processing apparatus capable of meeting various image quality requirements by making it possible to select the front-rear arrangement with the separation unit.

In order to solve the above problems, the present invention mainly adopts the following configuration.
A first image processing unit including a shading processing unit that performs shading correction on an image signal from the image input device, a background removal unit that performs background detection processing and background correction of the image signal, and characters of the image signal An image region separation unit for identifying a line drawing region and a pattern region, a filter unit for performing a filter operation process on the image signal from the image region separation unit using a filter parameter, a scaling process for the image signal from the filter unit, and A second image processing unit including a scaling process and a binarization processing unit that performs binarization processing, wherein the shading processing unit and the background removal are used as a path of an image signal Unit, the image area separation unit, the filter unit, the scaling process / binarization processing unit in this order, the shading processing unit, the image area separation unit, the background removal unit, A second path connected in the order of the filter unit and the scaling / binarization processing unit, and the switching unit switches between the first path and the second path. The route is selected.

  In the image processing apparatus, the second path is selected when the accuracy of image area separation for identifying the character / line drawing area and the pattern area is high.

  According to the present invention, a similar ASIC can be used to meet various models and various image quality requirements without increasing the circuit scale of the image processing apparatus so much.

  In addition, by adopting a simple configuration, it is possible to appropriately identify the character / line drawing area and the pattern area to obtain high separation accuracy, and to remove unnecessary background from the output image.

  An image processing apparatus according to an embodiment of the present invention will be described below in detail with reference to FIGS. FIG. 1 is a diagram showing a connection relationship of internal configurations in an image processing apparatus according to an embodiment of the present invention. FIG. 2 is a diagram showing a basic configuration of an image processing apparatus that performs image processing on an image signal from a scanner, and FIG. 3 is a block diagram showing an internal configuration of the image processing apparatus shown in FIG.

  Here, 10 is an image processing apparatus, 20 is a controller, 30 is a first half of image processing, 40 is a second half of image processing, 50 is a PCI interface controller system, 101 is a pruning unit, 102 is a background removal unit, 103 is a dot & A vertical stripe correction unit, 104 is an image area separation unit, 105 is an internal pattern generation unit, 106 is a filter, 107 is a scaling process & binarization unit, 201 is a background detection unit, and 202 is a background correction unit.

  First, the background art of the image processing apparatus will be described with reference to FIG. The RGB image signal from the scanner is input to the first half 30 of the image processing, shading correction is performed by the shading unit 101, and the background is removed by background detection and background correction (removing the background is a specific example of the background processing) Dot & vertical stripe correction. Next, after the character / line drawing area and the pattern area of the image are identified by the image area separation unit 104, the image area separation unit 104 sends the image area to the latter half of the image processing unit 40, and after the filter operation by the filter 106, the scaling process & binarization process 107 Output as an image signal.

  Here, in the filter 106, the filter parameters are set so that the character line drawing is clear in the case of the character line drawing based on the separation signal when the image line separation unit 104 discriminates and separates the character line drawing or the picture (photograph). In the case of a design, the filter parameter is set so that the design is smooth. The parameters of the filter 106 are set in advance according to the pattern generated from the internal pattern generation unit 105 and the print result based on the pattern. In FIG. 3, the circuit configuration is such that the RGB image signals subjected to the image area separation are switched to the pattern from the internal pattern generation unit 105 and input to the filter 106.

  In the background art shown in FIG. 3, the image area separation unit 104 identifies whether the RGB image signal from which the background has been removed by the background removal unit 102 is a character line drawing region or a pattern region. That is, the image area separation process is performed after the background is removed. Here, halftone dots (a set of periodic points), white background, edges, and the like are used as signals serving as identification conditions or determination conditions when the image areas are separated by the image area separation unit 104, and are subjected to matrix processing. Or design. For example, for simplification, when a halftone dot is detected, it is determined that the pattern is not a character. On the other hand, the halftone dots in the image signal may be the subject of background removal in the background removal, and the halftone dots representing the pattern may be removed by the background removal unit 102. Therefore, if the image area separation 104 is executed using the image signal from which the background has been removed, the accuracy of the image area separation may be reduced.

  Therefore, the image processing apparatus according to the embodiment of the present invention has a connection configuration that removes the background of an image signal that has undergone image region separation from the viewpoint of improving the accuracy of image region separation, and an image under specific conditions. The circuit arrangement is characterized in that it is possible to select whether to perform background removal on an image signal subjected to area separation or to perform image area separation on an image signal subjected to background removal.

  FIG. 1 shows a circuit configuration of the present embodiment. Basically, the background removal unit 102 is disposed between the shading unit and the image area separation unit 104 or the background removal unit 102 is disposed in the image area separation unit 104. The switching means 110, 111, 112 can be used by selecting them under specific conditions. The switching means is switched by setting a register in accordance with an instruction from a higher-level device (for example, CPU).

  In FIG. 1, when the switching means 110, 111, and 112 are switched to one side, a dotted route is formed, and after the background is removed, a route for image area separation processing is obtained, and the switching means 110, 111, and 112 are switched to the other side. And a one-dot chain line route is formed, and after the image area separation process, the background is removed.

  In the circuit configuration in which the background is removed after the one-dot chain line route is formed in FIG. 1 and the image area separation processing is performed, there is no inconvenience that the accuracy of the image area separation is lowered by performing the background removal in the upstream of the image area separation. In addition, character detection, halftone dot detection, and white background detection in newspaper places can be performed. In FIG. 1, an image area separation unit 104 identifies a character area and a picture area of an input document image, and a background removal unit 102 calculates a background removal amount for the input image signal, and a background removal amount. The background is removed based on the above, and unnecessary background is removed from the output image.

  Further, the first half of image processing 30, the second half of image processing 40, and the image area separation unit 104 shown in FIG. 1 are components of an ASIC (Application Specific IC), and are compared with the configuration shown in FIG. Only the switching means and its wiring are required, and no special image processing circuit is added.

  The circuit configuration of the image processing apparatus according to the present embodiment shown in FIG. 1 will be specifically described. That is, the input signal to the background removal unit 102 includes two signals, the output (1) of the shading processing unit 101 and the output signal (3) after the image area separation unit 104, and the input to the background removal unit is , One of the two signals can be selected by setting a register provided in the image processing apparatus (this setting is instructed by the host CPU). However, it can be realized without increasing the circuit scale (a circuit configuration in which the background removal is performed after the image area separation).

  The output signal of the background removal unit 102 is input to the dot & vertical stripe correction unit 103 (4) before image area separation and the filter (4) after image area separation. The output destination of the background removal unit 102 can be selected by setting a register, and even when high image area separation accuracy is required (a circuit configuration for performing background removal after image area separation), the circuit scale does not increase. realizable.

  Further, the background removal unit 102 can select any one of the path of the shading unit 101 → the background removal unit 102 → the image area separation unit 104 and the path of the image area separation unit 104 → the background removal unit 102 → the filter 106. It has become. These two paths can be switched via switching means 110, 111, and 112 according to register settings. By adopting such a configuration, it is possible to meet various types of image quality requirements without increasing the circuit scale.

It is a figure which shows the connection relation of the internal structure in the image processing apparatus which concerns on embodiment of this invention. 1 is a diagram illustrating a basic configuration of an image processing apparatus that performs image processing on an image signal from a scanner. FIG. FIG. 3 is a block diagram illustrating an internal configuration of the image processing apparatus illustrated in FIG. 2.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Image processing apparatus 20 Controller 30 First half part of image processing 40 Second half part of image processing 50 PCI interface controller system 101 Pitching part 102 Background removal part 103 Dot & vertical stripe correction part 104 Image area separation part 105 Internal pattern part 106 Filter 107 Scaling Processing & binarization unit 110, 111, 112 switching means 201 background detection unit 202 background correction unit

Claims (3)

A first image processing unit including a shading processing unit that performs shading correction on an image signal from an image input device, a background removal unit that performs background detection processing and background correction of the image signal;
An image area separation unit for identifying a character line drawing area and a picture area of an image signal;
A filter unit that performs filter calculation processing on an image signal from the image area separation unit using a filter parameter, and scaling processing and binarization processing that performs scaling processing and binarization processing on the image signal from the filter unit An image processing apparatus comprising: a second image processing unit including:
As a path of the image signal, a first path connected in the order of the shading processing unit, the background removal unit, the image area separation unit, the filter unit, the scaling process / binarization processing unit, and the shading process A second path connected in the order of the image forming unit, the image area separation unit, the background removal unit, the filter unit, and the scaling / binarization processing unit,
An image processing apparatus, wherein the first route and the second route are switched by a switching unit to select one of the routes . In claim 1,
The image processing apparatus is characterized in that the second path is selected when there is a high accuracy of image area separation for identifying the character / line drawing area and the pattern area . In claim 1 or 2 ,
The image processing apparatus comprises an ASIC .

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