Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JP4154793B2 - Semiconductor device manufacturing method and manufacturing apparatus - Google Patents
[go: Go Back, main page]

JP4154793B2 - Semiconductor device manufacturing method and manufacturing apparatus - Google Patents

Semiconductor device manufacturing method and manufacturing apparatus Download PDF

Info

Publication number
JP4154793B2
JP4154793B2 JP08150599A JP8150599A JP4154793B2 JP 4154793 B2 JP4154793 B2 JP 4154793B2 JP 08150599 A JP08150599 A JP 08150599A JP 8150599 A JP8150599 A JP 8150599A JP 4154793 B2 JP4154793 B2 JP 4154793B2
Authority
JP
Japan
Prior art keywords
protrusion
main surface
ring
metal pattern
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP08150599A
Other languages
Japanese (ja)
Other versions
JP2000277876A (en
Inventor
弘 西堀
利彰 篠原
広信 永田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP08150599A priority Critical patent/JP4154793B2/en
Publication of JP2000277876A publication Critical patent/JP2000277876A/en
Application granted granted Critical
Publication of JP4154793B2 publication Critical patent/JP4154793B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Insulated Metal Substrates For Printed Circuits (AREA)

Description

【0001】
【発明の属する技術分野】
この発明は、金属ベース板と絶縁基板との半田接合面に複数の突起を形成することにより、所定厚さの半田層を形成した半導体装置の製造方法並びに製造装置に関するものである。
【0002】
【従来の技術】
図6は従来の半導体装置としてのパワーモジュールの主要部を構成する絶縁基板部を示す図であり、図6Aはその平面図、図6Bは断面図である。また、図7は図6に示した絶縁基板を用いた従来のパワーモジュールを示す断面図である。図6において、1は金属ベース板、2は金属ベース板1の一方の主面1aに載置され、半田付けされた絶縁基板であり、セラミック製の絶縁板2Aと、その表主面に備えた表金属パターン2a、2bと、裏主面に備えた裏金属パターン2cとにより構成され、裏金属パターン2cと主面1aとが半田4で接合されていると共に、表金属パターン2aに半導体素子3が載置され、半田4Aで接合されている。
【0003】
また、図7に示したパワーモジュールにおいて、5は樹脂ケース、6は樹脂ケース5にインサートされた外部接続用の電極端子であり、電極端子6における樹脂ケース5の内側に露出した端部6aが半田7で絶縁基板2の表金属パターン2bに半田付けされると共に、金属ベース板1の端縁1bが樹脂ケース5の開口端に嵌合され、接着剤8で接着されている。即ち、絶縁基板2と金属ベース板1との半田付け工程の後工程において、樹脂ケース5が接着剤8で金属ベース板1に接合される際に、端部6aも半田4より融点の低い半田7で表金属パターン2bに半田接合される。
【0004】
従来の半導体装置においては、金属ベース板1の主面1aと絶縁基板2の裏金属パターン2cとを半田4で接合するに際して、絶縁基板2の面内重量アンバランス、前記接合のための接合装置(図示せず)の水平度、主面1a及び裏金属パターン2cの半田濡れ性のバラツキ等により、図6Bに示すごとく、半田4の厚みが不均一の状態で、即ち、金属ベース板1の主面1aに対して絶縁基板2が傾いた状態で、絶縁基板2が主面1aに接合されることがあった。
【0005】
また、半田4の層厚が均一に形成できたとしても、後工程で、電極端子6の端部6aを表金属パターン2bに半田7を用いて半田付けする際に、この半田付けが加温環境にて行われるために、絶縁基板2と金属ベース板1とを既に接合している半田4が再溶融若しくは再軟化した状態となり、この状態で、電極端子6の一方の端部6aによる押圧力で絶縁基板2が押圧され、図7に示すごとく、端部6aで押圧された側の半田4の層厚が半導体素子3を載置された側よりも薄くなると共に、絶縁基板2の端縁側に半田4のはみ出し部4aが生じ、絶縁沿面距離不足を招くことがあった。
【0006】
このように、半田4の層厚が不均一な状態において、半導体素子3がON、OFFのスイッチング動作を繰返すと、このON、OFF動作に伴なう熱変動が生じ、金属ベース板1と絶縁基板2との線膨張係数の差により、半田4に熱応力が繰返し作用し、半田4に生じた半田クラックが成長することがあった。
【0007】
図5は、ヒートサイクル数をパラメータとした半田厚さと半田クラック長さとの関係を示す図である。図5から明らかのごとく、半田4に熱応力が繰返し作用すると半田厚さの薄い部分における半田クラックの成長が大きく、熱放散性の低下を招き、遂には半導体素子3の特性不良に至る。一方、故意に半田4の層厚を厚くしても、熱抵抗の増大或いは熱放散性の低下を招く。
【0008】
図8は、別の従来例の絶縁基板部を示す断面図である。この従来例では、一定の半田厚さを確保すべく、金属ベース板1の主面1aに、主面1aよりも突出した複数の突起1bが形成されており、これらの突起1bの上に絶縁基板2が載置され、主面1aと裏金属パターン2cとの隙間に半田4を満たした状態で接合されている。
【0009】
この従来例では、突起1bの存在により、半田クラックが発生し易い極端に薄い半田層は発生しないが、複数の突起1bの高さを均一にコントロールすることが難しく、また、図8に示されたごとく、複数の突起1bが円錐状の突起であれば、軽い衝突等の外力により突起1bの先端が変形し易くてその突出高さを一定値に保持困難であり、結果として、複数の突起1bの高さのバラツキにより、均一な厚さの半田層が得られ難い。
【0010】
さらに、外力により変形し易い突起1bを備えた金属ベース板1は、半田接合時の基板のズレ修正や、ボイド排出の為のスクラブ作業がし難い。
【0011】
【発明が解決しようとする課題】
従来の半導体装置としてのパワーモジュールは、以上のように構成されているので、金属ベース板と絶縁基板とを接合する半田層の層厚が不均一となり易く、薄い半田層の部分においては半田クラックの熱疲労に伴う成長が著しく、一方、半田厚さを必要以上に厚くすると放熱性の低下に伴なう特性不良を生じる等の製品の信頼性低下を招くという問題点があった。また、樹脂ケースにインサートされた電極端子を前記絶縁基板に半田付けするタイプのパワーモジュールにおいては、この半田付けが加温環境にて行われ、前記絶縁基板と前記金属ベース板とを既に接合している半田が再溶融若しくは再軟化した状態で前記電極端子の端部が前記絶縁基板を前記金属ベース板側へ押圧するので、押圧された側の前記半田の層厚が薄くなると共に前記半田が前記絶縁基板の端縁側にはみ出して絶縁沿面距離不足を招くという問題点があった。
【0012】
さらに、上記問題点の改善対策として、金属ベース板の主面に複数の突起を形成し、該突起により形成された前記金属ベース板と絶縁基板との隙間を半田で満たし、溶融固化して接合する方法もあるが、前記複数の突起の高さを均一にコントロールすることが難しく、前記複数の突起の高さのバラツキにより均一な厚さの半田層が得られ難いというの問題点があった。
【0013】
本発明は、上記のような問題点を解消するためになされたものであり、金属ベース板と絶縁基板との間を半田で接合した半導体装置における前記半田の層厚を均一化してヒートサイクルに対する前記半田の耐クラック性を向上させ、高信頼性の半導体装置の製造方法並びに製造装置を得ることを目的とする。
【0014】
【課題を解決するための手段】
第1の発明に係る半導体装置の製造装置は、絶縁板の表主面に半導体素子を実装する表金属パターンが、裏主面に裏金属パターンが夫々一体的に形成された絶縁基板を、金属ベース板の主面に形成され、先端にリング状の第1の平坦面を有しその高さが相互に等しい複数の突起における前記第1の平坦面に載置し、前記裏金属パターンと前記主面の間を半田付けする半導体装置の製造装置において、前記主面を押圧する突起部と、該突起部の根元周縁に形成した第2の平坦面とを有し、前記突起部を前記主面に押圧してめり込ませることにより前記根元周縁の近傍にてリング状に隆起した前記主面の隆起高さを前記第2の平坦面で規制して加工する加工手段とを備えたものである。
【0015】
第2の発明に係る半導体装置の製造装置は、第1の発明に係る半導体装置の製造装置において、加工手段が、前記主面に対向配設された対向面を有し、該対向面を前記主面に当接させ、加工完了となるようにしたものである。
【0016】
第3の発明に係る半導体装置の製造装置は、第2の発明に係る半導体装置の製造装置において、加工手段の突起部における根元周縁をその先端部よりも大きな略円錐台状に形成したものである。
【0017】
第4の発明に係る半導体装置の製造方法は、金属ベース板と、絶縁板の表主面に半導体素子を実装する表金属パターンを、裏主面に裏金属パターンを夫々一体的に形成した絶縁基板とを準備する工程と、前記金属ベース板の主面に、先端にリング状の第1の平坦面を有する突起を形成加工する工程と、前記突起に前記裏金属パターンを載置し該裏金属パターンを前記主面に半田付けする工程とからなる半導体装置の製造方法において、前記主面にめり込み前記突起を形成する突起部と、該突起部の根元全周縁に形成された第2の平坦面とを有する加工ヘッドにおける前記突起部を前記主面にめり込ませ前記突起を形成する時に、該突起の先端を前記第2の平坦面に当て、該突起の先端にリング状の前記第1の平坦面を形成するようにした方法である。
【0018】
第5の発明に係る半導体装置の製造方法は、金属ベース板と、絶縁板の表主面に半導体素子を実装する表金属パターンを、裏主面に裏金属パターンを夫々一体的に形成した絶縁基板とを準備する工程と、前記金属ベース板の主面に、先端にリング状の第1の平坦面を有する突起を形成加工する工程と、前記突起に前記裏金属パターンを載置し該裏金属パターンを前記主面に半田付けする工程とからなる半導体装置の製造方法において、前記主面にめり込み前記突起を形成する突起部と、該突起部の根元全周縁に形成された第2の平坦面とを有する加工ヘッドにおける前記突起部を前記主面にめり込ませ前記突起を形成する時に、該突起の先端を前記第2の平坦面に当て、該突起の先端にリング状の第1の平坦面を形成すると共に、前記第1の平坦面とは別に前記主面と対向する対向面を前記主面に当接させ、前記めり込み量を規制する方法である。
【0022】
【発明の実施の形態】
実施の形態1.
図1は、この発明の実施の形態1が適用される半導体装置であるパワーモジュールの主要部を構成する絶縁基板部を示す断面図であり、図1Aはその全体断面図、図1Bは要部断面図であり、図2は、図1に示した絶縁基板を用いたパワーモジュールを示す断面図である。なお、図中、従来例と同じ符号で示されたものは従来例のそれと同一若しくは同等なものを示す。
【0023】
図において、1は金属ベース板であり、その主面1aの所定の位置に複数のリング状フラット突起1cが、即ち、中央部が窪んだリング状の突起で、先端面にリング状の平坦面を有し、互いに同一高さに形成された複数の突起が形成されている。2は金属ベース板1の複数のリング状フラット突起1cに載置された状態で、金属ベース板1に半田付けされた絶縁基板であり、セラミック製の絶縁板2Aと、その表主面に備えた表金属パターン2a、2bと、裏主面に備えた裏金属パターン2cとにより構成され、主面1aと裏金属パターン2cとの間の複数のリング状フラット突起1cで形成された隙間が半田4で充填され、半田4の溶融固化により接合されていると共に、表金属パターン2aに半導体素子3が載置され、半田4Aで接合されている。
【0024】
また、図2に示したパワーモジュールにおいて、5は樹脂ケース、6は樹脂ケース5にインサートされて固定された外部接続用の電極端子であり、電極端子6における樹脂ケース5の内側に露出した端部6aが半田7で絶縁基板2の表金属パターン2bに半田付けされると共に、金属ベース板1の端縁1bが樹脂ケース5の開口端に嵌合され、接着剤8で接着されている。即ち、絶縁基板2と金属ベース板1との半田付け工程の後工程において、樹脂ケース5が接着剤8で金属ベース板1に接合される際に、端部6aも半田4より融点の低い半田7で表金属パターン2bに半田接合される。
【0025】
なお、図1に示した実施の形態1が適用されるパワーモジュールにおいては、金属ベース板1の主面1aに形成された同一高さの複数のリング状フラット突起1cにて、主面1aと絶縁基板2の裏金属パターン2cとの間に、その全面にて均一な幅の隙間が形成されており、主面1aと裏金属パターン2cとの間を半田4で接合するに際して、絶縁基板2の面内重量アンバランス、前記接合のための接合装置(図示せず)の水平度、金属ベース板1及び裏金属パターン2cの半田濡れ性のバラツキ等があっても、半田4の厚みを均一に接合できる。
【0026】
また、図2に示したパワーモジュールにおいては、絶縁基板2が同一高さの複数のリング状フラット突起1cを形成された金属ベース板1に半田4で半田付けされた後工程において、樹脂ケース5にインサートされた電極端子6の端部6aを表金属パターン2bに半田7で接合する際に、この半田付けが加温環境にて行われる。そして、半田7は半田4より低融点のものが選定され、前記加温環境は半田7の融点以上で半田4の融点よりも低い温度に設定されるが、半田4が半溶融の状態が生じ易く、絶縁基板2と金属ベース板1とを既に接合している半田4が再溶融若しくは再軟化した状態となり、この状態で、絶縁基板2が電極端子6の端部6aによる押圧力で絶縁基板2が押圧され、金属ベース板1側へ加圧される。
【0027】
しかし、絶縁基板2が押圧力を受けても、複数のリング状フラット突起1cの存在により前記押圧力はリング状フラット突起1cを介して金属ベース板1へ伝達されるので、半田4の厚みを均一に形成でき、図7に示した従来例のごとく、絶縁基板2における端部6aを当接された側の半田4の層厚が半導体素子3を載置された側よりも薄くなり、半田4のはみ出し部4aが生じる等の恐れがなく、絶縁基板2の端縁における絶縁沿面距離が損なわれることが無いパワーモジュールが得られる。
【0028】
以上のように、実施の形態1が適用されるパワーモジュールにおいては、金属ベース板1の主面1aに、複数のリング状フラット突起1c、即ち、リング状の平坦面を形成すると共に、その突出高さの精度向上を図り、同一高さに形成したので、複数のリング状フラット突起1cが外力により変形し難く、その突出高さが所定値に保持され、半田4の層厚を、裏金属パターン2cの全面において均一に形成できると共に、この均一な半田厚さを安定に保持することができ、半導体素子3がON、OFFのスイッチング動作を繰返すことに伴って生じる熱変動により、絶縁基板2と金属ベース板1との線膨張係数の差に起因する熱応力が半田4に繰返し作用しても、半田4に生じた半田クラックが成長する恐れが少なく、耐クラック性に優れた良好な放熱特性が得られる。
【0029】
即ち、図5に示したヒートサイクル数をパラメータとした半田厚さと半田層における半田クラック長さとの関係より明らかのごとく、前記半田層に熱応力が繰返し作用すると半田厚さの薄い部分における半田クラックの成長が大きいが、半田厚さが所定値以上であれば、ヒートサイクル数が多くなっても半田クラックの成長が飽和する傾向にあるので、半田4が均一で適切な半田厚さのために半田クラックが成長し難く、優れた半田の均一化に基づく耐クラック性に優れた良好な放熱特性が得られ、熱抵抗の増大或いは熱放散性の低下を招く等の半導体素子3の特性不良に至る恐れがない。
【0030】
なお、リング状フラット突起1cは、その適切な突出高さを、半田4の層厚が実用上悪影響しない厚さ以上で、熱抵抗の増大に支障がない厚さ以下の範囲において容易に選定することができ、また、リング状フラット突起1cの先端部のリング状の平坦面1dを鋭利な角を有しないように形成することにより、絶縁基板2の裏金属パターン2cに対するなじみ性が良好で、半田4による接合時において良好なボイド排出性が得られる。
【0031】
なお、リング状フラット突起1cにおけるリング状の平坦面1dの外径は、0.5mm〜3mm程度が望ましく、0.5mmより小さい径であれば、リング状の平坦面1dの端縁が鋭利となって、応力集中やボイドの原因となり、また、3mmより大きい径であれば、リング状フラット突起1cの形成時に大きな加圧力を必要とする。
【0032】
また、金属ベース板1の主面1aにおける複数のリング状フラット突起1cを、裏金属パターン2cとの当接位置が絶縁基板2の周縁よりも2mm以上、内側に位置するように配設した。即ち、主面1aと裏金属パターン2cの間を満たして溶融固化した半田4の内部応力は、絶縁基板2の各辺の端縁において、特に角部において相対的に大きく、また、リング状フラット突起1cが存在すると必然的にその周縁の半田4に応力が集中するので、複数のリング状フラット突起1cが絶縁基板2の周縁近傍にて当接するとリング状フラット突起1cの周縁における半田4に応力集中が極めて大きなものとなる。しかし、絶縁基板2の周縁における半田4の応力集中は、端縁よりも遠ざかるにつれ減衰し、2mm以上離れると飽和することが実験の結果、確認されているので、主面1aにおける複数のリング状フラット突起1cを、絶縁基板2の各辺の端縁よりも2mm以上、内側にて当接するように形成することにより、複数のリング状フラット突起1cの周縁における半田4の過度な応力集中を防止できる。
【0033】
実施の形態2.
図3は、この発明の実施の形態2としての半導体装置の製造装置におけるリング状フラット突起形成冶具を示す断面図、図4は実施の形態2としてのリング状フラット突起形成冶具を用いて金属ベース板の主面に複数のリング状フラット突起を形成する方法を示す図である。
【0034】
図において、9はリング状フラット突起形成冶具であり、金属ベース板1の主面1aと対向する対向面9aを有すると共に、対向面9aの一部に、先端が対向面9aよりも突出した円錐台状の突起部9bが形成され、かつ、突起部9bの根元周縁に凹部9dが形成され、凹部9dの底面に突起部9bの根元周縁を囲むように平坦面9eが形成されている。そして、凹部9dの深さ、即ち、対向面9aと平坦面9eの間の段差の寸法Hが、主面1aの上に形成されるリング状フラット突起1cの突出高さhと略同寸法に形成されている。なお、図3に示したリング状フラット突起形成冶具9には突起部9bが唯1個だけ形成されたものであるが、これは突起部9b及びその周縁の形状を説明するためのものであり、実用されるものは、図4に示すごとく、対向面9a上に4個の突起部9bが形成されている。
【0035】
次に、図3に示したリング状フラット突起形成冶具を用いて、金属ベース板1の主面1aに複数のリング状フラット突起1cを形成する製造方法について、図4を用いて説明する。まず、図4Aに示すごとく、Niメッキによる表面処理済の金属ベース板1を水平面上にセットし、次に、リング状フラット突起形成冶具9を、対向面9aに形成された複数の円錐台状の突起部9bが主面1aにおける所定の位置に上方より当接可能に、対向面9aを主面1aに対向させた状態に配置する。
【0036】
次に、図4Bに示すごとく、リング状フラット突起形成冶具9の駆動手段(図示せず)により、リング状フラット突起形成冶具9を下降させ、複数の円錐台状の突起部9bを主面1aに当接させて押圧し、図4Cに示すごとく、さらに押圧して対向面9aが主面1aと当接する深さまで複数の円錐台状の突起部9bを主面1aにめり込ませることにより、主面1aにおける複数の円錐台状の突起部9bの根元周縁をリング状に隆起させ、この隆起部分で凹部9dの底面における平坦面9eを押圧させると共に、平坦面9eでその隆起高さを規制する。
【0037】
次に、図4Dに示すごとく、リング状フラット突起形成冶具9を上昇させて主面1aから後退させると、主面1aの所定の位置に、所定高さのリング状の平坦面1dを有し、その高さが相互に等しい複数のリング状フラット突起1cが形成された金属ベース板1が塑性変形により得られる。
【0038】
その後、図1Aに示すごとく、絶縁基板2を複数のリング状フラット突起1cの先端に載置し、複数のリング状フラット突起1cにより形成された主面1aと絶縁基板2の裏金属パターン2cとの間の隙間を溶融状態の半田4で充填して接合する。その後工程にて、図2に示すごとく、樹脂ケース5の開口端に金属ベース板1の端縁を嵌挿させてこれらを接着剤8で接着すると共に、樹脂ケース5にインサートされた電極端子6を表金属パターン2bに半田7で半田付けする。
【0039】
上記のように、リング状フラット突起形成冶具9を用いて、リング状の平坦面1dを有するリング状フラット突起1cを形成した場合において、その突出高さhがその目標値に対して精度よく形成されるので、複数のリング状フラット突起1cにおける高さのバラツキが極めて少なく、かつ、均一性が保持されるので、金属ベース板1と絶縁基板2とを接合する半田4の半田厚さの均一性が極めて良好であり、半田4の耐クラック性が向上して信頼性の高い半導体装置が得られる。即ち、複数のリング状フラット突起1cの突出高さhのバラツキが、±0.01mm程度に、精度よく形成されるので、半田厚さの目標値をtmmとするとき、突出高さh=t−0.02mm程度とすることにより、ほぼ目標値どうりの半田厚さが得られる。
【0040】
また、リング状フラット突起形成冶具9の円錐台状の突起部9bは、その先端縁の角部が程よく面取りされており、形成されたリング状フラット突起1cは、鋭利な角を有せず、特に、リング状の平坦面1dの外径が0.5mm〜3mm程度であれば、金属ベース板1に対するスクラブ作業もスムーズに行え、半田4の濡れ性や密着性が良好で、ボイドが発生しないばかりか、リング状フラット突起1cの周辺部の半田に応力集中が生じ難いものが得られる。
【0041】
なお、実施の形態2としてのリング状フラット突起1cの形成方法は、リング状フラット突起形成冶具9における金属ベース板1の主面1aとの対向面9aの複数の所定位置に円錐台状の突起部9bを設けると共に、円錐台状の突起部9bの外周に所定深さの凹部9dを設け、主面1aと対向面9aとを接触させることにより、リング状フラット突起1cの突出高さhを規制しているが、金属ベース板1の主面1aとリング状フラット突起形成冶具9における対向面9aとを必ずしも接触させる必要はなく、リング状フラット突起形成冶具9の高さ方向の制御を、リング状フラット突起形成冶具9を保持する上金型のストロークの制御で行い、リング状フラット突起1cの突出高さhを規制してもよい。
【0042】
さらに、実施の形態2としてのリング状フラット突起1cの形成方法では、加圧タイプの専用のリング状フラット突起形成冶具9を用いたが、リング状フラット突起1cの加工のために、必ずしも専用の冶具は必要でなく、金属ベース板1の外形成形用金型(図示せず)に、リング状フラット突起形成冶具9の対向面9a、円錐台状の突起部9b、凹部9d、平坦面9e等に相当するものを形成した場合であっても、金属ベース板1の外形成形工程と同時に、高精度の複数のリング状フラット突起1cを形成でき、コストアップ要因が少ない簡便な形成方法が得られる。
【0043】
なお、実施の形態2としてのリング状フラット突起1cの形成方法では、金属ベース板1のNiメッキによる表面処理工程後にリング状フラット突起1cを形成したが、リング状フラット突起1cの形成は必ずしも表面処理工程の後である必要はなく、金属ベース板1の表面処理の前後、何れで行ってもよく、Niメッキ等のメッキむらやメッキ剥離が生じる恐れはない。
【0044】
【発明の効果】
以上のように、この発明によれば、金属ベース板の主面を押圧する突起部と、該突起部の根元周縁に形成した第2の平坦面とを有し、前記突起部を前記主面に押圧してめり込ませることにより前記根元周縁の近傍にてリング状に隆起した前記主面の隆起高さを前記第2の平坦面で規制して加工する加工手段を備えたので、前記主面に、先端にリング状の第1の平坦面を有しその高さが相互に等しい複数の突起を一工程で形成できる半導体装置の製造装置が得られる効果がある。
【0045】
また、前記加工手段が、前記主面に対向配設された対向面を有し、該対向面を前記主面に当接させ、加工完了となるようにしたので、前記主面に、先端にリング状の第1の平坦面を有しその高さが相互に等しい複数の突起を一工程でその突出高さを高精度に形成できると共に、構造が簡単で操作容易な半導体装置の製造装置が得られる効果がある。
【0046】
さらに、加工手段の突起部をその根元周縁が先端部よりも大きな略円錐台状に形成したので、前記主面の複数の所定位置に、中央の窪みに鋭利な箇所のない安定な形状の複数の突起を一工程で、かつ、小さな加圧力で形成できる高効率のリング状突起形成装置が得られる効果がある。
【0047】
また、金属ベース板の主面に、先端にリング状の第1の平坦面を有する突起を形成加工するべく、前記主面にめり込み前記突起を形成する突起部と、該突起部の根元全周縁に形成された第2の平坦面とを有する加工ヘッドにおける前記突起部を前記主面にめり込ませ前記突起を形成する時に、該突起の先端を前記第2の平坦面に当て、該突起の先端にリング状の前記第1の平坦面を形成するようにしたので、前記複数のリング状フラット突起を一工程で形成できると共に、前記リング状フラット突起により前記主面と前記裏金属パターンとの間に均一で安定した所定幅の隙間が形成され、略均一な所定厚さの耐クラック性に優れた半田層を形成でき、高信頼性の半導体装置を簡便な操作で製造できる半導体装置の製造方法が得られる効果がある。
【0048】
さらに、金属ベース板の主面に、先端にリング状の第1の平坦面を有する突起を形成加工するべく、前記主面にめり込み前記突起を形成する突起部と、該突起部の根元全周縁に形成された第2の平坦面とを有する加工ヘッドにおける前記突起部を前記主面にめり込ませ前記突起を形成する時に、該突起の先端を前記第2の平坦面に当て、該突起の先端にリング状の前記第1の平坦面を形成すると共に、前記第1の平坦面とは別に前記主面と対向する対向面を前記主面に当接させ、前記めり込み量を規制するので、前記主面に前記複数のリング状フラット突起を一工程で、その突出高さを高精度に形成できると共に、前記リング状フラット突起により前記主面と前記裏金属パターンとの間に均一で安定した所定幅の隙間が形成されるので均一な所定厚さの耐クラック性に優れた半田層を形成でき、高信頼性の半導体装置を極めて簡便な操作で製造できる半導体装置の製造方法が得られる効果がある。
【図面の簡単な説明】
【図1】 この発明の実施の形態1が適用される絶縁基板部を示す断面図である。
【図2】 図1に示した絶縁基板を用いた半導体装置を示す断面図である。
【図3】 この発明の実施の形態1としてのリング状フラット突起形成冶具を示す断面図である。
【図4】 実施の形態2としてのリング状フラット突起形成冶具を用いたリング状フラット突起の形成方法を示す図である。
【図5】 半田厚さ、ヒートサイクル数が及ぼす半田クラック長さへの影響を示す図である。
【図6】 従来の絶縁基板部を示す平面図及び断面図である。
【図7】 図6に示した絶縁基板を用いた半導体装置を示す断面図である。
【図8】 従来の別の絶縁基板部を示す断面図である。
【符号の説明】
1 金属ベース板、1a 主面、1b 突起、1c リング状フラット突起、1d リング状の平坦面、2 絶縁基板、2a、2b 表金属パターン、2c 裏金属パターン、3 半導体素子、4 半田、4a 半田のはみ出し部、5 樹脂ケース、6 電極端子、7 半田、8 接着剤、9 リング状フラット突起形成冶具、9a 対向面、9b 円錐台状の突起部、9c 先端部、9d 凹部、9e 平坦面、h 突出高さ
[0001]
BACKGROUND OF THE INVENTION
In the present invention, a solder layer having a predetermined thickness is formed by forming a plurality of protrusions on the solder joint surface between the metal base plate and the insulating substrate. Semiconductor device manufacturing method and manufacturing apparatus It is about.
[0002]
[Prior art]
6A and 6B are views showing an insulating substrate part constituting a main part of a power module as a conventional semiconductor device, FIG. 6A is a plan view thereof, and FIG. 6B is a sectional view thereof. FIG. 7 is a cross-sectional view showing a conventional power module using the insulating substrate shown in FIG. In FIG. 6, 1 is a metal base plate, 2 is an insulating substrate mounted on one main surface 1a of the metal base plate 1 and soldered, and is provided with a ceramic insulating plate 2A and its front main surface. The front metal patterns 2a and 2b and the back metal pattern 2c provided on the back main surface are joined, and the back metal pattern 2c and the main surface 1a are joined by the solder 4, and a semiconductor element is attached to the front metal pattern 2a. 3 is mounted and joined by solder 4A.
[0003]
In the power module shown in FIG. 7, 5 is a resin case, 6 is an electrode terminal for external connection inserted in the resin case 5, and the end 6 a of the electrode terminal 6 exposed inside the resin case 5 is Solder 7 is soldered to the surface metal pattern 2 b of the insulating substrate 2, and the edge 1 b of the metal base plate 1 is fitted into the opening end of the resin case 5 and bonded with an adhesive 8. That is, when the resin case 5 is joined to the metal base plate 1 with the adhesive 8 in the subsequent step of the soldering step between the insulating substrate 2 and the metal base plate 1, the end portion 6 a also has a lower melting point than the solder 4. 7 is soldered to the surface metal pattern 2b.
[0004]
In the conventional semiconductor device, when the main surface 1a of the metal base plate 1 and the back metal pattern 2c of the insulating substrate 2 are bonded with the solder 4, the in-plane weight imbalance of the insulating substrate 2 and the bonding apparatus for the bonding are described. As shown in FIG. 6B, the thickness of the solder 4 is not uniform as shown in FIG. 6B due to the level of the horizontal (not shown), the solder wettability variation of the main surface 1a and the back metal pattern 2c. The insulating substrate 2 may be bonded to the main surface 1a in a state where the insulating substrate 2 is inclined with respect to the main surface 1a.
[0005]
Even if the layer thickness of the solder 4 can be formed uniformly, when soldering the end 6a of the electrode terminal 6 to the surface metal pattern 2b using the solder 7 in the subsequent step, the soldering is heated. Since this is performed in an environment, the solder 4 that has already joined the insulating substrate 2 and the metal base plate 1 is in a remelted or resoftened state. In this state, the pressing by one end 6a of the electrode terminal 6 is performed. The insulating substrate 2 is pressed by pressure, and as shown in FIG. 7, the layer thickness of the solder 4 on the side pressed by the end portion 6 a becomes thinner than the side on which the semiconductor element 3 is placed, and the end of the insulating substrate 2 The protruding portion 4a of the solder 4 is generated on the edge side, and the insulation creepage distance may be insufficient.
[0006]
As described above, when the semiconductor element 3 repeats the ON / OFF switching operation in a state in which the layer thickness of the solder 4 is not uniform, the thermal fluctuation accompanying the ON / OFF operation occurs, and the metal base plate 1 is insulated. Due to the difference in coefficient of linear expansion from the substrate 2, thermal stress repeatedly acts on the solder 4, and solder cracks generated in the solder 4 sometimes grow.
[0007]
FIG. 5 is a diagram showing the relationship between the solder thickness and the solder crack length using the number of heat cycles as a parameter. As is apparent from FIG. 5, when thermal stress repeatedly acts on the solder 4, the growth of solder cracks in a portion having a small solder thickness is increased, leading to a decrease in heat dissipation, and finally, the characteristics of the semiconductor element 3 are deteriorated. On the other hand, even if the thickness of the solder 4 is intentionally increased, the thermal resistance is increased or the heat dissipation property is decreased.
[0008]
FIG. 8 is a cross-sectional view showing an insulating substrate portion of another conventional example. In this conventional example, a plurality of protrusions 1b protruding from the main surface 1a are formed on the main surface 1a of the metal base plate 1 so as to ensure a constant solder thickness, and insulation is provided on these protrusions 1b. The board | substrate 2 is mounted and it joins in the state which filled the solder 4 in the clearance gap between the main surface 1a and the back metal pattern 2c.
[0009]
In this conventional example, due to the presence of the protrusion 1b, an extremely thin solder layer that is liable to generate a solder crack does not occur, but it is difficult to uniformly control the heights of the plurality of protrusions 1b, as shown in FIG. If the plurality of protrusions 1b are conical protrusions, the tip of the protrusion 1b is easily deformed by an external force such as a light collision, and it is difficult to maintain the protrusion height at a constant value. Due to the variation in the height of 1b, it is difficult to obtain a solder layer having a uniform thickness.
[0010]
Furthermore, the metal base plate 1 having the protrusions 1b that are easily deformed by an external force is difficult to correct the displacement of the substrate during solder bonding and to perform a scrub work for void discharge.
[0011]
[Problems to be solved by the invention]
Since the power module as a conventional semiconductor device is configured as described above, the thickness of the solder layer for joining the metal base plate and the insulating substrate is likely to be uneven, and solder cracks occur in the thin solder layer portion. On the other hand, when the solder thickness is increased more than necessary, there is a problem that the reliability of the product is deteriorated such as a characteristic failure caused by a decrease in heat dissipation. In addition, in a power module of the type in which the electrode terminal inserted in the resin case is soldered to the insulating substrate, this soldering is performed in a heated environment, and the insulating substrate and the metal base plate are already joined. Since the end of the electrode terminal presses the insulating substrate toward the metal base plate while the solder being remelted or resoftened, the thickness of the solder on the pressed side is reduced and the solder is There is a problem in that the insulation creepage distance is insufficient due to protruding to the edge side of the insulating substrate.
[0012]
Further, as a measure for improving the above problems, a plurality of protrusions are formed on the main surface of the metal base plate, and the gap between the metal base plate and the insulating substrate formed by the protrusions is filled with solder, and solidified and joined. However, there is a problem that it is difficult to control the height of the plurality of protrusions uniformly, and it is difficult to obtain a solder layer having a uniform thickness due to variations in the height of the plurality of protrusions. .
[0013]
The present invention has been made to solve the above-described problems, and uniformizes the solder layer thickness in a semiconductor device in which a metal base plate and an insulating substrate are joined together by soldering, thereby preventing heat cycles. Improves cracking resistance of the solder, high reliability Semiconductor device manufacturing method and manufacturing apparatus The purpose is to obtain.
[0014]
[Means for Solving the Problems]
According to the first invention A semiconductor device manufacturing apparatus has an insulating substrate in which a surface metal pattern for mounting semiconductor elements is integrally formed on a front main surface of an insulating plate, and a back metal pattern is integrally formed on a main surface of the metal base plate. A ring-shaped first flat surface formed at the tip and placed on the first flat surface of the plurality of protrusions having the same height, and soldering between the back metal pattern and the main surface And a second flat surface formed at a base peripheral edge of the protrusion, and the protrusion is pressed against the main surface. And a processing means that processes the height of the main surface, which is raised in the shape of a ring in the vicinity of the periphery of the root by being inserted, by controlling the height of the main surface with the second flat surface. Is.
[0015]
According to the second invention The semiconductor device manufacturing apparatus is the semiconductor device manufacturing apparatus according to the first aspect, wherein the processing means has an opposing surface disposed to oppose the main surface, and the opposing surface is brought into contact with the main surface. , Processing was completed Is.
[0016]
According to the third invention The semiconductor device manufacturing apparatus is the semiconductor device manufacturing apparatus according to the second invention, wherein the base peripheral edge of the protrusion of the processing means is formed in a substantially truncated cone shape larger than the tip. Is.
[0017]
According to the fourth invention A method of manufacturing a semiconductor device includes a step of preparing a metal base plate, a surface metal pattern for mounting a semiconductor element on the front main surface of the insulating plate, and an insulating substrate integrally formed with the back metal pattern on the back main surface And forming a protrusion having a ring-shaped first flat surface at the front end on the main surface of the metal base plate, and placing the back metal pattern on the protrusion and placing the back metal pattern on the main surface. In a method of manufacturing a semiconductor device comprising a step of soldering to a processing head, a processing head having a protrusion that digs into the main surface and forms the protrusion, and a second flat surface formed on the entire periphery of the base of the protrusion. When the protrusion is formed in the main surface by forming the protrusion, the tip of the protrusion is applied to the second flat surface, and the ring-shaped first flat surface is formed at the tip of the protrusion. How to do It is.
[0018]
According to the fifth invention A method of manufacturing a semiconductor device includes a step of preparing a metal base plate, a surface metal pattern for mounting a semiconductor element on the front main surface of the insulating plate, and an insulating substrate integrally formed with the back metal pattern on the back main surface And forming a protrusion having a ring-shaped first flat surface at the front end on the main surface of the metal base plate, and placing the back metal pattern on the protrusion and placing the back metal pattern on the main surface. In a method of manufacturing a semiconductor device comprising a step of soldering to a processing head, a processing head having a protrusion that digs into the main surface and forms the protrusion, and a second flat surface formed on the entire periphery of the base of the protrusion. When the protrusion is formed in the main surface by forming the protrusion, the tip of the protrusion is brought into contact with the second flat surface, and the ring-shaped first flat surface is formed at the tip of the protrusion. And before the first flat surface The opposing surfaces of the main surface facing is brought into contact with the main surface, a method of regulating the embedment amount It is.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
Embodiment 1 FIG.
FIG. 1 shows a first embodiment of the present invention. Apply It is sectional drawing which shows the insulated substrate part which comprises the principal part of the power module which is a semiconductor device, FIG. 1A is the whole sectional drawing, FIG. 1B is principal part sectional drawing, FIG. 2 is the insulation shown in FIG. It is sectional drawing which shows the power module using a board | substrate. In the figure, the same reference numerals as those in the conventional example are the same as or equivalent to those in the conventional example.
[0023]
In the figure, reference numeral 1 denotes a metal base plate, and a plurality of ring-shaped flat protrusions 1c are formed at predetermined positions on the main surface 1a, that is, ring-shaped protrusions having a depressed central portion, and a ring-shaped flat surface on the tip surface. And a plurality of protrusions formed at the same height. Reference numeral 2 denotes an insulating substrate soldered to the metal base plate 1 in a state of being placed on the plurality of ring-shaped flat protrusions 1c of the metal base plate 1, and is provided with a ceramic insulating plate 2A and its front main surface. The gap formed by the plurality of ring-shaped flat protrusions 1c between the main surface 1a and the back metal pattern 2c is composed of the front metal patterns 2a and 2b and the back metal pattern 2c provided on the back main surface. 4 and bonded by melting and solidifying the solder 4, and the semiconductor element 3 is mounted on the surface metal pattern 2a and bonded by the solder 4A.
[0024]
In the power module shown in FIG. 2, 5 is a resin case, 6 is an electrode terminal for external connection inserted and fixed in the resin case 5, and the end of the electrode terminal 6 exposed to the inside of the resin case 5 The portion 6 a is soldered to the surface metal pattern 2 b of the insulating substrate 2 with the solder 7, and the edge 1 b of the metal base plate 1 is fitted into the opening end of the resin case 5 and bonded with the adhesive 8. That is, when the resin case 5 is joined to the metal base plate 1 with the adhesive 8 in the subsequent step of the soldering step between the insulating substrate 2 and the metal base plate 1, the end portion 6 a also has a lower melting point than the solder 4. 7 is soldered to the surface metal pattern 2b.
[0025]
As shown in FIG. Power module to which Embodiment 1 is applied In the plurality of ring-shaped flat protrusions 1c having the same height formed on the main surface 1a of the metal base plate 1, the entire surface is interposed between the main surface 1a and the back metal pattern 2c of the insulating substrate 2. A gap having a uniform width is formed. When the main surface 1a and the back metal pattern 2c are joined by the solder 4, the in-plane weight imbalance of the insulating substrate 2 and a joining device for the joining (not shown) 3), the thickness of the solder 4 can be uniformly bonded even if there is a variation in the solderability of the metal base plate 1 and the back metal pattern 2c.
[0026]
In the power module shown in FIG. 2, in a post-process in which the insulating substrate 2 is soldered to the metal base plate 1 formed with the plurality of ring-shaped flat protrusions 1 c having the same height with the solder 4, the resin case 5 When the end portion 6a of the electrode terminal 6 inserted into is joined to the surface metal pattern 2b with the solder 7, this soldering is performed in a heated environment. The solder 7 having a lower melting point than the solder 4 is selected, and the heating environment is set to a temperature higher than the melting point of the solder 7 and lower than the melting point of the solder 4, but the solder 4 is in a semi-molten state. The solder 4 that has already joined the insulating substrate 2 and the metal base plate 1 is remelted or resoftened. In this state, the insulating substrate 2 is pressed by the end portion 6a of the electrode terminal 6 and the insulating substrate 2 is pressed. 2 is pressed and pressed to the metal base plate 1 side.
[0027]
However, even if the insulating substrate 2 receives a pressing force, the pressing force is transmitted to the metal base plate 1 through the ring-shaped flat protrusions 1c due to the presence of the plurality of ring-shaped flat protrusions 1c. As shown in FIG. 7, the thickness of the solder 4 on the side of the insulating substrate 2 that is in contact with the end 6a becomes thinner than the side on which the semiconductor element 3 is placed. Thus, a power module can be obtained in which there is no fear of the occurrence of the protruding portion 4a, and the insulating creepage distance at the edge of the insulating substrate 2 is not impaired.
[0028]
As described above, Embodiment 1 Apply In the power module, a plurality of ring-shaped flat protrusions 1c, that is, ring-shaped flat surfaces are formed on the main surface 1a of the metal base plate 1, and the height of the protrusions is improved and formed at the same height. Therefore, the plurality of ring-shaped flat protrusions 1c are not easily deformed by an external force, the protrusion height is maintained at a predetermined value, and the layer thickness of the solder 4 can be uniformly formed on the entire surface of the back metal pattern 2c. The solder thickness can be stably maintained, and the thermal expansion caused by repeating the ON / OFF switching operation of the semiconductor element 3 causes a difference in linear expansion coefficient between the insulating substrate 2 and the metal base plate 1. Even if the resulting thermal stress acts repeatedly on the solder 4, there is little risk of growth of solder cracks generated in the solder 4, and good heat dissipation characteristics with excellent crack resistance can be obtained.
[0029]
That is, as apparent from the relationship between the solder thickness with the number of heat cycles shown in FIG. 5 as a parameter and the solder crack length in the solder layer, when a thermal stress is repeatedly applied to the solder layer, the solder crack in the thin solder thickness portion. However, if the solder thickness is equal to or greater than a predetermined value, the solder crack growth tends to saturate even if the number of heat cycles increases, so that the solder 4 is uniform and has an appropriate solder thickness. Solder cracks are difficult to grow, and excellent heat dissipation characteristics with excellent crack resistance based on uniform soldering are obtained, resulting in poor characteristics of the semiconductor element 3 such as an increase in thermal resistance or a decrease in heat dissipation. There is no fear.
[0030]
In addition, the ring-shaped flat protrusion 1c is easily selected with an appropriate protrusion height within a range where the layer thickness of the solder 4 is not less than a thickness that does not adversely affect the practical use and does not hinder an increase in thermal resistance. In addition, by forming the ring-shaped flat surface 1d at the tip of the ring-shaped flat protrusion 1c so as not to have a sharp corner, the conformability to the back metal pattern 2c of the insulating substrate 2 is good, A good void discharge property can be obtained at the time of joining with the solder 4.
[0031]
The outer diameter of the ring-shaped flat surface 1d in the ring-shaped flat protrusion 1c is preferably about 0.5 mm to 3 mm. If the diameter is smaller than 0.5 mm, the edge of the ring-shaped flat surface 1d is sharp. This causes stress concentration and voids, and if the diameter is larger than 3 mm, a large pressing force is required when forming the ring-shaped flat protrusion 1c.
[0032]
Further, the plurality of ring-shaped flat protrusions 1 c on the main surface 1 a of the metal base plate 1 are arranged so that the contact position with the back metal pattern 2 c is positioned 2 mm or more inside the peripheral edge of the insulating substrate 2. That is, the internal stress of the solder 4 that is melted and solidified by filling the space between the main surface 1a and the back metal pattern 2c is relatively large at the edges of each side of the insulating substrate 2, particularly at the corners, and is also ring-shaped flat. When the protrusion 1c is present, stress is inevitably concentrated on the solder 4 on the periphery of the protrusion 1c. Therefore, when a plurality of ring-shaped flat protrusions 1c come into contact with the vicinity of the periphery of the insulating substrate 2, the solder 4 on the periphery of the ring-shaped flat protrusion 1c Stress concentration is extremely large. However, since it has been confirmed as a result of experiments that the stress concentration of the solder 4 at the peripheral edge of the insulating substrate 2 is attenuated as it is farther from the edge and is separated by 2 mm or more, a plurality of ring shapes on the main surface 1a are confirmed. By forming the flat protrusions 1c so as to be in contact with each other by 2 mm or more from the edge of each side of the insulating substrate 2, excessive stress concentration of the solder 4 at the peripheral edges of the plurality of ring-shaped flat protrusions 1c is prevented. it can.
[0033]
Embodiment 2. FIG.
3 is a cross-sectional view showing a ring-shaped flat protrusion forming jig in a semiconductor device manufacturing apparatus according to a second embodiment of the present invention. FIG. 4 is a diagram showing a metal base using the ring-shaped flat protrusion forming jig according to the second embodiment. It is a figure which shows the method of forming several ring-shaped flat protrusion in the main surface of a board.
[0034]
In the figure, 9 is a ring-shaped flat projection forming jig, having a facing surface 9a facing the main surface 1a of the metal base plate 1, and a cone whose tip protrudes beyond the facing surface 9a at a part of the facing surface 9a. A trapezoidal protrusion 9b is formed, a recess 9d is formed at the base periphery of the protrusion 9b, and a flat surface 9e is formed on the bottom surface of the recess 9d so as to surround the base periphery of the protrusion 9b. The depth of the recess 9d, that is, the dimension H of the step between the opposing surface 9a and the flat surface 9e is substantially the same as the protrusion height h of the ring-shaped flat protrusion 1c formed on the main surface 1a. Is formed. The ring-shaped flat protrusion forming jig 9 shown in FIG. 3 has only one protrusion 9b, but this is for explaining the shape of the protrusion 9b and its periphery. In practice, as shown in FIG. 4, four protrusions 9b are formed on the opposing surface 9a.
[0035]
Next, a manufacturing method for forming a plurality of ring-shaped flat protrusions 1c on the main surface 1a of the metal base plate 1 using the ring-shaped flat protrusion forming jig shown in FIG. 3 will be described with reference to FIG. First, as shown in FIG. 4A, a metal base plate 1 that has been surface-treated by Ni plating is set on a horizontal plane, and then a ring-shaped flat protrusion forming jig 9 is formed into a plurality of frustoconical shapes formed on the opposing surface 9a. The protruding portion 9b is arranged in a state where the opposing surface 9a is opposed to the main surface 1a so that the protruding portion 9b can contact a predetermined position on the main surface 1a from above.
[0036]
Next, as shown in FIG. 4B, the ring-shaped flat protrusion forming jig 9 is lowered by the driving means (not shown) of the ring-shaped flat protrusion forming jig 9, and the plurality of truncated cone-shaped protrusions 9b are moved to the main surface 1a. As shown in FIG. 4C, a plurality of frustoconical protrusions 9b are recessed into the main surface 1a to such a depth that the opposing surface 9a contacts the main surface 1a. The base peripheral edge of the plurality of frustoconical protrusions 9b on the main surface 1a is raised in a ring shape, and the flat surface 9e on the bottom surface of the recess 9d is pressed by this raised portion, and the height of the protrusion is increased by the flat surface 9e. regulate.
[0037]
Next, as shown in FIG. 4D, when the ring-shaped flat protrusion forming jig 9 is raised and retracted from the main surface 1a, a ring-shaped flat surface 1d having a predetermined height is provided at a predetermined position on the main surface 1a. The metal base plate 1 on which a plurality of ring-shaped flat protrusions 1c having the same height are formed is obtained by plastic deformation.
[0038]
Thereafter, as shown in FIG. 1A, the insulating substrate 2 is placed on the tips of the plurality of ring-shaped flat protrusions 1c, the main surface 1a formed by the plurality of ring-shaped flat protrusions 1c, and the back metal pattern 2c of the insulating substrate 2; The gaps between them are filled with molten solder 4 and joined. In the subsequent process, as shown in FIG. 2, the edge of the metal base plate 1 is fitted into the opening end of the resin case 5 and bonded with the adhesive 8, and the electrode terminal 6 inserted into the resin case 5 is attached. Is soldered to the surface metal pattern 2b with solder 7.
[0039]
As described above, when the ring-shaped flat protrusion 1c having the ring-shaped flat surface 1d is formed using the ring-shaped flat protrusion forming jig 9, the protrusion height h is accurately formed with respect to the target value. Therefore, the variation in height of the plurality of ring-shaped flat protrusions 1c is extremely small and the uniformity is maintained, so that the solder thickness of the solder 4 for joining the metal base plate 1 and the insulating substrate 2 is uniform. Therefore, the crack resistance of the solder 4 is improved and a highly reliable semiconductor device can be obtained. That is, the variation in the protrusion height h of the plurality of ring-shaped flat protrusions 1c is accurately formed to about ± 0.01 mm. Therefore, when the target value of the solder thickness is tmm, the protrusion height h = t By setting the thickness to about -0.02 mm, a solder thickness substantially equal to the target value can be obtained.
[0040]
Further, the frustoconical protrusion 9b of the ring-shaped flat protrusion forming jig 9 has a chamfered corner at its tip edge, and the formed ring-shaped flat protrusion 1c does not have a sharp corner, In particular, when the outer diameter of the ring-shaped flat surface 1d is about 0.5 mm to 3 mm, the scrubbing operation can be smoothly performed on the metal base plate 1, the wettability and adhesion of the solder 4 are good, and no voids are generated. In addition, it is possible to obtain a solder that is less likely to cause stress concentration in the solder around the ring-shaped flat protrusion 1c.
[0041]
In addition, the formation method of the ring-shaped flat protrusion 1c as Embodiment 2 is the truncated cone-shaped protrusion in the several predetermined position of the opposing surface 9a with the main surface 1a of the metal base board 1 in the ring-shaped flat protrusion formation jig 9. In addition to providing the portion 9b, a recess 9d having a predetermined depth is provided on the outer periphery of the frustoconical projection 9b, and the main surface 1a and the opposing surface 9a are brought into contact with each other, whereby the projection height h of the ring-shaped flat projection 1c is reduced. Although regulated, the main surface 1a of the metal base plate 1 and the opposed surface 9a of the ring-shaped flat protrusion forming jig 9 do not necessarily have to be in contact with each other, The protrusion height h of the ring-shaped flat protrusion 1c may be regulated by controlling the stroke of the upper mold that holds the ring-shaped flat protrusion forming jig 9.
[0042]
Furthermore, in the method for forming the ring-shaped flat protrusion 1c as the second embodiment, the pressure-type dedicated ring-shaped flat protrusion forming jig 9 is used. A jig is not required, and an outer surface forming die (not shown) of the metal base plate 1 is opposed to a ring-shaped flat projection forming jig 9 facing surface 9a, a truncated cone-shaped projection 9b, a recess 9d, a flat surface 9e, and the like. Even when an equivalent to the above is formed, a plurality of high-precision ring-shaped flat protrusions 1c can be formed simultaneously with the outer shape forming step of the metal base plate 1, and a simple forming method with less cost increase factors can be obtained. .
[0043]
In the formation method of the ring-shaped flat protrusion 1c as the second embodiment, the ring-shaped flat protrusion 1c is formed after the surface treatment process by Ni plating of the metal base plate 1. However, the ring-shaped flat protrusion 1c is not necessarily formed on the surface. It does not have to be after the treatment step, and may be performed before or after the surface treatment of the metal base plate 1, and there is no possibility of uneven plating such as Ni plating or plating peeling.
[0044]
【The invention's effect】
As described above, according to the present invention, A protrusion that presses the main surface of the metal base plate, and a second flat surface formed at the base periphery of the protrusion, and the protrusion is pressed into the main surface to be embedded. Since there is provided a processing means for processing the height of the main surface raised in a ring shape in the vicinity of the base periphery with the second flat surface, a first ring-like shape is formed at the tip of the main surface. An apparatus for manufacturing a semiconductor device capable of forming a plurality of protrusions having the same flat surface and the same height in one step There is an effect to be obtained.
[0045]
Also, Since the processing means has an opposing surface disposed to oppose the main surface, and the opposing surface is brought into contact with the main surface to complete the processing, the main surface has a ring shape at the tip. There is provided a semiconductor device manufacturing apparatus capable of forming a plurality of protrusions having the first flat surface and having the same height in one step with high accuracy in the protrusion height and having a simple structure and easy operation. There is an effect to be obtained.
[0046]
further, Since the projection of the processing means is formed in a substantially truncated cone shape whose base peripheral edge is larger than the tip, the plurality of stable projections having no sharp spot in the central depression at a plurality of predetermined positions on the main surface Is a high-efficiency ring-shaped protrusion forming device that can be formed in a single process and with a small applied pressure. There is an effect to be obtained.
[0047]
Also, Formed on the main surface of the metal base plate to form a protrusion having a ring-shaped first flat surface at the tip thereof, and to be formed on the entire periphery of the base of the protrusion. When the projection is formed by indenting the projection in a processing head having a second flat surface formed, the tip of the projection is applied to the second flat surface, and the tip of the projection Since the ring-shaped first flat surface is formed, the plurality of ring-shaped flat projections can be formed in one step, and the ring-shaped flat projections allow the space between the main surface and the back metal pattern. A uniform and stable gap having a predetermined width is formed, a solder layer having a substantially uniform predetermined thickness and excellent crack resistance can be formed, and a highly reliable semiconductor device can be manufactured by a simple operation But There is an effect to be obtained.
[0048]
further, Formed on the main surface of the metal base plate to form a protrusion having a ring-shaped first flat surface at the tip thereof, and to be formed on the entire periphery of the base of the protrusion. When the projection is formed by indenting the projection in a processing head having a second flat surface formed, the tip of the projection is applied to the second flat surface, and the tip of the projection Forming the ring-shaped first flat surface, and contacting the main surface with a facing surface facing the main surface separately from the first flat surface to regulate the amount of indentation, The plurality of ring-shaped flat protrusions can be formed on the main surface in one step with high accuracy, and the ring-shaped flat protrusions allow a uniform and stable predetermined between the main surface and the back metal pattern. Uniform predetermined thickness as a gap of width is formed Can form an excellent solder layer crack resistance, a method of manufacturing a semiconductor device which can be manufactured in a very simple operation of a semiconductor device of high reliability can There is an effect to be obtained.
[Brief description of the drawings]
FIG. 1 shows a first embodiment of the present invention. Apply It is sectional drawing which shows an insulated substrate part.
2 is a cross-sectional view showing a semiconductor device using the insulating substrate shown in FIG.
FIG. 3 is a cross-sectional view showing a ring-shaped flat protrusion forming jig as Embodiment 1 of the present invention.
4 is a diagram showing a method for forming ring-shaped flat protrusions using the ring-shaped flat protrusion forming jig as Embodiment 2. FIG.
FIG. 5 is a diagram showing the influence of the solder thickness and the number of heat cycles on the solder crack length.
6A and 6B are a plan view and a cross-sectional view showing a conventional insulating substrate part.
7 is a cross-sectional view showing a semiconductor device using the insulating substrate shown in FIG. 6;
FIG. 8 is a cross-sectional view showing another conventional insulating substrate portion.
[Explanation of symbols]
1 Metal base plate, 1a main surface, 1b protrusion, 1c ring-shaped flat protrusion, 1d ring-shaped flat surface, 2 insulating substrate, 2a, 2b front metal pattern, 2c back metal pattern, 3 semiconductor element, 4 solder, 4a solder Nose protruding part, 5 Resin case, 6 Electrode terminal, 7 Solder, 8 Adhesive, 9 Ring-shaped flat protrusion forming jig, 9a Opposing surface, 9b Frustum-shaped protruding part, 9c Tip part, 9d Recessed part, 9e Flat surface, h Projection height

Claims (5)

絶縁板の表主面に半導体素子を実装する表金属パターンが、裏主面に裏金属パターンが夫々一体的に形成された絶縁基板を、金属ベース板の主面に形成され、先端にリング状の第1の平坦面を有しその高さが相互に等しい複数の突起における前記第1の平坦面に載置し、前記裏金属パターンと前記主面の間を半田付けする半導体装置の製造装置において、前記主面を押圧する突起部と、該突起部の根元周縁に形成した第2の平坦面とを有し、前記突起部を前記主面に押圧してめり込ませることにより前記根元周縁の近傍にてリング状に隆起した前記主面の隆起高さを前記第2の平坦面で規制して加工する加工手段とを備えたことを特徴とする半導体装置の製造装置。  A surface metal pattern for mounting semiconductor elements on the front main surface of the insulating plate is formed on the main surface of the metal base plate with an insulating substrate in which the back metal pattern is integrally formed on the back main surface, and a ring shape at the tip An apparatus for manufacturing a semiconductor device, wherein the semiconductor device is mounted on the first flat surface of the plurality of protrusions having the same flat surface and soldered between the back metal pattern and the main surface. And a second flat surface formed at the base periphery of the protrusion, and the protrusion is pressed against the main surface to be embedded. An apparatus for manufacturing a semiconductor device, comprising: a processing unit that processes a height of the main surface that is raised in a ring shape in the vicinity of a peripheral edge by the second flat surface. 加工手段は、前記主面に対向配設された対向面を有し、該対向面を前記主面に当接させ、加工完了となるようにしたことを特徴とする請求項1に記載の半導体装置の製造装置。2. The semiconductor according to claim 1 , wherein the processing means has an opposing surface disposed to oppose the main surface, and the opposing surface is brought into contact with the main surface to complete the processing. Equipment manufacturing equipment. 加工手段の突起部はその根元周縁が先端部よりも大きな略円錐台状に形成したことを特徴とする請求項1に記載の半導体装置の製造装置。2. The semiconductor device manufacturing apparatus according to claim 1, wherein the protrusion of the processing means is formed in a substantially truncated cone shape having a base periphery larger than that of the tip. 金属ベース板と、絶縁板の表主面に半導体素子を実装する表金属パターンを、裏主面に裏金属パターンを夫々一体的に形成した絶縁基板とを準備する工程と、前記金属ベース板の主面に、先端にリング状の第1の平坦面を有する突起を形成加工する工程と、前記突起に前記裏金属パターンを載置し該裏金属パターンを前記主面に半田付けする工程とからなる半導体装置の製造方法において、前記主面にめり込み前記突起を形成する突起部と、該突起部の根元全周縁に形成された第2の平坦面とを有する加工ヘッドにおける前記突起部を前記主面にめり込ませ前記突起を形成する時に、該突起の先端を前記第2の平坦面に当て、該突起の先端にリング状の前記第1の平坦面を形成するようにしたことを特徴とする半導体装置の製造方法。  Preparing a metal base plate, a front metal pattern for mounting a semiconductor element on a front main surface of the insulating plate, and an insulating substrate integrally formed with a back metal pattern on the back main surface; From the step of forming a protrusion having a ring-shaped first flat surface at the tip on the main surface, and the step of placing the back metal pattern on the protrusion and soldering the back metal pattern to the main surface In the manufacturing method of a semiconductor device, the protrusion in a processing head having a protrusion that is recessed into the main surface to form the protrusion, and a second flat surface formed at the entire base periphery of the protrusion is used for the protrusion. When the protrusion is formed by being recessed into a surface, the tip of the protrusion is applied to the second flat surface, and the ring-shaped first flat surface is formed at the tip of the protrusion. A method for manufacturing a semiconductor device. 金属ベース板と、絶縁板の表主面に半導体素子を実装する表金属パターンを、裏主面に裏金属パターンを夫々一体的に形成した絶縁基板とを準備する工程と、前記金属ベース板の主面に、先端にリング状の第1の平坦面を有する突起を形成加工する工程と、前記突起に前記裏金属パターンを載置し該裏金属パターンを前記主面に半田付けする工程とからなる半導体装置の製造方法において、前記主面にめり込み前記突起を形成する突起部と、該突起部の根元全周縁に形成された第2の平坦面とを有する加工ヘッドにおける前記突起部を前記主面にめり込ませ前記突起を形成する時に、該突起の先端を前記第2の平坦面に当て、該突起の先端にリング状の第1の平坦面を形成すると共に、前記第1の平坦面とは別に前記主面と対向する対向面を前記主面に当接させ、前記めり込み量を規制することを特徴とする半導体装置
の製造方法。
Preparing a metal base plate, a front metal pattern for mounting a semiconductor element on a front main surface of the insulating plate, and an insulating substrate integrally formed with a back metal pattern on the back main surface; From the step of forming a protrusion having a ring-shaped first flat surface at the tip on the main surface, and the step of placing the back metal pattern on the protrusion and soldering the back metal pattern to the main surface In the manufacturing method of a semiconductor device, the protrusion in a processing head having a protrusion that is recessed into the main surface to form the protrusion, and a second flat surface formed at the entire base periphery of the protrusion is used for the protrusion. When the protrusion is formed by being recessed into a surface, the tip of the protrusion is applied to the second flat surface to form a ring-shaped first flat surface at the tip of the protrusion, and the first flat Separately from the surface, a facing surface facing the main surface It is brought into contact with serial main surface, a method of manufacturing a semiconductor device, characterized by regulating the embedment amount.
JP08150599A 1999-03-25 1999-03-25 Semiconductor device manufacturing method and manufacturing apparatus Expired - Lifetime JP4154793B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP08150599A JP4154793B2 (en) 1999-03-25 1999-03-25 Semiconductor device manufacturing method and manufacturing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP08150599A JP4154793B2 (en) 1999-03-25 1999-03-25 Semiconductor device manufacturing method and manufacturing apparatus

Publications (2)

Publication Number Publication Date
JP2000277876A JP2000277876A (en) 2000-10-06
JP4154793B2 true JP4154793B2 (en) 2008-09-24

Family

ID=13748229

Family Applications (1)

Application Number Title Priority Date Filing Date
JP08150599A Expired - Lifetime JP4154793B2 (en) 1999-03-25 1999-03-25 Semiconductor device manufacturing method and manufacturing apparatus

Country Status (1)

Country Link
JP (1) JP4154793B2 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5130533B2 (en) * 2005-09-21 2013-01-30 Dowaメタルテック株式会社 Semiconductor substrate heat sink having protrusions and method for manufacturing the same
JP5463845B2 (en) * 2009-10-15 2014-04-09 三菱電機株式会社 Power semiconductor device and manufacturing method thereof
JP5678323B2 (en) * 2010-08-10 2015-03-04 Dowaメタルテック株式会社 Heat sink for semiconductor substrate
JP5914968B2 (en) * 2011-01-12 2016-05-11 三菱マテリアル株式会社 Power module substrate with heat sink and manufacturing method thereof
JP5884291B2 (en) * 2011-04-20 2016-03-15 三菱マテリアル株式会社 Power module board unit with heat sink
JP6008750B2 (en) * 2013-01-28 2016-10-19 三菱電機株式会社 Semiconductor device
JP6423147B2 (en) * 2013-12-03 2018-11-14 三菱電機株式会社 Power semiconductor device and manufacturing method thereof
JP7043225B2 (en) 2017-11-08 2022-03-29 株式会社東芝 Semiconductor device
EP3955288A1 (en) * 2020-08-13 2022-02-16 Siemens Aktiengesellschaft Power module with a bonding layer comprising a solder layer and a spacer, electrical device comprising the power module and method for producing the power module

Also Published As

Publication number Publication date
JP2000277876A (en) 2000-10-06

Similar Documents

Publication Publication Date Title
US4450471A (en) Semi-conductor power device assembly and method of manufacture thereof
JP6309112B2 (en) Power module
CN102637621B (en) Be used for the assembling fixture of semiconductor device and the assemble method for semiconductor assembling
JP4154793B2 (en) Semiconductor device manufacturing method and manufacturing apparatus
US8399976B2 (en) Resin sealed semiconductor device and manufacturing method therefor
JPWO2012157583A1 (en) Semiconductor device and manufacturing method thereof
EP0712158A2 (en) Resin sealing type semiconductor device with cooling member and method of making the same
JP3832334B2 (en) Semiconductor chip mounting substrate and manufacturing method thereof
JP5422830B2 (en) Wiring board with lead pins and method for manufacturing the same
JP2000299330A (en) Bare chip mounting board, bare chip mounting method and bare chip mounting apparatus
JPH08236578A (en) Flip-chip mounting method for semiconductor element and adhesive used for this mounting method
KR101096071B1 (en) Substrate for mounting silicon device and method thereof
JP2002329828A (en) Semiconductor device
JPH1117050A (en) Circuit board and method of manufacturing circuit board
JP2003197681A (en) Electronic equipment
JP2001144141A (en) Semiconductor chip mounting method
JP2002164386A (en) IC mounting substrate, method of manufacturing the same, and method of mounting IC on IC mounting substrate
JP2005072098A (en) Semiconductor device
JP2004281646A (en) Electronic component fixing method and fixing device
JPH09181229A (en) Semiconductor device
WO2024111058A1 (en) Semiconductor device and production method for semiconductor device
TWI914757B (en) Manufacturing method of intermediate layer electronic module
JP2007311577A (en) Semiconductor device
JP2010192489A (en) Method of manufacturing electronic component mounting structure, and electronic component mounting structure
JP2005150179A (en) Semiconductor device and manufacturing method thereof

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20040527

RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7423

Effective date: 20040903

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20040903

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20040903

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20061228

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070116

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070319

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070515

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070713

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20071127

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080121

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20080130

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20080617

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20080630

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110718

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110718

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110718

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120718

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120718

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130718

Year of fee payment: 5

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term