JP4157693B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, and more particularly to a chip size package (CSP) type semiconductor device in which a redistribution layer, an insulating outer layer, and an external connection terminal are formed on a semiconductor element.
[0002]
[Prior art]
The electrode pad on the semiconductor element is generally disposed on the outer peripheral portion of the circuit formation surface of the semiconductor element. Further, external connection terminals of semiconductor devices mounted on a substrate by flip chip mounting are generally formed by solder balls or the like. When the solder balls are formed as they are on the electrode pads on the semiconductor element as the external connection terminals, the distance between the solder balls is narrow, so that adjacent solder balls after mounting on the board may come into contact and cause a short circuit. Therefore, in order to avoid such a short-circuit of the solder balls, the solder balls (external connection terminals) are rearranged in a lattice shape on the entire surface of the semiconductor element, and the interval between the solder balls is widened.
[0003]
Therefore, in a semiconductor device having a CSP structure intended for flip chip mounting, wiring is routed (rewiring) from the electrode of the semiconductor element to a position where the external connection terminal is to be formed. Wiring is performed by a rewiring layer formed on the semiconductor element, and external connection terminals (solder balls) are formed on the rewiring layer.
[0004]
FIG. 1 is a flowchart showing an example of a manufacturing process of a conventional CSP type semiconductor device. 2 is a cross-sectional view of the semiconductor device at the manufacturing stage in each of the manufacturing steps shown in FIG. In addition, (1)-(11) in FIG. 1 has shown the correspondence with each sectional drawing in FIG.
[0005]
In the manufacturing process shown in FIG. 1, first, a sputtered film 4 of copper (Cu) is formed by sputtering on the semiconductor element (wafer) 1 covered with the insulating film 3 except for the electrode pads 2 (step S1: FIG. 1). 2 (a)). The sputtered copper film 4 is formed for use as an electrode for electrolytic plating. Next, a resist 5 is applied (step S2), exposed and developed to form a rewiring pattern with the resist 5 (steps S3 and S4: see FIG. 2B). Then, copper (Cu) is electroplated using the copper sputtered film 4 formed in step S1 as an electrode to form a rewiring pattern 6 (see step S5: FIG. 2C). Thereafter, the resist 5 formed in steps S2, S3, and S4 is removed (step S6: see FIG. 2D), and a resist 7 is newly applied (step S7). The resist 7 formed in step S7 is exposed and developed (steps S8 and S9), and an opening is provided at a position where a solder ball is to be formed (see FIG. 2E).
[0006]
Next, nickel (Ni) plating 8 is formed as a barrier metal in the opening 7a provided in the resist 7 by electrolytic Ni plating (step S10: see FIG. 2 (f)), and gold (Au) is formed on the Ni plating 8. ) 9 is formed by electrolytic Au plating (step S11: see FIG. 2 (g)). After the gold plating 9 is formed on the Ni plating 8, the resist 7 is removed, and the copper sputtered film 4 covered with the resist 7 is exposed (step S12: see FIG. 2 (h)). Thereafter, the copper sputtered film is removed by etching (step S13: see FIG. 2 (i)), and the resin coating 10 is applied except for the gold plating portion (step S14: see FIG. 2 (j)). Finally, solder balls (bumps) 11 are formed on the gold plating 9 exposed from the resin coating 10 to complete the semiconductor device.
[0007]
[Problems to be solved by the invention]
As described above, the electroplating method is mainly used in the conventional rewiring forming process. This is because the formation of the rewiring by the electrolytic plating method of Cu has better adhesion of the rewiring and can efficiently form the thick rewiring as compared with the formation by the electroless plating method. However, an electrode is required to perform electrolytic plating, and it is necessary to first form a sputtered copper film on the semiconductor element by sputtering as described above. Sputtering requires expensive processing equipment, and processing efficiency is poor because wafers are processed one by one. Therefore, since the copper sputtered film is formed, the manufacturing cost of the semiconductor device increases.
[0008]
On the other hand, when the rewiring is formed by the electroless plating method, the adhesion between the insulating film on the semiconductor element and the rewiring made of copper becomes a problem. That is, the uppermost layer of the insulating film on the semiconductor element is generally formed of polyimide, and the re-wiring layer may be peeled off due to poor adhesion of the copper layer formed by electroless plating to polyimide.
[0009]
In order to solve this problem, the following measures have been proposed, but each has its own problems and is not satisfactory.
[0010]
1) The surface of the polyimide is chemically roughened with a strong oxidizing agent such as potassium permanganate, potassium dichromate, hypochlorous acid or the like to improve adhesion. Examples of reduction treatment with a strong oxidizing agent are disclosed in Japanese Patent Application Laid-Open Nos. 6-21157 and 5-129377. When the electrode pad of the semiconductor element is made of aluminum (Al), the surface of the electrode pad (aluminum) is oxidized by the oxidant, so that the copper cannot be deposited well in the subsequent copper plating process. There is.
[0011]
2) The surface of the polyimide is chemically roughened with a strong reducing agent such as hydrazine to improve adhesion. An example of the reduction treatment with hydrazine is disclosed in Japanese Patent Laid-Open No. 5-114779. The reducing action of hydrazine is expressed in an alkaline solution. Also in Japanese Patent Laid-Open No. 5-114779, hydrazine is mixed with sodium hydroxide solution and used as alkaline. Here, when the electrode pad of the semiconductor element is formed of aluminum (Al), there is a problem that the electrode pad (aluminum) is dissolved by the alkaline solution and the electrode pad disappears.
[0012]
3) The polyimide surface is physically roughened by dry treatment such as ashing to improve adhesion. Dry processing such as ashing requires an expensive processing device, which increases equipment costs. In addition, since the dry process is a process for each sheet, the processing process takes time, and the manufacturing cost correspondingly increases.
[0013]
4) The surface of the polyimide is mechanically roughened by mechanical polishing or the like to improve adhesion. It has the same problem as 3) above.
[0014]
The present invention has been made in view of the above points, and provides a semiconductor device that can improve the adhesion between a polyimide layer and an electroless copper plating layer without roughening the surface of the polyimide, and a method for manufacturing the same. The purpose is to provide.
[0015]
[Means for Solving the Problems]
In order to solve the above-described problems, the present invention is characterized by the following measures.
[0016]
The invention according to claim 1 is a semiconductor device having an external connection terminal connected to a wiring pattern formed on an insulating film of a semiconductor element, wherein the wiring pattern is formed on the insulating film. It has a nickel plating layer and an electroless copper plating layer formed on the electroless nickel plating layer.
[0017]
According to the first aspect of the present invention, the wiring pattern formed by the electroless copper plating method is formed on the insulating film of the semiconductor element via the electroless nickel plating layer. The electroless nickel plating layer has good adhesion to both the electroless copper plating layer and the insulating film (for example, polyimide layer) of the semiconductor element. Therefore, the wiring pattern made of the electroless copper plating layer is formed in close contact with the insulating film of the semiconductor element through the electroless nickel plating layer. Thereby, peeling of the wiring pattern which consists of an electroless copper plating layer is prevented, and manufacturing cost can be reduced compared with the case where a wiring pattern is formed with an electrolytic copper plating layer.
[0018]
Invention of Claim 2 is the semiconductor device of Claim 1, Comprising: The said electroless copper plating layer is a substitution type electroless copper plating layer formed on the said electroless nickel plating layer, and this substitution type And a reduced electroless copper plating layer formed on the electroless copper plating layer.
[0019]
According to the second aspect of the present invention, the substitutional electroless copper plating layer is formed on the electroless nickel plating layer, and the reduction electroless copper plating layer is formed thereon. The plating solution used for the substitutional electroless copper plating method does not contain a strong alkali component, and the electroless nickel plating layer does not elute into the plating solution. Therefore, even if the thickness of the electroless nickel plating layer is made as small as possible, the electroless nickel plating layer does not elute and disappear during the formation process of the electroless copper plating layer. Maintained.
[0020]
The invention described in claim 3 includes a step of forming an electroless nickel plating layer on an insulating film of a semiconductor element, a step of forming an electroless copper plating layer on the electroless nickel plating layer, and the electroless nickel plating. Etching a layer and the electroless copper plating layer to form a pattern wiring, and forming an external connection terminal on the pattern wiring.
[0021]
According to the invention of claim 3, the wiring pattern formed by the electroless copper plating method is formed on the insulating film of the semiconductor element via the electroless nickel plating layer. Therefore, an effect similar to that of the first aspect can be obtained. In addition, compared to the case where a wiring pattern is formed with an electrolytic copper plating layer, an electroless copper plating layer can be formed while maintaining sufficient adhesion without increasing the number of manufacturing steps and without complicating the semiconductor. The manufacturing cost of the apparatus can be reduced.
[0022]
Invention of Claim 4 is a manufacturing method of the semiconductor device of Claim 3, Comprising: It has the process of providing palladium on the said insulating film before the process of forming the said electroless nickel plating layer. It is a feature.
[0023]
According to the fourth aspect of the present invention, palladium acts as a catalyst, and the electroless nickel plating layer can be firmly adhered to the insulating film of the semiconductor element.
[0024]
A fifth aspect of the present invention is the method of manufacturing a semiconductor device according to the fourth aspect, wherein the step of forming the electroless copper plating layer includes a substitutional electroless copper plating method on the electroless nickel plating layer. And forming a substitutional electroless copper plating layer on the substitutional electroless copper plating layer by a reduction electroless copper plating method. It is what.
[0025]
According to the invention described in claim 5, the substitutional electroless copper plating layer is formed on the electroless nickel plating layer, and the reduction electroless copper plating layer is formed thereon. Therefore, the same effect as that of claim 2 can be obtained.
DETAILED DESCRIPTION OF THE INVENTION
Next, an embodiment of the present invention will be described with reference to the drawings.
[0026]
FIG. 3 is a partial cross-sectional view of a semiconductor device according to an embodiment of the present invention. 4 is a flowchart showing a manufacturing process of the semiconductor device shown in FIG. 3, and FIG. 5 is a view showing a cross section of the semiconductor device in a manufacturing stage in each process of the manufacturing process shown in FIG. In addition, (1)-(9) in FIG. 5 has shown the correspondence with each sectional drawing in FIG. 3 and FIG. 5, parts that are the same as the parts shown in FIG.
[0027]
In the semiconductor device according to the present embodiment, as shown in FIG. 3, a wiring pattern (rewiring) is formed on a semiconductor element (wafer) 1 by an electroless Ni plating layer 21 and electroless Cu plating layers 22 , 23 . A solder ball 11 is connected to the wiring pattern as an external connection terminal through Ni plating and Au plating. The semiconductor device according to the present embodiment uses an electroless Cu plating method instead of the electrolytic Cu plating method in the manufacturing process of the wiring pattern.
[0028]
The adhesion between the electroless Cu plating layer and the polyimide layer 3 is such that the electroless Ni plating layer 21 is formed on the polyimide layer 3 and then the electroless Cu plating layer is formed, so that the adhesion is practically sufficient. It becomes. Further, in order to make the electroless Ni plating layer 21 as thin as possible, a substitutional electroless Cu plating layer 22 is formed on the electroless Ni plating layer 21, and a reduction electroless Cu plating layer 23 is further formed thereon. Is preferably formed.
[0029]
Hereinafter, the manufacturing process of the semiconductor device shown in FIG. 3 will be described with reference to FIGS.
[0030]
In the manufacturing process shown in FIG. 4, first, palladium (Pd) 20 is applied on the semiconductor element (wafer) 1 covered with the insulating film (polyimide layer) 3 except for the electrode pads 2. (Step S20: See FIG. 4A). More specifically, the surface of the semiconductor element is immersed in a solution mainly containing palladium and not containing chloride, thereby depositing palladium 20 in a dispersed state on the surface of the semiconductor element. Here, before dipping in the palladium solution, it is preferable to remove the oxide film on the surface of the electrode pad 2 made of aluminum exposed on the surface of the semiconductor element (wafer) with a sulfuric acid acidic solution. The palladium 20 acts as a catalyst when forming the electroless Ni layer 21 and promotes the precipitation of Ni.
[0031]
Next, an electroless Ni plating layer 21 is formed over the entire surface of the semiconductor element 1 to which palladium 20 has been applied by a self-reducing electroless Ni plating method (step S21: see FIG. 5B). Since the electroless Ni plating layer 21 has a larger resistance than the copper layer, it is preferable to reduce the thickness as much as possible. Therefore, in this embodiment, electroless Ni plating layer 21 is formed to a thickness of about 100 nm. The reason for forming the electroless Ni plating layer on the polyimide layer 3 is that the Ni plating has better adhesion to the polyimide than the Cu plating. As the electroless Ni plating solution used here, a commercially available phosphorus-type electroless Ni plating solution can be used. The phosphorus type electroless Ni plating solution contains diaphosphoric acid or sodium diaphosphate as a reducing agent, and the content is preferably 4 to 9 percent.
[0032]
Subsequently, a substitutional electroless Cu plating layer 22 is formed on the electroless Ni plating layer 21 by a substitutional electroless Cu plating method (step S22: see FIG. 5C). Here, a commercially available substitutional electroless Cu plating solution can be used as the plating solution. A commercially available electrolytic Cu plating solution can also be used. The substitutional electroless Cu plating method is a plating method in which copper (Cu) is deposited on Ni by ion exchange with Ni. If the surface of Ni is covered with copper, copper will not be deposited. The copper plating layer cannot be formed. In the present embodiment, the thickness of the substitutional electroless Cu plating layer 22 is about 100 nm. Commercially available substitutional electroless Cu plating solutions have a wide range of PH values. In this embodiment, it is preferable to use a weakly acidic substitutional electroless Cu plating solution.
[0033]
Next, a reduced electroless Cu plating layer 23 is formed on the substitutional electroless Cu plating layer 22 by a reduction electroless Cu plating method (step S23: see FIG. 5D). The reduction type electroless Cu plating method can form a copper plating layer having a desired thickness without limiting the film thickness unlike the substitution type electroless Cu plating method. Therefore, the thickness of the reduced electroless Cu plating layer 23 can be 3 to 10 μm as a thickness of a conductive pattern generally required for a wiring pattern (rewiring). As the electroless Cu plating solution to be used, a commercially available reduced electroless Cu plating solution can be used.
[0034]
Here, the reduced electroless Cu plating layer 23 may be formed directly on the electroless Ni plating layer 21 without forming the substitutional electroless Cu plating layer 22 in step S22. In this case, there is a possibility that a part of the electroless Ni plating layer 21 is dissolved by the reducing agent contained in the plating solution used in the reduction type electroless Cu plating method, and therefore the thickness of the electroless Ni plating layer 21 is sufficiently increased. It is necessary to keep it.
[0035]
As described above, when the thickness of the electroless Ni plating layer 21 is made as small as possible, for example, 100 nm, there is a possibility that the problem that the electroless Ni plating layer 21 partially dissolves in the plating solution and disappears. . That is, the reduced electroless Cu plating solution is obtained by adding a reducing agent to the substitutional electroless Cu plating solution, and the reducing electroless Cu plating solution becomes a strong alkaline solution by this reducing agent. When the electroless Ni plating layer comes into contact with this strong alkaline solution, the electroless Ni plating layer dissolves and becomes mottled.
[0036]
Therefore, in the present embodiment, utilizing that the plating solution used in the substitutional electroless Cu plating method does not contain a reducing agent, the electroless Cu plating layer 22 is eluted by the reduced electroless Cu plating solution. It is preventing.
[0037]
Returning to FIG. 4, the description of the manufacturing process of the semiconductor device will be continued.
[0038]
After forming the electroless Cu plating layer 23 having a desired thickness, a resist 24 is applied on the electroless Cu plating layer 23 (step S24), and the resist 24 is formed into a shape corresponding to the rewiring pattern by exposure and development processing. (Steps S25 and S26: see FIG. 5E). Subsequently, the shape of the wiring pattern is left by etching, and the electroless Cu plating layers 22 and 23 and the electroless Ni plating layer 21 are removed (step S27: see FIG. 5F). Then, a photosensitive resin 25 made of polyimide or the like is applied to the entire surface of the semiconductor element (step S28), exposed and developed, and an opening 25a is provided at the position where the external connection electrode is formed (steps S29 and S30: FIG. 5). (See (g)).
[0039]
Next, nickel (Ni) plating 8 is formed as a barrier metal in the opening 25a by electroless Ni plating, and gold (Au) plating 9 is formed on the Ni plating 8 by electroless Au plating (steps S31 and S32). : Refer to FIG. 5 (h)). Finally, solder balls (bumps) 11 are formed on the gold plating 9 as external connection terminals to complete the semiconductor device shown in FIG.
[0040]
As described above, according to the present embodiment, a reduction type mainly serving as a wiring pattern on the polyimide layer 3 of the insulating film via the electroless Ni plating layer 21 and the substitutional electroless Cu plating layer 22. An electroless Cu plating layer 23 is formed. The electroless Ni plating layer 21 has appropriate adhesion to both the polyimide layer 3 and the substitutional electroless Cu plating layer 22. Thereby, the adhesiveness between a polyimide and copper can be improved substantially and peeling of the rewiring from an insulating film can be prevented.
[0041]
Further, by forming the substitutional electroless Cu plating layer 22 before forming the reduced electroless Cu plating layer 23, when forming a wiring pattern (rewiring) by electroless Cu plating, the electroless Ni is formed. The plating layer 21 can be prevented from dissolving, and the adhesion between the rewiring and the polyimide layer 3 is not impaired.
[0042]
According to the present embodiment, since the wiring pattern can be formed by the electroless Cuc plating layer, a cheaper manufacturing apparatus can be used than when the wiring pattern is formed by the electrolytic Cu plating method, and the semiconductor device The manufacturing cost can be reduced. That is, when the wiring pattern is formed by the electrolytic Cu plating method as in the prior art, it is an expensive sputtering device (copper sputtering device), and it is necessary to connect the electrodes in the plating process, which is costly. . On the other hand, when the wiring pattern is formed by the electroless Cu plating method as in the present invention, instead of copper sputtering, it is only necessary to perform electroless Ni plating that can perform many treatments at once with an inexpensive apparatus. Well, the manufacturing cost of the semiconductor device can be reduced.
【The invention's effect】
As described above, according to the present invention, various effects described below can be realized.
[0043]
According to the first aspect of the present invention, the wiring pattern formed by the electroless copper plating method is formed on the insulating film of the semiconductor element via the electroless nickel plating layer. The electroless nickel plating layer has good adhesion to both the electroless copper plating layer and the insulating film (for example, polyimide layer) of the semiconductor element. Therefore, the wiring pattern made of the electroless copper plating layer is formed in close contact with the insulating film of the semiconductor element through the electroless nickel plating layer. Thereby, peeling of the wiring pattern which consists of an electroless copper plating layer is prevented, and manufacturing cost can be reduced compared with the case where a wiring pattern is formed with an electrolytic copper plating layer.
[0044]
According to the second aspect of the present invention, the substitutional electroless copper plating layer is formed on the electroless nickel plating layer, and the reduction electroless copper plating layer is formed thereon. The plating solution used for the substitutional electroless copper plating method does not contain a strong alkali component, and the electroless nickel plating layer does not elute into the plating solution. Therefore, even if the thickness of the electroless nickel plating layer is made as small as possible, the electroless nickel plating layer does not elute and disappear during the formation process of the electroless copper plating layer. Maintained.
[0045]
According to the invention of claim 3, the wiring pattern formed by the electroless copper plating method is formed on the insulating film of the semiconductor element via the electroless nickel plating layer. Therefore, an effect similar to that of the first aspect can be obtained. In addition, compared to the case where a wiring pattern is formed with an electrolytic copper plating layer, an electroless copper plating layer can be formed while maintaining sufficient adhesion without increasing the number of manufacturing steps and without complicating the semiconductor. The manufacturing cost of the apparatus can be reduced.
[0046]
According to the fourth aspect of the present invention, palladium acts as a catalyst, and the electroless nickel plating layer can be firmly adhered to the insulating film of the semiconductor element.
[0047]
According to the invention described in claim 5, the substitutional electroless copper plating layer is formed on the electroless nickel plating layer, and the reduction electroless copper plating layer is formed thereon. Therefore, the same effect as that of claim 2 can be obtained.
[Brief description of the drawings]
FIG. 1 is a flowchart showing an example of a manufacturing process of a conventional CSP type semiconductor device.
2 is a view showing a cross section of a semiconductor device at a manufacturing stage in each step of the manufacturing process shown in FIG. 1;
FIG. 3 is a partial cross-sectional view of a semiconductor device according to an embodiment of the present invention.
4 is a flowchart showing manufacturing steps of the semiconductor device shown in FIG. 3;
5 is a view showing a cross section of a semiconductor device at a manufacturing stage in each step of the manufacturing process shown in FIG. 4;
[Explanation of symbols]
1 Semiconductor device (wafer)
2 Electrode pad 3 Polyimide layer 8 Ni plating 9 Au plating 10 Resin coating 10a Opening 11 Solder ball 21 Electroless Ni plating layer 22 Replacement type electroless Cu plating layer 23 Reduction type electroless Cu plating layer

Claims (5)

A semiconductor device having an external connection terminal connected to a wiring pattern formed on an insulating film of a semiconductor element,
The wiring pattern is
An electroless nickel (Ni) plating layer formed on the insulating film;
A semiconductor device having an electroless copper (Cu) plating layer formed on the electroless nickel plating layer. The semiconductor device according to claim 1,
The electroless copper plating layer is
A substitutional electroless copper (Cu) plating layer formed on the electroless nickel plating layer;
A semiconductor device comprising: a reduced electroless copper (Cu) plating layer formed on the substitutional electroless copper plating layer. Forming an electroless nickel (Ni) plating layer on the insulating film of the semiconductor element;
Forming an electroless copper (Cu) plating layer on the electroless nickel plating layer;
Etching the electroless nickel plating layer and the electroless copper plating layer to form a pattern wiring; and
And a step of forming an external connection terminal on the pattern wiring. A method of manufacturing a semiconductor device according to claim 3,
A method of manufacturing a semiconductor device, comprising a step of providing palladium on the insulating film before the step of forming the electroless nickel plating layer. A method of manufacturing a semiconductor device according to claim 4,
The step of forming the electroless copper plating layer includes:
Forming a substitutional electroless copper (Cu) plating layer on the electroless nickel plating layer by a substitutional electroless copper (Cu) plating method;
Forming a reduced electroless copper (Cu) plating layer on the substitutional electroless copper plating layer by a reduced electroless copper (Cu) plating method.

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