JP4177983B2 - Multiple power converter and control method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a multiplex converter connected to an AC power supply, and more particularly to a multiplex converter with reduced ripple of output DC current.
[0002]
[Prior art]
Technology to increase the capacity of power converters by connecting AC outputs of multiple voltage-type PWM converters in series with transformers or interphase reactors as a technology for increasing the capacity of power converters that convert AC to DC or DC to AC Is already known, and the capacity of these multiple converters is about n times the single-machine converter capacity when the number of multiplexing is n, and a large-capacity power conversion can be performed as compared with the single-machine converter. Hereinafter, in this specification, a multi-converter connected to a DC capacitor and having the DC unit of a single-machine converter made common is referred to as a DC unit common multi-converter, and the multiplex number of the DC unit common multi-converter is represented as n. To do.
[0003]
In the conventional method for PWM control of the converter output voltage of the DC common multiplexer, a phase shift system that shifts the phase of the carrier wave of the serial multiplexer, in which the AC output is synthesized by a transformer, according to the number of multiplexing, There is a carrier phase shift method of a parallel multiple converter described in Japanese Patent Laid-Open No. 60-98875.
[0004]
FIG. 3 shows the main circuit configuration of the dual multiplex DC common multiplexer, and FIG. 4 shows the carrier wave, the synthesized voltage command, the synthesized voltage, The relationship between the electric power received by each phase of the DC unit common multiple converter 1 from the AC power supply 3 and the DC current is shown.
[0005]
Here, the combined voltage is the AC power supply side terminal voltage of the transformer when the AC currents Iu, Iv, and Iw are zero. Vu * is a U-phase composite voltage command value, Vdc is a capacitor voltage, Vu, Vv, and Vw are composite voltages, α is a ratio of a single-machine converter output voltage and a transformer output voltage, Iu, Iv, and Iw are alternating currents, Vu · Iu, Vv · Iv, Vw · Iw are electric power received from the AC power supply 3 by each phase of the DC common multiple converter 1, and Idc is a DC current. The switching timing of the converter was determined by comparing the two carrier waves tr1 and tr2 whose phases are shifted from each other by 360/2 = 180 ° and the combined voltage command values Vu *, Vv * and Vw *.
[0006]
Vu * and tr1 are compared, and when Vu * is greater than tr1, Qu11, which is the IGBT of single-unit converter 11, is turned on and Qu12 is turned off. In the opposite case, Qu11 is turned off and Qu12 is turned on. Vu * and tr2 are compared, and when Vu * is greater than tr2, Qu21, which is the IGBT of single-unit converter 12, is turned on and Qu22 is turned off. In the opposite case, Qu21 is turned off and Qu22 is turned on. Similarly for V phase and W phase, Vv *, Vw * and tr1, tr2 were compared, and the IGBT of the single-machine converter was turned on / off.
[0007]
As described above, the switching timing of the single-machine converter is determined based on the magnitude relationship between the combined voltage command value and the carrier wave.
[0008]
The combined voltages Vu, Vv, and Vw are obtained by multiplying the sum of the phase voltages of the single-machine converter output by comparing the combined voltage command value with the triangular waves tr1 and tr2 by α. The electric power Vu · Iu, Vv · Iv, Vw · Iw received by each phase from the AC power supply is obtained by taking the product of the combined voltages Vu, Vv, Vw and the AC currents Iu, Iv, Iw which are three-phase balanced sine waves. Calculated.
[0009]
Equation (1) is established from the power balance between the AC unit and the DC unit of the DC unit multiple converter.
[0010]
Vdc · Idc = Vu · Iu + Vv · Iu + Vw · Iw (Equation 1)
The left side of Equation (1) is the power output from the DC unit multiple converter to the load from the DC terminal, and the right side of Equation (1) is the power received by the DC unit multiple converter from the AC terminal. The power received by each phase of the direct current section multiple converter from the AC terminal is the product of the phase voltage and the phase current, and the right side of the equation (1) is the sum of the power received by each phase from the AC terminal. From equation (1), the direct current is equal to the quotient obtained by dividing the AC power of each phase by the DC voltage.
[0011]
As shown in FIG. 4, since the power received from the alternating current unit shown on the right side of the equation (1) has a ripple of the same phase (convex in the center) in the cycle Tri / 2 in the U phase, the V phase, and the W phase, The power output to the DC load also has a ripple of period Tri / 2, and the DC current has a ripple of period Tri / 2. Thus, a ripple component twice the switching frequency appears in the direct current ripple.
[0012]
[Problems to be solved by the invention]
When DC current ripple occurs, DC capacitor voltage ripple also occurs. Therefore, in the above-mentioned conventional technology, ripple of n times the frequency of the carrier wave is particularly large in the capacitor voltage, increasing the loss in the wiring and capacitors of the DC part, and noise in the DC part. Or cause vibration.
[0013]
In order to reduce the capacitor voltage ripple, a method of increasing the frequency of the carrier wave can be considered. However, this has a problem that the switching loss of the converter increases and the conversion efficiency decreases.
[0014]
An object of the present invention is to reduce the ripple of the direct current of the direct current common multiple converter without increasing the number of switching, and to reduce the ripple of the capacitor voltage.
[0015]
[Means for Solving the Problems]
The above object can be achieved by controlling the switching timing of each converter of the DC unit common multiple converter as follows.
[0016]
The output voltage range of the DC common multiple converter is divided into n equal parts in the amplitude direction, n triangular waves having the same phase and amplitude are arranged as carrier waves in each area, and the combined voltage command value and each carrier wave are compared. Thus, the ripple of the direct current can be reduced by obtaining the switching timing for driving the converter, and thereby the ripple of the capacitor voltage can be reduced.
[0017]
The reason why the DC ripple can be reduced by the above means will be described with reference to FIG. FIG. 6 shows a composite voltage command value Vu *, carrier waves tr1, tr2, AC voltages Vu, Vv, Vw, AC input powers Vu · Iu, Vv · Iv, Vw · Iw and DC currents when n is 2. The relationship with Idc is shown. The output region of the DC common multiplexer / demultiplexer is equally divided into an area 1 and an area 2 in the amplitude direction, and a triangular wave tr1 and a triangular wave tr2 are arranged in each area.
[0018]
The composite voltage is αVdc when the composite voltage command value is greater than tr1, the composite voltage is zero when the composite voltage command value is greater than tr2 and less than tr1, and the composite voltage is −αVdc when the composite voltage command value is less than tr2. The single-machine converters 11 and 12 are switched.
[0019]
As described above, the switching timing of the single converters 11 and 12 can be obtained by comparing the two triangular waves with the voltage command value.
[0020]
In the prior art, the AC input power of each phase has a ripple of the same phase with a period Tri / 2, whereas in the present invention, the AC input power ripple has an opposite phase depending on the phase. In the present invention, by setting the carrier wave to the same phase, the voltage ripple of each phase becomes the same phase regardless of the polarity of the voltage command. The AC current is three-phase balanced, and all the phase currents are not positive or all negative, and the AC power ripple, which is the product of the AC current and the AC voltage, always has an antiphase. Therefore, a component that cancels out occurs in the ripple of the AC power of each phase, so that the ripple of the total AC power is reduced. Since the sum of the power received by each phase is equal to the DC power, the ripple of the DC power, which is the sum of the phase power, can be canceled out. Therefore, since the ripple of the DC power can be reduced, the ripple of the DC current can be reduced and the capacitor voltage ripple can be reduced.
[0021]
Accordingly, a plurality of converters having a common direct current unit for converting direct current to alternating current or alternating current to direct current, means for synthesizing alternating voltages of the respective converters to obtain an output voltage, and a voltage command signal for the output voltage Means for generating n carrier signals having a predetermined period and having the same phase and amplitude and different DC bias values, and n pulse widths based on the n carrier signals and the voltage command signal A direct current common multiplex converter comprising means for outputting a modulation signal and control means for controlling the output voltage of the opposing converter based on the input pulse width modulation signal, wherein the pulse width modulation signal is converted into a half-carrier wave. Since the means for distributing to the control means of each converter is provided for each period or every integral multiple of the half-cycle of the carrier wave, ripples of DC current and capacitor voltage can be reduced.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
The present invention will be described in detail with reference to the drawings. In the following drawings, the same reference numerals indicate the same components.
[0023]
(Example 1)
FIG. 1 shows a double multiplexed DC common multiple converter of this embodiment. In FIG. 1, reference numeral 1 is a DC unit common multiple converter, 2 is a multiple converter batch PWM controller, 3 is an AC power supply, and 4 is a DC load.
[0024]
The main circuit configuration of the present embodiment is as follows. As shown in FIG. 1, the DC unit common multiple converter 1 is connected to an AC power source 3, and a load 4 is connected to the DC terminal of the DC unit common multiple converter 1. The DC unit common multiple converter 1 includes a transformer 10, single-machine converters 11 and 12, and a capacitor 15, and the AC terminals of the single-machine converter 11 and the single-machine converter 12 are connected to the transformer 10. The DC terminal of the single-machine converter 11 and the DC terminal of the single-machine converter 12 are connected in parallel to the capacitor 15, and both ends of the capacitor 15 become the DC terminals of the DC unit common multiple converter 1.
[0025]
The power supplied from the AC power supply 3 is converted into DC by the DC common multiple converter 1, and the DC power is smoothed by the capacitor 15 and supplied to the load. Multiple converter batch PWM controller 2 controls DC unit common multiple converter 1 so that the voltage of capacitor 15 becomes constant.
[0026]
Next, the operation of the multiple converter batch PWM controller 2 will be described. The multiple converter batch PWM controller 2 inputs a deviation between the DC voltage detection value detected by the voltage detector 20 and the voltage command value output from the voltage command value generator 21 to the voltage regulator 23. 23 and a current command value generator 24 calculate a power supply current command value, current regulators 25u, 25v, and 25w calculate AC composite voltage command values Vu *, Vv *, and Vw *. The triangular waves tr1, tr2 output from the carrier wave generator 26 are input to the gate signal generators 29u, 29v, 29w.
[0027]
The combined voltage command value input to the gate signal generator and the triangular waves tr1 and tr2 are respectively compared by the comparators 27u1 to 27w2, and when the voltage command value is larger than the compared triangular wave, the comparator is supplied to the pulse distributor 28u. An ON signal is output, and in the opposite case, an OFF signal is output to perform pulse width modulation (PWM). FIG. 2 shows the combined voltage command value Vu *, the triangular waves tr1 and tr2 output from the carrier wave generator 24, and the outputs Pu1 and Pu2 from the comparators 27u1 and 27u2.
[0028]
The result of comparing the magnitude of the triangular wave tr1 and the synthesized voltage command value Vu * by the comparator 27u1 is Pu1, and the result of comparing the magnitude of the triangle wave tr2 and the synthesized voltage command value Vu * by the comparator 27u2 is Pu2. These Pu1 and Pu2 are input to the pulse distributor 28u.
[0029]
The pulse distributor 28u receives Pu1 and Pu2 output from the comparators 27u1 and 27u2 and outputs gate signals Gu1 and Gu2. Specifically, the correspondence between Pu1, Pu2 and Gu1, Gu2 is switched for each half cycle of the carrier wave, and pulses are distributed so that the two converters operate alternately in a balanced manner.
[0030]
FIG. 5 shows a combined voltage command value Vu *, carrier waves tr1 and tr2, outputs Pu1 and Pu2 of comparators 27u1 and 27u2, and gate signals Gu1 and Gu2 when pulses are distributed. Since Pu1 and Pu2 are distributed to Gu1 and Gu2 in a well-balanced manner, switching is equalized.
[0031]
Gu1 becomes the gate signal Gu11 and the inversion of Gu1 becomes the gate signal Gu12. For example, if Gu1 is on, Gu12 is off, and if Gu1 is off, Gu12 is on. Gu2 to Gw2 determine Gu21 to Gw22 in the same manner as Gu1.
[0032]
Gu11 to Gw22, which are outputs of the pulse distributors 28u, 28v, and 28w, are IGBT gate signals of the single-machine converter 11 and the single-machine converter 12, and the correspondence between the gate signal and the IGBT is represented by (Formula 2) (Formula 4). As shown in the formula.
[0033]
Guxy⇔Quxy (Equation 2)
Gvxy⇔Qvxy (Equation 3)
Gwxy⇔Qwxy (Equation 4)
(X = 1, 2, 3,... N, y = 1, 2)
In the equations (2) to (4), the subscript “x” indicates a single-machine converter, and x is an integer from 1 to n. The gate signal with x = 1 is the gate signal of the single-machine converter 11, and the gate signal with x = 2 is the gate signal of the single-machine converter 12. The subscript “y” indicates the upper and lower arms of the single-machine converter, and y is a value of 1 or 2. The gate signal for y = 1 is the gate signal for the upper arm, and the gate signal for y = 2 is the gate signal for the lower arm.
[0034]
The gate signals Gu11 to Gw22 are input to the single-machine converter 11 and the single-machine converter 12, and turn on / off the corresponding IGBTs. Details of pulse distribution to the gate signals Gu11 to Gw22 are, for example, Special application 11-261480 To issue Same as described.
[0035]
FIG. 6 shows operation waveforms of this embodiment. As shown in FIG. 6, the U-phase, V-phase, and W-phase combined voltages Vu, Vv, and Vw of the DC unit common multiple converter 1 have a period of Tri / 2 and voltage ripples in the same phase at the same time for the three phases. The AC current is three-phase balanced, and all the phase currents are not positive or all negative, and the AC power ripple, which is the product of the AC current and the AC voltage, must have one of the three phases in reverse phase. Become. Accordingly, canceling components are generated in the ripple of the AC power of each phase, and the sum of the AC power received by each phase is equal to the DC power, so that the ripple of the DC power can be canceled. Thus, since the ripple of DC power can be reduced, the ripple of DC current can also be reduced, and the capacitor voltage ripple can be reduced.
[0036]
Therefore, according to the present embodiment, the DC current ripple can be reduced without increasing the number of times of switching, the ripple of the capacitor voltage can be reduced, and the number of times of switching can be made uniform. Moreover, since the direct current ripple is reduced, the alternating current ripple is also reduced, and the loss in the transformer can be reduced.
[0037]
(Example 2)
FIG. 7 shows the configuration of the four-multiplex DC unit common multiple converter 1 of this embodiment. Although the first embodiment is a two-multiplex multiplexer, the present invention can be applied even if the number of multiplexing increases. Further, although the case of the converter operation has been described in the first embodiment, the present invention can also be applied to the inverter operation.
[0038]
The main circuit configuration of the present embodiment is as follows. As shown in FIG. 7, the DC unit common multiple converter 1 is connected to an AC power source 3, and a load 4 is connected to the DC terminal of the DC unit common multiple converter 1. The DC common multiple converter 1 includes a transformer 10, single-machine converters 11 to 14, and a capacitor 15, and the AC terminals of the single-machine converters 11 to 14 are connected to the transformer 10. The DC terminals of the single-machine converters 11 to 14 are connected in parallel to the capacitor 15, and both ends of the capacitor 15 are the DC terminals of the DC unit common multiple converter 1.
[0039]
FIG. 8 shows the configuration of the DC load 4. The DC terminal of the load 4 is connected in parallel to the DC terminal of the converter 41, and the AC terminal of the converter 41 is connected to the motor 42. When the converter 41 supplies power to the motor 42 as in the acceleration of the motor, the converter 41 receives DC power from the DC common multiple converter 1, converts the DC power to AC power, Supply AC power. At this time, the DC common multiple converter 1 receives supply of AC power from the AC power supply 3, converts AC power into DC power, and supplies DC power to the converter 41.
[0040]
Conversely, when the converter 41 receives power supply from the motor 42, such as when the motor is decelerated, the converter 41 converts the AC power received from the motor 42 into DC power, and the DC unit common multiple converter 1 receives the DC power. Supply power. At this time, the DC unit common multiple converter 1 converts the DC power received from the converter 42 into AC power, and regenerates the AC power to the AC power source 3. Multiplex converter batch PWM controller 2 controls DC unit common multiple converter 1 so that the voltage of capacitor 15 is constant.
[0041]
The multiple power converter of the present embodiment can realize bidirectional power conversion between an AC power source and a DC unit, and is therefore suitable for a DC power transmission substation or a railway DC feeder substation.
[0042]
Next, the operation of the multiple converter batch PWM controller 2 will be described with reference to FIG. The multiplex converter batch PWM controller 2 calculates a DC voltage detection value detected by the voltage detector 20, a voltage regulator 23, and a current command value generator 24, and a power supply current command value, and current regulators 25u, 25v, and 25w. AC composite voltage command values Vu *, Vv *, Vw * are calculated, and the composite voltage command values and the triangular waves tr1 to tr4 output from the carrier generator 26 are input to the gate signal generators 29u, 29v, 29w. The combined voltage command value input to the gate signal generator and the triangular waves tr1 to tr4 are respectively compared by the comparators 27u1 to 27w4. When the combined voltage command value is larger than the compared triangular wave, the comparator supplies the pulse distributor 28u. An ON signal is output, and in the opposite case, an OFF signal is output to perform pulse width modulation (PWM). FIG. 9 shows the combined voltage command value Vu *, the triangular waves tr1 to tr4 output from the carrier wave generator 24, and the outputs Pu1 to Pu4 of the comparators 27u1 to 27u4.
[0043]
The result of comparing the magnitude of the triangular wave tr1 and the synthesized voltage command value Vu * by the comparator 27u1 is Pu1, and the result of comparing the magnitude of the triangle wave tr2 and the synthesized voltage command value Vu * by the comparator 27u2 is Pu2. Similarly, the result of comparing the magnitude of the triangular wave tr3 and the synthesized voltage command value Vu * by the comparator 27u3 is Pu3, and the result of comparing the magnitude of the triangle wave tr4 and the synthesized voltage command value Vu * by the comparator 27u4 is Pu4. . These Pu1 to Pu4 are input to the pulse distributor 28u.
[0044]
The pulse distributor 28u receives Pu1 to Pu4 as outputs from the comparators 27u1 to 27u4 and outputs gate signals Gu1 to Gu4. Specifically, the correspondence between Pu1 to Pu4 and Gu1 to Gu4 is switched for each half cycle of the carrier wave, and pulses are distributed so that the four converters operate alternately in a balanced manner.
[0045]
Figure 10 4 shows the combined voltage command value Vu *, the outputs Pu1 to Pu4 of the carrier waves tr1 to tr4 comparators 27u1 to 27u4, and the gate signals Gu1 to Gu4 when the pulses are distributed. Since Pu1 to Pu4 are distributed to Gu1 to Gu4 in a well-balanced manner, switching is uniform. Gu1 becomes the gate signal Gu11, and the inversion of Gu1 becomes the gate signal Gu12. For example, if Gu1 is on, Gu12 is off, and if Gu1 is off, Gu12 is on. Gu2 to Gw4 determine Gu21 to Gw42 in the same manner as Gu1.
[0046]
Gu11 to Gw42 that are outputs of the pulse distributors 28u, 28v, and 28w are IGBT gate signals of the single-machine converter 11 to the single-machine converter 14, and the correspondence between the gate signal and the IGBT is expressed by the formula (4). ).
[0047]
FIG. 11 shows operation waveforms of this embodiment. The U-phase, V-phase, and W-phase combined voltages Vu, Vv, and Vw of the DC unit common multiple converter have a period of 1 / ftri, and voltage ripples of the same phase are generated at the same time for the three phases. AC current is three-phase balanced, so that all phase currents are not positive or all negative, and the AC power ripple, which is the product of AC current and AC voltage, always has one of the three phases in reverse phase. . Therefore, canceling components are generated in the ripple of the AC power of each phase, and the sum of the AC power received by each phase is equal to the DC power, so that the ripple of the DC power can be canceled. Therefore, in this embodiment, the ripple of DC power can be reduced, so that the ripple of DC current can also be reduced, and the capacitor voltage ripple can be reduced.
[0048]
As described above, according to this embodiment, even when the number of multiplexing increases, the DC current ripple can be reduced without increasing the switching frequency and switching frequency, the capacitor voltage ripple can be reduced, and the switching frequency of each phase can be made uniform. it can. Further, it can be applied not only to the converter operation but also to the inverter operation. Further, since the direct current ripple is reduced, the alternating current ripple is also reduced, and the transformer loss can be reduced.
[0049]
(Example 3)
FIG. 12 shows the DC unit common multiple converter 1 of this embodiment. The present embodiment shown in FIG. 12 is a double multiplex converter. The direct current common multiple converter of the first and second embodiments is a transformer multiple converter. The present invention can also be applied to a parallel multiple converter.
[0050]
The main circuit configuration of the present embodiment is as follows. As shown in FIG. 12, the DC common multiple converter 1 is connected to an AC power source 3, and a load 4 is connected to the DC terminal of the multiple converter. The DC common multiple converter 1 includes an interphase reactor 100, single-machine converters 11 and 12, and a capacitor 15, and AC terminals of the single-machine converter 11 and the single-machine converter 12 are connected to the interphase reactor. The DC terminal of the single-machine converter 11 and the DC terminal of the single-machine converter 12 are connected in parallel to the capacitor 15, and both ends of the capacitor 15 become the DC terminals of the DC unit common multiple converter 1.
[0051]
The power supplied from the AC power source 3 is converted to DC by the DC common multiple converter 1, and the DC power is smoothed by the capacitor 15 and supplied to the load. The multiplex converter batch PWM controller 2 controls the DC common multiplex converter 1 so that the voltage of the capacitor 15 becomes constant.
[0052]
The operation of the multiple converter batch PWM controller 2 will be described. The multiplex converter batch PWM controller 2 inputs a deviation between the DC voltage detection value detected by the voltage detector 20 and the voltage command value which is the output of the voltage command value generator 21 to the voltage regulator 23, and the voltage adjustment period 23 The current command value generator 24 calculates the power supply current command value, the current regulators 25u, 25v, and 25w calculate the alternating composite voltage command values Vu *, Vv *, and Vw *, and the combined voltage command value and the carrier wave. The triangular waves tr1 and tr2 output from the generator 26 are input to the gate signal generators 29u, 29v, and 29w.
[0053]
Here, the combined voltage is the AC power supply side terminal voltage of the interphase reactor when the power supply currents Iu, Iv, and Iw are zero. The composite voltage command value input to the gate signal generator and the triangular waves tr1 and tr2 are respectively compared by the comparators 27u1 to 27w2, and when the voltage command value is larger than the compared triangular wave, the comparator sends an ON signal to the pulse distributor 28u. In the reverse case, an OFF signal is output and pulse width modulation (PWM) is performed. FIG. 13 shows the combined voltage command value Vu *, the triangular waves tr1 and tr2 output from the carrier wave generator 24, and the outputs Pu1 and Pu2 from the comparators 27u1 and 27u2.
[0054]
The result of comparing the magnitude of the triangular wave tr1 and the composite voltage command value Vu * by the comparator 27u1 is Pu1, and the result of comparing the magnitude of the triangular wave tr2 and the composite voltage command value Vu * by the comparator 27u2 is Pu2. These Pu1 and Pu2 are input to the pulse distributor 28u.
[0055]
The pulse distributor 28u receives Pu1 and Pu2 output from the comparators 27u1 and 27u2, and outputs gate signals Gu1 and Gu2. Specifically, the correspondence between Pu1, Pu2 and Gu1, Gu2 is switched for each half cycle of the carrier wave, and pulses are distributed so that the two converters operate alternately in a balanced manner.
[0056]
FIG. 14 shows the combined voltage command value Vu *, the carrier waves tr1 and tr2, the outputs Pu1 and Pu2 of the comparators 27u1 and 27u2, and the gate signals Gu1 and Gu2 when the pulses are distributed. Since Pu1 and Pu2 are distributed to Gu1 and Gu2 in a well-balanced manner, switching is uniform. Gu1 becomes the gate signal Gu11, and the inversion of Gu1 becomes the gate signal Gu12. For example, if Gu1 is on, Gu12 is off, and if Gu1 is off, Gu12 is on. Gu2 to Gw2 determine Gu21 to Gw22 in the same manner as Gu1. Gu11 to Gw22, which are outputs of the pulse distributors 28u, 28v, and 28w, are IGBT gate signals of the single-machine converter 11 and the single-machine converter 12, and the correspondence between the gate signal and the IGBT is expressed by the equation (4). ).
[0057]
FIG. 15 shows the operation waveforms of this embodiment. The U-phase, V-phase, and W-phase combined voltages Vu, Vv, and Vw of the direct current common multiplexer / demultiplexer have a period of 1 / ftri, and three-phase simultaneous and in-phase voltage ripples are generated. AC current is three-phase balanced, so that all phase currents are not positive or all negative, and the AC power ripple, which is the product of AC current and AC voltage, must have one of the three phases in reverse phase. Become. Accordingly, canceling components are generated in the ripple of the AC power of each phase, and the sum of the AC power received by each phase is equal to the DC power, so that the ripple of the DC power can be canceled. Thus, since the ripple of DC power can be reduced, the ripple of DC current can be reduced and the capacitor voltage ripple can be reduced.
[0058]
As described above, according to the present embodiment, in the reactor multiple converter, the DC current ripple can be reduced without increasing the number of switching times and the switching frequency, the ripple of the capacitor voltage can be reduced, and the number of switching times can be made uniform.
[0059]
【The invention's effect】
According to the present invention, the combined AC voltage ripple of the multiple converters having a common DC section can be in phase, and any one of the three phases of the power ripple of the converter is always in reverse phase. The capacitor voltage ripple can be reduced without increasing the number of switching times of the single-machine converter of the multiple power converter.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram of a DC unit common multiple converter according to a first embodiment.
FIG. 2 is an explanatory diagram of signal waveforms according to the first embodiment.
FIG. 3 is a main circuit of a conventional DC unit common multiple converter;
FIG. 4 is an explanatory diagram of a conventional DC unit common multiple converter.
FIG. 5 is an explanatory diagram of signal waveforms according to the first embodiment.
FIG. 6 is an explanatory diagram of operation waveforms according to the first embodiment.
FIG. 7 is an explanatory diagram of a DC unit common multiple converter according to a second embodiment.
FIG. 8 is an explanatory diagram of a DC load according to a second embodiment.
FIG. 9 is an explanatory diagram of signal waveforms according to the second embodiment.
FIG. 10 is an explanatory diagram of signal waveforms according to the second embodiment.
FIG. 11 is an explanatory diagram of operation waveforms according to the second embodiment.
12 is an explanatory diagram of a DC unit common multiple converter according to Embodiment 3. FIG.
FIG. 13 is an explanatory diagram of signal waveforms according to the third embodiment.
FIG. 14 is an explanatory diagram of signal waveforms according to the third embodiment.
FIG. 15 is an explanatory diagram of operation waveforms according to the third embodiment.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... DC part common multiple converter, 2 ... Multiple converter batch PWM controller, 3 ... AC power supply, 4 ... Load, 10 ... Transformer, 11, 12, 13, 14 ... Single-machine converter, 15 ... Capacitor, 21 ... Voltage Command generator 22 ... AC current detector 23 ... Voltage regulator 24 ... Current command value generator 25u, 25v, 25w ... Current regulator 26 ... Carrier generator 27u1-27w4 ... Comparator 28u 28v, 28w ... Pulse distributor, 29u, 29v, 29w ... Gate signal generator, 41 ... Converter, 42 ... Motor, 100 ... Interphase reactor.

Claims (2)

The 3-phase bidirectional power converter for converting converts the DC power into three-phase AC power to convert the DC voltage into 3-phase AC voltage, or 3-phase AC power into DC power with n number,
The direct current section of the three-phase bidirectional power converter is common, a capacitor is connected to the direct current section, and the alternating current output terminals of the plurality of three-phase bidirectional power converters are respectively connected to a three-phase transformer having the same connection. ,
A series multiple power converter that obtains a combined output by connecting the system side windings of the transformer in series,
Means for generating a command value of the AC output voltage of the series multiple power converter;
The AC output voltage command value region of the series multiple power converter is equally divided into n in the amplitude direction, and the amplitude and phase are equal from the first region on the high voltage side of the AC output voltage command value to each region of the nth region. Means for generating n carriers having different DC bias values;
Multiple PWM control that compares the n carrier waves with the command value of the AC output voltage and generates a plurality of PWM signals whose switching timing is the timing at which the AC output voltage command value intersects at a side or vertex of the carrier wave Means,
When the command value of the AC output voltage is in the first region, the plurality of PWM signals are switched and output to the plurality of three-phase bidirectional power converters at each vertex where the carrier wave changes from downstream to upstream. ,
When the command value of the AC output voltage is in the nth region, the carrier wave is switched to the plurality of three-phase bidirectional power converters for each vertex where the carrier wave changes from upstream to downstream,
When n is 3 or more and the command value of the AC output voltage is from the second region to the (n-1) th (n> 2) region, switch to the plurality of three-phase bidirectional power converters every half carrier cycle. Output,
The number of pulses each 3-phase bidirectional power converter and a PWM distribution means for evenly distributing the n-number of 3-phase bidirectional power converter
Multi-series power converter, characterized in that. The 3-phase bidirectional power converter for converting converts the DC power into three-phase AC power to convert the DC voltage into 3-phase AC voltage, or 3-phase AC power into DC power with n number,
The direct current section of the three-phase bidirectional power converter is common, a capacitor is connected to the direct current section, and the alternating current output terminals of the plurality of three-phase bidirectional power converters are respectively connected to a three-phase transformer having the same connection. ,
A control method for a serial multiple power converter that obtains a combined output voltage by connecting the system side windings of the transformer in series,
Generating a command value for the AC output voltage of the series multiple power converter;
The area of the AC output voltage command value of the multi-series power converter n equal parts in the amplitude direction, from the first region of the high voltage side of the AC output voltage command value to each region of the n region equal amplitude and phase Generating n carriers with different DC bias values ;
Comparing the n carrier waves with the command value of the AC output voltage, and generating a plurality of PWM signals whose switching timing is a timing at which the AC output voltage command value intersects at a side or apex of the carrier wave,
When the command value of the AC output voltage is in the first region, the plurality of PWM signals are switched and output to the plurality of three-phase bidirectional power converters at each vertex where the carrier wave changes from downstream to upstream. ,
When the command value of the AC output voltage is in the nth region, the carrier wave is switched to the plurality of three-phase bidirectional power converters for each vertex where the carrier wave changes from upstream to downstream,
When n is 3 or more and the command value of the AC output voltage is from the second region to the n-1 (n> 2) region, switching to the plurality of three-phase bidirectional power converters every half carrier cycle Output,
A control method for a serial multiple power converter, wherein the number of pulses of each three-phase bidirectional power converter is equally distributed to n three-phase bidirectional power converters .

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