JP4183928B2

JP4183928B2 - Wiring pattern formation method

Info

Publication number: JP4183928B2
Application number: JP2001152948A
Authority: JP
Inventors: 良一豊島
Original assignee: Nippon Mektron KK
Current assignee: Nippon Mektron KK
Priority date: 2001-05-22
Filing date: 2001-05-22
Publication date: 2008-11-19
Anticipated expiration: 2021-05-22
Also published as: JP2002353599A

Description

【０００１】
【発明の属する技術分野】
本発明は、配線パタ−ンに対する表面保護膜を好適に形成可能な配線パタ−ンの形成法に関する。
【０００２】
【従来の技術とその問題点】
電着塗装は通電可能な箇所であれば自由に膜を形成できる手法であり、その為回路基板に於ける表面保護膜としての絶縁膜形成にも適用されている。
【０００３】
このような絶縁膜をパタ−ン状に電着する為には、所要の配線パタ−ンを形成した後、通電用治具を用いてその配線パタ−ンに絶縁膜の電着を行う方法があるが、この方法では、製品毎に治具を作成する必要があり、作業効率及び経済的に不利である。
【０００４】
また、基板全面に導電性膜を形成し、フォトレジストなどを用いてパタ−ンを形成し、これをマスクにして絶縁膜の電着を行う方法もあるが、この方法では、通常、電着液は有機溶剤分を含む為にフォトレジストが膨潤或いは溶解してしまい、正確なパタ−ンが得られない一方、レジストが溶出する場合には電着液自体の汚染にもなる。
【０００５】
そこで、本発明は上記問題を解消して配線パタ−ンに対する表面保護膜を好適に形成可能な配線パタ−ンの形成法を提供するものである。
【０００６】
【課題を解決するための手段】
その為に本発明による配線パタ−ンの形成法では、絶縁べ−ス層上に所要の配線パタ−ンを形成し、この基板上面全体に除去容易な導電性膜を形成し、次に、前記配線パタ−ンに対する電着塗装を行う部分のみフォトレジスト層を形成した後、前記導電性膜の露出領域に対して変性層を形成し、前記フォトレジスト層を除去した段階で電着塗装処理により前記配線パタ−ンに対して表面保護膜を形成し、最後に前記変性層を含む導電性膜を除去する工程を採用したものである。
【０００７】
また、本発明の他の配線パタ−ンの形成法では、絶縁べ−ス層上にセミアディティブ法により所要の配線パタ−ンを形成し、次いで、前記配線パタ−ンに対する電着塗装を行う部分のみフォトレジスト層を形成した後、シ−ド層及び前記配線パタ−ンの露出領域に対して変性層を形成し、前記フォトレジスト層を除去した段階で電着塗装処理により前記配線パタ−ンに対して表面保護膜を形成し、最後に前記変性層及びシ−ド層を除去する工程を採用したものである。
【０００８】
【発明の実施の形態】
以下、図示の実施例を参照しながら本発明を更に詳述する。図１は本発明の一実施例による配線パタ−ンの形成法を説明する為の工程図である。同図（１）に於いて、先ず絶縁べ−ス層１上にエッチング手段などで所要の配線パタ−ン２を形成し、この基板上面全体に銅などの反応性が高く且つ除去容易な導電性膜３を形成する。
【０００９】
次いで、同図（２）の如く、配線パタ−ン２に対する電着塗装を行う部分のみマスクとなるフォトレジスト層４を形成する。その場合、配線パタ−ン２に於ける外部接続用端子部などとなる箇所には開口部５を形成できる。次に、フォトレジスト層４が形成されていない導電性膜３の露出領域の最表面を例えば酸化処理等の適当な手法で変性層６に形成する。
【００１０】
そこで、同図（３）の如く、フォトレジスト層４を除去した後、同図（４）のように、電着処理により配線パタ−ン２に対して絶縁膜としての表面保護膜７を形成する。この場合、変性層６の箇所は導電性を有しないので、通電しても電着による表面保護膜は形成されない。
【００１１】
最後に、同図（５）の如く、変性層６を含む導電性膜３をエッチング除去するが、この際には、表面保護膜７が形成された領域はマスクとなるので、そのエッチング処理の際に表面保護膜７の形成領域はエッチングされない。これにより、配線パタ−ン２の外周にはパタ−ン状に表面保護膜７が形成される。
【００１２】
図２は本発明の他の実施例による配線パタ−ンの形成法を説明する為の工程図であり、同図（１）の如く、セミアディティブ法により、先ず絶縁べ−ス層１のシ−ド層１０上に所要の配線パタ−ン２を形成する。
【００１３】
そこで、同図（２）の如く、上記実施例と同様に配線パタ−ン２の外周にフォトレジスト層４を形成するが、この場合でも外部接続用端子部などとなる箇所には開口部５を形成できる。そして、フォトレジスト層４が形成されていない露出領域の最表面を上記同様に酸化処理等の適当な手法で変性層１１に形成する。
【００１４】
以下、上記実施例と同様に、同図（３）の如く、フォトレジスト層４を除去した後、同図（４）のように、電着処理により配線パタ−ン２に対して絶縁膜としての表面保護膜７を形成する。この場合でも、変性層１１の箇所は導電性を有しないので、通電しても電着による表面保護膜は形成されない。
【００１５】
最後に、同図（５）の如く、変性層１１及びシ−ド層１０をエッチング除去するが、この際も、表面保護膜７が形成された領域はマスクとなるので、そのエッチング処理の際に表面保護膜７の形成領域はエッチングされない。これにより、配線パタ−ン２の外周に対して上記実施例と同様にパタ−ン状に表面保護膜７を形成できる。
【００１６】
【発明の効果】
本発明による配線パタ−ンの形成法によれば、電着塗装の際に基板全体に通電するので、配線パタ−ン毎にリ−ドを形成せず且つ特別な治具を用いることなく配線パタ−ンの外周に対する絶縁膜としての表面保護層を形成する為の電着塗装を行うことが可能であり、従って、経済的且つ効率的である。
【００１７】
また、電着塗装時にはフォトレジストなどの樹脂を主成分とするマスクを必要としないので、フォトレジストの膨潤や溶出によるパタ−ン不良及び電着液の汚染も回避できる。
【００１８】
そして、本発明では配線パタ−ンの形成後に絶縁膜としての表面保護層を形成する為の電着塗装を行うので、配線パタ−ンの側壁にも好適に表面保護層を形成できる。
【図面の簡単な説明】
【図１】本発明の一実施例による配線パタ−ンの形成法の工程図。
【図２】本発明の他の実施例による配線パタ−ンの形成法の工程図。
【符号の説明】
１絶縁べ−ス層
２配線パタ−ン
３導電性膜
４フォトレジスト層
５開口部
６変性層
７表面保護膜[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for forming a wiring pattern capable of suitably forming a surface protective film for a wiring pattern.
[0002]
[Prior art and its problems]
Electrodeposition coating is a technique in which a film can be freely formed as long as it can be energized. Therefore, it is applied to the formation of an insulating film as a surface protective film on a circuit board.
[0003]
In order to electrodeposit such an insulating film in a pattern shape, after forming a required wiring pattern, a method of electrodepositing the insulating film on the wiring pattern using a current-carrying jig However, in this method, it is necessary to create a jig for each product, which is disadvantageous in terms of work efficiency and economy.
[0004]
In addition, there is a method in which a conductive film is formed on the entire surface of the substrate, a pattern is formed using a photoresist, and the insulating film is electrodeposited using this as a mask. Since the solution contains an organic solvent, the photoresist swells or dissolves, and an accurate pattern cannot be obtained. On the other hand, when the resist is eluted, the electrodeposition solution itself is contaminated.
[0005]
Accordingly, the present invention provides a method for forming a wiring pattern that solves the above-described problems and can suitably form a surface protective film against the wiring pattern.
[0006]
[Means for Solving the Problems]
Therefore, in the method for forming a wiring pattern according to the present invention, a required wiring pattern is formed on an insulating base layer, a conductive film that can be easily removed is formed on the entire upper surface of the substrate, After forming a photoresist layer only on the portion where electrodeposition coating is applied to the wiring pattern, a modified layer is formed on the exposed region of the conductive film, and the electrodeposition coating process is performed after the photoresist layer is removed. Thus, a step of forming a surface protective film on the wiring pattern and finally removing the conductive film including the modified layer is employed.
[0007]
According to another wiring pattern forming method of the present invention, a required wiring pattern is formed on an insulating base layer by a semi-additive method, and then the electrode pattern is applied to the wiring pattern. After forming the photoresist layer only in a part, a modified layer is formed on the seed layer and the exposed region of the wiring pattern, and when the photoresist layer is removed, the wiring pattern is formed by electrodeposition coating. A step of forming a surface protective film on the surface and finally removing the modified layer and the seed layer is employed.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described in more detail with reference to the illustrated embodiments. FIG. 1 is a process diagram for explaining a method of forming a wiring pattern according to an embodiment of the present invention. In FIG. 1A, a required wiring pattern 2 is first formed on an insulating base layer 1 by etching means or the like, and the entire upper surface of the substrate is highly reactive and easily removed. The conductive film 3 is formed.
[0009]
Next, as shown in FIG. 2 (2), a photoresist layer 4 serving as a mask is formed only in a portion where electrodeposition coating is applied to the wiring pattern 2. In that case, an opening 5 can be formed at a location to be an external connection terminal in the wiring pattern 2. Next, the outermost surface of the exposed region of the conductive film 3 on which the photoresist layer 4 is not formed is formed on the modified layer 6 by an appropriate technique such as oxidation treatment.
[0010]
Therefore, after removing the photoresist layer 4 as shown in FIG. 3 (3), a surface protective film 7 as an insulating film is formed on the wiring pattern 2 by electrodeposition as shown in FIG. 4 (4). To do. In this case, since the portion of the modified layer 6 does not have conductivity, a surface protective film by electrodeposition is not formed even when energized.
[0011]
Finally, as shown in FIG. 5 (5), the conductive film 3 including the modified layer 6 is removed by etching. At this time, the region where the surface protective film 7 is formed serves as a mask. At this time, the formation region of the surface protective film 7 is not etched. As a result, the surface protective film 7 is formed in a pattern on the outer periphery of the wiring pattern 2.
[0012]
FIG. 2 is a process diagram for explaining a method of forming a wiring pattern according to another embodiment of the present invention. First, as shown in FIG. 2A, the insulating base layer 1 is first formed by a semi-additive method. A required wiring pattern 2 is formed on the node layer 10.
[0013]
Therefore, as shown in FIG. 2B, a photoresist layer 4 is formed on the outer periphery of the wiring pattern 2 in the same manner as in the above embodiment. Even in this case, the opening 5 Can be formed. Then, the outermost surface of the exposed region where the photoresist layer 4 is not formed is formed on the modified layer 11 by an appropriate technique such as oxidation treatment as described above.
[0014]
Thereafter, as in the above embodiment, after removing the photoresist layer 4 as shown in FIG. 3 (3), an insulating film is formed on the wiring pattern 2 by electrodeposition as shown in FIG. 4 (4). The surface protective film 7 is formed. Even in this case, since the portion of the modified layer 11 does not have conductivity, a surface protective film by electrodeposition is not formed even when energized.
[0015]
Finally, as shown in FIG. 5 (5), the modified layer 11 and the seed layer 10 are removed by etching. Also in this case, the region where the surface protective film 7 is formed serves as a mask. Further, the formation region of the surface protective film 7 is not etched. As a result, the surface protective film 7 can be formed in a pattern on the outer periphery of the wiring pattern 2 in the same manner as in the above embodiment.
[0016]
【The invention's effect】
According to the method for forming a wiring pattern according to the present invention, since the entire substrate is energized during electrodeposition coating, wiring is not formed for each wiring pattern and a special jig is not used. It is possible to perform electrodeposition coating for forming a surface protective layer as an insulating film on the outer periphery of the pattern, and thus it is economical and efficient.
[0017]
Further, since a mask composed mainly of a resin such as a photoresist is not required at the time of electrodeposition coating, pattern defects and contamination of the electrodeposition liquid due to the swelling and elution of the photoresist can be avoided.
[0018]
In the present invention, since the electrodeposition coating for forming the surface protective layer as the insulating film is performed after the wiring pattern is formed, the surface protective layer can be suitably formed also on the side wall of the wiring pattern.
[Brief description of the drawings]
FIG. 1 is a process diagram of a method for forming a wiring pattern according to an embodiment of the present invention.
FIG. 2 is a process diagram of a method for forming a wiring pattern according to another embodiment of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Insulation base layer 2 Wiring pattern 3 Conductive film 4 Photoresist layer 5 Opening part 6 Denatured layer 7 Surface protective film

Claims

A required wiring pattern is formed on the insulating base layer, a conductive film that can be easily removed is formed on the entire upper surface of the substrate, and then a photoresist layer is applied only to a portion where electrodeposition coating is applied to the wiring pattern. After forming, a modified layer is formed on the exposed region of the conductive film, and a surface protective film is formed on the wiring pattern by an electrodeposition coating process when the photoresist layer is removed, Finally, the conductive film including the modified layer is removed, and a method for forming a wiring pattern is provided.

A required wiring pattern is formed on the insulating base layer by a semi-additive method, and then a photoresist layer is formed only on a portion where electrodeposition coating is applied to the wiring pattern. A modified layer is formed on the exposed area of the wiring pattern, and a surface protective film is formed on the wiring pattern by electrodeposition coating after the photoresist layer is removed, and finally the modified layer is formed. And a method of forming a wiring pattern, wherein the seed layer is removed.