JP4191351B2 - Game machine - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a gaming machine provided with a game control means for controlling the progress of a game in a gaming area in accordance with a computer program, and more particularly to a gaming machine control device having a memory data backup function during a power failure.
[0002]
[Prior art]
Pachinko machines, arrange ball machines, sparrow ball machines, pachislot machines, and other gaming machines are subjected to standards and performance inspections by a certification body, and permitted ones are allowed to be marketed.
[0003]
Among these gaming machines, so-called bullet ball gaming machines having gaming areas using gaming balls such as pachinko machines, arrange ball machines, sparrow ball machines, etc. are installed on island facilities provided with a circulation device for circulating gaming balls. is set up. For this reason, the game program for controlling the ball game machine is operated in an environment where noise due to the movement of the game ball is likely to occur, the size of the game program is restricted by the certification authority, etc. For this reason, in general, a reset interrupt processing method that is resistant to noise and has good program efficiency is adopted. In this reset interrupt processing method, the clock signal from the timer circuit is input to the reset terminal of the CPU constituting the control device to periodically reset the CPU, and the game control sequence is repeatedly executed at each reset. Game control is performed.
On the other hand, recently, in order to prevent a player from being disadvantaged due to a power failure, a backup function of control data for controlling a ball game machine has been recognized by a certification body.
[0004]
[Problems to be solved by the invention]
However, it has become clear that the following problems arise when a backup function is simply added to a control method using reset interrupt processing.
[0005]
In other words, control data such as the control state at the time of power failure and the command position of the program currently being executed is saved in a memory (non-volatile EEPROM or RAM whose operation power is ensured at the time of power failure) with a backup function secured when a power failure is detected. Since the power failure process to be performed must be executed promptly when a power failure occurs, it is desirable to execute it by interrupt input. By the way, a general CPU has a normal interrupt input (for example, INT) that can control interrupt permission / prohibition by software, and a forced interrupt input (NMI) that cannot control interrupt permission / prohibition by software. Becomes a high-priority interrupt for normal interrupt input. Therefore, power failure processing is generally configured using the highest priority forced interrupt input.
[0006]
However, resetting the CPU is a function that forcibly sets the CPU to the initial state by hardware. Therefore, if the reset interrupt processing using the reset input and the forced interrupt processing are used in combination, the power failure being executed by the forced interrupt input is performed. If a reset pulse is input during processing or during standby waiting for power-off after power failure processing, the CPU is reset. As a result, the program is executed from a predetermined address (for example, address 0 of the program address), and the control data saved by the power failure process cannot be retained by the initialization process. Cannot be resumed accurately. As a result, there is a problem in that there is a risk that a player or a game store may be disadvantaged.
[0007]
For this reason, the program for the control device of the ball and ball machine can accurately resume control from the state when the power failure occurred at the time of recovery from the power failure, and efficiently prevent runaway due to noise within the restricted program size. However, it is required to have a control structure capable of executing game control.
[0008]
The present invention has been made to solve the above-described problems, and can efficiently execute game control within a restricted program size, and can prevent game control means from running out of control to some extent due to noise. An object of the present invention is to provide a gaming machine capable of accurately resuming control from the state at the time of power failure when returning.
[0009]
[Means for Solving the Problems]
  In order to achieve the above object, the present invention comprises a first game control process, a second game control process, and a third game control process for controlling a game progress in a game area. A gaming machine comprising: a game control device that advances a game based on the game control process; and a discharge control device that performs discharge control of a game ball based on discharge control data output from the game control device, The game control device normally executes main control means for repeatedly executing the first game control processing and the second game control processing including output processing of the discharge control data to the discharge control device every predetermined time. Interrupt control means and forced interrupt control means for forcibly executing the third game control process based on a power failure notification signal, and the series of processes constituting the first game control process includes The include process during said execution interrupt is awaiting execution of the normal interrupt controller prohibition setting is made (step S5g, S5i, S5j etc.),The third game control process includes an output data fixing process (step S23) for setting off data to all output ports.The forced interruption control means stores and saves predetermined information indicating whether or not the interrupt prohibition setting is made in the first game control process executed by the main control means when a power failure occurs. Step S22), and when the power failure is recovered, the main control means is executed when a power failure occurs after the interrupt prohibition setting is performed when the predetermined information of the processing state storage means is an interrupt prohibition setting. The first game control process is restarted. On the other hand, if the interrupt prohibition is not set, the power failure recovery process is resumed from the point at which the first game control process executed at the time of the power failure is interrupted after the interrupt is permitted. Means (steps S4a to S4j) and when the discharge control data is being transmitted when a power failure occurs,The state of the output port for outputting the discharge control dataBy switching off data set in the third game control process to the discharge control dataReturn to the state at the time of power failure,The discharge control device performs a reception interrupt when the off-data is switched,When the power failure is restored, the control operation of the game control device is started later than the control operation of the discharge control device.
[0010]
According to the above means, the process for controlling the progress of the game by the game control means is divided into a first process that is repeatedly executed, a second process that is executed every predetermined time, and a third process that is executed in an emergency. By configuring the first process in a loop and always executing it, configuring the second process with a normal interrupt that can be prohibited by software, and configuring the third process with a forced interrupt that cannot be prohibited by software, Since the programs are grouped into three and the overall program structure is simplified, game control can be executed more efficiently within a limited program size than in the case where the programs are composed of one or two consecutive programs.
[0011]
In addition, since the second process is periodically executed by a normal interrupt, by including the periodic monitoring process (step S12) in the second process, the interrupt prohibition setting of the first process to be repeatedly executed is set. The game control means can be prevented from running out of control even if the processing to be performed causes a jump into an infinite loop due to noise. Further, in the third process by the forced interrupt, the state of the interrupt prohibition setting during the first process is saved when a power failure occurs, and whether or not the interrupt prohibition is set during the first process when the power failure is restored. Therefore, it is possible to accurately resume the control from the interrupted state when the power failure occurs when the power failure is restored.
[0013]
  further,in frontThe third game control process includes an output data fixing process (step S23) for setting off data to all output ports.By switching off data set in the third game control process to the discharge control data, it is restored to the state at the time of power failure,The discharge control device performs a reception interrupt when the off-data is switched.So stopSince all the output ports of the game control means first output off data and then output other than off data when power is restored, it is possible to prevent drive sources such as solenoids from operating accidentally after power failure recovery, and discharge control Other control devices including the device can know that the control by the game control means has started by monitoring the input port that receives data and signals from the game control means at the time of power failure recovery, and can quickly control itself The operation can be resumed, and the recovery of the entire system at the time of power failure recovery is accelerated.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Preferred embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 shows an example of the configuration of a game board of a pachinko machine as an example of a suitable game machine to which the present invention is applied. In this embodiment, a game board of a pachinko machine of the type belonging to the so-called “first type”. Indicates.
[0015]
In FIG. 1, reference numeral 100 denotes a game board. On the front surface of the game board 100, an arcuate guide rail 101 for guiding a game ball launched from below to the upper part of the game board, and a variable display. A special symbol display device 102 for performing a special game used, a special figure start winning port 103 which is provided with a normal electric accessory and gives a start condition for the special game, and a general figure start gate 104 and 105 which gives a start condition for the normal electric accessory. , A variable winning device 106 called an attacker, a general winning opening 107, 108, 109, 110, 111, a special figure starting winning memory display for storing up to a predetermined number (for example, a maximum of four) of winning balls to the special drawing starting winning opening 121, a normal symbol display 122 for performing an auxiliary game using variable display, and a normal diagram start storing up to a predetermined number (for example, a maximum of four) of the number of game balls passed to the general diagram start gate. Storing display 123, decorative lamps 124 and 125 to enhance the stage effects of the game, a large number of nails with the ball striking direction changing member 126 called a wind turbine to provide randomness to flow hitting (not shown) is provided.
[0016]
Although not particularly limited, in this embodiment, a micro switch or a non-contact type is used to detect a ball that has won a prize corresponding to each of all the winning holes 103 to 111 provided in the game board 100. A winning sensor composed of sensors is provided. That is, the special figure start sensor S1 is arranged inside the special figure start winning opening 103, the count sensor S4 and the continuous winning sensor S5 inside the variable winning apparatus 106, and the prize winning sensor inside the general winning openings 107 to 111. S4 to S10 are respectively arranged. Then, when the game balls win these winning holes, a winning ball detection signal is sent from the winning sensor to a game control device 210 described later, and the winning ball number data is transmitted from the gaming control device 210 to the discharge control device 220. It has become.
[0017]
Here, when a passing ball to the above-mentioned general-purpose starting gates 104 and 105 is detected, the normal symbol display 122 is variably displayed for a predetermined time, and during that time, a passing ball to the general-purpose starting gates 104 and 105 is further displayed. When it occurs, the number of balls is stored, and the normal start winning memory display 123 is turned on according to the stored number. Then, when the variable display on the normal symbol display 122 is stopped and the display content is in a predetermined mode, the special figure start winning port 103 made of the above-mentioned normal electric accessory is opened.
[0018]
When a game ball is won in the opened special figure starting winning port 103 or the closed special figure starting winning port 103, the specific symbol display 102 is variably displayed for a predetermined time, and during that time, the special figure starting winning port is further displayed. When a winning ball to 103 is generated, the number of balls is stored, and the special figure starting winning memory display 121 is turned on according to the stored number. Then, as will be described later, after determining the random number value extracted in relation to the winning to the special start winning opening 103, in the special symbol display 102 in order to derive the stop symbol corresponding to the determination result After the variable display is started and a predetermined time has passed, the variable display is ended to stop at the stop symbol. When the determination result related to the variable display is successful when the variable display ends, the variable winning device 106 is opened until a predetermined time or a predetermined number of winning balls is reached.
[0019]
Further, the variable winning device 106 is provided with a general winning region and a continuous winning region, and the opening operation of the variable winning device 106 is repeated a predetermined number of times on condition that a game ball has been won in the continuous winning region. It is.
[0020]
Control of the progress of the game as described above on the game board 100 is performed by the game control device 210. Since the game control device 210 has different control contents for each game board, it is usually replaced with a new one when the game board 100 is replaced. Therefore, the game control device 210 is generally attached to the back side of the game board 100 and configured to be exchanged together with the game board. However, it is not necessarily limited to such a configuration.
[0021]
FIG. 2 shows a configuration example of the entire control system provided on the back side of the pachinko machine including the back side of the game board. In FIG. 2, reference numeral 210 denotes a game control device that controls the progress of the game as described above on the game board 100. 220 receives prize ball number data from the game control device 210 and discharges a predetermined number of prize balls from the ball discharge device. In a game machine called a CR machine, ball rental is performed from an adjacent card-type ball lending machine (not shown). It is a discharge control device that receives a number data and discharges a predetermined number of rental balls.
[0022]
Further, 230 is a display control device for controlling a display for performing display related to game contents such as a special symbol display device 102 provided on the front surface of the game board 100, and 240 is a decoration lamp 124, 125 on the front surface of the game board. A decoration control device that controls a display for decoration, etc., 250 is a sound control device that controls a speaker (not shown) to generate a sound effect related to game content, and 260 is based on an AC power supply voltage such as AC24V DC generator circuits 261, 262, 263, and backup power supply VBB (DC5V), which are AC-DC converters and DC-DC converters that generate DC power supply voltages DC32V, 12V, 5V required by these control devices 210-250. Is a power supply device configured by a VBB generation circuit 264 and the like. Further, on the back side of the pachinko machine, apart from the control devices 210 to 250, a launch control device 270 that directly receives AC 24V regardless of the DC power supply voltage from the power supply device 260 and controls the hitting ball launching device is provided. ing.
[0023]
In this embodiment, the DC voltage DC32V generated by the DC generation circuit 261 is monitored accompanying the power supply device 260, and it is determined that a power failure occurs when the voltage drops to a voltage such as 23-24V. A power failure detection circuit 265 that outputs a detection signal PDD is provided. The power failure detection signal PDD output from the power failure detection circuit 265 is input to the non-maskable interrupt input terminal NMI of the microcomputer 211 of the game control device 210 and the microcomputer 221 of the discharge control device 220, respectively.
[0024]
The power failure detection circuit 265 is provided with a reset signal output delay circuit 266 that delays the power failure detection signal PDD and outputs the power failure detection signal PDD to the control devices 210 to 250 as the reset signal RS. The delay time in the reset signal output delay circuit 266 is set slightly longer than the time required to execute the power failure process in the game control device 210 and the discharge control device 220. As a result, the game control device 210 and the discharge control device 220 save the necessary data and internal state due to the power failure processing in the backed up RAM, and then are locked to the stop state by a reset signal, and the power supply after the power failure processing is completed The microcomputer is configured to avoid leaving the microcomputer in an operable state until it is completely disconnected.
[0025]
On the other hand, among the control devices 210 to 250, the game control device 210 and the discharge control device 220 receive the delay reset signal RS from the power failure detection circuit 265 and delay it further for a predetermined time, respectively, to the microcomputers 211 and 221, respectively. A reset signal first delay circuit 212 and a reset signal second delay circuit 222 that are input to the reset terminals of the first and second reset terminals are provided.
[0026]
The reset signal first delay circuit 212 and the reset signal second delay circuit 222 delay only the reset release timing, and the delay times T4 and T3 are set so that T4> T3. 3, the microcomputers 211 and 221 are simultaneously reset when a power failure occurs, while the microcomputer 221 of the discharge control device 220 resets earlier than the microcomputer 211 of the game control device 210 when the power failure is restored. It is configured to be released and start a control operation. In this embodiment, the control devices 230 to 250 other than the game control device 210 and the discharge control device 220 do not have a delay circuit that delays the reset signal RS from the power failure detection circuit 265, and the game control device. The reset state is released earlier than 210 and the discharge control device 220.
[0027]
FIG. 4 shows a configuration example of input / output and backup means of the game control device 210 and the discharge control device 220 among the control devices.
[0028]
As shown in FIG. 4, the game control device 210 includes a game microcomputer 211 composed of a one-chip microcomputer (broadly-defined CPU) integrated with a semiconductor integrated circuit that performs a control of an accessory necessary for a pachinko game or the like, and a reset. The reset signal first delay circuit (DLY1) 212 that delays the signal, the clock generation circuit (CLK1) 213 that divides the oscillation signal of the crystal oscillator to obtain a clock signal of a predetermined frequency, and the various sensors It includes an input / output interface 214 that receives signals and outputs drive signals for drive means such as solenoids and control signals for other control devices.
In this embodiment, the output port of the interface 214 is composed of, for example, a flip-flop that latches output data and a buffer circuit that outputs the latch data to an external terminal, and the reset signal RS is input to the clear terminal of the flip-flop. Has been to be. Thus, a predetermined output including an output port to which a communication line with the discharge control device 220 is connected by the reset signal RS until the reset signal RS rises at the time of power failure recovery and the CPU of the game control device 210 starts control. The port is fixed to a state in which off data is forcibly output.
[0029]
The gaming microcomputer 211 incorporates a central processing unit (CPU) as arithmetic control means, ROM (read only memory) and RAM (random access memory), interrupt control circuits (not shown), etc. as storage means. It is manufactured as an IC for so-called amuse chips. Programs and prize ball number data necessary for game progression control performed by the CPU are stored in the ROM.
[0030]
The game control device 210 is connected to the special drawing start sensor SS1 in the special drawing start winning port 103, the general drawing start sensors SS2 and SS3 in the general drawing start gates 104 and 105, and the variable winning device via the input / output interface 214. In addition to the detection signals from the count sensor SS4 corresponding to the general winning area 106 in the 106, the V winning sensor SS5 corresponding to the continuous winning area, and the winning sensors SS4 to SS10 in the general winning holes 107 to 111, the tray is filled with game balls. A signal from the overflow detector 301 that detects that the sphere has been detected, provided on the downstream side of a lead-out cage (so-called chute) for supplying the game ball of the storage tank to a ball discharge device 400 described later, to the ball discharge device 400 A signal from the hemispherical ball detector 302 that detects the presence or absence of a game ball that can be supplied, and a glass plate that covers the front side of the game board 100 are held. Signal from the metal frame open detector 303 for detecting that the frame is opened, such as a signal from the prize ball detection sensor 401, 402 in the ball discharging unit 400 is input.
[0031]
On the other hand, from the game control device 210 via the input / output interface 214, a signal to the data output terminal 311 that transmits data to a management device of a game store (not shown), and a signal to the terminal 312 that outputs the internal state during the test. The driving signal for the display lamp 313 of the ordinary electric accessory (special drawing start winning opening 103), the driving signal for the attacker solenoid 314 for opening and closing the large winning opening of the variable winning device 106, and the ordinary electric for driving the opening and closing of the ordinary electric accessory. A drive signal for the solenoid 315, a discharge control device 220, a display control device 230, a decoration control device 240, a data signal for the sound control device 250, and the like are output.
[0032]
The discharge control device 220 divides the oscillation signal of the crystal oscillator by dividing the oscillation signal of the crystal oscillator 221 by the control microcomputer 221 composed of a one-chip microcomputer, the reset signal second delay circuit (DLY2) 222 that delays the reset signal, and a predetermined value. A clock generation circuit (CLK2) 223 that obtains a clock signal of a frequency, and an input / output interface 224 that receives signals from various sensors, outputs a drive signal to a drive means such as a solenoid, and a control signal to another control device. Consists of including. The control microcomputer 221 includes a central processing unit (CPU) as arithmetic control means, ROM and RAM as storage means, an interrupt control circuit (not shown), and the like. A program necessary for discharge control such as game ball discharge (including prize ball discharge and rental ball discharge) performed by the CPU is stored in the ROM.
[0033]
To the discharge control device 220, the prize ball data signal from the game control device 210, the prize ball detectors 401 and 402, and the rental ball detectors 403 and 404 in the ball discharge device 400 are connected via the input / output interface 224. Detection signal, a rental ball data signal from the card-type ball rental unit 500, and the like. On the other hand, from the discharge control device 220, via the input / output interface 224, a drive signal for the discharge motor 411 in the ball discharge device 400, a drive signal for the stopper solenoid 412 for stopping discharge, and a discharge flow path for winning balls and rental balls. A drive signal or the like for the flow path switching solenoid 413 to be switched is output.
[0034]
The power supply apparatus 260 includes a diode D1 that receives a DC voltage from a DC generation circuit 263 that generates a DC 5V logic power supply voltage at an anode terminal, and a comparison connected between the cathode terminal of the diode D1 and a ground point. A backup power supply 264 comprising a supercapacitor C1 having a large capacity value is provided, and the power supply voltage VBB from the backup power supply 264 is supplied to the RAM in the game control device 210 and the RAM in the discharge control device 220, respectively, It is sometimes configured to hold RAM information.
[0035]
Next, an example of a game control procedure by the game control device 210 will be described with reference to FIGS. 5 to 6 of FIG. 5 to FIG. 9 show the procedure of the main process (first game control process) executed by the game control device 210. This main process is executed when the power of the gaming machine is turned on or the power failure is recovered. FIG. 7 shows a procedure of a normal interrupt process (second game control process) executed by the game control apparatus 210, which is a process executed by a software timer interrupt at a cycle such as 1 msec. FIG. 8 shows the procedure of the forced interrupt process (third game control process) executed by the game control device 210. The power failure detection signal PDD from the power failure detection circuit 265 is input to the interrupt terminal NMI. This process is executed based on this. Further, FIG. 9 shows a specific procedure of the payout command transmission process during the normal interruption process of FIG.
[0036]
  In the main processing of FIGS. 5 and 6, the CPU first initializes the inside of the CPU and sets all output ports to an off state (a state in which logic “0” is output) (steps S1 and S2). Next, in step S3, the power failure flag is checked to determine whether or not it is normal, that is, whether or not a predetermined code (for example, 01010101) indicating that a power failure has occurred.SIf the code other than the predetermined code is determined, it is determined that the power is normally turned on, and the process proceeds to step S5a.
[0037]
The power failure flag is composed of 1 byte in the RAM, and when power is turned on from a state where power is not supplied (for example, a state where the backup capacitor C1 is discharged), for example, “11110000” (in binary code) Specific data such as “F0” in hexadecimal (hereinafter referred to as “F0H”) (which differs depending on the manufacturer and product type) is set in the RAM. When a power failure occurs, for example binary in the forced interrupt process of FIG. The code is set to “01010101” (55H). Therefore, if the power failure flag is 55H, the CPU can recognize that the power has returned from the power failure, and if it is other than 55H, the CPU can recognize that the power supply is normal.
[0038]
  If the CPU determines that the power failure has been restored in step S3, the process proceeds to step 4a. First, the stack pointer saved in the backed up RAM is restored to the CPU, and then initialization processing for power failure recovery is performed (step S3). S4c). The initialization process for power failure recovery is to restore the registers saved in the backup RAM to the state before the power failure when a power failure occursTheIt is a process to clear.
[0039]
After that, the CPU outputs data to a predetermined output port including the output port of the prize ball number data to the discharge control device 220 based on the data saved at the time of the restored power failure, that is, reproduces the state of the output port at the time of the power failure (Step S4c). As a result, the output port of the winning ball number data changes from off data to data other than the off data, so the discharge control device 220 recognizes that the game control device 210 has started to operate by monitoring the winning ball number data. can do.
[0040]
Next, the CPU of the game control device 210 performs processing for notifying the control devices other than the discharge control device 220 that the power failure recovery processing has been completed (step S4d). Then, an interrupt timer is started, and it is determined with reference to the power failure flag set in step S22 whether the interrupt has been disabled before the occurrence of the power failure (steps S4e and S4f). When interrupts are prohibited before a power failure, the program counter value saved in the backup RAM is restored to the original register and interrupts are prohibited. When interrupts are not prohibited before a power failure, they are saved in the backup RAM. After restoring the program counter value, etc., to the original register and permitting an interrupt, the power failure recovery process is terminated (steps S4g, S4h, S4i, S4j). As a result of the above processing, the inside of the game control device returns to the state immediately before the occurrence of the power failure, so that the CPU resumes the control from the command position of the program stopped when the power failure is detected.
[0041]
In the flow of FIG. 5, interrupt is prohibited in step S4h, but interrupt prohibition may be set in the first step of the main process. In that case, since prohibition of interruption is set before entering this power failure recovery processing, after performing step S4g, the processing is resumed without interrupting prohibition again in step S4h.
[0042]
On the other hand, if the CPU determines in step S3 that the normal power supply is turned on, it proceeds to step 5a and prohibits the interrupt control circuit from accepting a normal interrupt, and then sets the stack pointer, clears a predetermined area in the RAM, After performing initialization processing (step S5b) such as writing check data to the inspection area and setting initial values of various registers (step S5b), the interrupt timer is started (step S5c), and the interrupts prohibited in step S5a are permitted. After (step S5d), the process proceeds to the process of FIG.
[0043]
The process of FIG. 6 is a normal game control loop process that is repeatedly performed in a normal state. First, in step S5e, the data in the inspection area in the RAM is checked, specifically written in the initialization process in step S5b. Check whether the predetermined check data is broken or not every loop, and if there is an abnormality, jump to step S5a as shown by symbol “B” in FIG. The initialization process including (Step S5b) is performed again.
[0044]
When it is determined in step S5f that the check data in the inspection area in the RAM is normal, the process proceeds to step S5g to determine the signal input state of a predetermined detector (sensor) provided on the game board. To do. Also, in this input determination process, the flag set in the switch input reading process (step S13) in the normal interrupt routine (FIG. 7) described later is monitored, and “1” is set in the input flag of the special figure start sensor. If it is determined that there is a “detection signal”, the game random number generated in step S16 described later is extracted and stored, or the number of award balls (for example, 7 or 15) corresponding to the input flag of each sensor. Set.
[0045]
Note that during this input determination process, if the process is interrupted by a normal interrupt and another process (for example, random number update process) is executed, there is a risk of malfunction, so at the beginning of the process to prevent the process from being interrupted Interrupts other than forced interrupts are prohibited, and interrupts are released when processing is completed. If a forced interruption due to a power failure is detected in the middle of this process, the process interrupted in step S22 of the forced interrupt process (FIG. 8) described later (in this case, the input determination process) is in a state in which interrupt inhibition is set. And the interrupt prohibition flag is saved. As a result, at the time of power failure recovery, when it is determined in step S4f of the power failure recovery process whether interruption was prohibited before the occurrence of the power failure, the interrupt prohibition flag is set in this case, so step S4h The input determination process that has been interrupted by setting the interrupt prohibition in step 1 is resumed. Therefore, even if the process is resumed from the middle, the interruption is prohibited, so that the process is not interrupted during the input determination process even after the power failure is restored.
[0046]
In the next step S5h, an error monitoring process such as setting an error when there is a detection signal from the count sensor SS4 or the V winning sensor SS5 even though the variable winning device 106 is not opened is performed. . Subsequently, in step S5i, a command for controlling variable display on the special symbol display device 102 or setting a command for giving a sound effect generation command to the sound control device or a decoration display command to the decoration control device is set. Special figure game processing such as display and effect display at the time of big hit is performed. In this processing routine, it is also determined whether or not the random number acquired in step S5g matches the value set as a big hit. Also, during this special figure game process, in order to prevent the process from being interrupted in the middle, interrupts other than the forced interrupt are prohibited at the beginning of the process, and the interrupt is released when the process ends.
[0047]
In step S5j, a flag for controlling the variable display on the normal symbol display device 122 is set, or a sound effect generation command for the sound control device or a decoration display command for the decoration control device is set in accordance with the normal display state. A command for giving is set, and a general game process such as an effect display at the time of normal map start is performed. Then, in the next step S5k, a universal map variable control process for setting data for variable display of the universal map in the output area based on the information set in step S5j is performed. Even during the above-mentioned ordinary game processing and ordinary variable control processing, interrupts other than forced interrupts are prohibited at the beginning of the process so that the process is not interrupted, and interrupts are released when the process ends. Is done.
[0048]
Next, in step S51, a special figure start winning opening made up of a solenoid or a normal electric accessory for opening the variable winning device 106 based on the processing state (game state) in the special figure game process or the general figure game process. Processing for setting ON / OFF data for outputting a signal for controlling the solenoid for opening 103 to the corresponding output port in the output region is performed. Subsequently, in step S5m, a process for setting data for transmitting a jackpot signal, a special figure fluctuation signal, or the like to the management device based on the processing state in the special figure game process is performed.
[0049]
In step S5n, a process for rearranging the commands set in the input determination process and the special figure game process routine in the order of transmission and setting them in the output area is performed. In step S5o, a process for updating the game effect random number used in step S5i (for example, random number + 1) is performed, and used when selecting a process such as a so-called reach effect. When this random number update process is completed, the process returns to step S5e and the above processes 5e to 5o are repeatedly executed.
[0050]
Then, while the processes 5e to 5o are repeated, if the interruption by the timer activated in step S5c enters every 1 mS and the interruption is not prohibited at that time, the CPU executes the normal interruption process of FIG.
[0051]
In normal interrupt processing every 1 mS, first, interrupts other than forced interrupts are prohibited in step S10, then the register value is saved in the RAM stack area (step S11), and a watch for monitoring microcomputer runaway. The dock timer IC is reset (step S12). Since this watchdog timer IC generates an alarm signal if it is not reset within a predetermined time, for example in steps S5g, 5i, and 5j in the main process of FIG. When the microcomputer runs out of control due to noise or the like and cannot shift to normal interrupt processing, the CPU can be notified that an abnormality has occurred.
[0052]
In the next step S13, the state of input signals from various detectors provided on the game board is read at every interruption, that is, every 1 mS. For example, when the low level changes to the high level and the high level continues twice, the detection signal is present. Switch input reading processing is performed to set an input flag. Then, a process of setting the output data set in the output area in the output region in the solenoid driving process in step S51 or the external information editing process in step S5m in the main process of FIG. 6 and outputting a signal (step S14). ), Processing (steps S15a, S15b, S15c, S15d) in which the output data set in the output area in step S5n is set as an output port and commands are transmitted to other control devices is performed.
[0053]
Of these transmission processes, the display command transmission process for the display control apparatus is performed every interruption, whereas the payout command transmission process for the discharge control apparatus, the voice command transmission process for the sound control apparatus, and the decoration control apparatus The process for transmitting the lamp lighting command is time-division processing because high speed is not required, and is configured to be executed once every three interrupt processes, that is, every 3 mS.
[0054]
In the next game random number update process (step S16), a random number for determining the hit of the special figure game performed on the special symbol display device 102 or a random number for determining the hit of the common figure game performed on the normal symbol display device 122 is used. In the timer update process (step S17), a time used in each process of the main process routine of FIG. 6 is generated. Note that the random number update process in step S16 can also be a process of simply adding +1 to the previous value. In this case, the updated numerical value is a continuous numerical value, but since the timing at which this numerical value is acquired in step S5g of the main processing routine that is a loop process is shifted from the random number update timing (every 1 mS), the acquired numerical value is It will be a random number.
[0055]
When the above processing is completed, the value of the register saved in the stack area in step S11 is returned to the original register, then the interrupt prohibited in step S10 is permitted, the process returns to the main processing routine, and the interrupt is performed. The process interrupted at the start of the process is resumed (steps S18 and S19).
[0056]
FIG. 8 shows an example of a procedure for forced interrupt processing executed when a power failure occurs. This forced interrupt process is started when a power failure detection signal PDD is input from the power supply device to the interrupt input terminal NMI. First, the CPU saves all register values in the backed up RAM stack area (step S20). After that, the value of the stack pointer indicating the top address of the stack area is saved at a predetermined address in the RAM (step S21).
[0057]
Next, the state of a flag (for example, an interrupt prohibition flag) indicating whether normal interruption by the timer is permitted or prohibited is stored at a predetermined address in the RAM (step S22). This save flag is referred to in step S4f of the main processing routine after restoration of the power failure, and it is determined whether or not interrupt prohibition is set in the main processing at the time when the forced interrupt occurs. After that, in step S23, off data ("0") is set for all output ports, and parts such as an attacker, communication line data, and the like are turned off by software so as not to cause a failure during a power failure.
[0058]
Then, the input signals of the prize ball detectors 401 and 402 in the ball discharge device 400 are read to save the discharge state of the ball discharge device 400 when a power failure occurs in the backup RAM (step S24), and finally to a predetermined address of the RAM. The assigned power failure flag is set to a state (55H) indicating the occurrence of a power failure and enters a standby state (step S25). During this standby state, the CPU is reset by a signal from the reset signal first delay circuit. That is, the game control CPU is configured to first stop the game control by software and then be locked to the stop state by hardware by a reset signal. As a result, the occurrence of a malfunction when a power failure occurs is reliably avoided.
[0059]
FIG. 9A shows a specific procedure of the payout command transmission process (step 15b) of the normal interrupt processing routine of FIG. 7, and FIG. 9B shows its timing chart. In this embodiment, a combination of the discharge control data D0 to D7 indicating the number of prize balls to be discharged, the start signal STT, and the strobe signal STB is referred to as a payout command.
[0060]
As shown in the figure, in the payout command transmission process, it is first determined whether or not a payout command to be transmitted is set in the first step S30. If it is set, the output port of the start signal STT is set to “ON output” so that the start signal STT for the discharge control device 220 is changed to a high level (step S31). In the next step S32, the output port of the start signal STT is set to “off output” so that the start signal STT is changed to a low level. As a result, as shown in FIG. 9B, a high level start signal STT is output for a short time T1 such as 20 microseconds.
[0061]
Next, after setting the output port to output the discharge control data D0 to D7 in step S33, the output port of the strobe signal STB is set to “ON output” so as to change the strobe signal STB to high level ( Step S34). In the next step S35, the output port of the strobe signal STB is set to “off output” so as to change the strobe signal STB to the low level. As a result, as shown in FIG. 9B, a high level strobe signal STB is output for a time T2 such as 30 microseconds.
[0062]
The start signal STT is input to the interrupt terminal of the CPU 221 of the discharge control device 220. When the start signal STT is input to the interrupt terminal, the discharge control device 220 shifts to reception interrupt processing at the rising timing t1, The control program is configured to capture the discharge control data D0 to D7 inputted at that time at the rising timing t2 of the strobe signal STB.
[0063]
As can be seen from FIG. 9 (b), in this embodiment, the discharge control data D0 to D7 are always output from the game control device 210, and the discharge control data D0 to D7 change after the start signal STT rises. The discharge control device 220 takes in the signal at the rising timing of the strobe signal STB.
[0064]
FIG. 10 shows a procedure of power failure recovery processing in the discharge control device 220. Note that the overall configuration of the discharge control program of the discharge control device 220 is substantially the same as the program configuration of the game control device 210. That is, it is composed of a main process that is repeatedly executed when no interrupt is entered, a normal interrupt process by a timer interrupt, a forced interrupt process by a power failure detection signal PDD, and the reception interrupt process. The processing is started when the power failure flag indicates that a power failure has occurred at the rise in the main processing routine. The forced interrupt process executed when a power failure occurs is almost the same as the forced interrupt process of the game control device 210 shown in FIG.
[0065]
In this power failure recovery process, first, reception interruption is prohibited (step S40), and after a power failure recovery initialization process (step S41) is performed, time for monitoring the discharge control data D0 to D7 (for example, 250 micron). Seconds≈T4-T3) are set (step S42). In the power failure recovery initialization process, the registers saved in the backup RAM at the time of the power failure are restored to the state before the power failure occurs, and other registers are set in the same manner as the initial settings at power-on. .
[0066]
Next, in step S43, it is determined whether or not the discharge control data D0 to D7 input from the game control device 210 are all off data (“0”). As described above, when the power failure is restored, the game control device 210 is reset by a reset signal for a longer time than the discharge control device 220. During the reset, the output port is forcibly set to off data and the power is released when the reset is released. It is configured to output discharge control data (other than off data) at the time of interruption. Therefore, if the discharge control device 220 recovers from a power failure before the game control device 210 and detects that the discharge control data D0 to D7 from the game control device 210 is other than off-data, the game control device 210 is normally operated. It can be determined that the power failure has been recovered, and the process immediately proceeds to step S46, where a reception interrupt is set to permit a reception interrupt by inputting the start signal STT to the interrupt input terminal, and the process returns to the process where the main process is interrupted. As a result, the discharge control device 220 can start continuation of the process before the power failure immediately after the power failure is restored.
[0067]
On the other hand, when it is determined in step S43 that the discharge control data D0 to D7 are off data, the process proceeds to step S44, where the monitoring timer of the discharge control data D0 to D7 is updated, and the monitoring timer is timed in the next step S45. Judge whether it is up. If the time has not expired, the process returns to step S43 to repeat the above process. If the time has expired, the process proceeds to step S46, the reception interrupt is permitted, and the process returns to the process where the main process is interrupted. In this case, even if the game control device 210 does not return normally, the process returns to the interrupted process. However, the discharge control apparatus 220 performs the received data determination process (FIG. 12) in the returned main process routine. There is no inconvenience because the input discharge control data D0 to D7 are determined and processed as invalid or error.
[0068]
Next, the procedure of reception interrupt processing in the discharge control device 220 will be described with reference to FIG. The reception interrupt process is started when a start signal STT from the game control device 210 is input to a maskable interrupt terminal of the CPU of the discharge control device 220 on condition that reception interrupt is permitted. In S50, reception interrupts and other interrupts (except for forced interrupts) are prohibited. In step S51, the register value is saved in the stack area. In step S52, the monitoring timer for the normal strobe signal STB is set. It is determined whether or not the strobe signal STB from the game control device 210 is on, that is, rises to a high level (step S53).
[0069]
If not, the monitoring timer for the strobe signal STB is updated in step S55, and it is determined in the next step S56 whether the monitoring timer has expired. If the time is not up, the process returns to step S53 and the above processing is repeated. When the time is up, that is, when the strobe signal STB does not rise within a predetermined time even when the start signal STT is input, the process proceeds to step S57. On the other hand, if it is determined in step S53 that the strobe signal STB has risen, the discharge control data D0 to D7 are read in step S54, and then the process proceeds to step S57.
[0070]
In step S57, the reception interrupt is reset. Resetting the reception interrupt When the reception interrupt processing is resumed by recovery from a power failure, if there is a waiting reception interrupt, it is canceled, and a reception interrupt by inputting the start signal STT to the interrupt input terminal is permitted again. It is processing. In this process, if a power failure occurs during the transmission of a payout command from the game control device 210 to the discharge control device 220, a duplicate reception interrupt may occur due to the same start signal STT. It is.
[0071]
Specifically, considering a case where a power failure occurs and is restored immediately after the start signal STT changes to a high level (period T1 in FIG. 9b), in this case, the game control device 210 side shows (1) FIG. (5) Discontinuation of transmission processing (step S31 in FIG. 9) after the discharge control data (previous data, not the data transmitted this time) is output to the port in step S4c of the power failure recovery processing (S4a to S4i) And the start signal STT is changed to the high level again. On the other hand, the discharge control device 220 permits the reception interrupt immediately after the discharge control data D0 to D7 is switched from the off data to other than the off data by the process (1) of the game control device 210 (step S43 in FIG. 10). (See S46). Then, in order to resume the process from the interrupted point in FIG. 11, when the reception interrupt process is executed by the start signal STT before the power failure, it is changed to the high level by the process (2) of the game control device 210. A reception interrupt is generated again by the start signal STT, and this interrupt is set to a standby state. If this reception interrupt is kept waiting as it is, duplicate reception interruption processing will be executed again by the same start signal STT after the reception interruption processing is completed. Therefore, in this embodiment, in order to avoid this, the reception interrupt is reset in step S57.
[0072]
After resetting the reception interrupt in step S57, the value of the register saved in the stack area in step S51 is restored to the original register, and another interrupt input is permitted and the process returns to the main processing routine ( Steps S58 and S59). In addition, in the case where a power failure occurs after the start signal STT falls in FIG. 9B, the start signal STT from the game control device 210 is not raised again after the power failure recovery, so the discharge control device On the 220 side, there is no problem even if the suspended processing is resumed immediately after the discharge control data D0 to D7 change.
[0073]
FIG. 12 shows a procedure for determining the received data read in step S53 of FIG. 11, that is, the discharge control data. This received data determination process is provided in the main process routine. In the received data determination process, it is first determined whether or not the received discharge control data is off data, that is, all “0” (step S60). If it is off data, a data invalid flag is set in step S62, the process is terminated, and the process proceeds to the next step of the main process routine.
[0074]
On the other hand, when the received data is other than off-data, it is determined whether or not it is discharge control data in step S61. If it is not discharge control data, an error flag is set in step S63, and if it is discharge control data, a prize ball is set in step S64. The received discharge control data is added to the discharge counter to end the process, and the process proceeds to the next step of the main process routine. In the main processing routine, if the error flag is set, error processing such as data re-reception is performed, and if the invalid flag is set, the read received data is discarded. When this process ends, the process proceeds to the next step of the main process routine. Then, the discharge control data set in the prize ball discharge counter in step S64 is referred to in the prize ball payout process of the main process routine so that the prize balls are discharged from the ball discharge device 400 by the set number of discharges. It has become.
[0075]
Although the invention made by the present inventor has been specifically described based on the embodiments, the embodiments disclosed in the present specification are examples in all respects and are not limited to the disclosed technology. Should be considered. That is, the technical scope of the present invention should not be construed restrictively based on the description in the above embodiment, but should be construed according to the description of the claims to the last. All modifications within the scope of the claims and the equivalent technology are included.
[0076]
【The invention's effect】
  The first aspect of the present invention repeatedly executes the process of controlling the progress of the game by the game control means.Game controlProcessing and second to be executed at a predetermined timeGame controlProcessing and third run in emergencyGame controlDivided into processing, the firstGame controlThe process is configured in a loop and is always executed.Game controlProcessing consists of normal interrupts that can be prohibited by software.Game controlBy configuring the processing with forced interrupts that cannot be prohibited by software, game control can be executed efficiently within the restricted program size, and the game control means can be prevented from running away due to noise, and a power failure occurs when power is restored. There is an effect that it is possible to realize a gaming machine that can accurately resume the control from the time state.
  Further, in the third game control process by forced interruption, the setting state of interrupt prohibition during the first game control process is saved when a power failure occurs, and interrupt prohibition is set during the first game control process when the power failure is restored. Since it is determined whether or not it has been returned to the original setting state, it is possible to accurately resume the control from the interrupted state at the time of the power failure when the power is restored.
  Furthermore, since all the output ports of the game control means first output off data and then output other than off data at the time of power failure recovery, it is possible to prevent drive sources such as solenoids from operating accidentally after power failure recovery, Other control devices including the discharge control device can know that the control by the game control means has been started by monitoring the input port that receives data and signals from the game control means at the time of power failure recovery, and can quickly The control operation can be resumed, and the entire system can be quickly recovered when the power failure is restored.
[Brief description of the drawings]
FIG. 1 is a front view showing a configuration example of a game board of a pachinko machine as an example of a suitable game machine to which the present invention is applied.
FIG. 2 is a block diagram showing a configuration example of the entire control system provided on the back side of the pachinko machine including the back side of the game board.
FIG. 3 is a timing chart showing signal timings when a power failure occurs and is restored in the control system of FIG. 2;
FIG. 4 is a block diagram illustrating an input / output configuration of a game control device and a discharge control device and a configuration example of backup means.
FIG. 5 is a flowchart showing an example (first half) of a main process procedure of game control by the game control apparatus;
FIG. 6 is a flowchart showing an example (second half) of a procedure of main processing of game control by the game control device.
FIG. 7 is a flowchart illustrating an example of a procedure of a normal interrupt process for game control by the game control apparatus.
FIG. 8 is a flowchart illustrating an example of a procedure for forced interrupt processing for game control by the game control device;
9A is a flowchart showing an example of a specific procedure of a payout command transmission process of the normal interrupt process routine of FIG. 7, and FIG. 9B is a timing chart thereof.
FIG. 10 is a flowchart illustrating an example of a procedure of a power failure recovery process in the discharge control device.
FIG. 11 is a flowchart illustrating an example of a procedure of a reception interrupt process in the discharge control device.
FIG. 12 is a flowchart illustrating an example of a procedure of received data determination processing in the discharge control apparatus.
[Explanation of symbols]
100 game board
101 Guide rail
102 Special symbol display device
103 Special drawing start winning entrance
104,105 Universal map start gate
106 Variable prize-winning device
107,108,109,110,111 General prize opening
121 Special drawing start winning memory display
122 Normal symbol display
123 Normal start winning memory indicator
124,125 Decorative lamp
126 Hitting direction changing member
210 Game control device
211 Microcomputer
212 Reset signal first delay circuit
213 Clock generation circuit
214 I / O interface
220 Emission control device
221 Microcomputer
222 Reset signal second delay circuit
223 clock generation circuit
224 I / O interface
230 Display control device
240 Decoration Control Device
250 sound control device
260 Power supply device
261,262,263 DC generation circuit
H.264 VBB generation circuit (backup power supply)
265 Power failure detection circuit
270 Launch Control Device
301 Overflow detector
302 Hemisphere detector
303 Open metal detector
311 Data output terminal
312 Test output terminal
313 Normal electric accessory display drive signal output terminal
314 Attacker solenoid
315 Ordinary electric accessory drive solenoid
400 ball ejector
401, 402 Prize ball detection sensor
403,404 Rental ball detector
411 Discharge motor
412 Stopper solenoid
413 Flow path switching solenoid
500 card-type ball lending unit

Claims (1)

The game control process for controlling the progress of the game in the game area is composed of a first game control process, a second game control process, and a third game control process, and the game proceeds based on the game control process. A gaming machine comprising: a gaming control device to be discharged; and a discharging control device that controls discharging of a game ball based on discharging control data output from the gaming control device,
The game control device includes:
Main control means for repeatedly executing the first game control process;
Normal interrupt control means for executing the second game control processing including output processing of the discharge control data to the discharge control device at predetermined time intervals;
Forcibly interrupting control means for forcibly executing the third game control process based on a power failure notification signal,
The series of processes constituting the first game control process includes a process in which an interrupt prohibition setting is made to wait for the execution of the normal interrupt control means during the execution of the process,
The third game control process includes an output data fixing process for setting off data to all output ports,
The forced interrupt control means is
A processing state storing means for storing and storing predetermined information indicating whether or not the interrupt prohibition setting is made in the first game control process executed by the main control means when a power failure occurs;
The main control means includes
At the time of power failure recovery, if the predetermined information of the processing state storage means is interrupt prohibition setting, restart the first game control process that was executed at the time of power failure after interrupt prohibition setting, When it is not interrupt prohibition setting, it is provided with a power failure recovery processing means for restarting from the point where the first game control process that was executed at the time of the power failure occurs after the interrupt enabled state,
If a power failure the that was being sent in the discharge control data in the event the state of the output port for outputting the emission control data, the off data set in the third game control process to the discharge control data By switching, it returns to the state at the time of the power failure,
The discharge control device performs a reception interrupt when the off-data is switched,
A gaming machine configured to start the control operation of the game control device later than the control operation of the discharge control device at the time of power failure recovery.

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