JP4214294B2 - DC / DC converter - Google Patents

Description

【００２３】
【数２】

【００２４】
なお、上記数１において、Ｄはエネルギー蓄積期間の時比率，Ｋはエネルギー放電期間の時比率，ｋはトランス５の結合係数，Ｊは状態１の電流コミュテーション期間における時比率，Ｆは状態４の電流コミュテーション期間における時比率である。また数２において、Ｄはエネルギー蓄積期間の時比率，Ｄ’はエネルギー放電期間の時比率（Ｄ’＝１−Ｄ）である。
【００２５】
また上記数１において、漏れインダクタンス４ａ，４ｂの一周期にわたる電圧時間積が零である条件から、２つの電流コミュテーション期間における時比率Ｊ，Ｆの関係式は、次の数３にて表わせる。
【００２６】
【数３】

【００２７】
さらに、内部損失がないものと仮定した場合の負荷抵抗１０の一次換算値Ｒを、数４に示す。なお、ここでのＴはＦＥＴ３，１１のスイッチング周期であり、またＬはトランス５の自己インダクタンスである。
【００２８】
【数４】

【００２９】
上記数１，数３および数４の各関係式に基づき、Ｋ＝0.5，ｋ＝0.98，Ｒ＝30Ωを代入した場合の入出力電圧変換比Ｍｎと、２つの電流コミュテーション期間における時比率Ｊ，Ｆの各計算値を、図６のグラフにそれぞれ示す。なお比較のために、図６には数２で求めた従来の入出力電圧変換比Ｍｃも示してある。
【００３０】
上記数式や図６からも明らかなように、本実施例のような漏れインダクタンス４ａ，４ｂが存在する場合は、漏れインダクタンスが存在しない従来方式の回路例に比べて入出力電圧変換比Ｍｎが低下し、かつ負荷抵抗１０によって入出力電圧変換比Ｍｎが変化することがわかる。特に、ＦＥＴ３，１１を共にオンする期間のデユーティすなわち時比率Ｄが増加するに従って、状態１の電流コミュテーション期間における時比率Ｊの増加割合が大きくと共に、状態４の電流コミュテーション期間における時比率Ｆの増加割合が著しく大きくなる。とりわけ時比率Ｆの増加割合が大きくなる領域では、数１より入出力電圧変換比Ｍｎの増加割合が小さくなり、時比率Ｄによって出力電圧Ｖｏを制御できなくなる自己限流作用を生じる。ここで、最大時比率Ｄmaxで制限した場合の自己垂下特性を図７に示す。
【００３１】
図６および図７には、実験に用いたフライバックコンバータの測定値も示してある（四角のプロットを参照）。このフライバックコンバータのスイッチング周波数ｆｓは300ｋＨｚ，出力側にある平滑コンデンサ９の静電容量Ｃｏは72μＦ，自己インダクタンスＬは57μＨ，一次巻線５ａと二次巻線５ｂとの巻数比Ｎは９，入力電圧Ｖｉｎは60Ｖ，出力電圧Ｖｏは3.3Ｖ，負荷抵抗10の抵抗値ＲＬは0.37Ω（一次換算値Ｒは30Ω）である。なお、図７の測定値は、最大時比率Ｄmax＝0.25とした場合の垂下特性をプロットしたものである。図６および図７のいずれの測定結果においても、計算値とほぼ一致していて解析の妥当性が確認されている。
【００３２】
因みに、従来方式のフライバックコンバータにおいて、入出力電圧変換比Ｍｃは出力電圧Ｖｏと入力電圧Ｖｉｎとの比だけで決定され、負荷抵抗１０には無関係である。したがって、負荷抵抗１０の抵抗値が急激に変動したり短絡して過電流状態に陥っても、フライバックコンバータ内部での自己限流作用は生じない。一方、本実施例におけるフライバックコンバータは、負荷電流が増加して出力電圧Ｖｏが低下すると、制御手段に相当する制御回路13により、ＦＥＴ３，１１が共にオンする期間の時比率Ｄを増加させるように制御を行なうが、トランス５の漏れインダクタンス４ａ，４ｂの存在により、これらの漏れインダクタンス４ａ，４ｂに蓄えられていたエネルギーを放出する期間、すなわちトランス５の一次側と二次側で電流がコミュテーションする期間の時比率Ｆ，Ｊが増加し、入出力電圧変換比Ｍｎひいては出力電圧Ｖｏが頭打ちとなる。そのため、専用の電流検出器や過電流保護回路を設けなくても、フライバックコンバータ内部において負荷電流を制限する自己限流作用が生じ、こうした効果を利用することで、過電流保護機能の設計を非常に簡単に実現することができる。
【００３３】
以上のように本実施例では、スイッチング素子であるＦＥＴ３，１１をスイッチングすることにより、トランス５の一次巻線５ａに入力電圧Ｖｉｎを断続的に印加し、このトランス５の二次巻線５ｂに伝送されたエネルギーを負荷である負荷抵抗１０に出力電圧Ｖｏとして供給するとともに、この出力電圧Ｖｏを安定化させるために、ＦＥＴ３，１１へのパルス駆動信号の導通時比率Ｄを可変制御する制御手段としての制御回路１３を備えたＤＣ／ＤＣコンバータにおいて、ＦＥＴ３，１１へのパルス駆動信号の導通時比率Ｄが増加するのに伴い、漏れインダクタンス４ａ，４ｂに蓄えられていたエネルギーを放出する期間の時比率Ｆ，Ｊが増加するように、トランス５を構成している。
【００３４】
この場合、負荷電流が増加して出力電圧Ｖｏが低下すると、ＦＥＴ３，１１がオンする期間の時比率Ｄを増加させるように制御を行なうが、トランス５に意図的な漏れインダクタンス４ａ，４ｂを持たせることによって、この漏れインダクタンス４ａ，４ｂに蓄えられていたエネルギーを放出する期間の時比率Ｆ，Ｊが増加し、出力電圧Ｖｏが頭打ちとなる。そのため、専用の電流検出器や過電流保護回路を設けなくても、コンバータ内部において負荷電流を制限する自己限流作用が生じる。したがって、トランス５の漏れインダクタンス４ａ，４ｂを利用して、過電流保護の設計を簡単に行なうことができる。
【００３５】
また本実施例では、第１のダイオード２および第１のスイッチング素子であるＦＥＴ３からなる直列回路と、第２のダイオード１２および第２のスイッチング素子であるＦＥＴ１１からなる直列回路をそれぞれ直流電源１に接続し、第１のダイオード２およびＦＥＴ３の接続点と、第２のダイオード１２およびＦＥＴ１１の接続点との間に、漏れインダクタンス４ａ，４ｂが存在するトランス５の一次巻線５ａを接続し、負荷である負荷抵抗１０に出力電圧を供給する整流平滑回路（整流ダイオード８および平滑コンデンサ９）をトランス５の二次巻線５ｂに接続し、ＦＥＴ３，１１が共にオンする第１の期間（状態１，２）に、トランス５にエネルギーを蓄え、その後ＦＥＴ３だけがオンする第２の期間（状態３）に、トランス５に蓄えられたエネルギーを保持し、その後ＦＥＴ３，１１が共にオフする第３の期間（状態４，５）に、トランス５に蓄えられたエネルギーを二次巻線５ｂから整流平滑回路に伝送するように構成し、固定したスイッチング周期でＦＥＴ３，１１をスイッチング動作させると共に、出力電圧Ｖｏに応じて第１の期間の時比率Ｄを可変制御する一方で、第３の期間の時比率Ｋを固定する制御手段としての制御回路１３を備えている。
【００３６】
この場合、負荷電流が増加して出力電圧Ｖｏが低下すると、ＦＥＴ３，１１が共にオンする期間の時比率Ｄを増加させるように制御を行なうが、トランス５に意図的な漏れインダクタンス４ａ，４ｂがあるため、この漏れインダクタンス４ａ，４ｂに蓄えられていたエネルギーを放出する第３の期間の時比率Ｊ，Ｆが増加し、出力電圧Ｖｏが頭打ちとなる。そのため、とりわけ出力電圧Ｖｏの低電圧大電流化に伴いトランス５の漏れ磁束が多くなるフライバック式のＤＣ／ＤＣコンバータにおいて、専用の電流検出器や過電流保護回路を設けなくても、トランス５の漏れインダクタンス４ａ，４ｂを上手く利用して、コンバータ内部において負荷電流を制限する自己限流作用を生じさせることができる。したがって、フライバック式のＤＣ／ＤＣコンバータにおけるトランス５の漏れインダクタンス４ａ，４ｂを利用して、過電流保護の設計を簡単に行なうことができる。
【００３７】
なお、本発明は上記実施例に限定されるものではなく、種々の変形が可能である。例えば、実施例ではフライバックコンバータについて説明したが、他の例えばフォワードコンバータや、ハーフブリッジコンバータ，フルブリッジコンバータ等にも適用することができる。またスイッチング素子は、実施例におけるＭＯＳ型ＦＥＴに限らず、例えばトランジスタなどを利用してもよい。
【００３８】
【発明の効果】
以上説明したように、本発明の請求項１のＤＣ／ＤＣコンバータにより、トランスの漏れインダクタンスを利用して、過電流保護の設計を簡単に行なうことができる。
【００３９】
また、本発明の請求項１のＤＣ／ＤＣコンバータは、トランスの漏れインダクタンスを利用して、過電流保護の設計を簡単に行なうことができる。
【図面の簡単な説明】
【図１】本発明の実施形態の一例を示すＤＣ／ＤＣコンバータの回路図である。
【図２】同上、エネルギー蓄積期間の電流の流れを表わした図１の回路図である。
【図３】同上、エネルギー保持期間の電流の流れを表わした図１の回路図である。
【図４】同上、エネルギー放電期間の電流の流れを表わした図１の回路図である。
【図５】同上、各部の波形図である。
【図６】同上、入出力電圧変換比と、２つの電流コミュテーション期間における時比率の各計算値と測定値を示すグラフである。
【図７】同上、最大時比率で制限した場合の自己垂下特性を示すグラフである。
【符号の説明】
２ 第１のダイオード
３ ＦＥＴ（スイッチング素子，第１のスイッチング素子）
４ａ，４ｂ 漏れインダクタンス
５ トランス
８ 整流ダイオード（整流平滑回路）
９ 平滑コンデンサ（整流平滑回路）
11 ＦＥＴ（スイッチング素子，第２のスイッチング素子）
12 第２のダイオード
13 制御回路（制御手段）[0001]
BACKGROUND OF THE INVENTION
The present invention provides an overcurrent protection function for forcibly limiting the load current and protecting circuit elements inside the converter when the load current increases and falls into an overcurrent state, for example, during a sudden load fluctuation or short circuit. It is related with the DC / DC converter which added.
[0002]
[Prior art]
In general, in this type of DC / DC converter, in particular, a flyback converter stores energy in the inductance of the primary winding during the ON period of the main switching element, as disclosed in, for example, Patent Document 1 and Patent Document 2. When the main switching element is turned off, energy is supplied from the secondary winding to the smoothing capacitor and load via the rectifier diode, and the output circuit on the secondary side of the transformer consists of only the rectifier diode and the smoothing capacitor. Since the circuit configuration is simple, it is widely used for power supply devices of several hundred watts or less.
[0003]
In particular, as a recent trend, low-voltage and large-current output has attracted attention. In that case, the turns ratio between the primary and secondary windings of the transformer has increased, and accordingly, the transformer core The leakage magnetic flux increases. For example, in Patent Document 1 described above, the leakage energy generated in the primary winding of the transformer when the switching element is turned off is charged in the capacitor, and the charging voltage of the capacitor is intermittently applied to the pulse transformer. By doing so, another low power source is obtained.
[0004]
[Patent Document 1]
Japanese Patent Laid-Open No. 5-236738 [Patent Document 2]
Japanese Patent Laid-Open No. 11-98832
[Problems to be solved by the invention]
By the way, the above flyback converter has an overcurrent protection function for forcibly limiting the load current and protecting the circuit elements inside the converter when the load current increases and falls into an overcurrent state. . However, in order to realize such an overcurrent protection function, a current detector such as a current transformer for detecting a load current and a pulse drive signal to the main switching element when the detection signal from the current detector reaches a predetermined level. In order to require an overcurrent protection circuit that narrows the conduction width, the design has become very complicated.
[0006]
SUMMARY OF THE INVENTION Accordingly, a first object of the present invention is to provide a DC / DC converter in which overcurrent protection can be easily designed using the leakage inductance of a transformer.
[0007]
[Means for Solving the Problems]
In order to achieve the above object, a DC / DC converter according to claim 1 of the present invention intermittently applies an input voltage to a primary winding of a transformer by switching a switching element. DC / DC provided with control means for variably controlling the conduction time ratio of the pulse drive signal to the switching element in order to supply the energy transmitted to the line as an output voltage to the load and to stabilize the output voltage In the converter, the transformer is configured such that the time ratio of the period for discharging the energy stored in the leakage inductance increases as the conduction ratio of the pulse drive signal increases.
[0008]
In this case, when the load current increases and the output voltage decreases, control is performed so as to increase the time ratio of the period during which the switching element is turned on, but this leakage inductance is provided by providing the transformer with an intentional leakage inductance. The time ratio of the period during which the energy stored in is released increases, and the output voltage reaches its peak. Therefore, a self-current limiting action for limiting the load current can be generated inside the converter without providing a dedicated current detector or overcurrent protection circuit.
[0009]
In order to achieve the above object, a DC / DC converter according to claim 1 of the present invention includes a series circuit including a first diode and a first switching element, a second diode and a second switching element. Each series circuit is connected to a DC power source, and a leakage inductance exists between the connection point of the first diode and the first switching element and the connection point of the second diode and the second switching element. A first rectifying / smoothing circuit that supplies an output voltage to a load is connected to a secondary winding of the transformer, and both the first switching element and the second switching element are turned on. Energy is stored in the transformer during a period of time, and then in the transformer during the second period when only the first switching element is turned on. The energy stored in the transformer is transmitted from the secondary winding to the rectifying / smoothing circuit in a third period in which the obtained energy is retained and then both the first switching element and the second switching element are turned off. The first switching element and the second switching element are switched in a fixed switching cycle, and the time ratio of the first period is variably controlled according to the output voltage, Control means for fixing the duty ratio of the third period is provided.
[0010]
In this case, when the load current increases and the output voltage decreases, the control is performed so as to increase the time ratio of the period in which both the first switching element and the second switching element are turned on. Since there is an inductance, the time ratio of the third period for releasing the energy stored in the leakage inductance increases, and the output voltage reaches a peak. Therefore, especially in flyback DC / DC converters where the leakage flux of the transformer increases as the output voltage becomes lower and the current increases, the leakage inductance of the transformer can be obtained without providing a dedicated current detector or overcurrent protection circuit. Can be used to generate a self-current limiting action that limits the load current within the converter.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a preferred embodiment of a DC / DC converter according to the present invention will be described in detail with reference to the accompanying drawings.
[0012]
In FIG. 1 showing the configuration of the entire circuit, reference numeral 1 denotes a DC power supply for supplying a DC input voltage Vin to a flyback converter. Between the ends of the DC power supply 1, a diode 2 and a MOS type FET as a first switching element are provided. A series circuit with 3 (hereinafter simply referred to as FET) is connected, and a series circuit with FET 11 serving as the second switching element and another diode 12 is connected. More specifically, the cathode of the diode 2 is connected to the plus side terminal of the DC power source 1, the anode of the diode 2 and the drain of the FET 3 are connected, and the source of the FET 3 is connected to the minus side terminal of the DC power source 1 grounded. Connected. Further, the drain of the FET 11 is connected to the plus side terminal of the DC power source 1, the source of the FET 11 and the cathode of the diode 12 are connected, and the anode of the diode 12 is connected to the minus side terminal of the DC power source 1.
[0013]
Reference numeral 5 denotes a transformer for power transmission. The primary winding 5a and the secondary winding 5b are electromagnetically coupled, and the primary side leakage inductance 4 due to the leakage magnetic flux is connected in series with the primary winding 5a. The secondary side leakage inductance 4b is connected in series with the secondary winding 5b, and the excitation inductance 7 through which the excitation current Im flows is connected in parallel with the primary winding 5a. A series circuit of the leakage inductance 4, the primary winding 5a of the transformer 5, and the resistor 6 is connected between the connection point of the diode 2 and the FET 3 and the connection point of the FET 11 and the diode 12.
[0014]
On the other hand, a rectifying and smoothing circuit including a rectifying diode 8 and a smoothing capacitor 9 is connected to the secondary winding 5 b of the transformer 5. The rectifier diode 8 conducts when current flows from the non-dot side of the primary winding 5a of the transformer 5, and supplies energy to the smoothing capacitor 9 and the load resistor 10 connected between both ends of the smoothing capacitor 9. To do.
[0015]
As a feedback loop for keeping the DC output voltage Vo generated across the load resistor 10 constant, the pulse conduction width of the FETs 3 and 11 that perform switching operation at a fixed period is variably controlled according to the output voltage Vo. A control circuit 13 is provided. The control circuit 13 here turns on the FETs 3 and 11 at the same time, and then turns off the FET 11 before the FET 3 at a timing fluctuating according to the output voltage Vo. At the same time, pulse drive signals are supplied to the FETs 3 and 11 so that the turn-on period is constant. As a result, the switching period of both FETs 3 and 11 and the period during which both FETs are turned off are constant regardless of fluctuations in the output voltage Vo, but the period during which both FETs 3 and 11 are both turned on as the output voltage Vo decreases. Increases and the period during which only FET 3 is on decreases. Conversely, when the output voltage Vo rises, the period during which both FETs 3 and 11 are both on decreases and the period during which only FET 3 is on increases. Thus, the output voltage Vo is stabilized by adjusting the amount of energy stored in the transformer 5.
[0016]
The operation of the above configuration will be described based on the circuit diagrams of FIGS. 2 to 4 and the waveform diagrams shown in FIG. 2 to 4 show current flows in an energy storage period DT, an energy holding period (1-DT-KT), and an energy discharge period KT, which will be described later. 5 shows the gate-source voltage during the period when both FETs 3 and 11 are turned on from the upper stage, the gate-source voltage during the period when only FET 3 is turned on, the primary current Ip flowing through the resistor 6 or the leakage inductance 4a, and the transformer 5 The secondary current Is flowing through the secondary winding 5b, the exciting current Im flowing through the exciting inductance 7, and the transformer voltage Vp generated on the dot side of the primary winding 5a. Further, T in FIG. 5 indicates the switching period of the FETs 3 and 11, and the time ratio of the energy storage period in the state 1 and the state 2 is D, and the time ratio of the energy discharge period in the state 4 and the state 5 is K. Therefore, the energy storage period is represented by the product DT of the duty ratio D and the period T, the energy discharge period is represented by the product KT of the duty ratio K and the period T, and the energy holding period in the state 3 is one period. For the remaining time (1-DT-KT).
[0017]
In the state 1 shown in FIG. 5, when a high (H) level pulse drive signal is supplied to the gates of the FET 3 and FET 11 and these FET 3 and FET 11 are turned on simultaneously, as shown by the solid line in FIG. → FET11 → resistor 6 → primary winding 5a of transformer 5 and exciting inductance 7 → primary current Ip flows in the direction of FET3. Initially, as indicated by the dotted line in FIG. Due to some leakage inductance 4b, the secondary current Is does not immediately become zero, but decreases while commutating with the primary current Ip flowing in the opposite direction. When all the energy of the leakage inductance 4b is released through the diode 8 and the primary winding 5a and the secondary current Is becomes zero, the state shifts to the state 2 shown in FIG. 5 and continues to the DC power source 1 → FET 11 → resistance 6 The primary current Ip flows in the direction of the primary winding 5a of the transformer 5 and the excitation inductance 7 → FET3. At this time, since the diode 8 becomes non-conductive, the secondary current Is remains zero. The states 1 and 2 are energy storage periods DT in which energy is stored in the excitation inductance 7 of the transformer 5.
[0018]
Thereafter, in the state 3 shown in FIG. 5, when an L level pulse drive signal is supplied to the gate of the FET 11 and only the FET 11 is turned off, this time, through the diode 12 and the FET 3 by the exciting current Im flowing through the exciting inductance 7 of the transformer 5. Inertia that keeps flowing the primary current Ip immediately before the FET 11 is turned off acts, and the energy stored in the exciting inductance 7 is held. The flow of the primary current Ip here is shown by a solid line in FIG. Therefore, the state 3 is an energy holding period (1-DT-KT) in which the energy of the exciting inductance 7 is held.
[0019]
In the subsequent state 4 shown in FIG. 5, when an L-level pulse drive signal is also supplied to the gate of the FET 3 and both FETs 3 and 11 are turned off, the leakage inductance 4a of the transformer 5 as shown by the solid line in FIG. As a result, the primary current Ip flows in the direction of the diode 12 → the resistor 6 → the primary winding 5a of the transformer 5 → the diode 2 → the DC power source 1 and leaks into the DC power source 1 while the primary current Ip and the secondary current Is are commutated. The energy of the inductance 4a is regenerated.
[0020]
When all the energy of the leakage inductance 4a is released and the regenerative current (that is, the primary current Ip) becomes zero, the state shifts to the state 5 shown in FIG. 5, and the exciting current Im flowing through the exciting inductance 7 is changed to the primary winding 5a. The energy transmitted to the secondary winding 5 b and stored in the exciting inductance 7 is supplied to the smoothing capacitor 9 and the load resistor 10 via the diode 8. Therefore, the state 4 and the state 5 correspond to the energy release period KT in which the energy stored in the leakage inductance 4a and the excitation inductance 7 of the transformer 5 is released. In this embodiment, the energy release period KT is set to a fixed value K.
[0021]
Here, the input / output voltage conversion ratio Mn in the flyback converter of the present embodiment in which the predetermined leakage inductances 4a and 4b exist, and the input / output voltage conversion in a general flyback converter in which the leakage inductance of the conventional method does not substantially exist. Equations 1 and 2 show the relational expressions of the ratio Mc. Note that the relational expression of Formula 1 applied to the present embodiment is obtained using the extended state averaging method.
[0022]
[Expression 1]

[0023]
[Expression 2]

[0024]
In Equation 1, D is the time ratio of the energy storage period, K is the time ratio of the energy discharge period, k is the coupling coefficient of the transformer 5, J is the time ratio in the current commutation period of state 1, and F is the state 4 Is the duty ratio in the current commutation period. In Equation 2, D is the time ratio of the energy storage period, and D ′ is the time ratio of the energy discharge period (D ′ = 1−D).
[0025]
Further, in the above equation 1, the relational expression of the time ratios J and F in the two current commutation periods can be expressed by the following equation 3 from the condition that the voltage time product over one cycle of the leakage inductances 4a and 4b is zero. .
[0026]
[Equation 3]

[0027]
Furthermore, the primary conversion value R of the load resistor 10 assuming that there is no internal loss is shown in Equation 4. Here, T is the switching period of the FETs 3 and 11, and L is the self-inductance of the transformer 5.
[0028]
[Expression 4]

[0029]
Based on the relational expressions of Equations (1), (3), and (4), the input / output voltage conversion ratio Mn when K = 0.5, k = 0.98, R = 30Ω is substituted, and the time ratio J in the two current commutation periods , F are shown in the graph of FIG. For comparison, FIG. 6 also shows a conventional input / output voltage conversion ratio Mc obtained by Equation 2.
[0030]
As is clear from the above formula and FIG. 6, when the leakage inductances 4a and 4b as in this embodiment are present, the input / output voltage conversion ratio Mn is lower than that of the conventional circuit example in which no leakage inductance exists. In addition, it can be seen that the input / output voltage conversion ratio Mn is changed by the load resistor 10. In particular, as the duty ratio of the FETs 3 and 11, that is, the duty ratio D increases, the increasing ratio of the duty ratio J in the current commutation period of the state 1 increases and the duty ratio F in the current commutation period of the state 4 increases. The rate of increase is significantly increased. In particular, in the region where the increase ratio of the time ratio F is large, the increase ratio of the input / output voltage conversion ratio Mn is smaller than that in Equation 1, and a self-current limiting action is generated in which the output voltage Vo cannot be controlled by the time ratio D. Here, FIG. 7 shows the self-sag characteristics when the maximum duty ratio Dmax is limited.
[0031]
6 and 7 also show the measured values of the flyback converter used in the experiment (see square plot). The switching frequency fs of this flyback converter is 300 kHz, the electrostatic capacity Co of the smoothing capacitor 9 on the output side is 72 μF, the self-inductance L is 57 μH, and the turns ratio N between the primary winding 5a and the secondary winding 5b is 9, The input voltage Vin is 60 V, the output voltage Vo is 3.3 V, and the resistance value RL of the load resistor 10 is 0.37Ω (the primary conversion value R is 30Ω). Note that the measured values in FIG. 7 are plots of drooping characteristics when the maximum duty ratio Dmax = 0.25. In both the measurement results of FIG. 6 and FIG. 7, the validity of the analysis is confirmed because it almost coincides with the calculated value.
[0032]
Incidentally, in the conventional flyback converter, the input / output voltage conversion ratio Mc is determined only by the ratio between the output voltage Vo and the input voltage Vin, and is irrelevant to the load resistor 10. Therefore, even if the resistance value of the load resistor 10 is suddenly changed or short-circuited to fall into an overcurrent state, the self-current limiting action inside the flyback converter does not occur. On the other hand, in the flyback converter in this embodiment, when the load current increases and the output voltage Vo decreases, the control circuit 13 corresponding to the control means increases the time ratio D during which both FETs 3 and 11 are turned on. However, due to the presence of the leakage inductances 4a and 4b of the transformer 5, the current is communicated between the primary side and the secondary side of the transformer 5 during the period in which the energy stored in the leakage inductances 4a and 4b is released. The time ratios F and J of the time period during which the signal is shifted increase, and the input / output voltage conversion ratio Mn and the output voltage Vo reach its peak. Therefore, even if a dedicated current detector and overcurrent protection circuit are not provided, a self-current limiting action that limits the load current occurs inside the flyback converter. By using these effects, the overcurrent protection function can be designed. It can be realized very easily.
[0033]
As described above, in this embodiment, by switching the FETs 3 and 11 which are switching elements, the input voltage Vin is intermittently applied to the primary winding 5a of the transformer 5, and the secondary winding 5b of the transformer 5 is applied. Control means for variably controlling the conduction time ratio D of the pulse drive signals to the FETs 3 and 11 in order to supply the transmitted energy to the load resistor 10 as a load as the output voltage Vo and to stabilize the output voltage Vo. In the DC / DC converter having the control circuit 13 as described above, as the conduction ratio D of the pulse drive signal to the FETs 3 and 11 increases, the energy stored in the leakage inductances 4a and 4b is released. The transformer 5 is configured so that the duty ratios F and J increase.
[0034]
In this case, when the load current increases and the output voltage Vo decreases, control is performed so as to increase the time ratio D of the period during which the FETs 3 and 11 are turned on, but the transformer 5 has intentional leakage inductances 4a and 4b. As a result, the time ratios F and J of the period for releasing the energy stored in the leakage inductances 4a and 4b increase, and the output voltage Vo reaches its peak. Therefore, even if a dedicated current detector and an overcurrent protection circuit are not provided, a self-current limiting action that limits the load current occurs inside the converter. Therefore, the overcurrent protection can be easily designed using the leakage inductances 4a and 4b of the transformer 5.
[0035]
In this embodiment, the DC power source 1 includes a series circuit composed of the first diode 2 and the first switching element FET3 and a series circuit composed of the second diode 12 and the second switching element FET11. The primary winding 5a of the transformer 5 having leakage inductances 4a and 4b is connected between the connection point of the first diode 2 and the FET 3 and the connection point of the second diode 12 and the FET 11, and the load A rectifying / smoothing circuit (rectifying diode 8 and smoothing capacitor 9) for supplying an output voltage to the load resistor 10 is connected to the secondary winding 5b of the transformer 5, and a first period during which both the FETs 3 and 11 are turned on (state 1) 2), energy is stored in the transformer 5 and then stored in the transformer 5 during the second period (state 3) in which only the FET 3 is turned on. The energy stored in the transformer 5 is transmitted from the secondary winding 5b to the rectifying / smoothing circuit in the third period (states 4 and 5) in which the FETs 3 and 11 are turned off. As a control means for switching the FETs 3 and 11 in a fixed switching cycle and variably controlling the time ratio D in the first period according to the output voltage Vo, while fixing the time ratio K in the third period. The control circuit 13 is provided.
[0036]
In this case, when the load current increases and the output voltage Vo decreases, control is performed so as to increase the time ratio D of the period during which both FETs 3 and 11 are turned on, but the transformer 5 has intentional leakage inductances 4a and 4b. Therefore, the time ratios J and F in the third period for releasing the energy stored in the leakage inductances 4a and 4b increase, and the output voltage Vo reaches a peak. Therefore, especially in a flyback type DC / DC converter in which the leakage magnetic flux of the transformer 5 increases as the output voltage Vo decreases and the current increases, even if a dedicated current detector and an overcurrent protection circuit are not provided, the transformer 5 By using the leakage inductances 4a and 4b, a self-current limiting action for limiting the load current can be generated inside the converter. Therefore, overcurrent protection can be designed easily by using the leakage inductances 4a and 4b of the transformer 5 in the flyback type DC / DC converter.
[0037]
In addition, this invention is not limited to the said Example, A various deformation | transformation is possible. For example, although the flyback converter has been described in the embodiment, the present invention can be applied to other forward converters, half bridge converters, full bridge converters, and the like. Further, the switching element is not limited to the MOS type FET in the embodiment, and for example, a transistor or the like may be used.
[0038]
【The invention's effect】
As described above, with the DC / DC converter according to the first aspect of the present invention, overcurrent protection can be easily designed using the leakage inductance of the transformer.
[0039]
Further, the DC / DC converter according to claim 1 of the present invention can easily design overcurrent protection by utilizing the leakage inductance of the transformer.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of a DC / DC converter showing an example of an embodiment of the present invention.
2 is a circuit diagram of FIG. 1 showing the flow of current during the energy storage period. FIG.
3 is a circuit diagram of FIG. 1 showing the flow of current during the energy holding period. FIG.
4 is a circuit diagram of FIG. 1 showing the flow of current during the energy discharge period. FIG.
FIG. 5 is a waveform diagram of each part of the above.
FIG. 6 is a graph showing input / output voltage conversion ratios and calculated values and measured values of duty ratios in two current commutation periods.
FIG. 7 is a graph showing the self-sag characteristics when the maximum duty ratio is limited.
[Explanation of symbols]
2 First diode 3 FET (switching element, first switching element)
4a, 4b Leakage inductance 5 Transformer 8 Rectifier diode (rectifier smoothing circuit)
9 Smoothing capacitor (rectifying smoothing circuit)
11 FET (switching element, second switching element)
12 Second diode
13 Control circuit (control means)

Claims (1)

A series circuit composed of a first diode and a first switching element and a series circuit composed of a second diode and a second switching element are respectively connected to a DC power source, and the first diode and the first switching element A rectifying / smoothing circuit that connects a primary winding of a transformer having a leakage inductance between a connection point and a connection point of the second diode and the second switching element and supplies an output voltage to a load is connected to the transformer. In the first period in which both of the first switching element and the second switching element are turned on, energy is stored in the transformer, and then only the first switching element is turned on. The energy stored in the transformer is held for a period of 2, and then the first switching element and the second switching element are retained. In a third period in which both of the chucking elements are turned off, the energy stored in the transformer is transmitted from the secondary winding to the rectifying and smoothing circuit, and the first switching element and the fixed switching period The second switching element is configured to perform a switching operation, and includes a control unit that variably controls the time ratio of the first period according to the output voltage while fixing the time ratio of the third period. DC / DC converter characterized.

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