JP4245599B2 - Rotation phase detection device and synchronous control device - Google Patents

Description

  In the present invention, in addition to a rotary printing machine, when precise rotation control is performed by an electric motor in a printing secondary processing apparatus such as a sewing machine, a gluing apparatus, and a precision conveying apparatus, even if a disturbance occurs due to noise. The present invention relates to a rotation phase detection device and a synchronization control device that can eliminate the noise and detect the rotation phase of the electric motor with high reliability and enable highly accurate synchronous control and position control.

Rotary printing presses have been widely used since they can print newspapers and advertisements at high speed and in large quantities. The rotary printing press has various uses and types, and the rotary printing press is driven by an electric motor, and various driving methods of the rotary printing press by the electric motor have been conventionally devised. FIG. 19 is a diagram showing an example of a newspaper rotary printing machine, which schematically shows a case in which a black page and a color page are printed, and mainly shows a drive system without an inking device and a water treatment device.
In FIG. 19, reference numerals 01 and 02 represent a centralized control device and a communication line, respectively, and the centralized control device 01 sends a rotational speed command and a rotational phase command to the plurality of synchronous control devices described later via the communication line 02. At the same time, the newspaper rotary press is operated, operated and monitored.

  Reference numerals 03a to 14a denote configuration examples of the first color printing. Reference numerals 03a, 04a, and 05a denote a paper feeding unit, printing paper, and infeed roll, respectively. Reference numerals 10a, 11a, 12a, and 13a denote color front and back surfaces. For example, the printing unit 10a prints yellow, 11a prints magenta, 12a prints cyan, 13a prints black, and 14a and 15f are an outfeed roll and a folding machine, respectively. The paper feeding unit 03a supplies the printing paper 04a to the printing units 10a to 13a via the infeed roll 05a. The printing unit 10a is driven by a device comprising 06a, 07a, and 09a, and 06a is a synchronization control device, Reference numeral 07a denotes an electric motor, and reference numeral 09a denotes a rotary encoder attached to the electric motor 07a. The synchronization control device 06a obtains a feedback signal from the rotary encoder 09a, follows the rotation phase command and rotation speed command transmitted by the central control device 01, controls the electric motor 07a, and accurately synchronizes the printing unit 10a. Drive by control.

Here, the rotation phase command and the rotation speed command transmitted by the centralized control device 01 are, for example, electronically generating and outputting A-phase, B-phase, and Z-phase signals output from an incremental encoder described later. Conventional Patent Document 2 and the like have been implemented. In the present invention, in the following description, control that accurately follows not only the rotation speed command but also the rotation phase command is referred to as synchronous control.
Similarly, the printing units 11a, 12a, and 13a are each provided with the synchronous control device 06a, the electric motor 07a, and the rotary encoder 09a, and are driven by synchronous control with high accuracy following the command of the central control device 01. Then, the rotational phase and rotational speed between the four color printing units 10a to 13a coincide with each other with high accuracy, thereby realizing color printing.

  The printed paper 04a thus printed is guided to the folding machine 15f through the outfeed roll 14a and a drag roll (not shown). Reference numerals 06f, 07f, and 09f are a synchronous control device, an electric motor, and a rotary encoder, respectively, and the folding machine 15f is driven by the synchronous control with high accuracy following the command of the central control device 01 by these devices. The printing paper 04a is cut and folded for each page by the folding machine 15f. Here, a rotary encoder is indispensable for the synchronous control described above, and for the printing paper 04a, four rotary encoders are used in the printing unit, and one rotary encoder is used in the folding machine 15f.

  In FIG. 19, the subscripts b, 03b, 04b, 05b, 06b, 07b, 09b, 10b, and 14b, are for printing in black (black). A roll, a synchronous control device, an electric motor, a rotary encoder, a printing unit, and an outfeed roll. These functions are the same as those described above with the same number and the suffix a, and the printing unit 10b Following the command of the centralized control device 01, it is driven by synchronous control with high accuracy.

Next, in FIG. 19, the devices to which the subscripts c, d, and e are attached show a second color printing configuration example, and explain the case of using two motors that are independent on the front and back of the printing paper. Reference numerals 03c, 04c, and 05c denote a paper feeding unit, printing paper, and infeed roll, 10c, 11c, 12c, and 13c denote printing units that perform double-sided printing on the front and back of colors, and 14c denotes outfeed. It is a roll. These devices are the same as those described above with the same number and the suffix “a”, and a description thereof will be omitted. Reference numerals 06d, 07d, and 09d are, for example, a synchronous control device, an electric motor, and a rotary encoder that perform printing on the surface of the printing paper 04c in the printing unit 10c, and 06e, 07e, and 09e are printing papers in the printing unit 10c. These are the synchronous control device, the electric motor, and the rotary encoder that print the back surface of 04c.
Also in this configuration example, the synchronous control devices 06d and 06e obtain feedback signals from the rotary encoders 09d and 09e, respectively, and receive the rotational phase command and rotational speed command received from the centralized control device 01 via the communication line 02. Following this, the electric motors 07d and 07e are controlled with high accuracy to perform double-sided printing on both sides. Similarly, the printing units 11c, 12c, and 13c are also driven in synchronization with the printing unit 10c, and in this configuration example, eight rotary encoders are used.

As described above, FIG. 19 shows an example of a shaftless newspaper rotary press that performs printing by electronically driving a plurality of electric motors by synchronous control without mechanically connecting the printing units 10a to 13c with a shaft. It is.
In this example, 14 rotary encoders are used. However, a regular newspaper morning newspaper set has more newspaper pages per copy, and the number of rotary encoders to be used correspondingly increases. In order to ensure printing, the synchronous control device (06a to 06e in FIG. 19) stabilizes the rotational phase and rotational speed of feedback from the rotary encoder (09a to 09e in FIG. 19) at any time. Must be detected reliably.

The rotary encoder is roughly classified into an incremental encoder and an absolute encoder. Next, an outline of these is shown in FIGS.
First, FIG. 20 explains the outline of the incremental encoder. FIG. 20- (a) shows the structure, and FIGS. 20- (b), (c), and (d) show the signals to be output.
In FIG. 20- (a), optical slits that are radially spaced are provided on a rotating disk that is a detection object, and a pulse train corresponding to the rotation is generated by using light emitting elements and light receiving elements. 20- (b), (c), and (d), an A-phase and B-phase incremental signal and a Z-phase signal that generates one pulse per rotation are output.
Here, the A phase and the B phase have an electrical angle of, for example, a phase difference of 90 °, and can detect forward rotation and reverse rotation. The incremental encoder has the following characteristics.
(i) The number of output signals is small, such as A phase, B phase, and Z phase, and can withstand long distance transmission.
(ii) Since the phase change is detected by a serial pulse train, a rotational phase without a time delay can be detected in real time even during high-speed rotation.
(iii) The interface on the receiving side can be easily configured with only the A-phase, B-phase, and Z-phase pulse signals as output signals, and an interface with little temperature change and aging change is possible.
(iv) It is generally cheaper than the absolute encoder described later.
There are advantages such as,
(v) The absolute rotation phase cannot be detected as it is.
For this purpose, for example, a rotation phase detection counter is provided on the control device side, the A phase and B phase incremental signals output from the incremental encoder are counted, and the rotation phase detection counter is set to zero by the Z phase signal. Therefore, detection of the absolute rotation phase of one rotation has been conventionally performed.

Next, FIG. 21 shows an outline of the absolute encoder, FIG. 21- (a) shows the structure, and FIGS. 21- (b) to (f) show signals to be output. First, in FIG. 21- (a), a plurality of concentric tracks are provided on the rotating disk, which is the object to be detected, and absolute position information indicating the rotational phase is formed on the track by a binary code. A light-emitting element and a light-receiving element detect an n-bit absolute signal having a rotational phase of, for example, b0 to bn-1. FIGS. 21- (b) to (f) show the situation in which the signals b0 to bn-1 change according to the rotation.
(Vii) The absolute rotation phase can always be detected.
There is an advantage, but
(Viii) In order to increase the resolution of rotational phase detection, the number of tracks on the rotating disk must be increased. With this, the shape of the rotating disk becomes large, and it is difficult or impossible to realize a high-resolution one. Is possible.
(Ix) Similarly, the higher the resolution of rotational phase detection, the greater the number of binary signal lines, making it difficult to transmit a long-distance rotational phase.
(X) When detecting the absolute rotation phase, it is necessary to detect the change of the data from b0 to bn-1 in combination with the timing, and it is difficult to detect the rotation phase in real time at high speed rotation.
There are issues such as.

Here, since the incremental encoder has a simpler structure than the absolute encoder, it is possible to obtain a higher resolution one, which is used for synchronous control of the shaftless rotary press shown in FIG. It has been.
FIG. 22 illustrates the detection of the rotational phase using the incremental encoder in the conventional synchronous control device. 06a and 07a show the synchronous control device and the motor as in FIG. 19, and 09a is attached to the electric motor 07a. An incremental encoder is shown. Further, 1f, 2f, 3f, and 4f included in the synchronization control device 06a are an A phase, a B phase interface, a Z phase interface, a feedback rotation phase detection counter, and a feedback rotation speed detector, respectively. The A-phase and B-phase interface 1f inputs the A-phase and B-phase signals output from the incremental encoder 09a, performs electrical insulation and level conversion, and for example, doubles or doubles the A-phase signal according to the rotation. Alternatively, an AB phase pulse signal 1f1 and a signal 1f2 indicating the rotation direction are generated and output to the rotation phase detection counter 3f.
In the following description of the present invention, it is assumed that the A-phase and B-phase interface 1f outputs a frequency twice as high as the A-phase signal to the AB-phase pulse signal 1f1.

Next, the Z-phase interface 1f receives the Z-phase pulse output from the incremental encoder 09a, generates a Z-phase signal 2f1 subjected to electrical insulation and level conversion, and outputs the Z-phase signal 2f1 to the rotational phase detection counter 3f. The rotational phase detection counter 3f counts the number of pulses of the AB phase pulse signal 1f1, clears the count value to zero by the Z phase signal 2f1, and generates and outputs the rotational phase 3f1 of the electric motor 07a.
The rotation phase detection counter 3f is incremented or decremented by the rotation direction signal 1f2 corresponding to the normal rotation or reverse rotation operation of the electric motor 07a. In the following description, the electric motor 07a is in the normal rotation direction. The rotation phase detection counter 3f inputs the AB phase pulse signal 1f1 and performs a count-up operation. Further, the Z-phase pulse output from the incremental encoder 09a and the Z-phase signal 2f1 are regarded as the same signal in the following description only with the Z-phase interface 2f interposed therebetween.
Next, the rotational speed detector 4f incorporates a real timer (not shown) and always inputs the rotational phase 3f1 from the rotational phase detection counter 3f, and determines the rotational speed 4f1 from the amount of change of the rotational phase 3f1 per reference time. Calculate and output.
In FIG. 22, the thin line indicates the flow of one signal, and the thick line indicates the flow of numerical data such as 1 word, 2 words, and the like, and is similarly expressed in the following explanatory drawings.

  FIG. 23 illustrates detection of the rotational phase 3f1 of the conventional rotational phase detection counter 3f. The horizontal axes of FIGS. 23- (a), (b), and (c) represent time, and FIG. The AB phase pulse signal 1f1, the Z phase signal 2f1, and the rotational phase 3f1 output from the rotational phase detection counter 3f are shown as time transitions. Here, in FIG. 23, it is assumed that the electric motor 07a, that is, the incremental encoder 09a is rotating at a constant speed, and the AB phase pulse signal 1f1 in FIG. 23- (a) becomes a constant frequency signal corresponding to the rotation. The Z-phase signal 2f1 of 23- (b) is a signal that becomes high every rotation, and indicates that it becomes high at times t1 and t3, for example. Next, referring to FIG. 23- (c), the rotational phase detection counter 3f outputs a count value obtained by counting up the AB phase pulse signal 1f1, and when the Z phase signal 2f1 is high, the count value is set to zero. In FIG. 23- (c), the maximum rotation phase of one rotation is set to Pmax, and the rotation phase 3f1 is cleared at times t1 and t3.

The rotational phase detection counter 3f detects the rotational phase 3f1 as shown in FIG. 23- (c), but the electric motor 07a and the incremental encoder 09a are used in production environments in various environments such as being used with other inverters and power equipment. It is often placed in a harsh environment where electrical noise can occur.
For this reason, when noise enters the Z-phase output from the incremental encoder 09a, the rotational phase detection counter 3f cannot correctly detect the rotational phase.
FIG. 24 schematically shows this aspect, and FIGS. 24- (a), (b), and (c) correspond to FIGS. 23- (a), (b), and (c), respectively. It is assumed that noise enters the Z phase of the incremental encoder 09a at time t2 in FIG. At this time t2, the rotational phase 3f1 output by the rotational phase detection counter 3f is cleared from Pt2 to zero as shown in FIG. 24- (c), and then continues to count up, so that the Z phase becomes high normally. At time t3, the rotational phase 3f1 is cleared again from Pt3 to zero. That is, from the time t2 to t3, the rotational phase detection counter 3f does not detect the rotational phase correctly, and the accuracy is significantly deteriorated in the synchronous control, and printing misalignment occurs when the color printing operation in FIG. 19 is performed. It becomes.

As a countermeasure when noise enters the Z phase output from the incremental encoder, for example, one disclosed in Patent Document 1 has been proposed.
The one described in Patent Document 1 includes a reset detection counter that counts pulses output from the incremental encoder, and stores the output of the reset detection counter as a current value and a previous value in the first and second latch gates, respectively, Rotational speed discriminating means for discriminating one rotation of the Z-phase incremental encoder based on the deviation between the outputs of the first and second latch gates is provided, and even if noise enters the Z phase, the incremental encoder is provided. This makes it possible to correctly detect the rotation speed of the encoder.
Patent Document 2 describes a speed and position signal generator that outputs pulse signals corresponding to A and B phase pulses and Z phase pulses output from an incremental encoder with Z phase.
JP 2003-185473 A Japanese Patent Laid-Open No. 11-248727

When the electronic synchronous control is realized in the shaftless rotary printing press shown in FIG. 19 and the like, a large number of rotary encoders are required attached to the electric motor in order to detect the rotational phase and the rotational speed.
When the Z-phase incremental encoder with excellent real-time performance and rotational phase resolution is used as the rotary encoder, if noise enters the Z-phase output from the incremental encoder, the rotational phase detection is performed as described above with reference to FIG. The counter cannot correctly detect the rotation phase, the accuracy of the synchronization control is significantly deteriorated, and printing misalignment or the like occurs.
The present invention has been made in view of the above circumstances, and the object of the present invention is to remove noise reliably even when noise enters the Z-phase output from the incremental encoder, and to be stable at any time. An accurate rotational phase can be detected.

In the present invention, the above problem is solved as follows.
(1) A rotation phase detection counter that generates a pulse train corresponding to the rotation of the rotating device and generates an output of a Z-phase incremental encoder that generates a Z-phase signal each time the rotating device makes one rotation is incorporated. The phase detection counter counts the pulse train output from the Z-phase incremental encoder to obtain an integrated value, and clears the integrated value to zero by the Z-phase signal, thereby corresponding to the rotational phase of the rotating device. In the rotational phase detection device for detecting a signal, a multi-phase variable clock generator and a noise-cut Z phase generator are provided on the Z phase signal input side of the rotational phase detection counter, and noise included in the Z phase signal is detected. Provide a noise canceller to cancel.
Then, the rotation speed calculated from the rotation phase output from the rotation phase detection counter is input to the multi-division variable clock generator, and a low frequency to a high frequency according to the rotation speed from zero to the maximum speed. A variable clock signal that switches in stages is generated.
Further, the variable clock signal and the Z-phase signal including noise output from the incremental encoder with Z-phase are input to the noise cut Z-phase generator, and the Z-phase signal including the noise is input to the clock by the variable clock signal. By shifting the phase by n clock cycles of the signal, a noise canceller Z-phase signal from which noise shorter than n clock cycles is removed is output, and the noise canceller Z-phase signal is used as a Z-phase input to the rotational phase detection counter.
Specifically, the noise-cut Z-phase generator includes an n-stage shift register that shifts an input Z-phase signal by the variable clock signal (the width of the Z-phase pulse is m clock cycles of the variable clock signal). Then, n <m), and a logic circuit to which the output of each stage of the shift register is input is provided. The logic circuit generates a high level output when all the stages of the shift register are at the high level, and the shift circuit The Z-phase signal is phase-shifted by n clock cycles of the variable clock signal by maintaining a high-level output state until all stages of the register become low level, and noise shorter than the n clock cycles of the variable clock signal is generated. The removed noise canceller Z-phase signal is output.
(2) In the above (1), the multi-division variable clock generator generates a variable clock signal that switches from a low frequency to a high frequency in two stages according to the rotational speed from zero to the maximum speed. A variable clock signal is supplied to the noise cut Z phase generator.
(3) In the above (1) and (2), a Z-band noise prevention means comprising a Z-band generator and a gate circuit is provided.
The Z-band generator sets a rotational phase that is larger than the minimum value of the rotational phase by a first predetermined value set in advance as a Z-band low phase set value PZLo, and a second phase that is preset from the maximum value of the rotational phase. When the rotation phase that is smaller by a predetermined value is the Z-band high phase setting value PZHi (where PZLo <PZHi), the rotation phase 3f1 that is output from the rotation phase detection counter, the Z band low phase setting value PZLo, and the Z band high phase setting Compared with the value PZHi, when the rotational phase 3f1 exceeds PZLo and less than PZHi, a non-active Z-band signal is generated. When the rotational phase 3f1 is PZHi or higher or PZLo or lower, Z is active. Generate a band signal.
Then, an output of the Z band generator to one input terminal of the gate circuit, also, to the other input terminal the noise canceller is set, the Z-phase signal the phase Z with incremental encoder output Input to the noise canceller, input the output of the noise canceller to the gate circuit, connect the output of the gate circuit to the Z-phase input terminal of the rotation phase detection counter,
The gate circuit can pass a Z-phase signal including noise when the Z-band signal is active, and prevents a Z-phase signal including noise when the Z-band signal is inactive.
( 4 ) In the above ( 3 ), when the motor operates at zero speed or at a low speed, the Z band generator always activates the Z band signal, and outputs the noise canceller to the rotational phase detection counter. When the electric motor is operated at a speed exceeding the low speed, the Z band generator generates the rotation phase 3f1 output from the rotation phase detection counter, the Z band low phase set value PZLo, and the Z band high. Compared with the phase setting value PZHi, when the rotational phase 3f1 exceeds PZLo and less than PZHi, a Z-band signal that becomes inactive is generated, and when the rotational phase 3f1 is PZHi or more or PZLo or less, it is active. Z band signal is generated.
The gate circuit allows the output of the noise canceller to pass when the Z-band signal is active, and blocks the passage of the output of the noise canceller when the Z-band signal is inactive.
( 5 ) In the above ( 3 ) or ( 4 ), the Z-phase monitor to which the Z-band signal output from the Z-band generator and the input signal to the noise canceller that is the output of the Z-phase incremental encoder are input. The Z-phase monitor includes a counter that counts the number of signals input to the noise canceller when the Z-band signal is inactive, and an illegal Z-phase count indicator that displays the output of the counter. By monitoring the illegal Z-phase count indicator, it is possible to detect the number of times noise is mixed in the Z-phase signal output from the Z-phase incremental encoder.
( 6 ) Central control device, a plurality of electric motors, a Z-phase incremental encoder for detecting the rotation of the electric motor, a command rotational phase detection device corresponding to the central control device, and a plurality corresponding to the number of the motors And a control device for controlling the motor, and the Z-phase incremental encoder generates a pulse train corresponding to the rotation of the motor and each time the rotating device makes one rotation, The centralized control device electronically emulates the function of the incremental encoder with Z phase and outputs a pulse train corresponding to the rotation phase command and the rotation speed command and a Z phase signal for each rotation. The rotation phase and the rotation speed of the motor are synchronized with the signals corresponding to the rotation phase command and the rotation speed command output from the central control device. In that synchronization control unit, as a rotation phase detection device and a rotary phase detection device for the feedback for the command, using the rotational phase detecting apparatus of the above (3) (4) or (5).
Then, the control device calculates a rotational speed command and a rotational speed from the rotational phase command and rotational phase output from the rotational phase detection device for command and the rotational phase detection device for feedback, respectively. The speed deviation of the rotational speed is obtained, and the phase deviation is obtained from the rotational phase command and the rotational phase output from the rotational phase detector for command and the rotational phase detector for feedback. Based on this, control is performed so that the rotation phase and the rotation speed of the electric motor coincide with the rotation phase command and the rotation speed command, respectively.

According to the present invention, the following effects can be obtained.
(1) Since the noise canceller is built into the rotational phase detector, even if noise enters the Z-phase output of the incremental encoder when the rotational speed of the rotating machine is low, this noise is input to the rotational phase detection counter. The rotational phase can be detected stably and accurately.
(2) Since the rotation phase detector incorporates the Z-band noise prevention means, even if noise enters the Z-phase output of the incremental encoder attached to the motor, this noise will be Z in the vicinity of the Z-phase signal generation phase. Except for the case where it enters within the phase signal passage allowable period, it is possible to reliably prevent noise from entering, and to detect a stable and accurate rotational phase.
(3) By incorporating both the noise canceller and the Z-band noise prevention means in the rotational phase detection device, noise is input to the rotational phase detection counter even when the motor is operating at any speed. Therefore, it is possible to always detect the rotational phase accurately.
(4) By providing a counter that counts the number of signals input to the noise canceller when the Z-band signal is inactive and a Z-phase monitor that displays the output of the counter, noise is added to the output signal of the incremental encoder. It is possible to quantitatively record and display the frequency of intrusion, and to confirm and implement improvements in the installation environment of various control devices and drive devices.
(5) By performing synchronization control using the rotational phase detection device having the noise canceller and the Z-band noise prevention means, it is possible to realize highly accurate synchronization control and position control.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
1 to 4 are shown in claim 1, FIGS. 5 and 6 are shown in claim 2, FIGS. 7 to 12 are shown in claims 3 to 5, FIG. 13 is shown in claims 6 and 7, FIGS. 14 to 16 illustrate an embodiment related to claim 8, and FIGS. 17 and 18 illustrate an embodiment related to claim 9. FIG.

FIG. 1 is a diagram illustrating an overall configuration of a first embodiment of the present invention, FIG. 2 is a diagram illustrating a configuration example of a noise canceller in the first embodiment, and FIGS. 3 and 4 are diagrams illustrating an operation of the first embodiment. .
In FIG. 1, those having the same reference numerals as those in FIG. 22 have the same functions and will not be described. Reference numerals 1 and 6f denote a rotational phase detector and a noise canceller according to the present invention, respectively, and 6f29 denotes a noise canceller 6f. This is a noise canceller Z-phase signal to be output. The rotational phase detection device 1 according to this embodiment incorporates the noise canceller 6f in addition to the conventional rotational phase detection counter 3f, and the noise canceller 6f outputs the Z-phase signal 2f1 and the rotational speed detector 4f. The rotational speed 4f1 is input, and the noise canceller Z-phase signal 6f29 is output to the rotational phase detection counter 3f.
The noise canceller 6f outputs the noise canceller Z-phase signal 6f29 from which the noise has been eliminated even when noise enters the Z-phase signal 2f1 based on the signal output from the incremental encoder 09a. Furthermore, the performance of eliminating this noise is characterized in that it is superior when the rotational speed of the electric motor 07a is lower than when it is high.

Next, FIG. 2 shows an example of the configuration of the noise canceller 6f. The noise canceller 6f further includes a multi-division variable clock generator 6f0 and a noise cut Z phase generator 6f21.
The multi-division variable clock generator 6f0 receives the rotation speed 4f1, and sequentially switches from a low-frequency clock signal to a high-frequency clock signal until the rotation speed 4f1 reaches zero to the maximum speed, thereby changing m stages of frequency. A clock signal 6f15 is generated and output to the noise cut Z phase generator 6f21. The noise cut Z-phase generator 6f21 receives the variable clock signal 6f15 and the Z-phase signal 2f1, and a noise canceller Z that eliminates noise by shaping the Z-phase signal 2f1 with the variable clock signal 6f15. The phase signal 6f29 is output.

Further, a configuration example of the multi-division variable clock generator 6f0 will be described with reference to FIG. In FIG. 2, 6f2, 6f3, 6f4, and 6f5 indicate an oscillator, a frequency divider, a NOT gate, and a selector, respectively, and 6f6 to 6f9, 6f10 to 6f13, and 6f14 indicate a D flip-flop, an AND gate, and an OR gate, respectively. Indicates.
The transmitter 6f2 generates a fixed frequency signal and outputs it to the frequency divider 6f3 and the NOT gate 6f4. The frequency divider 6f3 sequentially divides the frequency signal supplied to the CK input into m stages and outputs Q0. Output from. In FIG. 2, for ease of explanation, the frequency divider 6f3 is assumed to divide into 5 stages, and the Q0 output and the Q1 output are divided into input frequencies of 1/2 and 1/4, respectively. A clock signal divided by 1/16 is output to the output Q3.

The selector 6f5 receives the rotational speed 4f1 and generates an m-stage switching signal until the rotational speed reaches from zero to the maximum speed. In FIG. The S0 output is generated from the S0 output.
Then, a high signal is sequentially output alternately from S0, S1, S3, and S4 until the rotational speed 4f1 reaches the maximum speed from zero, and the output of the selector 6f5 is output by the D flip-flops 6f6 to 6f9 and the NOT gate 6f4. After being synchronized with the frequency signal output from the oscillator 6f2, the AND gates 6f10 to 6f13 are input to activate (select) the only AND gate.
That is, the OR gate 6f14 divides the transmitter 6f2 into one of 1/16, 1/8, 1/4, or 1/2 corresponding to the value of the rotational speed 4f1. The clock signal is output as the variable clock signal 6f15. Although not essentially related to the present invention, in FIG. 2, it is assumed that the frequency divider 6f3 and D flip-flops 6f6 to 6f9 update their operations at the rising edge of the CK input. It is assumed that the flip-flop operates at the rising edge of the CK input.

Next, the operation of the multi-division variable clock generator 6f0 will be described with reference to FIG. 3 and FIG. The noise cut Z-phase generator 6f21 in FIG. 2 will be described later.
FIG. 3A shows a change in the rotational speed 4f1 of the electric motor 07a. The rotational speed 4f1 is assumed to change with time between zero and the maximum rotational speed as shown in the figure.
3- (b), (c), (d), and (e) represent temporal transitions of signals generated at the outputs S0, S1, S2, and S3 of the selector 6f5, respectively. f), (g), (h), and (i) represent the outputs of the AND gates 6f10, 6f11, 6f12, and 6f13, respectively, and FIG. 3- (j) represents the temporal transition of the variable clock signal 6f15. .
First, FIG. 3- (a) and FIGS. 3- (b), (c), (d), and (e) will be compared and described. (1) The S0 output of the selector 6f5 shown in FIG. 3B is high until time t1 when the rotational speed 4f1 accelerates from zero and the rotational speed becomes Vup1, and goes low after the time t1. After the time t6 when the rotational speed 4f1 decelerates and the rotational speed becomes Vdw1 or less, it becomes high again.
(2) The S1 output of the selector 6f5 shown in FIG. 3- (c) is high from time t1 when the rotational speed 4f1 becomes Vup1 to time t2 when Vup1 is reached when accelerating, and when the vehicle is decelerated. It is high from time t5 when the rotational speed 4f1 becomes Vdw2 to time t6 when Vdw1 becomes Vdw2, and is otherwise low.
(3) The S2 output of the selector 6f5 shown in FIG. 3D is high from time t2 when the rotational speed 4f1 becomes Vup2 to time t3 when Vup2 is reached when accelerating, and when the vehicle is decelerated. From time t4 when the rotational speed 4f1 becomes Vdw3 to time t5 when Vdw2 becomes Vdw2, it is high otherwise.
(4) The S3 output of the selector 6f5 shown in FIG. 3 (e) becomes high from time t3 when the rotational speed 4f1 is accelerated and becomes Vup3 to time t4 when Vdw3 is decelerated and otherwise. Low.
Thus, the selector 6f5 generates a signal indicating the level of the rotational speed 4f1 from the S0 output to the S3 output, and the signal is output from the transmitter 6f2 by the D flip-flops 6f6 to 6f9. Synchronized with the signal, the delays caused by the D flip-flops 6f6 to 6f9 are slight, and FIGS. 3B, 3C, 3D, and 3E show the D flip-flops 6f6, 6f7, and 6f8, respectively. , 6f9 Q output signal is also shown.

Next, FIGS. 3 (f), (g), (h) and (i) will be described.
(5) The output of the AND gate 6f10 shown in FIG. 3- (f) is, for example, 16 minutes of the signal of FIG. 3- (b) and the frequency signal of the transmitter 6f2 output by the frequency divider 6f3. The clock signal divided by 1 is obtained by AND operation as shown in the figure.
(6) The output of the AND gate 6f11 shown in FIG. 3- (g) is 1/8 of the signal of FIG. 3- (c) and the frequency signal of the transmitter 6f2 output from the frequency divider 6f3. As shown in the figure, the clock signal divided into two is ANDed.
(7) The output of the AND gate 6f12 shown in FIG. 3- (h) is a quarter of the signal of FIG. 3- (d) and the frequency signal of the transmitter 6f2 output from the frequency divider 6f3. As shown in the figure, the clock signal divided into two is ANDed.
(8) The output of the AND gate 6f13 shown in FIG. 3- (i) is a half of the signal of FIG. 3- (e) and the frequency signal of the transmitter 6f2 output from the frequency divider 6f3. As shown in the figure, the clock signal divided into two is ANDed.

  The signals shown in FIGS. 3- (f), (g), (h), and (i) thus obtained are input to the OR gate 6f14, and the output of the OR gate 6f14, that is, the variable clock. The signal 6f15 is as shown in FIG. The characteristics of the multi-division variable clock generator 6f0 according to the present invention will be described by comparing FIG. 3- (j) and FIG. 3- (a). The rotational speed 4f1 is accelerated from zero or a low speed. The variable clock signal 6f15 (output of the OR gate 6f14) outputs a multi-divided clock signal from a low frequency to a high frequency, and when the rotational speed 4f1 decelerates from a high speed, the variable clock signal 6f15 starts from a high frequency. A multi-division clock signal is output up to a low frequency.

The noise cut Z-phase generator 6f21 receives the variable clock signal 6f15 and the Z-phase signal 2f1, and a noise canceller Z that eliminates noise by shaping the Z-phase signal 2f1 with the variable clock signal 6f15. The phase signal 6f29 is output. Next, returning to FIG. 2, a configuration example of the noise cut Z-phase generator 6f21 will be described.
In FIG. 2, 6f22, 6f23, 6f24, and 6f25 are D flip-flops, and 6f26, 6f27, and 6f28 are AND gates, NOR gates, and JK flip-flops, respectively. The D flip-flops 6f22 to 6f25 constitute, for example, a four-stage Z-phase shift register having the Z-phase signal 2f1 as a signal input and the variable clock signal 6f15 as a CK input, and the AND gate 6f26 is connected to the D flip-flop 6f22. When all the outputs of 6f25 are high, the output is high, and when the outputs of the D flip-flops 6f22 to 6f25 are all low, the output of the NOR gate 6f27 is high. The outputs of the AND gate 6f26 and the NOR gate 6f27 are connected to the J and K inputs of the JK flip-flop 6f28, and the output of the JK flip-flop 6f28 becomes a noise canceller Z-phase signal 6f29 output from the noise canceller 6f.

Further, the operation of the noise cut Z-phase generator 6f21 will be described with reference to FIG. In FIG. 4, the horizontal axis represents time, FIG. 4- (a) shows the temporal transition of the Z-phase signal 2f1, and FIG. 4- (b) shows the variable clock signal 6f15 output from the frequency divider 6f3. For example, the case of the clock signal divided by one half is shown, and FIG. 4- (c) shows the noise canceller Z-phase signal 6f29 corresponding to FIG. 4- (b).
Similarly, FIG. 4D shows the case where the variable clock signal 6f15 is a clock signal divided by 1/16 output from the frequency divider 6f3, and FIG. This is the noise canceller Z-phase signal 6f29 corresponding to 4- (d).
First, in FIG. 4- (a), the Z-phase signal 2f1 is assumed to be high at time t1a and low at time t1b as a normal signal for each rotation of the incremental encoder 09a, and is illustrated from time t1c to t1d. It is assumed that noise is mixed.

4 (a), (b), and (c) are contrasted with each other, and the clock signal of FIG. 4- (b) is supplied to the CK inputs of the D flip-flops 6f22 to 6f25, After the Z-phase signal 2f1 becomes high at time t1a in FIG. 4- (a), the AND gate 6f26 becomes high at time t2b, which is four clocks after time t2a. The noise canceller Z-phase signal 6f29 output from the JK flip-flop 6f28 also becomes high at time t2b in FIG.
Here, it is assumed that the delay from the J and K inputs to the Q output due to the CK input of the JK flip-flop 6f28 is not slight, and the same applies to the following description.
Further, after the Z-phase signal 2f1 becomes low at time t1b in FIG. 4- (a), the clock signal in FIG. 4- (b) becomes the NOR gate at time t2d, which is four clocks after time t2c. 6f27 becomes high, and the noise canceller Z-phase signal 6f29 output from the JK flip-flop 6f28 becomes low at time t2d in FIG. 4- (c).

Next, when noise is mixed from time t1c to t1d in FIG. 4- (a), the AND gate 6f26 goes high at time t2f, which is four clocks after time t2e in FIG. 4- (b), and The noise canceller Z-phase signal 6f29 output from the JK flip-flop 6f28 becomes high at time t2f in FIG.
Further, after the Z-phase signal 2f1 becomes low at the time t1d, the NOR gate 6f27 becomes high at time t2h, which is four clocks after the time t2g in FIG. 4- (b), and the JK flip-flop 6f28. The noise canceller Z-phase signal 6f29 output by becomes low at time t2h in FIG.
As described above, the noise that has entered the Z-phase signal 2f1 at time t1c in FIG. 4- (a) is high when the clock signal output from the variable clock signal 6f15 is high as shown in FIG. 4- (b). As shown in FIG. 4- (c), the noise canceller Z-phase signal 6f29 also appears.

Next, the operation when the variable clock signal 6f15 is a clock signal lower than that shown in FIG. 4- (b) will be described. FIG. 4- (d) shows the frequency divider 6f3. As an example, a clock signal divided by 1/16 is output. 4 (a), (d), and (e), the clock signal of FIG. 4- (d) is supplied to the CK inputs of the D flip-flops 6f22 to 6f25, After the Z-phase signal 2f1 becomes high at time t1a in FIG. 4- (a), the AND gate 6f26 becomes high at time t4d four clocks after time t4a in FIG. 4- (d). The noise canceller Z-phase signal 6f29 output from the JK flip-flop 6f28 becomes high at time t4d in FIG.
Further, after the Z-phase signal 2f1 becomes low at the time t1b, the NOR gate 6f27 becomes high at time t4h, which is four clocks after the time t4e in FIG. 4- (d), and the JK flip-flop 6f28. The noise canceller Z-phase signal 6f29 output by becomes low at time t4h in FIG.

When noise is mixed from time t1c to t1d in FIG. 4- (a), the level in FIG. 4- (a) is low at time t4m after 4 clocks from time t4i in FIG. 4- (e). Accordingly, the output of the AND gate 6f26 remains low, and the noise canceller Z-phase signal 6f29 maintains low as shown after time t1c in FIG.
As described above, the frequency of the variable clock signal 6f15 is switched according to the level of the rotational speed 4f1, and the frequency of the variable clock signal 6f15 is sufficiently lowered when the rotational speed 4f1 is low. 6f deletes the noise mixed in the Z-phase signal 2f1 and generates the noise-less noise canceller Z-phase signal 6f29 as shown in FIG. 4- (e).

FIG. 5 is a diagram for explaining a configuration example of the two-divided variable clock generator 6f1 according to the second embodiment of the present invention, and FIG. 6 is a diagram for explaining the operation of the second embodiment of FIG.
Here, the variable clock generator 6f0 according to FIG. 2 outputs a clock signal having a multi-frequency divided as the variable clock signal 6f15 corresponding to the value of the rotational speed 4f1, but the variable clock generator 6f15 shown in FIG. The clock generator 6f1 simplifies this, and when the rotational speed 4f1 transitions in the range from zero to the maximum speed, the variable clock signal 6f15 is generated by switching between the two clock signals of the low frequency and the high frequency.

In FIG. 5, the two-divided variable clock generator 6f1 having the same reference numeral as in FIG. 2 has the same function as that shown in FIG. 2, and its description is omitted. 6f16 is a NOT gate, 6f17 and 6f18 are AND gates, 6f19 is OR It is a gate. The selector 6f5 inputs the rotational speed 4f1, and when the rotational speed is low, the S0 output is high, and when it exceeds the low speed, the S0 output is low. That is, using only the S0 output of the selector, the signal of the S0 output is synchronized with the frequency signal output from the transmitter 6f2 by the D flip-flop 6f6, and then combined with the NOT gate 6f16 to the AND gate 6f17. Or 6f18 is made active (selected) alternately.
Then, due to the action of the AND gates 6f17 and 6f18 and the OR gate 6f19, when the rotational speed 4f1 is low, the frequency of the transmitter 6f2 output from the frequency divider 6f3 is divided by, for example, 1/16. The Q3 output clock signal is output as the variable clock signal 6f15, and when the rotational speed 4f1 exceeds a low speed, the frequency of the transmitter 6f2 output by the frequency divider 6f3 is divided, for example, by half. A clock signal is output as the variable clock signal 6f15.

  The operation of the two-divided variable clock generator 6f1 in FIG. 5 will be further described with reference to FIG. FIG. 6- (a) assumes that the rotational speed 4f1 changes with time as shown in FIG. 3- (b) and (e), as shown in FIG. 3- (a). 3 represents the temporal transition of the input signal from the Q output of the D flip-flop 6f6 to the AND gate 6f17, and the input signal from the NOT gate 6f16 to the AND gate 6f18, respectively. And (j) represent temporal transitions of the output signal of the AND gate 6f17, the output signal of the AND gate 6f18, and the variable clock signal 6f15, respectively.

First, the description will be made by comparing FIG. 6 (b) and FIG. 6 (e) with FIG. 6 (a).
(1) The S0 output of the selector 6f5 in FIG. 5 is high until time t1 when the rotational speed 4f1 accelerates from zero and the rotational speed becomes Vup1, goes low after the time t1, and then the rotational speed 4f1 decelerates. Then, after time t6 when the rotation speed becomes Vdw1 or less, it becomes high again. The S0 output signal is synchronized with the frequency signal output from the transmitter 6f2 by the D flip-flop 6f6 and becomes a signal shown in FIG. 6B, which is input to the AND gate 6f17.
(2) The signal shown in FIG. 6B is inverted by the NOT gate 6f16 and becomes the signal shown in FIG. 6E, which is input to the AND gate 6f18.
Next, FIGS. 3 (f), (i) and (j) will be described.
(3) The output of the AND gate 6f17 shown in FIG. 6- (f) is the signal of FIG. 6- (b) and the frequency signal of the transmitter 6f2 output from the frequency divider 6f3, for example, 16 minutes. The clock signal divided by 1 is obtained by AND operation as shown in the figure.
(4) The output of the AND gate 6f18 shown in FIG. 6- (i) is, for example, the signal of FIG. 6- (e) and the frequency signal of the transmitter 6f2 output from the frequency divider 6f3, for example, two minutes. The clock signal divided by 1 is obtained by AND operation as shown in the figure.

The signals shown in FIGS. 6- (f) and (i) thus obtained are input to the OR gate 6f19, and the output of the OR gate 6f19, that is, the variable clock signal 6f15, is shown in FIG. 6- (j). As shown in
The characteristics of the variable clock generator 6f1 according to the present embodiment will be described with reference to FIG. 6 (j) and FIG. 6 (a). The rotational speed 4f1 is accelerated from zero or a low speed. The variable clock signal 6f15 (output of the OR gate 6f19) outputs a clock signal divided into two from a low frequency to a high frequency, and when the rotational speed 4f1 decelerates from a high speed, the variable clock signal 6f15 starts from a high frequency. A clock signal divided into two is output to a low frequency. Then, by supplying the variable clock signal 6f15 to the noise cut generator of FIG. 5, when the rotational speed 4f1 is particularly low, the noise canceller that strongly removes noise mixed in the Z-phase signal 2f1. A Z-phase signal 6f29 is generated. The noise canceller Z-phase signal 6f29 is supplied to the Z-phase input of the rotational phase detection counter 3f, and a stable rotational phase 3f1 can be obtained.

FIG. 7 is a diagram for explaining the entire third embodiment of the present invention, FIG. 8 explains the basic operation of the third embodiment, and FIG. 9 shows a configuration example of a Z-band generator 7f described later of the third embodiment. 10, FIG. 11, and FIG. 12 are diagrams for further explaining the operation of the third embodiment.
In FIG. 7, the same reference numerals as those in FIG. 1 denote the same functions, and the description thereof is omitted. Reference numerals 2, 7f, and 7f12 denote a rotation phase detector, a Z-band generator, and Z A band signal, 8f is an AND gate, and 7f13 is a Z-phase signal based on the Z band. The Z band generator 7f and the AND gate together constitute a Z-band noise prevention means.
The rotational phase detector 2 according to this embodiment incorporates the Z-band generator 7f in addition to the conventional rotational phase detection counter 3f, and the Z-band generator 7f outputs the rotational phase output by the rotational phase detection counter 3f. 3f1 and the rotational speed 4f1 output from the rotational speed detector 4f are input. The Z band generator 7f activates the Z band signal 7f12 when the rotational phase 3f1 is equal to or higher than a Z band high phase set value PZHi, which will be described later, or equal to or less than the Z band low phase set value PZLo. A logical operation is performed on the signal 7f12 and the Z-phase signal 2f1 by the AND gate 8f to generate a Z-phase Z-phase signal 7f13 by the Z band, which is input to the rotation phase detection counter 3f.
The Z-phase signal 7f13 based on the Z-band generated in this way enters the Z-phase signal 2f1 when the rotational phase 3f1 exceeds the Z-band low phase setting value PZLo and is less than the Z-band high phase setting value PZHi. There is a feature that completely eliminates noise.

  Next, the operation of the Z band generator 7f shown in FIG. 7 will be described with reference to FIG. Like FIGS. 23- (a), (b), and (c), the horizontal axis of FIGS. 8- (a), (b), and (c) is time, and the AB phase pulse of FIG. The time transition of the rotation phase 3f1 output from the signal 1f1, the Z-phase signal 2f1, and the rotation phase detection counter 3f is shown. Here, in FIG. 8, it is assumed that the electric motor 07a, that is, the incremental encoder 09a is rotating at a constant speed, and the AB phase pulse signal 1f1 in FIG. 8- (a) is a constant frequency signal corresponding to the rotation, The Z-phase signal 2f1 in FIG. 8- (b) is a signal that goes high every rotation. Next, referring to FIG. 8- (c), the rotational phase detection counter 3f outputs a count value obtained by counting up the AB phase pulse signal 1f1 of FIG. 8- (a) and outputs the count value of FIG. 8- (b). When the Z-phase signal 2f1 is high, the count value is cleared to zero and the rotation phase 3f1 is detected. In FIG. 8C, the maximum rotation phase of one rotation is set to Pmax. The Z band low phase is PZHi and PZLo, respectively.

FIGS. 8- (d) and (e) show the Z-band signal 7f12 and the time transition of the Z-phase signal 7f13 by the Z-band, respectively. In FIG. 8- (c), the Z-band generator 7f When the rotational phase 3f1 is equal to or higher than the Z band high phase set value PZHi or equal to or lower than the Z band low phase set value PZLo, the Z band signal 7f12 shown in FIG. When the phase 3f1 exceeds the Z band low phase set value PZLo and is less than the Z band high phase set value PZHi, the Z band signal 7f12 of FIG. Here, in FIG. 8D, the high period is the Z-phase permission period TZon, and the low period is the Z-phase inhibition period TZoff.
A Z-phase signal 7f13 based on the Z band shown in FIG. 8- (e) is obtained by ANDing the signals shown in FIGS. 8- (b) and 8- (d). Therefore, even if noise enters the Z-phase signal 2f1 in FIG. 8- (b) during the Z-phase inhibition period TZoff in FIG. 8- (d), the noise is completely removed in FIG. 8- (e). Will be deleted. Here, in the configuration of FIG. 7, the rotational phase 3f1 of FIG. 8- (c) is cleared to zero when the Z-phase signal 7f13 by the Z band shown in 8- (e) is high. Please note that.

FIG. 9 shows an example of the configuration of the Z-band generator 7f described with reference to FIGS. In FIG. 9, the same reference numerals as those in FIG. 7 have the same functions and the description thereof is omitted. 7f1, 7f2, and 7f3 are coefficient units for outputting the maximum rotational phase Pmax, respectively, and Z band low phase setting values. A coefficient unit and an adder / subtracter that output PZLo, 7f4 and 7f5 are comparators, and 7f6, 7f7, and 7f8 are an OR gate, a Z-band controller, and an OR gate, respectively.
The maximum rotational phase Pmax output from the coefficient unit 7f1 and the Z band low phase set value PZLo output from the coefficient unit 7f2 are added / subtracted by the adder / subtractor 7f3 to generate a Z band high phase set value PZHi. The comparator 7f4 inputs and compares the Z-band high phase set value PZHi and the rotation phase 3f1, and outputs a high when the rotation phase 3f1 is equal to or greater than the Z-band high phase set value PZHi, and the rotation phase 3f1. Is less than the Z band high phase set value PZHi. The output of the comparator 7f4 becomes the Z band signal 7f12 via the two OR gates 7f6 and 7f8.
On the other hand, similar to the operation of the comparator 7f4, the comparator 7f5 inputs and compares the Z band low phase set value PZLo output from the coefficient unit 7f2 and the rotation phase 3f1, and the rotation phase 3f1 is compared with the Z band low phase. A high is output when it is less than or equal to the set value PZLo, and a low is output when the rotational phase 3f1 exceeds the Z band low phase set value PZLo. The output of the comparator 7f5 becomes the Z band signal 7f12 via the two OR gates 7f6 and 7f8.
When the Z band signal 7f12 is high, the operation of the AND gate 8f allows the Z phase signal 2f1 to be output as the Z band Z phase signal 7f13, and when the Z band signal 7f12 is low. The Z-phase signal 2f1 is inhibited by the action of the AND gate 8f, and the Z-band Z-phase signal 7f13 is forced to be low.

As described above, the comparators 7f4 and 7f5 perform control for permitting or prohibiting the Z-phase signal 2f1 in accordance with the value of the rotational phase 3f1, but in addition, the Z-band controller 7f7 is incremental. The Z-band signal 7f12 may be set to high according to the rotation speed of the encoder, or by an operation operation or sequence control command, and the Z-phase signal 2f1 may be permitted.
This will be described with reference to FIG. FIG. 9 shows a case where a function of permitting the Z-phase signal 2f1 according to the rotational speed of the incremental encoder is provided.
In FIG. 9, the Z-band controller 7f7 inputs the rotational speed 4f1, outputs high when the rotational speed 4f1 is equal to or lower than a predetermined speed, and outputs low when the rotational speed exceeds the predetermined speed.
The signal output from the Z-band controller 7f7 becomes the Z-band signal 7f12 through the OR gate 7f8, and the Z-phase signal 2f1 is permitted or prohibited by the action of the AND gate 8f.

Although FIG. 9 shows the case where the function of permitting the Z-phase signal 2f1 according to the rotational speed of the incremental encoder is shown, the function of permitting the Z-phase signal 2f1 by an operation operation or sequence control command. You may make it have.
As an example in which such control is specifically required, the rotational phase detection device 2 and the rotational phase detection counter 3f shown in FIG. 7 use discrete logic devices, and today, one-chip using PLD or ASIC. A logic circuit is realized in the device.
In such an electronic apparatus, the rotational phase 3f1 output from the rotational phase detection counter 3f when the power is turned on is usually different from the actual phase. Therefore, in order to correctly detect the rotation phase when the power is turned on, it is necessary to wait at least one rotation for the Z-phase signal 2f1 to be normally high.
For this reason, a microcomputer (not shown) is incorporated in the Z-band controller 7f7, and when the power is turned on, an operation command is received or a sequence control command (not shown) of the centralized control unit installed outside is also received. Then, the Z-band controller 7f7 is temporarily made to output high. As a result, the Z-phase signal 2f1 is permitted regardless of the operations of the comparators 7f4 and 7f5, the Z-phase signal 2f1 becomes normal high and the rotation phase detection counter 3f is correctly cleared to zero, and then the rotation. Detection of the rotational phase by the phase 3f1 is started.

FIG. 10 illustrates the operation of the configuration of FIG. 9 described above with the waveforms of the respective parts. FIGS. 10- (a), (b), and (c) are the same as FIG. 8- (a). Similarly to FIGS. 7B, 7B, and 9C, the AB phase pulse signal 1f1, the Z phase signal 2f1, and the rotational phase 3f1 output by the rotational phase detection counter 3f are shown as time transitions. In FIG. 10- (c), time t2 is the time when the rotational phase 3f1 becomes equal to or higher than the Z band high phase set value PZHi, and at time t3, the rotational phase 3f1 is cleared from the maximum rotational phase Pmax to zero (described later). The time t4 is a time when the rotational phase 3f1 becomes equal to or greater than the Z band low phase set value PZLo.
10- (d), (e), and (f) show the outputs of the comparator 7f4, comparator 7f5, and OR gate 7f6, respectively. The output of the comparator 7f4 in FIG. Referring to-(c), the rotation phase 3f1 is high between times t2 and t3 when the rotation frequency of the Z band is equal to or greater than the Z band high phase set value PZHi, and is low otherwise. The output of the comparator 7f5 is high between times t3 and t4 when the rotational phase 3f1 is equal to or less than the Z band low phase set value PZLo, and is low otherwise. The output of the OR gate 7f6 shown in FIG. 10- (f) is obtained by ORing the above-described FIG. 10- (d) and FIG. 10- (e), and as shown in the figure, for example, between times t2 and t4. Become high.

Next, FIGS. 10- (g), (h), and (i) show the output of the Z-band controller 7f7, the Z-band signal 7f12, and the Z-band Z-phase signal 7f13, respectively. 7 outputs high when the rotational speed 4f1 of the incremental encoder 09a shown in FIG. 7 is equal to or lower than a predetermined speed, for example, and outputs low when the rotational speed exceeds the predetermined speed. Alternatively, the output of the Z-band controller 7f7 is set to high by a command for driving operation or sequence control. In FIG. 10- (g), for example, the time until time t0 is high, and thereafter the level is low. That is, the main function of the Z-band controller 7f7 is to arbitrarily extend a Z-phase permission period to be described later.
The Z-band signal 7f12, which is the output of the OR gate 7f8 shown in FIG. 10- (h), is obtained by ORing the above-described FIG. 10- (f) and FIG. 10- (g). In the present invention, the high period of 10- (h) is referred to as the Z-phase permission period TZon, and the low period is referred to as the Z-phase prohibition period TZoff, and the 10- (h) Z-band signal 7f12 and FIG. The Z-phase signal 2f1 of b) is ANDed by the AND gate 8f to generate the Z-band Z-phase signal 7f13 of FIG. 10- (i). The Z-band Z-phase signal 7f13 is input to the rotational phase detection counter 3f shown in FIG. 7, and the rotational phase 3f1 shown in FIG. 10- (c) is cleared to zero.

  Further, the operation and effect of the Z-band generator 7f will be described with reference to FIGS. First, FIGS. 11- (a), (b), (c), (h), and (i) shown in FIG. 11 are respectively shown in FIGS. 10- (a), (b), (c), ( h) and the same signals as those shown in (i) are shown and their explanations are omitted. However, the difference from FIG. 10 is that the Z-band controller 7f7 always outputs low in FIG. It is assumed that the signal corresponding to FIG. 10- (g) is not displayed, and the noise shown in FIG. 11- (b) enters the Z-phase signal 2f1 at times t1 and t5. 11- (b) where the noise has intruded is ANDed with the Z-band signal 7f12 shown in FIG. 11- (h) to generate the Z-band Z-phase signal 7f13 of FIG. 11- (i). At time t1 and t5, FIG. 11- (h) is at a low level, and in FIG. 11- (i), the noise is surely erased.

Next, FIG. 12 explains the operation of the Z-band generator 7f in the worst case in which noise enters the Z-phase signal 2f1, and FIG. 12 similarly shows FIGS. 12- (a), (b), ( c), (h), and (i) show the same signals as those shown in FIGS. 10- (a), (b), (c), (h), and (i), respectively. FIG. 12 shows that the Z-band controller 7f7 always outputs a low level in FIG. 12, and does not display the one corresponding to FIG. 10- (g). It is assumed that the noise shown in the figure enters the Z-phase signal 2f1 at time t1.
Here, it is assumed that the Z-phase signal 2f1 is normally high at times t3 and t7 in FIG. 12- (b), and the rotational phase 3f1 is set to the Z-band high phase set value PZHi in FIG. 12- (c). The above times are t2 and t6, and the time t1 at which the noise enters is between the times t2 and t3.
Further, in FIG. 12- (c), the rotation phase 3f1 is cleared from the rotation phase Pt1 to zero at time t1 when noise enters, and then continues counting up, and the Z-phase signal 2f1 is correctly set to high at time t3. Thus, the rotational phase Pt3 is cleared to zero. The rotation phase 3f1 then continues to operate while exceeding the Z band low phase set value PZLo at time t4.

Based on the above description regarding FIG. 12- (c), since the rotational phase Pt1 and the rotational phase Pt3 have the following relationship (1), the rotational phase Pt1 is expressed by the following equation (2). Become.
Pt1 + Pt3 = Pmax (1) Formula Pt1 = Pmax−Pt3 (2) Also, at time t1, the rotational phase Pt1 is equal to Z The following equation (3) is derived from the fact that it is larger than the band high phase set value PZHi and the above equation (2).
PZHi <(Pt1 = Pmax−Pt3)
Pt3 <Pmax−PZHi (3) In FIG. 9, the Z band high phase set value PZHi is obtained by subtracting the Z band low phase set value PZLo from the maximum rotation phase Pmax. Therefore, the following equation (4) is derived.
PZLo = Pmax−PZHi (4) Formula If the above formula (4) is substituted into the formula (3), the following formula (5) is obtained.
Pt3 <PZLo (5) When the Z-phase signal 2f1 is correctly high at the time t3 according to the above equation (5), the comparator 7f5 in FIG. And the Z band signal 7f12 shown in FIG. 12- (h) is also high.
Thus, when the comparator 7f4 is provided in FIG. 9, the comparator 7f5 for detecting that the rotational phase 3f1 is equal to or smaller than the Z band low phase set value PZLo is also required.

Next, the Z-band signal 7f12 shown in FIG. 12- (h) is, for example, a Z-phase permission period TZon from time t2 to t4 and a Z-phase inhibition period TZoff from time t4 to t6. The Z-band Z-phase signal 7f13 shown in FIG. 12 is as shown in FIG. 12- (b) and FIG. 12- (h), which are ANDed by the AND gate 8f of FIG. That is, noise at time t1 also appears in FIG. 12- (i), and the rotational phase 3f1 in FIG. 12- (c) is cleared to zero.
Here, a specific example of FIG. 12 shows that the number of pulses generated per rotation of the A phase signal of the incremental encoder 09a is 19200ppr (ppr is Pulse Per Round), and the A phase B phase interface of FIG. If 1f outputs a frequency twice as high as the A-phase signal to the AB-phase pulse signal 1f1, the maximum rotation phase Pmax in FIG. 12- (c) is expressed by the following equation (6).
Pmax = 19200 × 2 = 38400 pulses (6) If the Z band low phase setting value PZLo is set to 16 pulses, for example, the ratio of the Z phase permission period TZon and the time required for one rotation Is 0.0834% as shown in the following equation (7).
TZon / (TZon + TZoff) = (2 × PZLo) / Pmax
= (2 × 16) /38400=0.0834% (7)

As described above, the rotational phase detector 2 including the Z-band generator 7f according to the third embodiment of the present invention described from FIG. 7 shows the Z-phase signal 2f1 as shown in FIG. 11- (b). Even if noise enters the Z-phase prohibited period TZoff, the noise is completely removed and the Z-phase signal 7f13 by the Z band shown in FIG. 11- (i) is generated to detect a reliable rotational phase. Let me.
In addition, the rotational phase detection device 2 is configured so that the Z band low phase setting value is also detected when noise enters the Z phase permission period TZon in the worst case shown in FIG. 12- (b) in the Z phase signal 2f1. Since the value of PZLo is normally set sufficiently small as shown in the example of the equation (7), the ratio of the Z phase permission period TZon to one rotation is small, and noise enters the period of the Z phase permission period TZon. The probability of doing is very small. Even if noise enters during the period of the Z-phase permission period TZon, the Z-phase signal 2f1 is correctly high and becomes zero from the rotational phase Pt3 as shown at time t3 in FIG. 12- (c). It is cleared and promptly returns to a normal state to detect a reliable rotational phase.

FIG. 13 is a diagram for explaining a fourth embodiment of the present invention. In FIG. 13, the same reference numerals as those in FIG. 1 and FIG. 7 denote the same functions, and the explanation thereof is omitted. It is a rotation phase detection apparatus of Example 4, and a stabilization Z phase signal.
The fourth embodiment generates a stabilized Z-phase signal 8f1 by simultaneously using the Z-band noise blocking means comprising the noise canceller 6f of FIG. 1, the Z-band generator 7f of FIG. 7, and the gate 8f. Is the Z-phase input of the rotational phase detection counter 3f. The purpose is that even when the electric motor 07a is operating at any speed from a low speed to a maximum speed, even if noise enters the Z-phase signal output from the incremental encoder 09a. It is to detect the accurate rotational phase by reliably removing the noise.

Further, in describing FIG. 13, the explanation will be made separately when the electric motor 07a is stopped or operated at a low speed and when the electric motor 07a is operated at a higher speed than the low speed.
When the motor 07a stops or operates at a low speed,
(1) First, the operation of the Z-band generator 7f of FIG. 13 will be described with reference to FIG.
(2) The Z-band controller 7f7 built in the Z-band generator 7f detects that the motor 07a is stopped or at a low speed from the input rotational speed 4f1 and outputs high. As a result, the Z-band signal 7f12 becomes high regardless of the operation of the comparator 7f4 or 7f5.
(3) Since the Z-band signal 7f12 is high, the stabilized Z-phase signal 8f1 that is the output of the AND gate 8f is the same signal as the noise canceller Z-phase signal 6f29.
(4) Next, regarding the operation of the noise canceller 6f of FIG. 13, the variable clock generator built in the noise canceller 6f is not the multi-division variable clock generator 6f0 of FIG. It will be described with reference to FIG. 5 that the clock generator 6f1 is used.
(5) The selector 6f5 included in the two-divided variable clock generator 6f1 detects that the motor 07a is stopped or at a low speed from the input rotational speed 4f1 and sets the S0 output to high.
(6) Thereby, the variable clock signal 6f15 becomes a Q3 output and a low frequency clock signal obtained by dividing the frequency of the transmitter 6f2 output from the frequency divider 6f3 by, for example, 1/16.
(7) The variable clock signal 6f15 is supplied to the noise cut Z-phase generator 6f21, and since the frequency is low, the noise canceller Z-phase signal 6f29 is generated by strongly removing noise mixed in the Z-phase signal 2f1.
(8) The noise canceller Z-phase signal 6f29 becomes a stabilized Z-phase signal 8f1 via the AND gate 8f, and is supplied to the Z-phase input of the rotational phase detection counter 3f.
(9) Even after the synchronous control device 06a is powered on, the Z-phase signal 2f1 is normally high and the rotational phase detection counter 3f is cleared to zero to provide a reliable rotational phase 3f1. Start detecting.

When the motor 07a operates over a low speed,
(10) First, the operation of the noise canceller 6f of FIG. 13 will be described with reference to FIG.
(11) The selector 6f5 included in the two-divided variable clock generator 6f1 detects that the motor 07a is operating beyond the low speed from the input rotational speed 4f1, and sets the S0 output to low.
(12) Thereby, the variable clock signal 6f15 becomes a Q0 output obtained by dividing the frequency of the transmitter 6f2 output from the frequency divider 6f3 into, for example, a half and a high frequency clock signal.
(13) The variable clock signal 6f15 is supplied to the noise-cut Z-phase generator 6f21, and generates the noise canceller Z-phase signal 6f29 from which the noise mixed in the Z-phase signal 2f1 is normally removed.
(14) Next, the operation of the Z-band generator 7f of FIG. 13 will be described with reference to FIG.
(15) The Z-band controller 7f7 built in the Z-band generator 7f detects that the electric motor 07a exceeds the low speed from the input rotational speed 4f1 and outputs low.
(16) As a result, the output of the comparator 7f4 or 7f5 becomes valid in the Z-band signal 7f12, and the Z-band signal 7f12 becomes high during the Z-phase permission period and low during the Z-phase inhibition period.
(17) The AND gate 8f erases the noise of the noise canceller Z-phase signal 6f29 by the Z-band signal 7f12 and outputs a stabilized Z-phase signal 8f1, and the stabilized Z-phase signal 8f1 is the rotation phase detection counter. A reliable rotation phase 3f1 is obtained by being supplied to the 3f Z-phase input.

  As described above, in the embodiment shown in FIG. 13, even when noise enters the Z-phase signal output from the incremental encoder 09a, the noise is reduced when the motor 07a is stopped or operating at a low speed. The stabilized Z-phase signal 8f1 from which noise has been eliminated is generated by the action of the canceller 6f. Further, when the electric motor 07a is operating at a speed exceeding the low speed, the stabilized Z-phase signal 8f1 in which noise is eliminated is generated by the action of the Z-band generator 7f. Then, by inputting the stabilized Z-phase signal 8f1 to the Z-phase input of the rotational phase detection counter 3f, it is possible to obtain a stable rotational phase 3f1 at any rotational speed.

FIG. 14 is a diagram for explaining the entire fifth embodiment of the present invention, FIG. 15 shows a configuration example of a Z-phase monitor 9f described later of the fifth embodiment, and FIG. 16 explains the operation of the fifth embodiment. Therefore, description will be made sequentially from FIG.
In FIG. 14, components having the same reference numerals as those in FIGS. 1 and 13 have the same functions, and their descriptions are omitted. Reference numerals 4 and 9f denote a rotational phase detector and a Z-phase monitor according to the fifth embodiment, respectively.
As described above, when the electric motor 07a is operating at any speed, the stabilized Z-phase signal 8f1 from which noise has been removed is obtained by the action of the noise canceller 6f and the Z-band generator 7f. In the fifth embodiment, when the electric motor 07a is operating at a speed exceeding the low speed, the Z-phase monitor 9f receives the Z-band signal 7f12 and the Z-phase signal 2f1, and the incremental encoder 09a outputs The number of times that noise has entered the signal to be detected is quantitatively detected to facilitate monitoring.

  Next, FIG. 15 shows a configuration example of the Z-phase monitor 9f. In FIG. 15, those having the same reference numerals as those in FIG. 14 have the same functions and their explanations are omitted, and 9f1, 9f2, 9f3, 9f4, and 9f5 are a NOT gate, an AND gate, a counter, and a noise count value, respectively. And an unauthorized Z-phase count indicator. The NOT gate 9f1 inverts the Z-band signal 7f12, and the AND gate 9f2 inputs the output of the NOT gate 9f1 and the Z-phase signal 2f1 to perform an AND operation. That is, the AND gate 9f2 outputs high when noise enters the Z-phase signal 2f1 in the Z-phase inhibition period TZoff, and the counter 9f3 counts up every time the output of the AND gate 9f2 becomes high. The noise count value 9f4 is output. The noise count value 9f4 is displayed on the unauthorized Z-phase count display 9f5, and the number of times that noise has entered the Z-phase signal 2f1 can be easily known.

  FIG. 16 further explains the operation of the Z-phase monitor 9f. FIGS. 16- (a), (b), (c), and (h) are the same as FIGS. 11- (a) and (b), respectively. , (C), and (h), and the description thereof is omitted. FIGS. 16- (j) and (k) show the output of the AND gate 9f2 and the noise count value 9f4 output from the counter 9f3, respectively. Shows the time transition. That is, it is assumed that noise has entered the Z-phase signal 2f1 at times t1 and t5 in FIG. 16- (b), and the Z-phase signal 2f1 and the Z-band signal 7f12 in 16- (h) are A signal obtained by NOT operation is input to the AND gate 9f2. Therefore, the output of the AND gate 9f2 becomes high only when noise enters as shown in FIG. 16- (j), and the counter 9f3 counts this and the noise count value as shown in FIG. 16- (k). 9f4 is output. The unauthorized Z-phase count indicator 9f5 always displays the value of FIG. 16- (k), and by monitoring this display, the number of times of intrusion of noise that cannot normally be easily recognized is quantitatively determined. You can know clearly.

  Here, such intrusion of noise is never allowed, and when the noise count value 9f4 is counted up, the quality of the product is immediately checked, and the main power supply system and signal lines of the apparatus are installed. This is to check the situation and take countermeasures, and to check and take countermeasures for noise sources such as other inverters. The effects of these measures can also be easily and quantitatively confirmed by monitoring the unauthorized Z-phase count indicator 9f5.

FIG. 17 is a diagram for explaining a sixth embodiment of the present invention. 1 to 16, the details of the present invention have been described in the embodiment of the feedback of the electric motor 07a in the rotational phase detector. However, the present invention can be used for the rotational phase detector of the command together with the feedback. Yes, this example illustrates this.
In FIG. 17, 07a and 09a indicate the electric motor and the rotary encoder as in FIG. 14, 5f indicates the rotational phase detector for feedback having the same function as 4 in FIG. 14, and the subscript “f” from 1f to 9f. Those marked with are for processing feedback signals and have the same functions as those marked with the same reference numerals as those in FIG.
In FIG. 17, 01 is a centralized control device, and the centralized control device 01 electronically emulates the operation of the incremental encoder 09a to obtain the rotational phase and rotational speed of the command, the A phase, the B phase, and the Z A phase is generated (refer to Patent Document 2 for the generation of the A phase, the B phase, and the Z phase).
That is, the centralized control device 01 generates and outputs the A phase, the B phase, and the Z phase shown in FIG. Next, the subscript “s” from 1 s to 9 s built in the synchronous control device 06a receives the A phase, the B phase, and the Z phase from the central control device 01 and receives the command of the present invention. The rotational phase detector is configured and has the same function as that of the above-mentioned 1f to 9f with the same number and the suffix “f”. That is, the command rotational phase detector 5s includes a noise canceller 6s, a Z-band generator 7s, an AND gate 8s, a Z-phase monitor 9s, and a rotational phase detection counter 3s. Even when the speed is output, the intrusion of noise is removed and the accurate rotational phase of the command is detected.

Next, 1c and 2c are adder / subtracters, 3c and 4c are a phase deviation amplifier and an adder, respectively. The output of the command rotational speed detector 4s and the output of the feedback rotational speed detector 4f are the same as the adder / subtractor 1c. And a speed deviation is generated and output to the adder 4c. Similarly, the output of the command rotational phase detector 5s and the output of the feedback rotational phase detector 5f are calculated by the adder / subtractor 2c to generate a phase deviation, and the phase deviation is amplified through the phase deviation amplifier 3c. A later phase deviation is output to the adder 4c.
Reference numerals 5c and 6c denote an operational amplifier and a drive unit, respectively, and the adder 4c adds and outputs the phase deviation and speed deviation after the amplification, and the output is converted into a torque command by the operational amplifier 5c. The unit 6c is controlled to drive the electric motor 07a.
Thus, with respect to the command output from the centralized control device 01, the rotational phase detection device 5s for the command always detects the rotational phase of the reliable command without intrusion of noise, and the rotation of the command. The speed detector 4s can detect the rotational speed of the command with higher reliability than the rotational phase. Similarly, the feedback rotational phase and rotational speed of the electric motor 6a with high reliability are detected by the action of the rotational phase detector 5f and the rotational speed detector 4f, and the command of the centralized controller 01 is followed. Realizes accurate synchronization control and position control.

FIG. 18 is a diagram for explaining a seventh embodiment of the present invention, and shows an example in which synchronous control and position control of a plurality of electric motors are performed using the rotational phase detector of the present invention. In FIG. 18, the same reference numerals as those in FIG. 17 denote the same functions, and the description thereof will be omitted. The functions of 06b, 07b, and 09b are the same as those of the synchronous control device 06a, the motor 07a, and the incremental encoder 09a. An example of controlling a plurality of electric motors is shown, and when the number of motors is larger, a synchronous control device incorporating the rotational phase detection device of the present invention may be installed corresponding to the electric motor.
As described above, even when a large number of electric motors are electronically driven at any rotational speed in the shaftless rotary printing press shown in FIG. 19, by using the rotational phase detection device according to the present invention, an incremental encoder is provided. Even when noise enters the Z phase, it is possible to reliably remove the noise and to realize a highly reliable rotational phase detection.

It is a figure explaining Example 1 of the present invention. It is a figure explaining the structure of the noise canceller of this invention. It is a figure explaining operation | movement of a multi-division variable clock generator. It is a figure explaining operation | movement of a noise cut Z phase generator. It is a figure which shows the structure of the 2 division | segmentation variable clock generator of Example 2 of this invention. It is a figure explaining operation | movement of a 2 division | segmentation variable clock generator. It is a figure explaining Example 3 of this invention. FIG. 10 is a diagram for explaining the operation of the third embodiment. It is a figure explaining the structure of a Z band generator. It is FIG. (1) explaining operation | movement of a Z band generator. It is FIG. (2) explaining operation | movement of a Z band generator. It is FIG. (3) explaining operation | movement of a Z band generator. It is a figure explaining Example 4 of this invention. It is a figure explaining Example 5 of this invention. It is a figure explaining the structural example of a Z phase monitor. It is a figure explaining operation | movement of a Z-phase monitoring device. It is a figure explaining Example 6 of this invention. It is a figure explaining Example 7 of this invention. 1 is an embodiment of a shaftless newspaper rotary printing press. It is a figure explaining an incremental encoder. It is a figure explaining an absolute encoder. It is a figure explaining the structure of the detection of the conventional rotation phase and rotation speed. It is FIG. (1) explaining the detection of the conventional rotation phase. It is FIG. (2) explaining the detection of the conventional rotation phase.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Rotation phase detection apparatus 2 Rotation phase detection apparatus 3 Rotation phase detection apparatus 4 Rotation phase detection apparatus 01 Central control apparatus 02 Communication line 03a, 03b, 03c Paper feed part 04a, 04b, 04c Printing paper 05a, 05b, 05c Infeed roll 06a, 06b, 06d, 06e, 06f Synchronous control devices 07a, 07b, 07d, 07e, 07f Electric motors 09a, 09b, 09d, 09e, 09f Incremental encoder (rotary encoder)
10a, 10c Printing unit (yellow)
11a, 11c Printing unit (magenta)
12a, 12c Printing unit (cyan)
13a, 13c Printing unit (black)
10b Printing unit (black)
14a, 14b, 14c Outfeed roll 15f Folding machine 1c, 2c Adder / Subtractor 3c Phase deviation amplifier 4c Adder 5c Operational amplifier 6c Drive unit 1s A phase B phase interface (command A phase B phase interface)
2s Z phase interface (command Z phase interface)
3s Rotation phase detection counter (command rotation phase detection counter)
4s rotation speed detector (command rotation speed detector)
6s Noise canceller (Directive noise canceller)
7s Z-band generator (command Z-band generator)
8s AND gate 9s Z phase monitor (command Z phase monitor)
1f A phase B phase interface (feedback A phase B phase interface) 1f1 AB phase pulse signal 1f2 Rotation direction signal 2f Z phase interface (feedback Z phase interface)
2f1 Z phase signal 3f Rotation phase detection counter (Feedback rotation phase detection counter)
3f1 rotation phase (rotation phase of feedback)
4f Rotational speed detector (Feedback rotational speed detector)
5f Rotational phase detector (feedback rotational phase detector)
4f1 Rotational speed (Feedback rotational speed)
6f Noise canceller (feedback noise canceller)
6f0 Multi-divided variable clock generator 6f1 Divided variable clock generator 6f2 Transmitter 6f3 Divider 6f4 NOT gate 6f5 Selector 6f6, 6f7, 6f8, 6f9 D flip-flops 6f10, 6f11, 6f12, 6f13 AND gate 6f14 OR gate 6f15 Variable Clock signal 6f16 NOT gate 6f17, 6f18 AND gate 6f19 OR gate 6f21 Noise cut Z phase generator 6f22, 6f23, 6f24, 6f25 D flip flop 6f26 AND gate 6f27 NOR gate 6f28 JK flip flop 6f29 Noise canceller Z phase signal 7f Z band generation (Z-band generator for feedback)
7f1, 7f2 Coefficient unit 7f3 Adder / Subtractor 7f4, 7f5 Comparator 7f6 OR gate 7f7 Z band controller 7f8 OR gate 7f12 Z band signal 7f13 Z phase signal by Z band 8f AND gate 9f Z phase monitor (feedback Z phase monitor)
9f1 NOT gate 9f2 AND gate 9f3 Counter 9f4 Noise count value 9f5 Incorrect Z-phase count indicator PZHi Z-band high phase set value PZLo Z-band low phase set value TZon Z-phase enable period TZoff Z-phase disable period

Claims (6)

Incorporates a rotation phase detection counter that generates a pulse train corresponding to the rotation of the rotating device and outputs the output of the Z-phase incremental encoder that generates a Z-phase signal each time the rotating device makes one rotation,
The rotational phase detection counter counts the pulse train output from the Z-phase incremental encoder to obtain an integrated value, and clears the integrated value to zero by the Z-phase signal, thereby obtaining the rotational phase of the rotating device. A rotational phase detection device for detecting a corresponding signal,
A Z-phase signal input side of the rotational phase detection counter is composed of a multi-division variable clock generator and a noise cut Z-phase generator, and a noise canceller for canceling noise included in the Z-phase signal is provided.
The rotation speed calculated from the rotation phase output from the rotation phase detection counter is input to the multi-division variable clock generator, and stepwise from a low frequency to a high frequency according to the rotation speed from zero to the maximum speed. Generate a variable clock signal that switches,
Input the variable clock signal and the Z-phase signal including noise output from the incremental encoder with Z-phase to the noise-cut Z-phase generator;
By shifting the phase of the Z phase signal including the noise by n clock cycles of the clock signal by the variable clock signal, a noise canceller Z phase signal from which noise shorter than n clock cycles is removed is output,
A rotational phase detection device, wherein the noise canceller Z-phase signal is used as a Z-phase input to the rotational phase detection counter. The rotational phase detection device according to claim 1,
The multi-segment variable clock generator generates a variable clock signal that switches in two steps from a low frequency to a high frequency in accordance with the rotational speed from zero to a maximum speed. In the rotation phase detection device according to claim 1 or 2,
Z-band noise prevention means comprising a Z-band generator and a gate circuit is provided,
The rotational phase that is larger than the minimum value of the rotational phase by a first predetermined value set in advance is set as a Z band low phase setting value PZLo, and the rotational phase that is smaller than the maximum value of the rotational phase by a second predetermined value set in advance. When Z band high phase set value PZHi (where PZLo <PZHi)
The Z band generator compares the rotation phase 3f1 output from the rotation phase detection counter with the Z band low phase setting value PZLo and the Z band high phase setting value PZHi, and the rotation phase 3f1 exceeds PZLo and less than PZHi. In this case, a Z-band signal that is inactive is generated, and when the rotational phase 3f1 is PZHi or higher or PZLo or lower, an active Z-band signal is generated .
One input terminal of the gate circuit output of the Z band generator is input also to the other input terminal the noise canceller is provided, the Z-phase signal the phase Z with incremental encoder output Input to the noise canceller, input the output of the noise canceller to the above gate circuit,
The output of the gate circuit is connected to the Z-phase input terminal of the rotation phase detection counter. When the Z-band signal is active, the gate circuit can pass a Z-phase signal including noise, and the Z-band signal is non-transmitted. rotational phase detecting apparatus according to claim <br/> blocking the passage of the Z-phase signal containing noise when active. In the rotation phase detection device according to claim 3 ,
When the motor operates at zero or low speed, the Z-band generator always activates the Z-band signal and inputs the output of the noise canceller to the rotational phase detection counter,
When the motor is operating at a speed exceeding the low speed,
The Z band generator compares the rotation phase 3f1 output from the rotation phase detection counter with the Z band low phase setting value PZLo and the Z band high phase setting value PZHi, and the rotation phase 3f1 exceeds PZLo and less than PZHi. A Z-band signal that is non-active is generated when, and a Z-band signal that is active when the rotational phase 3f1 is PZHi or more or PZLo or less,
The gate circuit allows the output of the noise canceller to pass when the Z-band signal is active, and blocks the passage of the output of the noise canceller when the Z-band signal is inactive. Detection device. In the rotation phase detection device according to claim 3 or 4 ,
A Z-phase monitor that receives the Z-band signal output from the Z-band generator and the input signal to the noise canceller that is the output of the incremental encoder with Z-phase;
The Z-phase monitor includes a counter that counts the number of signals input to the noise canceller when the Z-band signal is inactive, and an illegal Z-phase count indicator that displays the output of the counter,
A rotational phase detection device that detects the number of times noise is mixed in a Z-phase signal generated by the output of the incremental encoder with Z-phase by monitoring the illegal Z-phase count indicator. Centralized control device, a plurality of electric motors, an incremental encoder with a Z phase for detecting rotation of the electric motor, a rotational phase detector for command corresponding to the centralized control device, and a plurality of feedbacks corresponding to the number of the motors And a control device for controlling the electric motor,
The incremental encoder with Z phase generates a pulse train corresponding to the rotation of the electric motor and generates a Z phase signal every time the rotating device makes one rotation,
The centralized control device electronically emulates the function of the incremental encoder with Z phase, and outputs a pulse train corresponding to the rotation phase command and the rotation speed command and a Z phase signal for each rotation,
A synchronous control device for synchronizing the rotational phase and rotational speed of the electric motor with the rotational phase command and rotational speed command of the centralized control device;
As the rotational phase detection device for command and the rotational phase detection device for feedback, the rotational phase detection device of claim 3 , 4 or 5 is used,
The control device calculates a rotational speed command and a rotational speed from a rotational phase command and a rotational phase output from the rotational phase detector for command and the rotational phase detector for feedback, respectively. Find the speed deviation of
Further, from the rotational phase command and rotational phase output by the rotational phase detector for command and the rotational phase detector for feedback, a phase deviation is obtained,
A synchronous control device, wherein the rotational phase and rotational speed of the electric motor are controlled based on the speed deviation and the phase deviation so as to coincide with the rotational phase command and the rotational speed command, respectively.

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