JP4260863B2 - Color signal synthesis circuit - Google Patents

Description

  The present invention relates to a color signal generation and synthesis circuit.

  For example, in a digital camera, a captured video is displayed on a monitor, and character information such as a shooting date, time, and counter is displayed so as to be superimposed on the video. In addition, by performing predetermined button operations, various menus are displayed overlaid on the captured video. Data displayed in such a manner as to be superimposed on a photographed video or the like is referred to as OSD (On screen display) data.

  Recently, multicolored images are used for images such as character information displayed superimposed on a captured image. Thereby, it is possible to improve the GUI such as changing the color according to the content of the information to be displayed or performing gradation display.

  In addition, for a target pixel that displays a superimposed image, a transparent superimposed display is performed by mixing a color for displaying character information and the like and a color to be displayed based on the captured image at a predetermined mixing ratio. Is possible. Thereby, it is possible to add various changes to the display on the monitor together with the multicolor display.

  However, in order to use various colors for superimposed display, there is a problem that a large storage capacity is required for storing the color information. This problem is particularly important in electronic devices such as digital cameras and digital movies that are becoming more compact and cost-saving.

  7 to 9 are circuit diagrams of color signal synthesizing circuits that have been conventionally implemented. FIG. 7 is a circuit diagram of color signal synthesis that enables overlay display in 16 colors. FIGS. 8 and 9 are color signal combinations that allow overlay display in 256 colors. It is a circuit diagram. Note that the processing flow of these circuits and the detailed description of the circuits are the same as the description of the embodiment of the present invention, so the description thereof is omitted here.

  In the case of 16 colors (FIG. 7) using 4 bits of data per pixel for superimposed display, the color storage unit 141 has 16 color registers (color registers 0 to 15). For 256 colors corresponding to 8 bits of data (FIG. 8), the color storage unit 151 has 256 color registers (color registers 0 to 255). For this reason, as the number of colors increases, there is a problem that the circuit scale increases, leading to an increase in cost and power consumption.

  In FIG. 9, an SRAM is employed as the color storage unit 161. In this case, as shown in FIG. 8, the circuit scale can be made smaller than having 256 color registers, but there is a problem that the cost increases.

  In view of the above problems, an object of the present invention is to provide a signal synthesizing technique that enables multi-color overlay display on a monitor without increasing the circuit scale.

In order to solve the above-mentioned problem, the invention described in claim 1 is a circuit for synthesizing the first video digital signal and the second video digital signal, and the input second video digital signal is a color designating a color. A) a color signal corresponding to the type of color that can be designated by the color designation signal, including a designation signal and a signal that designates a mixture ratio (hereinafter referred to as a mixing ratio designation signal). Means for outputting a corresponding color signal when the color designation signal stored in the means and included in the video digital signal is input; and b) represented by the first video digital signal based on the mixing ratio designation signal And a means for outputting a synthesized color signal obtained by synthesizing the color represented by the color signal and the color represented by the color signal , wherein the color signal storage means further includes the first video digital signal and the second video digital signal. The mixing ratio of each color signal The color signal synthesis circuit further includes c) a long bit including the color designation signal and the mixture ratio designation signal. A designation means for designating a case where the second video digital signal is inputted as a signal and a case where the second video digital signal is inputted as a short bit signal consisting only of the color designation signal; and d) designation of the designation means Based on the mixing ratio designation signal by executing the processing of the means a) and the processing of the means b) when the long bit signal is input. A synthesized color signal obtained by synthesizing the color represented by the first video digital signal and the color represented by the color signal, and d-2) when the short bit signal is input, the means a ) To obtain a color signal corresponding to the color designation signal. And characterized in that it comprises, based on the mixture ratio determining signal, and means for the color signal and outputs the synthesized composite color signal obtained from the color and said means a) represented by the first digital video signal To do.

According to a second aspect of the invention, in the color signal combining circuit according to claim 1, wherein the color signal storage means, Y signal, Cb signal, accumulates the Cr signal as the color signal, it is characterized.

According to a third aspect of the invention, in the color signal combining circuit according to claim 1, wherein the color signal storage means, Y signal, Cb signal, Cr signal, for accumulating the mixing ratio determining signal, characterized in that .

According to a fourth aspect of the present invention, in the color signal synthesizing circuit according to any one of the first to third aspects, the first video digital signal is a captured video signal captured by a digital camera, and the second video The digital signal is an accompanying information signal to be displayed superimposed on the photographed video signal.

As described above, according to the first aspect of the present invention, the second video digital signal includes a signal designating the mixing ratio, thereby modulating the transparency with the first video digital signal and providing rich expressive power. It is possible to perform a composite display.
Furthermore, it is possible to select the setting of the transparency of the synthesis process by the second video digital signal itself that is the input signal and the selection of reducing the number of bits of the second video digital signal. A highly configurable structure can be obtained.

According to the second aspect of the present invention, since the color signals stored in the color signal storage means are Y, Cb, and Cr signals, the configuration is wide.

According to the third aspect of the present invention, the color signal stored in the color signal storage means is the Y, Cb, Cr signal and the mixing ratio determination signal, so that the configuration is wide.

According to the fourth aspect of the present invention, the color composition circuit can be applied to a digital camera so that it can be applied to superimposed display of photographed video and character information.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a functional block diagram of a color processing apparatus 1 including a color signal synthesis circuit 4 according to first to fifth embodiments of the present invention.

  The color processing apparatus 1 includes an image input unit 2 that performs input and preprocessing of color signals, a storage unit 3 that stores color signals processed in the image input unit 2, and image data XD stored in the storage unit 3. A color signal synthesis circuit 4 for synthesizing the OSD data YD and a display unit 5 for displaying an output signal of the color signal synthesis circuit 4 are included.

  The storage unit 3 is, for example, a semiconductor memory such as SDRAM, and the display unit 5 is configured by a liquid crystal monitor, for example.

  The color processing apparatus 1 is incorporated in a digital camera, for example. In this case, the image data XD input in the image input unit 2 is data of a captured video captured by a digital camera, and the OSD data YD displays character information and the like that are displayed superimposed on the image data XD. Video data.

{Embodiment 1}
Next, Embodiment 1 of the present invention will be described. FIG. 2 is a functional block diagram of the color signal synthesis circuit 4 according to the first embodiment.

  This circuit inputs 24-bit image data XD and 8-bit OSD data YD. The lower 4 bits of the OSD data YD are a color designation signal As that designates a basic color used for overlay display, and the upper 4 bits act on the luminance signal Y to change the basic color. The color change signal Ex.

  In addition, the color signal synthesis circuit 4 includes a color storage unit 41 including 16 color registers 0 to 15. The color storage unit 41 also has a function as a selector, and also has a function of outputting a corresponding color signal when any color register number is designated by the color designation signal As.

  Each color register stores 28-bit data, and the breakdown includes 8 bits each of Y value, Cb value, and Cr value as color separation component signals, and image data XD and OSD data YD 4 bits of a mixing rate determination signal T1 for determining a ratio (which may be considered as transmittance) for mixing.

  In this embodiment, the format of the color register is as follows: 0 to 7 bits: Y value of 8 to 15 bits: Cb value of 16 to 23 bits: Cr value of 24 to 27 bits: T1 Therefore, the color component is composed of the lower 24 bits. Will be.

  In the present embodiment, the mixing rate determination signal T1 is set to nine values from 0 to 8. When this value is set to 0, 100% image data XD is displayed for the pixel. When this value is set to 1, 2,..., OSD data YD is mixed at a ratio of 1/8, 2/8,. When 8 is set to this value, 100% OSD data YD is displayed.

  When the register number is designated by the color designation signal As and the color signal of the designated color register is output from the color storage unit 41, these signals are the luminance signal Y and other signals Cb, Cr excluding the luminance signal. , T1.

  Then, the luminance signal Y is multiplied by the color change signal Ex which is the upper 4 bits of the OSD data YD in the arithmetic unit 42. As a result, a change is added to the luminance component of the color output from the color storage unit 41. Since the upper 4 bits of the OSD data YD are multiplied, the luminance component can be changed to a maximum of 16 patterns.

  In the computing unit 42, the number of bits of the luminance component is increased by 4 bits. However, in the computing unit 43, the uppermost 1 bit is discarded while performing a shift calculation to the right by 3 bits and applying a limiter, and the lower 3 bits. Adjust the number of bits by performing a truncation operation. At this time, the color change signal Ex may be determined so that a change of 16 patterns of luminance components is ensured even by truncation of a total of 4 bits.

  Then, the signal in which the luminance component is changed and the bit is adjusted (this signal is hereinafter referred to as a Y change signal) is merged with the other signals (Cb signal, Cr signal, mixing ratio determination signal T1) again. .

  Next, the mixing rate determination signal T1 is branched from other signals from the merged signal. The other signals, that is, the Y change signal, the Cb signal, and the Cr signal are input to the calculator 46. On the other hand, the mixing ratio determination signal T <b> 1 is branched in two directions, one being input to the calculator 46 and the other being input to the calculator 44.

  The computing unit 44 is a signal for calculating the mixing ratio on the image data XD side. As described above, since the mixing rate determination signal T1 can take a value from 0 to 8, the computing unit 44 subtracts the value specified by the mixing rate determination signal T1 from 8 to obtain the value on the image data XD side. Calculate the mixing ratio.

  In the computing unit 45, each color component of the input image data XD is multiplied by the mixing ratio calculated by the computing unit 44. On the other hand, the calculator 46 multiplies the Y change signal, Cb signal, and Cr signal output from the color storage unit 41 by the mixing rate determination signal T1.

  Although the description has been simplified here, in practice, when the mixing ratio determination signal T1 indicates a value of X, the calculator 46 multiplies each signal value by X / 8, and the calculator 45 Then, each signal value is multiplied by (8−X) / 8.

  Finally, in the adder 47, the signals of the same color separation components of the outputs of the multiplier 45 and the multiplier 46 are added to output a composite color signal.

  The output composite color signal is an 8-bit signal for each of Y, Cb, and Cr, and the composite video is displayed on the display unit 5.

  As described above, in the present embodiment, the color storage unit 41 includes 16 color registers. However, by using the color change signal Ex composed of the upper 4 bits of the OSD data YD, 16 color registers are used. This is equivalent to providing a modulation of the pattern and consequently preparing a color palette of 256 colors. That is, in the conventional circuit, 256 colors can be supported by the circuit configuration that can only hold 16 colors, so that the circuit scale can be reduced and the cost can be reduced.

{Embodiment 2}
Next, Embodiment 2 will be described with reference to FIG. The basic circuit configuration of the second embodiment is substantially the same as that of the first embodiment. Therefore, the description of the same configuration as that of Embodiment 1 is omitted.

  In the second embodiment, the number of bits of the input OSD data YD can be selected from two patterns of 8 bits and 4 bits. As in the first embodiment, the 8-bit OSD data YD is the color change signal Ex that changes the luminance signal in the upper 4 bits, and the color designation signal As that specifies the color in the lower 4 bits. In contrast, the 4-bit OSD data YD includes only a color designation signal As that designates a color.

  In this embodiment, two selectors 52 and 53 for switching input OSD data YD, and a selection instruction unit 51 for sending selection information to each selector 52 and 53 are provided.

  In the selection instruction unit 51, “1” is set when selecting the 8-bit OSD data YD, and “0” is set when selecting the 4-bit OSD data YD. The selection instructing unit 51 sets selection information in accordance with an instruction from a control unit (not shown) (functional unit that controls the whole, such as a CPU), and sends the selection information to the selectors 52 and 53.

  The operation of the circuit when “1” is set in each of the selectors 52 and 53 is the same as in the first embodiment.

  Next, the operation of the circuit when “0” is set in each of the selectors 52 and 53 will be described.

  Also in this case, as in the first embodiment, the color register is designated by the color designation signal As composed of the entire OSD data YD, and a 28-bit color signal is output. Further, similarly, the Y signal is separated from the color signal, input to the computing unit 42 and multiplied by the output from the selector 52. Here, when the selection information is “0”, the selector 52 outputs a value for shifting the Y signal by 8 times, that is, 3 bits to the left, so that the Y signal is shifted to the left by 3 bits in the computing unit 42. Is done. Since the arithmetic unit 43 performs an operation of shifting 3 bits to the right, the Y signal is output without change.

  Then, the Cb signal, the Cr signal, and the Y signal are merged again, and thereafter, the same processing as in the first embodiment is performed. However, in this case (when the OSD data YD is 4 bits), since the Y signal is not modulated, it is possible to use only 16 colors accumulated in the color storage unit 41 as colors for overlay display. is there.

  As described above, in the second embodiment, when the OSD data YD to be input is switched between 4 bits and 8 bits in the configuration including one color storage unit 41 including 16 color registers, the OSD data YD of 8 bits is input. In the case of 256-color overlay display, when 4-bit OSD data YD is input, 16-color overlay display can be performed. Accordingly, in an electronic device or the like in which the color composition circuit 4 is incorporated, the input data size is increased to use a large number of colors, or the input data size is decreased if the colors may be reduced to some extent. It is possible to design according to the usage.

{Third embodiment}
Next, Embodiment 3 will be described with reference to FIG. In the third embodiment, the input OSD data YD is 8 bits, and the upper 4 bits are a mixing rate specifying signal T2 that specifies the mixing ratio of the image data XD and the OSD data YD, and the lower 4 bits are the basics. Is a color designation signal As for designating a color to be.

  The color storage unit 41a includes 16 color registers. Each of the color registers 0 to 15 accumulates data of 8 bits each for Y signal, Cb signal, and Cr signal, and 24 bits in total.

  In this embodiment, the format of the color register is as follows: 0 to 7 bits: Y value 8 to 15 bits: Cb value 16 to 23 bits: Cr value Therefore, unlike the first and second embodiments, the mixing ratio The determination signal T1 is not included, and only the color component signal is included.

  The color storage unit 41a has a function as a selector and also has a function of outputting a color signal from a color register number designated by the color designation signal As. The output color signal is input to the calculator 46.

  The mixing ratio designation signal T2 is branched in two directions, and one is input to the calculator 46. The other is input to the calculator 44, and the mixing ratio on the image data XD side is calculated. The calculated mixing ratio is input to the calculator 45. Thereafter, as in the first embodiment, the image data XD and the OSD data YD are respectively multiplied by the mixing ratio, and then added by the calculator 47 and output.

  As described above, according to the third embodiment, the transmittance that can be expressed for each pixel is modulated by including the signal that specifies the mixing ratio in the input OSD data YD without increasing the number of color registers. Is possible. Therefore, even if the circuit scale is the same as that of the conventional circuit for 16 colors, it is possible to display information with more expressive power.

{Embodiment 4}
Next, Embodiment 4 will be described with reference to FIG. The fourth embodiment is an expanded embodiment of the third embodiment, and the OSD data YD to be input can be switched between 8 bits and 4 bits.

  The 8-bit OSD data YD is a mixing rate specifying signal T2 for specifying the mixing ratio of the image data XD and the OSD data YD in the upper 4 bits, and the color specifying signal As for specifying the basic color in the lower 4 bits. is there. The 4-bit OSD data YD is data including only a color designation signal As that designates a basic color.

  In this embodiment, a selector 53 for switching the input OSD data YD, a selection instruction unit 51 for sending selection information to the selector 53, a selector 62 for selecting a signal to be used for the mixing ratio, A selection instruction unit 61 for sending selection information to the selector 62 is provided.

  In the selection instruction unit 51, “1” is set when selecting the 8-bit OSD data YD, and “0” is set when selecting the 4-bit OSD data YD.

  In the selection instruction section 61, “1” is set when the mixing ratio designation signal T2 is selected, and “0” is set when the mixing ratio determination signal T1 is selected.

  The operation of the circuit when “1” is set in the selector 53 and “1” is set in the selector 62 is substantially the same as in the third embodiment. However, unlike the third embodiment, the color storage unit 41 outputs a 28-bit color signal including the mixing rate determination signal T1, but the mixing rate determination signal T1 is not used, and is not included in the OSD data YD. The combining process is performed using the mixing ratio designation signal T2.

  Next, the operation of the circuit when “0” is set in the selector 53 and “0” is set in the selector 62 will be described.

  In this case, the color register is designated by the color designation signal As composed of the entire 4-bit OSD data YD, and a 28-bit color signal is output. Next, the T1 signal is separated from the color signal and input to the selector 62. Here, since “0” is set in the selector 62, the T1 signal is output.

  One of the output T1 signals is input to the calculator 46, and the other is calculated by the calculator 44 on the image data XD side, and the calculated value is input to the calculator 45. The arithmetic units 45 and 46 multiply the respective mixing ratios, and then the arithmetic unit 47 adds the signals of the respective color separation components and outputs a composite signal.

  As described above, in the fourth embodiment, when the OSD data YD to be input is switched between 4 bits and 8 bits in the configuration including one color storage unit 41 including 16 color registers, the 8-bit OSD data YD is input. In this case, the transmissivity of the superimposed display is modulated using the mixing ratio designation signal T2 included in the OSD data YD, and when the 4-bit OSD data YD is input, it is stored in the color storage unit 41. Color composition processing according to the mixing ratio is performed. Therefore, in an electronic device or the like in which the color composition circuit 4 is incorporated, by increasing the size of the input data, the transparency can be freely modulated by the input data, or the transmittance uses a fixed value in the color register. Instead of this, it is possible to design according to the application such as reducing the size of input data to save memory.

{Embodiment 5}
The fifth embodiment includes the first to fourth embodiments described so far.

In this embodiment, there are three types of OSD data YD to be input as follows: (1) Upper 4 bit color change signal Ex; Lower 4 bit color designation signal As
(2) Upper 4 bits mixing ratio designation signal T2; Lower 4 bits color designation signal As
(3) Only the 4-bit color designation signal As That is, (1) and (2) are 8 bits in total, and (3) is 4 bits in total.

  The color signal synthesis circuit 4 according to the present embodiment sets three selectors 52, 53, 62, a selection instruction unit 51 for setting selection information in the selectors 52, 53, and selection information in the selector 62. And a selection instructing unit 61.

  The selection instruction unit 61 and the selector 52 are connected via an inverter 63 and an AND circuit 64, and the selection instruction unit 51 and the selector 52 are connected via an AND circuit 64. Therefore, when “1” is set in the selection instruction unit 51 and “0” is set in the selection instruction unit 61, the selection information “1” is sent to the selector 52. Selection information “0” is sent to 52.

  In the following, the operation of the color synthesis circuit 4 will be described with the input OSD data YD divided into the cases (1), (2), and (3).

<1. When OSD data is (1)>
“1” is set in the selection instruction unit 51 and “0” is set in the selection instruction unit 61. Therefore, selection information “1”, “1”, and “0” are sent to the selectors 52, 53, and 62, respectively.

  In this case, the same operation as in the first embodiment is performed. That is, the OSD data YD designates a basic color by the color designation signal As and modulates the luminance component of the basic color by the color change signal Ex. Then, using the mixing ratio determination signal T1 stored in the color register, the image data XD and OSD data YD are combined.

<2. When OSD data is (2)>
“1” is set in the selection instruction section 51 and “1” is set in the selection instruction section 61. Accordingly, selection information “0”, “1”, and “1” are sent to the selectors 52, 53, and 62, respectively.

  In this case, the same operation as in the third embodiment is performed. That is, the color for overlay display is designated by the color designation signal As of the OSD data YD, and the transparency of the overlay display is modulated by the mixing ratio designation signal T2 included in the OSD data YD. However, unlike Embodiment 3, the color signal output from the color storage unit 41 includes the T1 signal, but the T1 signal is not used.

<3. When OSD data is (3)>
“0” is set in the selection instruction section 51 and “0” is set in the selection instruction section 61. Accordingly, selection information “0”, “0”, and “0” are sent to the selectors 52, 53, and 62, respectively.

  In this case, in the second and fourth embodiments, the same operation as when 4 bits of OSD data YD is input is performed. That is, the OSD data YD includes only the color designation signal As. Depending on the OSD data YD, the luminance component and the transmittance are not modulated, and the OSD data YD is based on the mixing rate determination signal T1 stored in the color storage unit 41. The transparency is determined. Therefore, in this mode, the operation is the same as that of the conventional synthesis circuit shown in FIG.

  As described above, in the fifth embodiment, it is possible to switch and use the composite display mode according to various applications. When you want to display vivid information of 256 colors, or when you want to display gradation with fine transparency settings, you can use 8-bit data as OSD data YD, and you want to save memory. The OSD data YD can be set to 4 bits and the same operation as that of the conventional circuit can be performed.

  The first to fifth embodiments described above have been described as the color signal synthesis circuit for synthesizing the image data XD and the OSD data YD. However, the input is performed except for the mixing process with the image data XD in the color synthesis circuit. As a color signal generation circuit that generates a color based on the OSD data YD, it can be applied to other purposes independently.

{Modifications}
In each of the above-described embodiments, the number of superimposed display colors is increased to 256 by modulating the luminance component while including the 16 color registers. However, if the number of bits of the OSD data YD can be further increased, the modulation pattern of the luminance component can be further increased by increasing the number of bits of the color change signal Ex.

  Similarly, if the number of bits of the OSD data YD can be increased, it is possible to further increase the transmittance modulation pattern by increasing the number of bits of the mixing rate designation signal T2.

  In each of the above embodiments, the Y signal, which is a luminance component, is modulated among the Cb, Cr, and Y signals, but other color separation components Cb and Cr signals may be modulated.

  In each of the above embodiments, the Y, Cb, Cr space is described as an example of the color space. However, the color signal synthesis circuit of the present invention can be applied to other color spaces (RGB system, XYZ system). is there.

1 is an overall view of an image processing circuit using a color signal synthesis circuit according to the present invention. 1 is a diagram illustrating a color signal synthesis circuit according to a first embodiment; 4 is a diagram illustrating a color signal synthesis circuit according to a second embodiment; FIG. FIG. 6 is a diagram illustrating a color signal synthesis circuit according to a third embodiment. FIG. 6 is a diagram illustrating a color signal synthesis circuit according to a fourth embodiment. FIG. 10 is a diagram illustrating a color signal synthesis circuit according to a fifth embodiment; It is a figure which shows the 1st prior art example of a color signal synthetic | combination circuit. It is a figure which shows the 2nd prior art example of a color signal synthetic | combination circuit. It is a figure which shows the 3rd prior art example of a color signal synthetic | combination circuit.

Explanation of symbols

4 color signal synthesis circuit 41 color storage unit As color designation signal Ex color change signal T1 mixing rate determination signal T2 mixing rate designation signal XD image data YD OSD data

Claims (4)

A circuit that synthesizes a first video digital signal and a second video digital signal, and the input second video digital signal includes a color designation signal that designates a color and a signal that designates a mixing ratio (hereinafter, mixing ratio). And a designated signal)
a) A color signal corresponding to the type of color that can be designated by the color designation signal is accumulated in a color signal accumulation means, and when the color designation signal included in the video digital signal is input, the corresponding color signal is output. Means,
b) means for outputting a synthesized color signal obtained by synthesizing the color represented by the first video digital signal and the color represented by the color signal based on the mixing ratio designation signal ;
The color signal storage means further stores a signal for determining a mixing ratio of the first video digital signal and the second video digital signal for each color signal (hereinafter referred to as a mixing ratio determination signal). The color signal synthesis circuit further includes:
c) When the second video digital signal is inputted as a long bit signal including the color designation signal and the mixing ratio designation signal, and the second video digital signal is inputted as a short bit signal consisting only of the color designation signal A specifying means for specifying when to perform, and
d) means for performing processing according to the designation of the designation means, that is,
d-1) When the long bit signal is input, the processing of the means a) and the processing of the means b) are executed to express the first video digital signal based on the mixing ratio designation signal. A combined color signal obtained by combining the color represented by the color signal and the color represented by the color signal,
d-2) When the short bit signal is input, the color signal corresponding to the color designation signal is acquired by the means a) and expressed by the first video digital signal based on the mixing ratio determination signal. Means for outputting a synthesized color signal obtained by synthesizing the color signal obtained and the color signal obtained from the means a);
A color signal synthesizing circuit comprising: 2. The color signal synthesis circuit according to claim 1, wherein the color signal accumulation means accumulates a Y signal, a Cb signal, and a Cr signal as the color signal . 2. The color signal synthesis circuit according to claim 1 , wherein the color signal storage means stores a Y signal, a Cb signal, a Cr signal , and the mixing ratio determination signal . 4. The color signal synthesis circuit according to claim 1, wherein the first video digital signal is a captured video signal captured by a digital camera, and the second video digital signal is converted into the captured video signal. 5. A color signal synthesizing circuit which is an accompanying information signal to be displayed in a superimposed manner .

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