JP4282515B2 - Method for manufacturing component-embedded board and board management apparatus - Google Patents

Description

  The present invention relates to a method for manufacturing a component-embedded substrate in which, for example, an LSI is housed in a component embedding layer called a composite layer, and the component embedding layer is sandwiched between a first substrate and a second substrate, and the manufacturing method The present invention relates to a board management apparatus for selecting the first board, the second board, and the component embedding layer suitable for execution.

There is a component built-in module in which an electronic component is embedded in a composite layer between an upper substrate and a lower substrate. The upper substrate is a substrate in which wiring patterns are formed in a plurality of layers, and a plurality of identical circuit configurations are formed in a lattice pattern on the upper substrate. The lower substrate is also a substrate in which wiring patterns are formed in a plurality of layers, has the same shape and dimensions as the upper substrate, and forms a plurality of identical circuit configurations in a grid pattern. An electronic component of an active component is mounted on each circuit component on the lower substrate. The composite layer has the same shape and dimensions as the upper substrate and the lower substrate, and is made of an electrically insulating material that embeds an active component mounted on the lower substrate, and electrically connects the upper substrate and the lower substrate. Vias that connect electrically. The component built-in module is formed by laminating a composite layer between an upper substrate and a lower substrate configured as described above to form a multilayer substrate, and the multilayer substrate corresponds to each of the circuit components described above. It is made by cutting. In this way, a plurality of component built-in modules are produced from one multilayer substrate. (For example, see Patent Document 1)
JP 2002-261449 A

  As described above, a plurality of circuit components are formed on the upper substrate and the lower substrate, and all circuit components do not always function normally due to defects in the manufacturing process of each substrate. In the composite layer, defects may occur when the via is formed. Even if the circuit components on the upper substrate and the lower substrate corresponding to the region having the via where the defect has occurred are normal, the component built-in module having the defective via is regarded as a defective product when stacked as described above. Become. The electronic component mounted on the lower substrate is, for example, an LSI, and occupies a relatively high ratio in the cost of the component built-in module. In addition, after lamination, electronic components are also mounted on the upper substrate. Therefore, electronic components should not be mounted on the circuit components having defects or on the circuit components corresponding to defective vias from the viewpoints of cost reduction and improvement of the yield rate of the component built-in module.

  Conventionally, when mounting components on a single printed circuit board instead of the multilayer substrate as described above, a circuit defect portion is inspected and component mounting is not performed on the defective portion. However, as described above, it is difficult to determine whether component mounting is possible in a multilayer board in which a plurality of circuit components exist on one board and the plurality of boards are stacked. In addition to the occurrence of defects in the circuit components and vias, defects also occur in the electronic component mounting process, the laminating process, and the like. Therefore, in order to reduce the cost and improve the yield rate of the component built-in module, quality control of the upper substrate, the lower substrate, and the composite layer is required in the entire production process of the component built-in module.

  The present invention responds to such a demand, and can improve the yield rate of a component built-in module, and a method for producing a component built-in substrate, and a first substrate and a second substrate suitable for executing the method. Another object of the present invention is to provide a board management apparatus for selecting a component embedding layer.

In order to achieve the above object, the present invention is configured as follows.
That is, the method for manufacturing a component-embedded substrate according to the first aspect of the present invention includes a first substrate partitioned into a plurality of regions independent from each other, and a second substrate partitioned into a plurality of regions independent from each other. A component embedding layer that is divided into a plurality of regions and embeds an electronic component mounted on the second substrate, and the component embedding layer is sandwiched between the first substrate and the second substrate. In the manufacturing method of the built-in substrate,
Prior to mounting the electronic component on the second substrate, not only the second component mounting non-region information indicating the defective region of the second substrate but also the first component non-mounting region indicating the defective region of the first substrate. A component mountable area in which the electronic component can be mounted on the second substrate is obtained based on the information, and the electronic component is mounted in the component mountable area.

  According to the manufacturing method, before mounting the component on the second board, not only the second component mounting non-mountable area information but also the first component non-mounting area information of the first board is acquired. Thereby, the following methods (1) and (2) can be adopted. In (1), when component mounting is performed on the second board, electronic components are mounted in both component non-mountable regions based on both information of the first component non-mountable region information and the second component non-mountable region information. Use a method that does not. In short, when an electronic component is mounted on a substrate on which an electronic component incorporated in a finished product, that is, a second substrate is mounted, the second substrate is referred to by referring to the first component non-mountable area information on another substrate, that is, the first substrate. It is intended to determine the quality of the implementation. In (2), based on the first component non-mountable region information and the second component non-mountable region information, the second component non-mountable region information having the same non-mountable region information as the first component non-mountable region information is included. Two substrates are extracted. In other words, based on the first component mounting non-mountable area information and the second component mounting non-printable area information, the first board and the second board that match both information are extracted in advance as a pair. Then, when mounting the component on the second substrate, the component mounting is performed in the region where the component mounting of the second substrate is possible based on the second component mounting impossible region information, and the component embedding layer is placed on the first substrate and the second substrate. When sandwiching between the substrates, a method of using the first substrate set in the pair is employed. For example, when an area free from defects on the first board corresponds to an area where components cannot be mounted on the second board, the component-embedded module manufactured in these areas is normal in the first board. Nevertheless, it becomes a defective product. However, according to the method (2), since the component mounting unusable areas of the first board and the second board are completely matched, it is possible to prevent the non-defective board from being wasted.

The method for manufacturing a component-embedded substrate according to the second aspect of the present invention includes a first substrate partitioned into a plurality of regions independent from each other, and a second substrate partitioned into a plurality of regions independent from each other. A component embedding layer that is divided into a plurality of regions and embeds an electronic component mounted on the second substrate, and the component embedding layer is sandwiched between the first substrate and the second substrate. In the manufacturing method of the built-in substrate,
After mounting the electronic component on the second substrate, a recess for accommodating the electronic component is formed in the component embedding layer corresponding to the mounted electronic component, and after the formation, the second component after mounting the component is formed. The first substrate having the same first component non-mounting area as the total defective area obtained by adding the two defective boards and the respective defective areas in the component embedding layer after the formation of the recess is extracted, and after the component mounting The component-embedded substrate is formed by stacking the second substrate, the component embedding layer after the formation of the recess, and the extracted first substrate.

The substrate management apparatus according to the third aspect of the present invention includes a first substrate partitioned into a plurality of independent regions, a second substrate partitioned into a plurality of independent regions, and a plurality of regions independent of each other. A component embedded layer that embeds the electronic component mounted on the second substrate and is embedded between the first substrate and the second substrate to manufacture a component-embedded substrate. In addition, in the board management apparatus for managing information on the first board, the second board, and the component embedding layer,
A storage device for storing second component non-mountable area information indicating a defective area on the second board, and first component non-mountable area information indicating a defective area on the first board;
A reading unit that reads out the second component mounting impossible area information and the first component mounting impossible area information from the storage device, and the read out the second component mounting impossible area information and the first component mounting impossible area information A control device having a mountable area determining unit for obtaining a mountable area on which the electronic component can be mounted on the second substrate,
It is provided with.

  In the third aspect, the control device is identical to the first component non-mountable region information from the second component non-mountable region information and the first component non-mountable region information read by the reading unit. An extraction unit for extracting the second board having the second component mounting impossible area information extracted and extracted from the second component mounting impossible area information may be further included.

  The extraction unit includes second component non-mountable region information having the same non-mountable region information as the first component non-mountable region information based on the first component non-mountable region information and the second component non-mountable region information. Two substrates are extracted. In other words, the extraction unit extracts in advance a pair of the first board and the second board in which both pieces of information match based on the first component non-mountable area information and the second component non-mountable area information. By providing the extraction unit, when the component is mounted on the second board, the component is mounted in an area where the component can be mounted on the second board on the basis of the second component non-mountable area information. When the substrate is sandwiched between the first substrate and the second substrate, the first substrate set in the pair can be used. For example, when an area free from defects on the first board corresponds to an area where components cannot be mounted on the second board, the component-embedded module manufactured in these areas is normal in the first board. Nevertheless, it becomes a defective product. However, by including the extraction unit, it is possible to completely match the component non-mountable areas of the first board and the second board, so that it is possible to prevent the non-defective board from being wasted.

According to the manufacturing method of the component-embedded board of the first aspect and the board management device of the third aspect, since both information of the first component mounting unmountable area information and the second component mounting unmountable area information are acquired, the second When components are mounted on the board, component mounting is not performed in the areas corresponding to both of the above-described component unmountable areas. Therefore, it is possible to prevent wasteful consumption of electronic components. Accordingly, it is possible to improve the yield rate of the component built-in module incorporating the electronic component.
In addition, based on the first component non-mountable area information and the second component non-mountable area information, the first board and the second board having the same information can be extracted in advance as a pair. Therefore, when mounting the component on the second substrate, the component mounting is performed in the region where the component mounting of the second substrate is possible based on the second component mounting impossible region information, and the component embedding layer is placed on the first substrate and the first substrate. When sandwiched between two substrates, the first substrate set in the above pair can be used. For example, when a region free from defects on the first substrate corresponds to a component mounting non-mountable region of the second substrate, the finished product manufactured in these regions is normal even though the first substrate is normal. It becomes a defective product. However, according to the manufacturing method and the board management apparatus described above, since the component unmountable areas of the first board and the second board completely match, it is possible to prevent the non-defective board from being wasted. . In this way, not only wasteful consumption of electronic components can be prevented, but wasteful consumption of non-defective substrates can also be prevented. Accordingly, it is possible to improve the yield rate of the component built-in module incorporating the electronic component.

  In addition, by forming a recess in the component embedding layer corresponding to the electronic component on the second substrate, it is possible to prevent the occurrence of defects caused by the presence of the recess despite the absence of the electronic component. be able to. As the above problem, when the component embedding layer is sandwiched between the first substrate and the second substrate and laminated, the concave portion is deformed so as to be crushed, for example, and the entire component-embedded substrate is distorted.

  Further, according to the method for manufacturing a component-embedded substrate of the second aspect, the summation corresponding to the component mounting on the second substrate and the defects generated until the concave portion is formed in the component embedding layer corresponding to the component mounting. Since the first board having the same first component mounting non-mountable area information as the defective area is used, it is possible to prevent the electronic components already mounted on the second board from being wasted due to the defective area in the first board. be able to. Accordingly, it is possible to improve the yield rate of the component built-in module incorporating the electronic component.

  A method for manufacturing a component-embedded board and a board management apparatus according to an embodiment of the present invention will be described below with reference to the drawings. Here, the board management device selects the first board, the second board, and the component embedding layer in order to select an appropriate first board, second board, and component embedding layer when executing the manufacturing method. It is a device that manages the information that a layer has. In addition, in each figure, the same code | symbol is attached | subjected about the same component.

First, the component built-in substrate will be briefly described. The component built-in substrate may be called a multilayer substrate.
As shown in FIG. 9, in the present embodiment, the component-embedded substrate 101 has the same shape and dimensions as the first substrate 110 except for the thickness, and corresponds to the lower substrate, except for the thickness. And a component embedded layer 130 that has the same shape and dimensions as the first substrate except for the thickness and is sandwiched between the first substrate and the second substrate. The component embedded layer 130 has a thickness. It is manufactured by sandwiching between the first substrate 110 and the second substrate 120 from the direction. As an example, the first substrate 110, the second substrate 120, and the component embedding layer 130 in the present embodiment have a size of 120 mm × 120 mm.
For example, the first substrate 110, the second substrate 120, and the component embedding layer 130 are each divided into, for example, 9 × 9 regions, for a total of 81 regions. The first substrate 110, the second substrate 120, and the component In the buried layer 130, the regions correspond to each other and face each other. Each region 111 in the first substrate 110 has the same circuit configuration, and each region 121 in the second substrate 120 also has the same circuit configuration. Each region 131 in the component embedding layer 130 also has the same configuration.
In addition, in the 1st board | substrate 110, the 2nd board | substrate 120, and the component embedding layer 130, the number of area | regions divided is not limited to said 81 pieces, What is necessary is just to have at least 2 area | regions, respectively.

As shown in FIG. 10, the first substrate 110 and the second substrate 120 are so-called all-layer IVH structure resin multilayer printed wiring boards, commonly referred to as rib substrates, in this embodiment. The rib substrate has a structure in which a plurality of wiring layers 181 are laminated, and the wiring layers 181 and the wiring layers 181 and the electrodes 182 exposed on both surfaces of the substrate are electrically connected by vias 183. Have FIG. 10 shows a cross section of one of the first substrate 110, the second substrate 120, and the component embedding layer 130 cut into each region.
The component embedding layer 130 is a so-called composite layer, and is made of a thermosetting resin material 184 in this embodiment, and has vias 185 for electrically connecting the first substrate 110 and the second substrate 120. Forming.

A rough method for manufacturing the component-embedded substrate 101 will be described below with reference to FIGS. 11 and 12 also show a cross section of one of the pieces cut out for each of the regions as in FIG. Actually, after the first substrate 110, the second substrate 120, and the component embedding layer 130 are stacked to complete the component-embedded substrate 101, each of the regions is cut into individual pieces. The individual piece corresponds to a component built-in module.
In the region 121 of the second substrate 120, for example, an LSI 190 having bumps formed thereon is mounted as an electronic component. In the present embodiment, electronic components are mounted on both the first substrate 110 and the second substrate 120. However, the second substrate 120 is mounted with an expensive electronic component such as the LSI 190 described above. In this respect, the first substrate 110 is distinguished.

  Next, a recess 186 for storing the LSI 190 is formed in the component embedding layer 130 corresponding to the LSI 190. The component embedding layer 130 is actually formed of two layers, and the second layer is overlapped with the first layer in which the through hole is formed to form the recess 186 so as to close the through hole. Thus, the recess 186 is formed. Further, in order to form the via 185 in the component embedding layer 130, in this embodiment, first, through holes are formed in each region 131 in the component embedding layer 130, and then a conductive paste is applied to the through holes. Filling forms a via 185.

Next, the first substrate 110 is placed and laminated on the second substrate 120 and the component embedding layer 130, and the component-embedded substrate 101 shown in FIG. 11 is manufactured. After stacking, as shown in FIG. 12, electronic components such as a memory 191 are mounted on each region 111 of the first substrate 110, and bumps 187 are formed on the electrodes 182 on the back surface side of the second substrate 120. It is formed.
After the component built-in substrate 101 is completed as described above, it is cut according to each region as described above to form the individual pieces, and each individual piece becomes the component built-in module 201 as shown in FIG.

  In the present embodiment, the component-embedded substrate 101 is formed of three layers of the first substrate 110, the second substrate 120, and the component embedding layer 130, but may be configured of four or more layers. Further, as described above, the recess 186 in the component embedding layer 130 is formed only in the region 131 of the component embedding layer 130 corresponding to the region 121 of the second substrate 120 on which the LSI 190 is mounted. It may be formed in the entire region 131 of the layer 130. However, in this case, a dummy LSI that is not a normal product is mounted in the defective area in the area 121 of the second substrate 120. In this embodiment, the via 185 is formed in the entire region 131 of the component embedding layer 130, but only the region 131 of the component embedding layer 130 corresponding to the region 121 where the normal LSI 190 is mounted on the second substrate 120. A via 185 may be formed on the substrate. Of course, the electronic component 191 is not mounted in the defective region 111 of the first substrate 110 after the stacking.

  The component-embedded substrate 101 and the component-embedded module 201 are manufactured according to the processes described above, but the regions 111, 121, and 131 of the first substrate 110, the second substrate 120, and the component embedding layer 130 are originally in the areas. In addition to the presence of the first defects caused by these productions, there are second defects caused during the manufacturing process of the component-embedded substrate 101. The component built-in module 201 formed in the regions 111, 121, and 131 having at least one of the first defect and the second defect becomes a defective product. Therefore, there is a problem that the expensive LSI 190 is wasted, or the component built-in module 201 that has to be discarded while having a normal region is wasted. Therefore, in order to solve the problem, information on the first defect and the second defect is managed for the first substrate 110, the second substrate 120, and the component embedding layer 130, and the wasteful consumption is reduced as much as possible. The manufacturing method of the component built-in substrate 101 and the substrate management apparatus are required to be reduced. The manufacturing method and the substrate management apparatus will be described below.

The board management apparatus will be described.
As shown in FIG. 8, the board management apparatus 301 can be broadly divided into a storage device 310 and a control device 320, and can further include an inspection device 330.
The storage device 310 is a device that stores second component mounting impossible area information indicating a defective area on the second substrate 120 and first component mounting disabled area information indicating a defective area on the first substrate 110. Here, the non-mountable region refers to the LSI 190 or the memory in each region 111 of the first substrate 110 and each region 121 of the second substrate 120 due to structural and electrical defects in, for example, the wiring layer 181 and the electrode 182. Even if an electronic component such as 191 is mounted, this region does not function. Such first component unmountable region information and second component unmountable region information can be obtained in advance from the manufacturer of the first substrate 110 and the second substrate 120, for example. Therefore, the acquired information is stored in the storage device 310 in association with each of the substrates 110 and 120. As a method of associating each of the substrates 110 and 120 with the first component mounting impossible region information and the second component mounting impossible region information, for example, a barcode is attached to the first substrate 110 and the second substrate 120, information There is a way to mount a special chip that stores.

The control device 320 can be configured by, for example, an arithmetic processing device provided in a personal computer or the like, and can be divided into a reading unit 321, a mountable area determination unit 322, and an extraction unit 323 when functionally divided. An arithmetic processing device may be assigned to each of the reading unit 321, the mountable area determination unit 322, and the extraction unit 323. Further, as described later, the control device 320 may further be provided with a non-defective product management information creation unit 324 in terms of functionality.
The reading unit 321 reads out the second component mounting impossible area information and the first component mounting impossible area information from the storage device 310. The mountable area determining unit 322 obtains a component mountable area in which the electronic component can be mounted on the second substrate 120 based on the read second component mount unmountable area information and the first component mount unmountable area information. . The extraction unit 323 uses the second component mounting disabled region information and the first component mounting disabled region information read by the reading unit 321 to obtain the same second component mounting disabled region information as the first component mounting disabled region information. The second board 120 having the extracted second component mounting unusable area information is extracted.

  The inspection device 330 is performed in the manufacturing process of the component-embedded substrate 101, for example, inspection of mounting defects, inspection of through holes in the component embedding layer 130, inspection of filling the through holes with conductive resin material, Each inspection device performs inspection, etc., and sends each inspection result information to the control device 320.

Next, the substrate management apparatus 301 manufactures the component-embedded substrate 101 while managing information on the first defect and the second defect with respect to the first substrate 110, the second substrate 120, and the component embedding layer 130. The method of doing will be described below.
The outline of the manufacturing method of the component built-in substrate is as described above. As shown in FIG. 1, in step 1 (indicated by “S” in the drawing), the first substrate for configuring the component built-in substrate 101 is used. 110, the second substrate 120, and the component embedding layer 130 are prepared. In the preparation process, the first substrate 110 and the second substrate acquire the first component mounting unusable area information and the second component mounting unusable area information, and the second substrate 120 mounts the LSI 190, and checks for mounting defects. The component embedding layer 130 includes formation of the recess 186, defect inspection after the formation, and the like.

In the next step 2, as described above, the first substrate 110, the second substrate 120, and the component are managed from the viewpoint of managing information on the first defect and the second defect and reducing the wasteful consumption as much as possible. A combination of the buried layers 130 is determined. As a method for determining the combination, three determination methods are proposed in this specification as will be described in detail later.
In the next step 3, the first substrate 110, the second substrate 120, and the component embedding layer 130 are stacked based on the combination determined in step 2. In the next step 4, the electronic components such as the memory 191 and the like are stacked. Finishing operations such as mounting and forming bumps 187 are performed.

  Hereinafter, the method for determining the combination of step 2 will be described in detail with reference to the first to third methods. In the drawings to be referred to in the following description, for simplification, the first substrate 110, the second substrate 120, and the component embedding layer 130 are divided into 3 × 3 regions, a total of nine regions. It is shown.

First determination method;
The first determination method will be described with reference to FIGS. In step 11 shown in FIG. 2, the first component mounting impossible area information and the second component mounting impossible area information on the first board 110 and the second board 120 are stored in the storage device 310. More specifically, as shown in FIG. 3A, the first component mounting unusable area information 112 including the component mounting unusable area 112a on one first substrate 110 taken out from the plurality of first substrates 110. Is stored in the storage device 310, and as shown in FIG. 3B, a second component non-mountable region including the component non-mountable region 122a in one second substrate 120 taken out from the plurality of first substrates 110 Information 122 is registered in the storage device 310.
In the present embodiment, the non-defective product management information 351 having the first component mounting impossible area information 112 is created as the first component mounting impossible area information 112 on one first substrate 110 is registered. The non-defective product management information 351 is configured to be sequentially updated as new information is added. Initially, the non-defective product management information 351 equal to the first component mountable region information 112 is added to the first component mountable region information 112 and the second component by adding the second component mountable region information 122 of the extracted second board 120. The product management information 352 having the unmountable area information 122 is updated. Such good product management information is created and updated by the good product management information creation unit 324 in the control device 320.

  In the next step 12, the component mountable area 122 b on the second board 120 is obtained by referring to the non-defective product management information 352 having the first component mountable area information 112 and the second component mountable area information 122. The LSI 190 is mounted in the possible area 122b. More specifically, as shown in FIG. 3C, the reading unit 321 stores the first component non-mountable area information 112 and the second component non-mountable area information 122 from the storage device 310, that is, non-defective product management information 352. And the mountable area determining unit 322 obtains the component mountable area 122b on the second substrate 120. Here, the component mountable region 122b is a region on the second substrate 120 other than the component mountable region 112a on the first substrate 110 and the component mountable region 122a on the second substrate 120. The LSI 190 is mounted in these component mountable areas 122b.

  Through such a process, the mounting of the LSI 190 in the component unmountable region 122a on the second substrate 120 is of course stopped, but the first substrate that inevitably becomes nonfunctional as the component built-in module 201. The mounting of the LSI 190 is also stopped in the area of the second substrate 120 corresponding to the 110 component mounting impossible area 112a. Therefore, wasteful consumption of the expensive LSI 190 can be prevented.

  After the mounting of the LSI 190, the mounting state is inspected, and information on the mounting failure area 122c determined to be mounting failure is registered as shown in FIG. As a result, the non-defective product management information 352 is further updated to become non-defective product management information 353.

  In the next step 13, a recess 186 and a via 185 are formed in the component embedding layer 130. More specifically, as shown in FIG. 3E, with reference to the non-defective product management information 353, a recess 186 is formed in the region 131 of the component embedding layer 130 corresponding to the region 121 where the LSI 190 is mounted. Form. In the present embodiment, a through hole for the via 185 is formed in the entire region 131 of the component embedding layer 130, and the quality of the through hole is inspected as shown in FIG. Information on the area 122d is registered. As a result, the non-defective product management information 353 is further updated to be non-defective product management information 354. Furthermore, the via hole is formed by filling the through hole with a conductive resin.

  Next, the process proceeds to step 3 described above, and the second substrate 120 and the component embedding layer 130 manufactured in steps 12 and 13 and the first substrate 110 are laminated. After the lamination, as shown in FIG. 3G, the quality of the via 185 is inspected, information on the via defect region 122e is registered, and the non-defective product management information 354 is further updated to be non-defective product management information 355.

  Next, the process proceeds to step 4 described above, and as shown in FIG. 3H, electronic components such as the memory 191 are mounted on the first substrate 110 after stacking while referring to the non-defective product management information 355. The After the mounting, the quality of the mounting is inspected, and as shown in FIG. 3I, information on the mounting failure area 122f is registered, and the non-defective product management information 355 is further updated to become the non-defective product management information 356.

According to the first determination method described above, since not only the second component mounting impossible region information 122 on the second substrate 120 but also the first component mounting disabled region information 112 on the first substrate 110 is obtained, When the LSI 190 is mounted on the two substrates 120, the mounting of the LSI 190 is also stopped in the region of the second substrate 120 corresponding to the component mounting impossible region 112a of the first substrate 110. Therefore, wasteful consumption of the expensive LSI 190 can be prevented.
In the above description, the first component-mountable area information 112 and the second component-mountable area information 122 are registered every time one component-embedded board 101 is manufactured. All first component mounting non-mountable area information 112 and second component mounting non-mountable area information 122 on all first boards 110 and second boards 120 involved in manufacturing are registered in advance, and are taken out when manufacturing the component built-in board 101. The first component mounting unusable area information 112 and the second component unmountable area information 122 corresponding to the first board 110 and the second board 120 may be extracted from the registration information and used.

Second determination method;
Next, the second determination method will be described with reference to FIGS. In the second determination method, the first component mounting unusable area information 112 on each first substrate 110 is stored in the storage device 310 in advance for all the first substrates 110 involved in the manufacture of the component built-in substrate 101. Keep it.
In step 21 shown in FIG. 4, the second component mounting impossible area information 122 on one second substrate 120 taken out from the plurality of second substrates 120 is stored in the storage device 310. More specifically, as shown in FIG. 5B, the second component mounting impossible area information 122 including the component mounting impossible area 122a in the extracted second substrate 120 is registered in the storage device 310. As described in the first determination method, the non-defective product management information 361 is created with the registration of the second component non-mountable area information 122.

  In the next step 22, the non-defective product management information 361 having the second component mountable area information 122 is referred to obtain the component mountable area 122b on the second substrate 120, and the LSI 190 is mounted on the component mountable area 122b. The More specifically, as shown in FIG. 5C, the reading unit 321 reads out the second component non-mountable region information 122, that is, the non-defective product management information 361 from the storage device 310, and the mountable region determining unit. In 322, a component mountable region 122b in the second substrate 120 is obtained. Here, the component mountable region 122 b is a region on the second substrate 120 other than the component mountable region 122 a on the second substrate 120. The LSI 190 is mounted in these component mountable areas 122b.

  After the mounting of the LSI 190, whether the mounting state is good or not is inspected, and as shown in FIG. 5D, information on the mounting failure area 122c determined to be mounting failure is registered. As a result, the non-defective product management information 361 is updated to become non-defective product management information 362.

  In the next step 23, a recess 186 and a via 185 are formed in one component embedding layer 130 taken out from the plurality of component embedding layers 130. More specifically, as shown in FIG. 5E, with reference to the good product management information 362, a recess 186 is formed in the region 131 of the component embedding layer 130 corresponding to the region 121 where the LSI 190 is mounted. Form. In the present embodiment, a through hole for the via 185 is formed in the entire region 131 of the component embedding layer 130, and the quality of the through hole is inspected as shown in FIG. Based on the result of the inspection, information on the through-hole defect area 122d is registered, and the non-defective product management information 362 is further updated to be non-defective product management information 363. Furthermore, the via hole is formed by filling the through hole with a conductive resin.

  In the next step 24, the non-defective product management information 363 is stored in the first component mounting unusable area information 112 on all the first boards 110 stored in advance in the storage device 310, as shown in FIG. The first board 110 having the same component unmountable area 112a as the unsatisfactory total area is extracted. Here, the total defective area is an area composed of the component mounting unusable area 122a, the mounting defective area 122c, and the through hole defective area 122d obtained in Steps 21 to 23. Further, the extraction operation described above can be performed by the extraction unit 323 of the control device 320.

  Next, the process proceeds to Step 3 described above, and the second substrate 120 and the component embedding layer 130 manufactured in Steps 22 and 23 and the first substrate 110 extracted in Step 24 are laminated. After the lamination, as shown in FIG. 5G, the quality of the via 185 is inspected, information on the via defect region 122e is registered, and the good product management information 363 is further updated to become good product management information 364.

  Next, the process proceeds to step 4 described above, and as shown in FIG. 5H, electronic components such as the memory 191 are mounted on the first substrate 110 after being stacked while referring to the non-defective product management information 364. The After the mounting, the mounting quality is inspected, and as shown in FIG. 5I, information on the mounting failure area 122f is registered, and the non-defective product management information 364 is further updated to be non-defective product management information 365.

  According to the second determination method described above, all the information on the component mounting unusable region 122a on the second substrate 120, the mounting defective region 122c on the mounted LSI 190, and the through hole defective region 122d on the component embedded layer 130 are obtained. Since the first substrate 110 having the same first component mounting non-mountable area information 112 is used for stacking, it is possible to minimize the wasteful consumption of the LSI 190 in the same manner as the first determination method. Due to the first substrate 110, a new defective area does not occur. Accordingly, it is possible to avoid a situation in which a normal region in the first substrate 110 becomes incapable of functioning as the component built-in module 201 due to defects in the second substrate 120 and the component embedding layer 130 and is eventually discarded. Therefore, useless consumption of the first substrate 110 can be reduced.

Third determination method;
Next, the third determination method will be described with reference to FIGS. In the second determination method described above, the first substrate 110 having the first component non-mountable region information 112 that is completely the same as all the information of the non-mountable component region 122a, the non-mountable region 122c, and the through-hole defective region 122d. Since it is extracted, the completely identical first substrate 110 is not always present. Therefore, there is a possibility that the first substrate 110 may be left in excess of the second substrate 120 and the component embedding layer 130. Therefore, in order to avoid the surplus of the first substrate 110, it is known that the first substrate 110 having a normal area must be used even though it is known that the function as the component built-in module 201 is disabled. Therefore, the first substrate 110 is wasted. That is, even if the wasteful consumption of the LSI 190 can be minimized, the non-defective area of the first substrate 110 is discarded at the individual level. The third determination method solves such a problem.

  In step 31 shown in FIG. 6, for all the first substrates 110 and second substrates 120 involved in the manufacture of the component-embedded substrate 101, the first component unmountable area information 112 on each first substrate 110 and each second substrate. The second component unmountable area information 122 at 120 is stored in the storage device 310.

In step 32, the extraction unit 323 of the control device 320 from all of the first component mounting impossible area information 112 and the second component mounting impossible area information 122, the first component mounting impossible area information 112 and the second component mounting impossible area information. The first substrate 110 and the second substrate 120 having the same 122 are extracted and paired in advance. One pair of the first substrate 110 and the second substrate 120 that are paired with each other is sequentially provided for manufacturing the component-embedded substrate 101.
As shown in FIG. 7B, the second pair of second substrates 120 taken out is similar to the first determination method described above with the second component non-mountable region information 122 including the component non-mountable region 122a. In addition, non-defective product management information 371 is created. As described above, the non-defective product management information 371 is configured to be sequentially updated by adding new information.

  In the next step 33, the non-defective product management information 371 having the second component mountable region information 122 is referred to obtain the component mountable region 122b on the second board 120, and the LSI 190 is mounted on the component mountable region 122b. . More specifically, as shown in FIG. 7C, the reading unit 321 reads out the non-defective product management information 371 from the storage device 310, and the mountable area determining unit 322 mounts the components on the second board 120. The possible area 122b is obtained. Here, the component mountable region 122 b is a region on the second substrate 120 other than the component mountable region 122 a on the second substrate 120. The LSI 190 is mounted in these component mountable areas 122b.

  After the mounting of the LSI 190, the quality of the mounting state is inspected, and as shown in FIG. 7D, information on the mounting failure area 122c determined to be mounting failure is registered, and the non-defective product management information 371 is updated and the non-defective product management is performed. Information 372 is obtained.

  In the next step 34, a recess 186 and a via 185 are formed in one component embedding layer 130 taken out from the plurality of component embedding layers 130. More specifically, as shown in FIG. 7E, with reference to the non-defective product management information 372, a recess 186 is formed in the region 131 of the component embedding layer 130 corresponding to the region 121 where the LSI 190 is mounted. Form. In the present embodiment, a through hole for the via 185 is formed in the entire region 131 of the component embedding layer 130, and the quality of the through hole is inspected as shown in FIG. Based on the result of the inspection, information on the through-hole defect area 122d is registered, and the non-defective product management information 372 is further updated to be non-defective product management information 373. Furthermore, the via hole is formed by filling the through hole with a conductive resin.

  In the next step 35, the first substrate 110 in the pair is prepared. Next, the process proceeds to step 3 described above, and the second substrate 120 and the component embedding layer 130 manufactured in steps 33 and 34 and the paired first substrate 110 prepared in step 35 are provided. Laminated. After the lamination, as shown in FIG. 7G, the quality of the via 185 is inspected, information on the via defect area 122e is registered, and the non-defective product management information 373 is further updated to be non-defective product management information 374.

  Next, the process proceeds to step 4 described above, and as shown in FIG. 7H, electronic components such as the memory 191 are mounted on the first substrate 110 after stacking while referring to the non-defective product management information 374. The After the mounting, the quality of the mounting is inspected, and as shown in (i) of FIG. 7, the information of the mounting failure area 122f is registered, and the non-defective product management information 374 is further updated to become the non-defective product management information 375.

According to the third determination method described above, the first substrate 110 and the second substrate 120 in which the first component mounting impossible region information 112 and the second component mounting impossible region information 122 completely match each other are extracted in advance as a pair. As a result, wasteful consumption of the LSI 190 can be minimized, and the non-defective area of the first substrate 110 is not discarded at the individual level.
In addition, according to the third determination method, the manufacturer of the first substrate 110 and the second substrate 120 can reduce the cost of the defective individual substrate by having the pair extracted and delivered in advance. it can. Further, according to the third determination method, it is necessary to consider the first component nonmountable area information 112 on the first substrate 110 when mounting the LSI 190 on the second substrate 120 as compared to the first determination method described above. Therefore, only the second component mounting impossible area information 122 on the second substrate 120 can be confirmed, and the component mounting can be performed. Therefore, the operation is simpler than that of the first determination method, and there is an advantage that the conventional apparatus can be used as it is for the component mounting apparatus.

The following can be considered from the first to third determination methods described above. That is, the defect in the first substrate 110 and the second substrate 120 cannot be repaired and can be said to be an absolute defect. On the other hand, component mounting defects on the first substrate 110 and the second substrate 120, through-hole defects and via defects in the component embedding layer 130 are required for the component built-in module 201 which is a final finished product. It can be said that it is a fluid relative defect that can be determined as a defect or a non-defect in relation to the quality level. Thus, there is a light weight between the defects in the first substrate 110 and the second substrate 120 and other defects.
Therefore, the regions 111 and 121 having the absolute defect are always judged as defective. For example, the component mounting is never performed, and the region in the second substrate 120 and the component embedded layer 130 in which the relative defect may occur. The quality determinations 121 and 131 can be determined according to the quality level of the final finished product.
Based on such an idea, for example, the first substrate 110 may be extracted in the second determination method.

  The present invention can be applied to manufacture of a component-embedded substrate that incorporates an LSI.

It is a flowchart which shows schematic operation | movement of the component built-in board manufacturing method in embodiment of this invention. It is a flowchart for demonstrating the 1st board | substrate combination determination method in the component built-in board manufacturing method in embodiment of this invention. It is a figure for demonstrating the method shown in FIG. It is a flowchart for demonstrating the 2nd board | substrate combination determination method in the component built-in board manufacturing method in embodiment of this invention. It is a figure for demonstrating the method shown in FIG. It is a flowchart for demonstrating the 3rd board | substrate combination determination method in the component built-in board manufacturing method in embodiment of this invention. It is a figure for demonstrating the method shown in FIG. It is a block diagram which shows schematic structure of the board | substrate management apparatus in embodiment of this invention. It is a perspective view of the component built-in board manufactured by the component built-in board manufacturing method of FIG. It is sectional drawing of the component built-in board manufactured by the component built-in board manufacturing method of FIG. It is sectional drawing of the component built-in board manufactured by the component built-in board manufacturing method of FIG. It is sectional drawing of the component built-in board manufactured by the component built-in board manufacturing method of FIG.

Explanation of symbols

101... Component built-in board, 110... First board, 112.
120 ... 2nd board | substrate, 122 ... 2nd component mounting non-mountable area information,
122a ... Part mounting impossible area, 122b ... Part mounting possible area,
122c ... Mounting failure region, 122d ... Through hole failure region, 130 ... Part embedding layer,
186 ... recess, 190 ... LSI,
310 ... Storage device, 320 ... Control device, 321 ... Reading unit,
322 ... mountable area determination unit, 323 ... extraction unit.

Claims (8)

A first substrate (110) partitioned into a plurality of regions independent from each other, a second substrate (120) partitioned into a plurality of regions independent from each other, and a plurality of regions separated from each other into the second substrate. A component embedded layer (130) for embedding the mounted electronic component (190), and the component embedded layer (101) formed by sandwiching the component embedded layer between the first substrate and the second substrate In the manufacturing method of
Before mounting the electronic component on the second substrate, not only the second component non-mountable region information (122) indicating the defective region of the second substrate but also the first component indicating the defective region of the first substrate. A component mounting area (122b) in which the electronic component can be mounted on the second substrate is obtained based on the unmountable area information (112), and the electronic component is mounted in the component mounting area. A method for manufacturing a built-in substrate.   After acquiring the first component mountable region information, the second component mountable region information is acquired, the component mountable region is obtained based on both, and the component mountable region on the second board is obtained. The method for manufacturing a component-embedded substrate according to claim 1, wherein the electronic component is mounted.   The second board having the second component mounting non-mountable area information identical to the first component mounting non-mounting area information is extracted, and the electronic component is mounted in the component mountable area of the second board. A manufacturing method of the component-embedded substrate as described.   After the electronic component is mounted on the component mountable region on the second substrate, a recess (186) for accommodating the electronic component is formed in the component embedding layer only at a location corresponding to the mounted electronic component. A method for manufacturing a component-embedded substrate according to claim 2 or 3.   After mounting the electronic component in the component mountable region of the second substrate, a recess (186) for accommodating the electronic component corresponding to the mounted electronic component is formed in the component embedded layer, 4. The method for manufacturing a component built-in substrate according to claim 3, wherein after the formation, the component built-in substrate is formed by laminating the first substrate, the second substrate, and the component embedding layer. A first substrate (110) partitioned into a plurality of regions independent from each other, a second substrate (120) partitioned into a plurality of regions independent from each other, and a plurality of regions separated from each other into the second substrate. A component embedded layer (130) for embedding the mounted electronic component (190), and the component embedded layer (101) formed by sandwiching the component embedded layer between the first substrate and the second substrate In the manufacturing method of
After mounting the electronic component on the second substrate, a recess (186) for accommodating the electronic component is formed in the component embedding layer corresponding to the mounted electronic component, and after the formation, after the component mounting The first component mounting unusable region (112) that is the same as the combined failure region (122a, 122c, 122d) obtained by adding together the defective regions in the component embedded layer after the formation of the recess and the second substrate. 1 substrate is extracted, and after the extraction, the second substrate after mounting the component, the component embedding layer after forming the recess, and the extracted first substrate are stacked to form the component-embedded substrate. A method of manufacturing a component-embedded substrate. A first substrate (110) partitioned into a plurality of regions independent from each other, a second substrate (120) partitioned into a plurality of regions independent from each other, and a plurality of regions separated from each other into the second substrate. A component embedded layer (130) for embedding the mounted electronic component (190), and the component embedded substrate (101) is manufactured by sandwiching the component embedded layer between the first substrate and the second substrate. Sometimes, in the board management apparatus for managing information on the first board, the second board, and the component embedding layer,
A storage device (310) for storing second component mounting impossible area information (122) indicating a defective area on the second substrate and first component mounting disabled area information (112) indicating a defective area on the first substrate;
A reading unit (321) that reads out the second component mounting impossible area information and the first component mounting impossible area information from the storage device, and the read out second component mounting impossible area information and the first component mounting impossible. A control device (320) having a mountable area determining unit (322) for obtaining a component mountable area (122b) on which the electronic component can be mounted on the second substrate based on the area information;
A board management apparatus comprising: The control device uses the second component non-mountable region information and the first component non-mountable region information read by the reading unit, the same second component non-mountable region information as the first component non-mountable region information. The board management device according to claim 7, further comprising an extraction unit (323) that extracts the second board having the second component mounting non-mountable area information extracted and extracted.

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