JP4287432B2 - OFDM transceiver - Google Patents

Description

  The present invention relates to an OFDM transmitter / receiver applied to an Orthogonal Frequency Division Multiplexing (hereinafter referred to as OFDM) transmission system used in a wireless communication system.

  OFDM is a type of multi-carrier modulation method, and has a feature that it has greater resistance to multi-path fading that occurs when propagation paths are complicated by obstacles compared to conventional single-carrier modulation methods.

  However, even in the case of an OFDM signal, due to multipath fading, the reception power of a subcarrier of a specific frequency is reduced as shown in FIG. 19, and a desired signal to noise power ratio (Signal to Noise Power Ratio: hereinafter) If the SNR is not obtained, some data cannot be demodulated, and the transmission capacity of the system decreases.

  Conventionally, countermeasures as shown in FIGS. 20 to 22 have been taken to deal with such problems.

(1) As shown in FIG. 20, the first countermeasure is attenuation of received power due to multipath fading based on the propagation path characteristics of each subcarrier between the transmission side (left side in the figure) and the reception side (right side in the figure). Is a subcarrier transmission power control method that adjusts the transmission power of each subcarrier in a manner that compensates for.

(2) The second countermeasure is as shown in FIG. 21, in which subcarriers with large received power attenuation due to multipath fading are transmitted with a low multilevel modulation scheme, and small subcarriers with a high multilevel modulation scheme. This is an adaptive modulation scheme.

(3) As shown in FIG. 22, the third countermeasure is to perform adaptive modulation and adjust the transmission power of subcarriers for transmitting data so as to obtain a desired SNR (multilevel transmission power control method ( (Multilevel Transmit Power Control: hereinafter referred to as “MTPC system”).

  Of the above three measures from the first to the third, the third MTPC method is a measure against multipath fading from the viewpoint of limiting the maximum value of transmission power and the like and using subcarriers efficiently. Attention has been paid.

  FIG. 23 is a diagram illustrating a configuration example of a frame format when transmitted by the OFDM / MTPC scheme. As shown in FIG. 23, the transmission frame 201 is composed of ten slots 202-1 to 202-10, and each slot 202-1 to 202-10 is roughly divided into a synchronization / control data unit 203, The user data part 204 is composed of two parts.

  The modulation scheme of each subcarrier, which is a feature of the OFDM / MTPC scheme, and the transmission power of each subcarrier, which defines the “propagation data string 205 for channel estimation known to the receiving side used for channel estimation (Channel Estimation word: “CE”) and “modulation level information 206 (hereinafter referred to as MLI) for notifying the receiving side of the modulation scheme of each subcarrier transmitting user data” are synchronized. Included in the control data section 203. The MLI is updated every normal frame.

  When transmitting the signal of the frame format shown in FIG. 23, the OFDM / MTPC scheme sets the subcarrier modulation scheme of the synchronization / control data section and the transmission power of each subcarrier as follows.

(1) The modulation schemes of all subcarriers are unified to a modulation scheme that has high resistance to noise such as BPSK and has high reliability.

(2) When transmitting CE data, the transmission power of each subcarrier is all made equal. When transmitting MLI data, the transmission power of each subcarrier is adjusted according to the quality of the propagation path so that a desired reception CNR can be obtained on the receiving side for each subcarrier.

  The subcarrier modulation scheme of the user data part and the transmission power of each subcarrier are transmitted as follows.

(1) The modulation scheme for each subcarrier is the modulation scheme specified by the MLI in the synchronization / control data section.

(2) The transmission power of each subcarrier is adjusted according to the quality of the propagation path so that a desired reception CNR is obtained on the reception side for each subcarrier.

(3) Transmission power is not given to subcarriers with very poor propagation path quality, and carrier holes may be used.

  FIG. 24 shows a configuration of a communication device of the OFDM / MTPC communication system. The RF signal is input to the OFDM / MTPC demodulation circuit 209 through the reception antenna 211 and the RF down converter 212 that down-converts the RF signal.

  Then, the OFDM / MTPC demodulation circuit 209 matches the output of the analog / digital conversion circuit 213 that converts the RF downconverter output 212 from an analog signal to a digital signal, and the output of the analog / digital conversion circuit 213 to the slot configuration shown in FIG. A demultiplexer 214 that outputs the CE data unit 205, the MLI symbol unit 206, and the user data symbol unit 204 separately, an FFT circuit 215-1 to 215-3 that performs Fourier transform on the output of the demultiplexer 214, and The received CE data reproduced by the Fourier transform circuit 215-1 is compared with the reference CE data, and the propagation path estimation circuit 216 for estimating the quality of the propagation path of each subcarrier, and the reproduction by the Fourier transform circuit 215-2. For the received MLI symbol Based on the estimation result of the constant circuit 216, a propagation path compensation circuit 217 for performing propagation path compensation, a symbol demodulation circuit 218 for demodulating MLI data from the received MLI symbol subjected to propagation path compensation by the propagation path compensation circuit 217, and demodulation Based on the received MLI, the demodulation method designating circuit 219 for designating the demodulating method of each subcarrier of user data, and the estimation by the propagation path estimating circuit 216 for the received user data symbols reproduced by the Fourier transform circuit 215-3 Based on the result, the propagation path compensation circuit 220 for performing propagation path compensation, and the received user data symbols subjected to propagation path compensation by the propagation path compensation circuit 220 are used as user data for each subcarrier designated by the demodulation scheme designating circuit 219. The symbol demodulation circuit 221 that demodulates by the symbol part demodulation method and the symbol part demodulation circuit 221 perform decoding. Respect coded user data, error correction, performs decompression processing is configured to include a decoding circuit 222 for decoding the user data.

  In the circuit shown in FIG. 24, the portions for demodulating CE, MLI, and user data can be summarized as follows.

(1) CE demodulator composed of FFT circuit 215-1.

(2) An MLI demodulator 223 including an FFT circuit 215-2, a propagation path compensation circuit 217, and a symbol demodulation circuit 218.

(3) A user data demodulator 224 including an FFT circuit 215-3, a propagation path compensation circuit 220, a symbol demodulation circuit 221 and a decoding circuit 222.

  The OFDM / MTPC modulation circuit 210 includes the following configuration.

(1) Based on the propagation path estimation result for each subcarrier of the propagation path estimation circuit 216 of the OFDM / MTPC demodulation circuit 209, the transmission power of each subcarrier at the time of user data transmission, and the modulation scheme of each subcarrier at the time of user data transmission A modulation scheme transmission power designation circuit 225 for determining

(2) An encoding circuit 226 that performs processing such as compression encoding of user data and addition of an error correction code.

(3) Symbol modulation circuit 227 that modulates user data encoded by the encoding circuit 226 based on the modulation scheme of each subcarrier determined by the modulation scheme transmission power designation circuit 225.

(4) A transmission power control circuit 228 that adjusts the modulation signal output of the symbol modulation circuit 227 to a value determined by the modulation scheme transmission power designation circuit 225 for each subcarrier.

(5) An IFFT circuit 229 that performs inverse Fourier transform on the output of the transmission power control circuit 228.

(6) An MLI generation circuit 230 that generates MLI based on the modulation scheme of each subcarrier at the time of user data transmission determined by the modulation scheme transmission power designation circuit 225.

(7) A symbol modulation circuit 231 that modulates the MLI generated by the MLI generation circuit 230.

(8) A transmission power control circuit 232 that adjusts the modulation signal output of the symbol modulation circuit 231 to a value determined by the modulation scheme transmission power designation circuit 225 for each subcarrier.

(9) An IFFT circuit 233 that performs inverse Fourier transform on the output of the transmission power control circuit 232.

(10) A CE generation circuit 234 that generates CE.

(11) An IFFT circuit 235 that performs inverse Fourier transform on the CE generated by the CE generation circuit 234.

(12) A multiplexer 236 that multiplexes the outputs of the three IFFT circuits (229, 233, 235) so as to have the slot configuration of FIG.

(13) A digital / analog conversion circuit 237 that converts the output of the multiplexer 236 from a digital signal to an analog signal.

  In the above-described circuit shown in FIG. 24, the parts for modulating CE, MLI, and user data can be summarized as follows.

(1) A CE modulation unit 238 including a CE generation circuit 234 and an IFFT circuit 235.

(2) An MLI modulation unit 239 including an MLI generation circuit 230, a symbol modulation circuit 231, a transmission power control circuit 232, and an IFFT circuit 233.

(3) A user data modulation unit 240 including a coding circuit 226, a symbol modulation circuit 227, a transmission power control circuit 228, and an IFFT circuit 229.

  The output of the OFDM / MTPC modulation circuit 210 is transmitted via the up converter 241 and the transmission antenna 242.

  MLI is basic information and must be transmitted using all subcarriers. It is necessary to give a large amount of transmission power to subcarriers existing in places where the propagation path characteristics drop, etc., so as to obtain a required reception SNR.

  However, the transmission power control circuit multiplies the coefficient according to the transmission power designation signal to change the amplitude and control the power. However, the transmission power control circuit is a digital circuit, and therefore the data such as the multiplication coefficient and the multiplication result has a certain bit width. have. Therefore, there is a certain limit in the range in which power can be controlled.

  Therefore, sufficient transmission power cannot be provided, and even the required SNR of BPSK may not be satisfied. In such a case, since the receiver fails to demodulate the MLI and cannot demodulate the data, the transmitter repeats the retransmission of the failed slot, and the data transmission efficiency as a whole system decreases. End up.

In view of the above problems, an object of the present invention is to provide an OFDM transceiver capable of improving the success probability of MLI demodulation in a wireless communication system using the OFDM / MTPC scheme.
2003 IEICE General Conference “Study on Interference Countermeasures in OFDM Adaptive Modulation / TDMA System with 1-cell Repetition Using Multilevel Transmission Power Control”

  According to one aspect of the present invention, the demodulating circuit includes a vector addition MLI generation unit that vector-adds MLI symbols of a plurality of slots in the same frame as a means for reducing the influence of noise or the like on the MLI. It is used for MLI at the time of demodulation (method 1).

  Further, the vector addition MLI means of the method 1 is characterized in that the vector addition MLI is generated using the MLI symbol subjected to propagation path compensation (method 2). Further, the vector addition MLI means of method 2 uses MLI transmitted by assigning data to different subcarriers for each slot (method 3). Further, the demodulating circuit is provided with a majority decision judgment circuit for making a majority decision judgment by comparing MLI data bit strings of a plurality of slots in the same frame as means for improving the demodulation success rate (method 4).

  Further, the majority decision judging means of scheme 4 uses MLI transmitted by allocating data to different subcarriers for each slot (scheme 5).

  Further, the majority decision judging means of the method 4 uses the MLI transmitted by rearranging the data bit strings for each slot (method 6).

  Further, the data allocation subcarrier selection means of the scheme 3 and scheme 5 is a subcarrier selection scheme characterized by rearranging by a known rearrangement scheme in the transceiver (method 7).

  Further, the data allocation subcarrier selection means of the method 3 and method 5 is characterized by using the propagation path characteristic estimated from the slot transmitted from the receiving side (method 8).

  In addition, the data allocation subcarrier selection means of the method 8 selects an optimal array from among several preset arrays in order to reduce the amount of information for reporting the array of subcarriers to which data has been allocated to the receiving side. It is characterized by selecting and notifying the sequence number (method 9).

  Further, the data allocation subcarrier selection means of the scheme 8 has several combinations of arrangements used in each slot in the frame in advance in order to reduce the amount of information for reporting the arrangement of subcarriers to which data has been assigned to the receiving side. It is characterized in that an optimum combination is selected from among them and the combination number is notified in the first slot (method 10).

  According to the present invention, there is an advantage that the probability of successful demodulation of MLI can be improved, and a decrease in data transmission efficiency as a whole system can be avoided.

It is a block diagram which shows the structure of the MLI demodulation part by the 1st Embodiment of this invention. It is a flowchart figure which shows the flow of the vector addition process operation | movement by the 1st Embodiment of this invention. It is a block diagram which shows the structural example of the MLI demodulation part by the 2nd Embodiment of this invention. It is a block diagram which shows the structural example of the MLI demodulation part by the 3rd Embodiment of this invention. It is a flowchart figure which shows the flow of majority decision processing operation | movement by the 3rd Embodiment of this invention. It is a figure which shows an example of the majority determination process by the 3rd Embodiment of this invention. It is a block diagram which shows the structural example of the MLI modulation part by the 4th Embodiment of this invention. It is a block diagram which shows the structural example of the MLI demodulation part by the 4th Embodiment of this invention. It is a block diagram which shows the structural example of the MLI modulation part by the 5th Embodiment of this invention. It is a block diagram which shows the structural example of the MLI demodulation part by the 5th Embodiment of this invention. It is a figure which shows the data allocation method by the 6th Embodiment of this invention. It is a block diagram which shows the structural example of the OFDM / MTPC modulation circuit by the 7th Embodiment of this invention. It is a block diagram which shows the structural example of the data rearrangement part by the 7th Embodiment of this invention. It is a figure which shows the example of the slot format by the 7th Embodiment of this invention. It is a flowchart figure which shows the flow of the data rearrangement processing operation by the 7th Embodiment of this invention. It is a correspondence table of MLI symbols versus subcarriers in a conventional rearrangement scheme. It is a conversion table of MLI symbols versus subcarriers according to the eighth embodiment of the present invention. It is a correspondence table of the slot pair rearrangement method combination by the 9th Embodiment of this invention. Spectrum in conventional orthogonal frequency division multiplexing systems It is a spectrum in the orthogonal frequency division multiplexing system using a subcarrier transmission power control system. It is a spectrum in an orthogonal frequency division multiplexing system using an adaptive modulation scheme. It is a spectrum in the orthogonal frequency division multiplexing system using a multilevel transmission power control system. It is a figure which shows the frame format in the orthogonal frequency division multiplexing system using a multilevel transmission power control system. This is a communication device for an orthogonal frequency division multiplexing system using a conventional multilevel transmission power control method.

  First, the transmitting / receiving apparatus according to the first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a diagram illustrating a configuration example of an MLI demodulation unit according to the present embodiment. As shown in FIG. 1, the MLI demodulator 100 detects an error from an output signal of the MLI vector adder 101 that adds the MLI symbol part output from the demultiplexer 214 and the symbol demodulator circuit 218 by an error detection code or the like. And an error detection circuit 105 for detection.

  The MLI vector addition unit 101 includes a vector addition circuit 102 that vector-adds the output of the demultiplexer 214 and the output of the storage circuit 103, a storage circuit 103 that stores the output of the vector addition circuit 102, and the output and vector of the demultiplexer 214. And a switching circuit 104 that switches an output with the adder circuit 102.

  FIG. 2 is a flowchart showing the flow of vector addition processing. With reference to FIG. 1, the operation of vector addition processing when the Nth slot after MLI modulation is received will be described according to the flowchart of FIG. 2. At the start of the demodulation operation, the switching circuit 104 is set to output the output signal of the demultiplexer 214.

  First, in step S1, the Nth slot is received, and the received MLI of the Nth slot is demodulated (step S2). The error detection circuit 102 determines whether or not the MLI has been correctly demodulated (step S3). As a result of the determination in step S3, when it is determined that the MLI demodulation has failed, the switching circuit 104 is switched to the vector addition circuit 102 side (step S4).

  The vector addition circuit 102 outputs the vector addition result of the MLI symbol part of the Nth slot output from the demultiplexer 214 and the MLI symbol part from the first slot to the (N−1) th slot stored in the storage circuit 103. Are added as vectors (step S5).

  The storage circuit 103 stores the vector addition result of the MLI symbol part from the first slot to the Nth slot output from the vector addition circuit 102 (step S6). The vector addition result is demodulated (step S7). The switching circuit 104 is switched to the multiplexer 214 (step S8). The error detection circuit 105 determines whether or not the vector addition result has been correctly demodulated (step S9).

  As a result of the determination in step S9, when it is determined that the demodulation of the vector addition result has failed, the process returns to step S1 to receive the next (N + 1) th slot. Thereafter, it operates according to the above rules. As a result of the determination in step S3 and step S9, when it is determined that the demodulation is successful, the data stored in the storage circuit 103 is discarded (step S10). When the MLI is successfully demodulated, the user data of the slot in the same frame is demodulated using the MLI. When the next frame is received, the MLI is demodulated again by the above method.

  When the above technique is used, the MLI of each slot in the same frame is the same, but the noise components contained in those slots have no correlation. Therefore, if vector addition is performed, only the desired signal power can be strengthened, and the SNR can be improved.

  Next, a demodulation technique according to the second embodiment of the present invention will be described. FIG. 3 is a diagram illustrating a configuration example of the MLI demodulation unit 106 according to the present embodiment. In MLI demodulating section 106, MLI vector adding section 107 performs vector addition of the MLI symbol section output from propagation path compensation circuit 217. Since the propagation path changes with time, the amount of phase rotation that each slot receives in the propagation path is different. Since the demodulation unit according to the present embodiment compensates for the rotation of the phase by the propagation path compensation circuit and adds the vectors, the desired signal can be added more efficiently than in the first embodiment, and the SNR can be improved. There is an advantage that the amount is large.

  Next, a demodulator according to a third embodiment of the present invention will be described with reference to the drawings. FIG. 4 is a diagram illustrating a configuration example of the MLI demodulation unit 108 according to the present embodiment. The MLI demodulation unit 108 includes a majority decision determination unit 109 that determines symbol-demodulated MLI by majority decision.

  The majority decision determination unit 109 determines the majority decision determination circuit 110 that determines the output of the symbol demodulation circuit 218 and the output of the storage circuit 111 by majority decision, the storage circuit 111 that stores the output of the symbol demodulation circuit 218, and the output of the symbol demodulation circuit 218. And a switching circuit 112 for switching the output of the majority decision circuit 110.

  FIG. 5 is a flowchart showing the flow of the majority decision processing operation. The flow of majority decision processing when the Nth slot is received will be described with reference to the flowchart shown in FIG. At the start of the demodulation operation, the switching circuit 112 is set to output the symbol demodulation circuit output signal 218.

First, in step S11, the Nth slot is received. Next, in step S12, the received MLI of the Nth slot is demodulated. The error detection circuit 105 determines whether the MLI has been correctly demodulated (step S13). As a result of the determination in step S13, if it is determined that the MLI demodulation has failed, it is determined whether the slot number N is an even number or an odd number (step S14). By performing the determination in step S14, the number of slots that can be correctly demodulated and the number of erroneous slots when N is an even number become the same, and determination by majority decision is impossible. If N is an even number as a result of the determination in step S14, the process returns to step S11 to receive the next (N + 1) th slot. When N is an odd number, the switching circuit 112 is switched to the majority decision circuit 110 (step S15). The majority decision circuit 110 makes a majority decision on each bit of the MLI of the Nth slot output from the symbol modulation circuit 218 and the MLI from the first slot to the (N−1) th slot stored in the storage circuit 111. (Step S16). As an example, a method of majority decision for seven slots from first to seventh will be described with reference to FIG.

  The storage circuit 111 additionally stores the MLI output from the symbol demodulation circuit 218 (step S17), and demodulates the majority decision result (step S18). Next, the switching circuit 112 is switched to the symbol demodulation circuit 218 (step S19), and the error detection circuit 105 determines whether the majority decision result has been correctly demodulated (step S20). As a result of the determination in step S20, if it is determined that demodulation of the majority determination result has failed, the process returns to step S11 to receive the (N + 1) th slot. Thereafter, the operation is performed in accordance with the above rules. As a result of the determination in step S13 and step S20, when it is determined that the demodulation is successful, the data stored in the storage circuit 111 is discarded (step S21). When the MLI is successfully demodulated, the user data of the slot in the same frame is demodulated using the MLI. When the next frame is received, the MLI is demodulated again by the above method.

  In FIG. 6, it is determined that demodulation has succeeded in all cases.

  Thus, by making a majority decision, there is an advantage that an error appearing at a random position due to noise or the like can be corrected.

  Next, a modulation unit according to a fourth embodiment of the present invention will be described with reference to the drawings. FIG. 7 is a diagram illustrating a configuration example of the MLI modulation unit 113 according to the present embodiment. The MLI modulation unit 113 includes an MLI generation circuit 230, a data rearrangement circuit 114 that rearranges the bit strings output from the MLI generation circuit 230, a symbol modulation circuit 231, a transmission power control circuit 232, and an IFFT circuit 233. Prepare. A signal is output from the IFFT circuit 233 to the multiplexer. FIG. 8 is a diagram illustrating a configuration example of the MLI demodulation unit 115 according to the present embodiment. In addition to the configuration of the MLI demodulating unit 108 according to the third embodiment, the MLI demodulating unit 115 rearranges the MLI that has been demodulated into symbols into a bit sequence in the reverse procedure to that at the time of transmission and returns the original order. A data rearrangement circuit 116 is provided.

  Since MLI is basic information, a carrier hole cannot be set even when there is a subcarrier with a poor SNR, and transmission must be performed on all subcarriers. Therefore, even if retransmission is performed, there is a high possibility that MLI demodulation will fail due to an error in the MLI symbol transmitted on the subcarrier. Therefore, in the present embodiment, transmission is performed by rearranging the MLI bit strings for each slot. Since the bits transmitted on the subcarrier having a low SNR differ from slot to slot, the position where the error bit appears varies from slot to slot when demodulated and rearranged in the original order. Therefore, the error correction capability of the majority decision is very excellent against such an error, and there is an advantage that the success probability of MLI demodulation can be improved.

  Next, a modem unit according to the fifth embodiment of the present invention will be described with reference to the drawings. FIG. 9 is a diagram illustrating a configuration example of the MLI modulation unit 117 according to the present embodiment. As shown in FIG. 9, the MLI modulation unit 117 according to the present embodiment is characterized by including a data rearrangement circuit 118 that rearranges the output from the symbol modulation circuit 231. FIG. 10 is a diagram illustrating a configuration example of the MLI demodulation unit 119 according to the present embodiment. In addition to the configuration of the MLI demodulating unit 106 according to the second embodiment, the MLI demodulating unit 119 rearranges the MLI symbols that have been subjected to propagation path compensation in the order reverse to that at the time of transmission and returns the data to the original order. A circuit 120 is provided. In the second embodiment of the present invention, when there is a subcarrier whose SNR is extremely low due to a drop in propagation path characteristics or the like, the SNR of an MLI symbol transmitted on the subcarrier over several slots is poor. Even if the vector addition is performed, the improvement amount of the SLI of the MLI symbol is small, and it becomes a bottleneck of the MLI demodulation success probability.

  Therefore, in this embodiment, by performing transmission by assigning MLI symbols to different subcarriers for each slot, it is possible to avoid a decrease in the SNR of a specific MLI symbol, and to improve the MLI demodulation success probability. There is an advantage that can be.

  Next, a modem according to a sixth embodiment of the present invention will be described with reference to the drawings. FIG. 11 is a diagram showing an allocation method when the number of subcarriers is 32 in the present embodiment. D1 to d32 shown in FIG. 11 are MLI symbols. The subcarrier numbers are SC1 to SC32. The rearrangement method when transmitting the second slot is as follows.

(1) The subcarrier is divided into two blocks, SC1 to SC16 and SC17 to SC32, which are a first block and a second block, respectively.

(2) The MLI symbol transmitted in the first block when transmitting the first slot is allocated to the second block.

(3) When transmitting the first slot, the MLI symbol transmitted in the second block is allocated to the first block.

  The rearrangement method when transmitting the third slot is as follows.

(1) The subcarrier is divided into four blocks of SC1 to SC8, SC9 to SC16, SC17 to SC24, SC25 to SC32, which are a first block, a second block, a third block, and a fourth block, respectively.

(2) The MLI symbol transmitted in the first block when transmitting the second slot is allocated to the second block.

(3) The MLI symbol transmitted in the second block when transmitting the second slot is allocated to the first block.

(4) The MLI symbol transmitted in the third block when transmitting the second slot is allocated to the fourth block.

(5) The MLI symbol transmitted in the fourth block when transmitting the second slot is allocated to the third block.

  Thereafter, the third slot is divided into 8 blocks, the fourth slot is divided into 16 blocks, and MLI symbols are similarly assigned. In the case of the number that cannot be divided equally when dividing into blocks, the surplus subcarriers are assigned to any block. In the present embodiment, the number of subcarriers is equally divided and divided into blocks, and the MLI symbols that are assigned in groups of two are exchanged. If it is, it will not be limited to the above-mentioned method.

  Since the propagation path characteristics received by adjacent subcarriers have a correlation, even if MLI symbols are assigned to adjacent subcarriers, the received propagation path characteristics do not change significantly. Since the purpose of the fifth embodiment is to avoid a decrease in the SNR of a specific MLI symbol, it is desirable to allocate to subcarriers that have no correlation. The rearrangement scheme described above has an advantage that all MLI symbols can be allocated to subcarriers away from the subcarriers used in the previous slot, and MLI demodulation can be successfully performed at an early stage.

  Next, a seventh embodiment of the present invention will be described with reference to the drawings. The present embodiment is one of the MLI symbol rearrangement methods performed by the data rearrangement circuit according to the fifth embodiment, and is characterized by performing rearrangement based on the propagation path estimation result.

  FIG. 12 is a diagram illustrating a configuration example of the OFDM / MTPC modulation circuit 121 according to the present embodiment. The OFDM / MTPC modulation circuit 121 is a data rearrangement method based on the propagation path estimation result for each subcarrier of the propagation path estimation circuit 216 (FIG. 24) of the OFDM / MTPC demodulation circuit 209 (FIG. 24). A data rearrangement specifying unit 122 for designating a signal, a signal generation circuit 123 for generating a signal based on the rearrangement method determined by the data rearrangement specification unit 122, and a signal generated by the signal generation circuit 123. Symbol modulation circuit 124 that modulates, transmission power control circuit 125 that adjusts the modulation signal output of symbol modulation circuit 124 to a value determined by modulation scheme transmission power designation circuit 225 for each subcarrier, and output of transmission power control circuit 125 IFFT circuit 126 that performs inverse Fourier transform on the data, and a data rearrangement designation signal Based on configured to include a data rearrangement circuit 127 rearranges the data.

  FIG. 13 is a diagram illustrating a configuration example of the data rearrangement designation unit 122. As shown in FIG. 13, the data rearrangement designating unit 122 calculates the power for each subcarrier of the propagation path estimation result output from the propagation path estimation circuit 216 (FIG. 24) of the OFDM / MTPC demodulation circuit 209 (FIG. 24). The power calculation circuit 128 to be calculated, the data rearrangement circuit 129 that rearranges the output signals of the power calculation circuit 128 from the subcarrier order to the data order, and the addition that adds the output signal of the data rearrangement circuit 129 and the output signal of the storage circuit 131 A circuit 130, a storage circuit 131 for storing the output signal of the adder circuit 130, a data rearrangement designating circuit 132 for designating a rearrangement method of MLI symbols from the output signal of the adder circuit 130 and the output signal of the power calculation circuit 128, It is comprised including.

  The frame format in this embodiment is shown in FIG. A signal subframe 133 for notifying the rearrangement order of the MLI symbols is inserted after the CE subframe 205. The data rearrangement designation circuit 132 has a table in which subcarrier numbers and MLI symbol numbers are associated with each other. In the subcarrier number column, the subcarrier numbers are written in order from the subcarrier with the largest power of the channel estimation result at the present time, and the MLI symbol number column is the MLI estimated that the transmission / reception power of the slot transmitted so far is small The MLI symbol number is written in order from the symbol. The data rearrangement designation circuit 132 designates the rearrangement method so that the MLI symbols are assigned to the corresponding subcarriers on the table. The table is updated sequentially each time a slot is transmitted.

  FIG. 15 is a flowchart showing an operation flow of the data rearrangement designation unit. The operation of the data rearrangement specifying unit 122 at the time of transmission in the Nth slot will be described with reference to this flowchart. The power calculation circuit 128 sets the latest channel estimation result output from the channel estimation circuit 216 (FIG. 24) of the OFDM / MTPC demodulation circuit 209 (FIG. 24) as the channel estimation result at the time of transmission in the Nth slot, Power of the channel estimation result for each subcarrier is calculated (step S31). The subcarriers are rearranged in descending order of the power of the propagation path estimation result, and the subcarrier numbers are written in the table (step S32). The data rearrangement designation circuit 132 designates the rearrangement method so that the MLI symbols are assigned to the corresponding subcarriers on the table (step S33). The data rearrangement circuit 231 rearranges the MLI symbols according to the data rearrangement designation signal (step S34). The data rearrangement circuit 129 rearranges the power of the propagation path estimation result according to the data rearrangement designation signal. This corresponds to rearranging the power of the propagation path estimation result at the time of transmission in the Nth slot in the order of MLI symbols (step S35). The adder circuit 130 sums the power of the propagation path estimation result at the time of transmission in the Nth slot output from the data rearrangement circuit 129 and the received power estimation value up to the (N−1) th slot output from the storage circuit 131. Are added (step S36). The storage circuit 131 stores the output signal of the adder circuit 130 as the sum of the received power estimation values up to the Nth slot (step S37). The MLI symbols are rearranged in ascending order of the sum of the received power estimation values, and the MLI symbol numbers are written in the table (step S38). It is determined whether the frame processing has been completed (step S39). If it is determined in step S39 that the frame processing has not been completed, the process returns to S31 to prepare for transmission in the (N + 1) th slot. Thereafter, the operation follows the above rules. As a result of step S39, when it is determined that the frame processing is completed, the data stored in the storage circuit 131 is discarded and the table is returned to the initial value (reset: step S40).

  According to the above method, since rearrangement is performed based on the propagation path estimation result, a situation where the SNR of a specific MLI symbol becomes low can be reliably avoided. Further, since the rearrangement method can be finely controlled, there is an advantage that the SNR can be raised efficiently.

  Next, a modulation / demodulation unit according to an eighth embodiment of the present invention will be described with reference to the drawings. This embodiment is a kind of the rearrangement method in the seventh embodiment and relates to the rearrangement method for reducing the amount of rearrangement notification information. In the present embodiment, the number of subcarriers is 32.

  First, as an example of general rearrangement order notification information, it is assumed that the subcarrier numbers assigned in the previous slot are described in order from the MLI symbol assigned to the first subcarrier. If the number of subcarriers is 32, 5 bits are required to represent the subcarrier number, and there are 32 subcarriers, so the rearrangement order notification information is 5 × 32 = 160 (bits). Is required. An example of the rearrangement order notification information at this time is shown in FIG. From the left, the correspondence between the subcarrier number and the data number at the time of the first slot transmission, the second slot transmission, and the third slot transmission is shown.

  In this embodiment, eight types of rearrangement methods 1 to 8 shown in FIG. 17 are set in advance as the rearrangement method, and this rearrangement method is also known on the receiving side. In the seventh embodiment, data rearrangement is performed so that the MLI symbols are assigned to the corresponding subcarriers on the table. However, in the present embodiment, the set 8 is set in consideration of the created table. An optimum sorting method is selected from the sort methods, and sorting is performed according to the sorting method. As the subcarrier rearrangement order notification information, the rearrangement method number of 3 bits (represented by “000”, “001”... “111” in FIG. 17) shown in the table may be transmitted. There is an advantage that the replacement order notification information can be greatly reduced.

  Next, a modem according to a ninth embodiment of the present invention will be described with reference to the drawings. The present embodiment is a kind of rearrangement method in the eighth embodiment, and is a rearrangement method that reduces the amount of rearrangement notification information. In the present embodiment, the number of subcarriers is 32, 10 slots are 1 frame. In this embodiment, eight types of rearrangement schemes are set for each slot from the first slot to the tenth slot as shown in FIG. 18, and this rearrangement scheme is also known on the receiving side. It shall be. The numbers 1 to 8 described in the matrix in FIG. 18 correspond to any of the rearrangement method numbers 1 to 8 shown in FIG. The rearrangement method designating circuit assumes that the fluctuation of the propagation path is very small within the frame time, and considers the propagation path estimation result at the time of transmission in the first slot. Select the optimal combination of sorting methods from the list. As the subcarrier rearrangement order notification information, it is only necessary to transmit the combination number of the 3-bit rearrangement method shown in the figure only in the first slot, and the rearrangement order notification information can be greatly reduced. There are advantages.

    Although the OFDM communication apparatus according to each embodiment has been specifically described above, it is needless to say that the present invention is not limited to the above embodiment and various modifications are possible. For example, a program for causing a computer to execute the steps described in the above embodiments also falls within the scope of the present invention.

  Since the SNR in high-speed data communication or the like can be significantly reduced, a communication system with good quality can be realized.

Claims (20)

A plurality of subcarriers are used, and there are a plurality of slots for transmitting data and control information for demodulating the data in the same communication frame, and at least the modulation of each subcarrier is included in the control information. A demodulator used in a radio communication system including modulation scheme information for notifying a scheme to a receiving side,
Vector addition modulation method information generating means for adding the amplitude component and phase component of the received signal corresponding to the modulation method information to individual slots belonging to the same communication frame;
The modulation scheme information was vector addition, and a data demodulation means for using as the modulation scheme information in demodulating each subcarrier corresponding to the data in the individual slots existing in the same communication frame
The demodulator comprising vector addition modulation scheme information generation means for generating vector addition modulation scheme information using propagation scheme compensated modulation scheme information . The modulation scheme information is
In the same frame, each slot is assigned to a different subcarrier and transmitted.
The demodulator according to claim 1, wherein the vector addition modulation scheme information is generated using modulation scheme information assigned to a different subcarrier for each slot. A plurality of subcarriers are used, and there are a plurality of slots for transmitting data and control information for demodulating the data in the same communication frame, and at least the modulation of each subcarrier is included in the control information. A demodulator used in a radio communication system including modulation scheme information for notifying a scheme to a receiving side,
For each slot belonging to the same communication frame, the received signal corresponding to the modulation scheme information is symbol demodulated, and each bit string of the modulation scheme information of each symbol demodulated slot is compared for each bit string. A data demodulating unit that determines bits by majority decision and uses a bit arrangement obtained by combining the determined bits as modulation scheme information at the time of demodulation of each subcarrier;
Further, the modulation scheme information is allocated to different subcarriers for each slot and transmitted in the same frame, and the modulation scheme information used for the majority decision is allocated to different subcarriers for each slot. demodulation unit characterized by using the modulation scheme information. A plurality of subcarriers are used, and there are a plurality of slots for transmitting data and control information for demodulating the data in the same communication frame, and at least the modulation of each subcarrier is included in the control information. A demodulator used in a radio communication system including modulation scheme information for notifying a scheme to a receiving side,
For each slot belonging to the same communication frame, the received signal corresponding to the modulation scheme information is symbol demodulated, and each bit string of the modulation scheme information of each symbol demodulated slot is compared for each bit string. A data demodulating unit that determines bits by majority decision and uses a bit arrangement obtained by combining the determined bits as modulation scheme information when demodulating each subcarrier;
Further, the modulation scheme information is transmitted by being rearranged in a different bit arrangement for each slot in the same frame,
Modulation scheme information to be used for the determination of the majority vote, demodulation unit and modulation scheme information rearranged in bit locations in each said slot, it characterized by using to restore to the original arrangement. The allocation method in each slot of the subcarrier is:
In the first step, in the slot allocated for the first time, the subcarriers to which the modulation scheme information is allocated are divided into a first subcarrier block and a second subcarrier block on the basis of the frequency band,
In a second step, the frequency bands of the first subcarrier block and the second subcarrier block are exchanged,
In the third step, the first subcarrier block after frequency band exchange and the second subcarrier block after exchange are assigned to the next slot,
In the fourth step, in each subcarrier block assigned in the third step, the frequency band is divided into a third subcarrier block and a fourth subcarrier block based on the frequency band,
In a fifth step, exchanging frequency bands of the third subcarrier block and the fourth subcarrier block;
In the sixth step, the third subcarrier block after frequency band exchange and the fourth subcarrier block after frequency band exchange are assigned to the next slot,
4. The demodulator according to claim 2 , further comprising repeating the fourth step to the sixth step. A receiving device comprising the demodulator according to any one of claims 1 to 5 ,
A wireless communication apparatus comprising: a transmitter including a modulator that modulates a signal received by the demodulator according to any one of claims 1 to 5 . A plurality of subcarriers are used, and there are a plurality of slots for transmitting data and control information for demodulating the data in the same communication frame, and at least the modulation of each subcarrier is included in the control information. A wireless communication system including modulation scheme information for notifying a receiver of a scheme,
Vector addition modulation scheme information generating means for vector addition of the amplitude component and phase component of the received signal corresponding to the modulation scheme information for each slot belonging to the same communication frame;
Data demodulation means for using the modulation method information subjected to vector addition as modulation method information when demodulating each subcarrier corresponding to data in each slot existing in the same communication frame; ,
Further, the control information, radio communications systems that characterized in that it comprises a sort order notification information for notifying the receiving side sorting information symbols constituting the modulation method information for each slot. A modulator used in the wireless communication system according to claim 7 ,
It has a function of receiving, as input information, a propagation path estimation result indicating a propagation path state of each subcarrier with a communication partner, and using the propagation path estimation result, the modulation scheme information according to the propagation path state of each subcarrier A modulator comprising: subcarrier selection means for selecting which subcarrier is to be allocated. 9. The modulator according to claim 8 , wherein the propagation path estimation result is a propagation path characteristic of each subcarrier estimated from a slot transmitted from the receiving side. Further, the subcarrier selection means includes:
9. The modulator according to claim 8 , wherein a subcarrier is assigned by selecting from a plurality of preset arrangement patterns of the modulation scheme information. Further, the subcarrier selection means selects from a plurality of preset modulation scheme information arrangement patterns, and notifies the communication partner of the selected modulation scheme information arrangement pattern in a first slot. The modulator according to claim 9 . A demodulator used in the wireless communication system according to claim 7 ,
Receiving the rearrangement order notification information, and based on the rearrangement order notification information, rearrange the symbols of the modulation scheme information of the individual slots so that they are restored to the original arrangement, and modulate the modulation scheme when demodulating each subcarrier. A demodulator characterized by being used as information. A wireless communication device comprising: a transmission device having the modulator according to any one of claims 8 to 11; and a reception device having the demodulator according to claim 12 . A plurality of subcarriers are used, and there are a plurality of slots for transmitting data and control information for demodulating the data in the same communication frame, and at least the modulation of each subcarrier is included in the control information. A demodulation method in a wireless communication system including modulation scheme information for notifying a receiver of a scheme,
For each slot belonging to the same communication frame, the amplitude and phase components of the received signal corresponding to the modulation scheme information, the vector addition modulation method information generating step of vector addition,
The modulation scheme information was vector addition, and a data demodulation step of using as the modulation scheme information in demodulating each subcarrier corresponding to the data in the individual slots existing in the same communication frame,
The modulation scheme information is transmitted by being allocated to different subcarriers for each slot within the same frame, and the vector addition modulation scheme information is transmitted using modulation scheme information allocated to different subcarriers for each slot. A demodulation method characterized by being generated . A plurality of subcarriers are used, and there are a plurality of slots for transmitting data and control information for demodulating the data in the same communication frame, and at least the modulation of each subcarrier is included in the control information. A modulation method in a wireless communication system including modulation scheme information for notifying a receiver of a scheme,
Receiving a propagation path estimation result indicating a propagation path state of each subcarrier with a communication partner as input information, and using the propagation path estimation result, the modulation scheme information according to the propagation path state of each subcarrier. And a subcarrier selection step of selecting which subcarrier to allocate. A plurality of subcarriers are used, and there are a plurality of slots for transmitting data and control information for demodulating the data in the same communication frame, and at least the modulation of each subcarrier is included in the control information. Modulation method information for notifying the reception side of the method is included, and the modulation method information is a demodulator used in a radio communication system that is assigned to a different subcarrier for each slot and transmits in the same frame. There,
Data rearranging means for rearranging the modulation scheme information transmitted by being assigned to different subcarriers for each slot for each slot belonging to the same communication frame, in the original order;
Vector addition modulation method information generating means for vector addition of the amplitude component and the phase component of the signal rearranged by the data rearranging means;
A demodulator comprising data modulation means for using the modulation scheme information subjected to vector addition as modulation scheme information when demodulating each subcarrier corresponding to data in individual slots existing in the same communication frame . A plurality of subcarriers are used, and there are a plurality of slots for transmitting data and control information for demodulating the data in the same communication frame, and at least the modulation of each subcarrier is included in the control information. A demodulator used in a radio communication system including modulation scheme information for notifying a scheme to a receiving side,
Propagation path compensation means for performing propagation path compensation on a received signal corresponding to the modulation scheme information for each slot belonging to the same communication frame;
Vector addition modulation method information generating means for vector addition of the amplitude component and phase component of the signal subjected to propagation path compensation;
A demodulator comprising data modulation means for using the modulation scheme information subjected to vector addition as modulation scheme information when demodulating each subcarrier corresponding to data in individual slots existing in the same communication frame . A plurality of subcarriers are used, and there are a plurality of slots for transmitting data and control information for demodulating the data in the same communication frame, and at least the modulation of each subcarrier is included in the control information. Modulation method information for notifying the reception side of the method is included, and the modulation method information is a demodulator used in a radio communication system that is assigned to a different subcarrier for each slot and transmits in the same frame. There,
Data rearranging means for rearranging the modulation scheme information transmitted by being assigned to different subcarriers for each slot for each slot belonging to the same communication frame, in the original order;
Symbol demodulation means for demodulating the signals rearranged by the data rearrangement means;
Each bit string of the modulation scheme information of each symbol demodulated is compared to determine a bit by majority for each bit string, and the bit arrangement obtained by combining the determined previous bits is modulation scheme information when demodulating each subcarrier. A demodulator characterized by being used as: A plurality of subcarriers are used, and there are a plurality of slots for transmitting data and control information for demodulating the data in the same communication frame, and at least the modulation of each subcarrier is included in the control information. Modulation scheme information for notifying the reception side of the scheme, the modulation scheme information is a demodulator used in a wireless communication system that transmits with different bit arrangement for each slot in the same frame,
Bit data rearrangement means for rearranging the modulation scheme information transmitted in different bit arrangements for each slot belonging to the same communication frame in the original order;
Each bit string of the modulation scheme information of the individual slots rearranged by the bit data rearranging means is compared to determine a bit by majority for each bit string, and a bit arrangement combining the determined bits is assigned to each sub-string. A demodulator which is used as modulation scheme information when demodulating a carrier. A plurality of subcarriers are used, and a plurality of slots for transmitting data and control information for demodulating the data in the same communication frame are provided. The control information includes at least a modulation scheme of each subcarrier. The modulation method information is a demodulation method used in a wireless communication system that is assigned to different subcarriers for each slot and transmits in the same frame. And
A data rearrangement step for rearranging the modulation scheme information transmitted by being assigned to different subcarriers for each slot for each slot belonging to the same communication frame, in the original order;
The amplitude and phase components of the sorted signals by the data rearranging means, and vector addition modulation method information generating step of vector addition,
A demodulation method comprising: a data demodulation step using the modulation scheme information subjected to vector addition as modulation scheme information when demodulating each subcarrier corresponding to data in individual slots existing in the same communication frame .

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