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JP4333377B2 - GaN single crystal substrate, manufacturing method thereof, and light emitting device - Google Patents
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JP4333377B2 - GaN single crystal substrate, manufacturing method thereof, and light emitting device - Google Patents

GaN single crystal substrate, manufacturing method thereof, and light emitting device Download PDF

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JP4333377B2
JP4333377B2 JP2004020078A JP2004020078A JP4333377B2 JP 4333377 B2 JP4333377 B2 JP 4333377B2 JP 2004020078 A JP2004020078 A JP 2004020078A JP 2004020078 A JP2004020078 A JP 2004020078A JP 4333377 B2 JP4333377 B2 JP 4333377B2
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徹 松岡
健作 元木
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Sumitomo Electric Industries Ltd
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Description

本発明は、光の吸収係数が小さいGaN単結晶基板およびその製造方法ならびに発光デバイスに関する。   The present invention relates to a GaN single crystal substrate having a small light absorption coefficient, a method for manufacturing the same, and a light emitting device.

発光ダイオード(Light Emitting Diode;以下LEDという)またはレーザダイオード(Laser Diode;以下LDという)などの発光デバイスの基板として、サファイア基板、GaN基板などが用いられている。   As a substrate of a light emitting device such as a light emitting diode (hereinafter referred to as LED) or a laser diode (hereinafter referred to as LD), a sapphire substrate, a GaN substrate, or the like is used.

しかし、サファイア基板は絶縁性が高いため、サファイア基板の裏面(基板上に発光層を有する半導体層が形成されていない面をいう、以下同じ)に電極を設けることができないため、サファイア基板上に形成した半導体層(たとえば、n型GaN層)上に電極を形成する必要があり、電流が厚みの小さい半導体層を通過することにより発光デバイスの駆動電圧が高くなるという問題点があった。   However, since the sapphire substrate is highly insulating, an electrode cannot be provided on the back surface of the sapphire substrate (the surface on which the semiconductor layer having a light-emitting layer is not formed; the same applies hereinafter). It is necessary to form an electrode on the formed semiconductor layer (for example, n-type GaN layer), and there is a problem that the driving voltage of the light emitting device is increased by passing a current through the semiconductor layer having a small thickness.

これに対して、GaN基板は、GaN基板の裏面に電極を設けることができるため、発光デバイスの駆動電圧を低減することができるが、サファイア基板に比べて光の吸収係数が大きく、LEDなどにおいて発光の一部がGaN基板に吸収され、光出力を低下させるという問題があった。透明度が高く、光の吸収係数の小さいGaN基板およびその製造方法が提案されているが、そのGaN基板の光吸収係数も十分小さなものではなかった(たとえば、特許文献1を参照)。このため、光の吸収係数の小さいGaN単結晶基板およびその製造方法ならびに光出力の大きい発光デバイスの開発が要望されていた。   On the other hand, the GaN substrate can be provided with an electrode on the back surface of the GaN substrate, so that the driving voltage of the light emitting device can be reduced. There is a problem in that part of the emitted light is absorbed by the GaN substrate and the light output is reduced. A GaN substrate having a high transparency and a small light absorption coefficient and a method for manufacturing the same have been proposed, but the light absorption coefficient of the GaN substrate is not sufficiently small (see, for example, Patent Document 1). Therefore, there has been a demand for the development of a GaN single crystal substrate having a small light absorption coefficient, a method for manufacturing the same, and a light emitting device having a large light output.

また、サファイア基板またはGaN基板の裏面に凹凸を設けて光を基板の側面に向けて反射させることによって基板側面からの光の取り出し効率を上げることを提案されているが、その光の取り出し効率の向上も十分大きなものではなかった(たとえば、特許文献2を参照)。
特開2000−12900号公報 特開2002−368261号公報
In addition, it has been proposed to increase the light extraction efficiency from the side surface of the substrate by providing irregularities on the back surface of the sapphire substrate or GaN substrate and reflecting the light toward the side surface of the substrate. The improvement was not sufficiently large (see, for example, Patent Document 2).
Japanese Patent Laid-Open No. 2000-12900 JP 2002-368261 A

上記状況を鑑みて、本発明は、光の吸収係数の小さいGaN単結晶基板およびその製造方法ならびに光出力の大きい発光デバイスを提供することを目的とする。   In view of the above situation, an object of the present invention is to provide a GaN single crystal substrate having a small light absorption coefficient, a method for manufacturing the same, and a light emitting device having a large light output.

本発明は、厚さが70μm〜450μmであるGaN単結晶基板であって、GaN単結晶基板は、ドーパントとして酸素、硫黄およびケイ素からなる群から選ばれる少なくとも1つの元素を含み、波長375nmの光の吸収係数が34cm -1 〜68cm -1 であり、かつ波長500nmの光の吸収係数が7cm -1 〜10cm -1 であることを特徴とするGaN単結晶基板である。 The present invention is a GaN single crystal substrate having a thickness of 70 μm to 450 μm, the GaN single crystal substrate including at least one element selected from the group consisting of oxygen, sulfur and silicon as a dopant, and having a wavelength of 375 nm absorption coefficient is 34cm -1 ~68cm -1, and a GaN single crystal substrate, wherein the absorption coefficient of light of wavelength 500nm is 7cm -1 ~10cm -1.

本発明にかかるGaN単結晶基板のキャリア濃度は5×1017cm-3〜2×1019cm-3であることが好ましい。また、本発明にかかるGaN単結晶基板の主面の表面粗さRaは10nm以下であることが好ましい。 The carrier concentration of the GaN single crystal substrate according to the present invention is preferably 5 × 10 17 cm −3 to 2 × 10 19 cm −3 . The surface roughness Ra of the main surface of the GaN single crystal substrate according to the present invention is preferably 10 nm or less.

また、本発明は、上記GaN単結晶基板の製造方法であって、GaAs基板上に点状またはストライプ状の開口窓を有するマスク層を形成する工程と、開口窓上にGaNバッファ層を少なくとも2回成長させる工程と、GaNバッファ層上にHVPE法によりGaN単結晶層をエピタキシャル成長させる工程と、GaAs基板を除去する工程とを少なくとも含み、GaN単結晶層をエピタキシャル成長させる工程において、原料ガスとして、NH 3 ガスおよびGa融液と反応してGaClガスとなるHClガスに加えて、O 2 およびN 2 の混合ガス、SiH 4 およびH 2 の混合ガス、またはH 2 SおよびH 2 の混合ガスを用いるGaN単結晶基板の製造方法である。 The present invention is also a method for producing the GaN single crystal substrate, comprising: forming a mask layer having a dotted or striped opening window on a GaAs substrate; and at least two GaN buffer layers on the opening window. a step of times grown epitaxially growing a GaN single crystal layer by HVPE on a GaN buffer layer, viewed at least containing a step of removing the GaAs substrate, and in the step of epitaxially growing a GaN single crystal layer, as a raw material gas , NH 3 reacts with the gas and the Ga melt in addition to the HCl gas as a GaCl gas, a mixed gas of O 2 and N 2, a mixed gas of SiH 4 and H 2 or a gas mixture of H 2 S and H 2, This is a method of manufacturing a GaN single crystal substrate using

さらに、本発明は、上記GaN単結晶基板上に、少なくとも1層のIII族窒化物半導体層が形成されている発光デバイスである。   Furthermore, the present invention is a light emitting device in which at least one group III nitride semiconductor layer is formed on the GaN single crystal substrate.

上記のように、本発明によれば、光の吸収係数の小さいGaN単結晶基板およびその製造方法ならびに光出力の大きい発光デバイスを提供することができる。   As described above, according to the present invention, it is possible to provide a GaN single crystal substrate having a small light absorption coefficient, a manufacturing method thereof, and a light emitting device having a large light output.

本発明にかかる一のGaN単結晶基板は、直径が20mm以上、かつ厚さが70μm〜450μmであるGaN単結晶基板であって、GaN単結晶基板の375nm〜500nmの波長領域にある光の吸収係数αが7cm-1〜68cm-1である。 One GaN single crystal substrate according to the present invention is a GaN single crystal substrate having a diameter of 20 mm or more and a thickness of 70 μm to 450 μm, and absorbing light in a wavelength region of 375 nm to 500 nm of the GaN single crystal substrate. coefficient α is 7cm -1 ~68cm -1.

GaN単結晶基板の直径が20mm未満であると基板の生産性が低下し、厚さが70μm未満であると基板の機械的強度が低下し、厚さが450μmを超えると基板による光の吸収量が大きくなる。さらに厚さが200μm以上であると基板の機械的強度が向上し、基板の取り扱いが容易になる。したがって、GaN単結晶基板の厚さは、200μm〜450μmが好ましい。   If the diameter of the GaN single crystal substrate is less than 20 mm, the productivity of the substrate is reduced. If the thickness is less than 70 μm, the mechanical strength of the substrate is reduced. If the thickness exceeds 450 μm, the amount of light absorbed by the substrate. Becomes larger. Further, when the thickness is 200 μm or more, the mechanical strength of the substrate is improved and the handling of the substrate becomes easy. Therefore, the thickness of the GaN single crystal substrate is preferably 200 μm to 450 μm.

また、375nm〜500nmの波長領域にある光の吸収係数αが7cm-1未満となるような低キャリア濃度においては、GaN基板電気抵抗が大きくなり、GaN単結晶基板の裏側に電極を設けるような構造の発光デバイスを構成すると駆動電圧が大きくなる。一方、375nm〜500nmの波長領域にある光の吸収係数αが68cm-1を超えるとGaN単結晶基板の光の吸収係数が増大し発光デバイスの光出力が低下する。なお、光の波長が小さいほどその光は高いエネルギーを有しているためGaN単結晶基板のその光の吸収係数が大きくなる。 Also, at a low carrier concentration such that the light absorption coefficient α in the wavelength region of 375 nm to 500 nm is less than 7 cm −1 , the GaN substrate electrical resistance increases, and an electrode is provided on the back side of the GaN single crystal substrate. When the light emitting device having the structure is configured, the driving voltage is increased. On the other hand, when the light absorption coefficient α in the wavelength region of 375 nm to 500 nm exceeds 68 cm −1 , the light absorption coefficient of the GaN single crystal substrate increases and the light output of the light emitting device decreases. In addition, since the light has higher energy as the wavelength of light is smaller, the light absorption coefficient of the GaN single crystal substrate becomes larger.

ここで、光の吸収係数αは次式(1)で定義される。   Here, the light absorption coefficient α is defined by the following equation (1).

α=−(1/H)In(I/I0) (1)
(式(1)中、I0は入射光の強度、Iは観測光の強度、Hは基板の厚さを表わす。また、Inは自然対数を示す。)
本発明にかかるGaN単結晶基板のキャリア濃度は5×1017cm-3〜2×1019cm-3であることが好ましい。GaN単結晶基板のキャリア濃度が5×1017cm-3未満であると、GaN単結晶基板の電気抵抗が大きくなり、GaN単結晶基板の裏側に電極を設けるような構造の発光デバイスを構成することができない。一方、GaN単結晶基板のキャリア濃度が2×1019cm-3を超えると、禁制帯内のドナー準位以外の準位も増大するため光の吸収係数が大きくなる。
α = − (1 / H) In (I / I 0 ) (1)
(In formula (1), I 0 represents the intensity of incident light, I represents the intensity of observation light, H represents the thickness of the substrate, and In represents the natural logarithm.)
The carrier concentration of the GaN single crystal substrate according to the present invention is preferably 5 × 10 17 cm −3 to 2 × 10 19 cm −3 . When the carrier concentration of the GaN single crystal substrate is less than 5 × 10 17 cm −3 , the electrical resistance of the GaN single crystal substrate increases, and a light emitting device having a structure in which an electrode is provided on the back side of the GaN single crystal substrate is configured. I can't. On the other hand, when the carrier concentration of the GaN single crystal substrate exceeds 2 × 10 19 cm −3 , the level other than the donor level in the forbidden band increases, and the light absorption coefficient increases.

本発明にかかるGaN単結晶基板は、ドーパントとしてO、C、SおよびSiからなる群から選ばれる少なくとも1つの元素を含むことが好ましい。GaN単結晶基板へのドーピングにより、OまたはSはGaN単結晶のNの位置に、CまたはSiはGaN単結晶のGaの位置に入って、いずれもn型導電性を示し、GaN単結晶基板の電気抵抗を下げることができる。   The GaN single crystal substrate according to the present invention preferably contains at least one element selected from the group consisting of O, C, S and Si as a dopant. By doping the GaN single crystal substrate, O or S enters the N position of the GaN single crystal, and C or Si enters the Ga position of the GaN single crystal, both exhibiting n-type conductivity. The electrical resistance can be lowered.

本発明にかかるGaN単結晶基板の主面の表面粗さRaは10nm以下であることが好ましい。表面粗さRaが10nm未満であると、その表面上に形成される半導体層の結晶性が低下するため、発光デバイスの作製に不利となる。ここで、表面粗さRaは、JIS B 0601における算術平均粗さRaを意味する。すなわち、Raは次式(2)で定義されるように基準長さLにおけるZ(x)の絶対値の平均をいう。ここで、Z(x)は、任意の位置xにおける粗さ曲線の高さを示す。GaN単結晶基板の主面の表面粗さRaは、主面をMP(Mechanical Polishing;機械的研磨)法またはCMP(Chemical Mechanical Polishing;化学機械的研磨)法などにより研磨することによって、小さくすることができる。   The surface roughness Ra of the main surface of the GaN single crystal substrate according to the present invention is preferably 10 nm or less. When the surface roughness Ra is less than 10 nm, the crystallinity of the semiconductor layer formed on the surface is lowered, which is disadvantageous for manufacturing a light emitting device. Here, the surface roughness Ra means the arithmetic average roughness Ra in JIS B 0601. That is, Ra is the average of the absolute values of Z (x) at the reference length L as defined by the following equation (2). Here, Z (x) indicates the height of the roughness curve at an arbitrary position x. The surface roughness Ra of the main surface of the GaN single crystal substrate is reduced by polishing the main surface by an MP (Mechanical Polishing) method or a CMP (Chemical Mechanical Polishing) method. Can do.

Figure 0004333377
Figure 0004333377

本発明にかかる一のGaN単結晶基板の製造方法は、図1を参照して、図1(a)に示すようにGaAs基板1上に点状またはストライプ状の開口窓21を有するマスク層を形成する工程(以下、マスク層形成工程という)と、図1(b)に示すように開口窓21上に第1のGaNバッファ層3aを成長させる工程(以下、第1のGaNバッファ層形成工程という)と、図1(c)に示すように第1のGaNバッファ層3a上に第2のバッファ層3bを成長させてGaNバッファ層3を形成する工程(以下、第2のバッファ層形成工程という)と、図1(d)に示すようにGaNバッファ層3上にHVPE法によりGaN単結晶層4をエピタキシャル成長させる工程(以下、GaN単結晶層形成工程という)と、図1(e)に示すようにGaAs基板1、マスク層2およびGaNバッファ層3を除去する工程(以下、GaAs基板除去工程)とを少なくとも含む。   A method of manufacturing a GaN single crystal substrate according to the present invention is described with reference to FIG. 1 in which a mask layer having a dotted or striped opening window 21 is formed on a GaAs substrate 1 as shown in FIG. A step of forming (hereinafter referred to as a mask layer forming step) and a step of growing the first GaN buffer layer 3a on the opening window 21 as shown in FIG. 1B (hereinafter referred to as the first GaN buffer layer forming step). 1), a step of growing the second buffer layer 3b on the first GaN buffer layer 3a to form the GaN buffer layer 3 (hereinafter referred to as a second buffer layer forming step), as shown in FIG. 1D), as shown in FIG. 1D, a step of epitaxially growing the GaN single crystal layer 4 on the GaN buffer layer 3 by the HVPE method (hereinafter referred to as GaN single crystal layer forming step), and FIG. Ga as shown s substrate 1, the step of removing the mask layer 2 and the GaN buffer layer 3 (hereinafter, GaAs substrate removing step) comprising at least a.

GaNバッファ層3を2回以上に分けて成長させることにより、GaNバッファ層3上に形成されるGaN単結晶層4の結晶性がさらに向上して、光を吸収する内在準位濃度が低下することにより、GaN単結晶基板の光の吸収係数が著しく小さくなったものと考えられる。ここで、GaNバッファ層を2回形成した場合において、図1(d)において第1のGaNバッファ層3aと第2のバッファ層3bとの区別はなく、全体としてひとつのGaNバッファ層3を形成する。以下、各工程についてさらに詳しく説明する。   By growing the GaN buffer layer 3 in two or more times, the crystallinity of the GaN single crystal layer 4 formed on the GaN buffer layer 3 is further improved, and the concentration of the internal level that absorbs light is reduced. Thus, it is considered that the light absorption coefficient of the GaN single crystal substrate is remarkably reduced. Here, when the GaN buffer layer is formed twice, there is no distinction between the first GaN buffer layer 3a and the second buffer layer 3b in FIG. 1D, and one GaN buffer layer 3 is formed as a whole. To do. Hereinafter, each step will be described in more detail.

(マスク層形成工程)
マスク層形成工程においては、図1(a)を参照して、GaAs基板1上に点状またはストライプ状の開口窓21を有するマスク層2を形成する。点状の開口窓とは円状または多角形状の孤立した点としての開口窓をいい、ストライプ状の開口窓とは帯状の開口窓をいう。ここで、GaN単結晶層を均一に成長させる観点から、点状またはストライプ状の開口部は等間隔に配列することが好ましい。GaN単結晶層を成長させるための基板として用いられるGaAsは立方晶系であり、一般的には(111)A面、(111)B面を結晶成長面として用いる。A面とはGa原子が露出している面を、B面とはAs原子が露出している面をいう。
(Mask layer forming process)
In the mask layer forming step, referring to FIG. 1A, a mask layer 2 having dot-like or stripe-like opening windows 21 is formed on a GaAs substrate 1. A dot-shaped opening window refers to an opening window as a circular or polygonal isolated point, and a stripe-shaped opening window refers to a band-shaped opening window. Here, from the viewpoint of uniformly growing the GaN single crystal layer, it is preferable that the dot-shaped or stripe-shaped openings are arranged at equal intervals. GaAs used as a substrate for growing a GaN single crystal layer has a cubic system, and generally uses the (111) A plane and the (111) B plane as crystal growth planes. The A surface is a surface where Ga atoms are exposed, and the B surface is a surface where As atoms are exposed.

GaAs基板上に開口部を有するマスク層の形成は、たとえばGaAs基板全体にマスク材料を被覆した後、フォトリソグラフィにより等間隔に開口窓を設けることにより行なうことができる。ここで、マスク材料としては、Si34、SiO2などが挙げられる。また、マスク層の厚さは、特に制限はないが、100nm〜300nm程度が好ましい。 Formation of a mask layer having an opening on a GaAs substrate can be performed, for example, by covering the entire GaAs substrate with a mask material and then providing opening windows at equal intervals by photolithography. Here, examples of the mask material include Si 3 N 4 and SiO 2 . The thickness of the mask layer is not particularly limited, but is preferably about 100 nm to 300 nm.

点状の開口窓の形成は、たとえば、図2を参照して、GaAs基板1の(111)A面上に[11−2]方向に一定間隔Pをおいてならびかつ[−110]方向には半ピッチずれた正方形状の開口窓21を設けることにより行なう。ここで、[−110]方向の間隔Qは、31/2×P/2であることが好ましい。このときは、点状の開口窓21が、一辺の長さがPの正三角形の頂点に位置するように配列されている。このような開口窓の配列とすることにより、開口窓21にGaNバッファ層を2回以上成長させた後、GaN単結晶層4を成長させると、GaNは六方晶系であるため、図3に示すようにGaN単結晶4はほぼ六角形状に成長し、図4に示すように六角形のGaN単結晶4がほぼ同時に隣のGaN単結晶と接触して、それ以後均等な厚みで成長する。また、ストライプ状の開口窓の形成は、たとえば、[11−2]方向もしくは[−110]方向に伸びるストライプ状の開口窓を設けることにより行なう。 For example, referring to FIG. 2, the dotted aperture windows are formed on the (111) A surface of the GaAs substrate 1 with a constant interval P in the [11-2] direction and in the [−110] direction. Is performed by providing a square-shaped opening window 21 shifted by a half pitch. Here, the interval Q in the [−110] direction is preferably 3 1/2 × P / 2. At this time, the dotted aperture windows 21 are arranged so as to be positioned at the vertices of an equilateral triangle having a side length of P. With such an arrangement of the aperture windows, when the GaN buffer layer is grown twice or more in the aperture window 21 and then the GaN single crystal layer 4 is grown, GaN is hexagonal, so that FIG. As shown in FIG. 4, the GaN single crystal 4 grows in a substantially hexagonal shape, and as shown in FIG. 4, the hexagonal GaN single crystal 4 comes into contact with the adjacent GaN single crystal almost simultaneously and thereafter grows with a uniform thickness. The stripe-shaped opening window is formed by, for example, providing a stripe-shaped opening window extending in the [11-2] direction or the [−110] direction.

(GaNバッファ層形成工程)
次に、図1(b)および図1(c)を参照して、上記開口窓21にGaNバッファ層を2回以上成長させる。本発明においては、GaNバッファ層を2回以上形成させることが、GaN単結晶層の結晶性を向上させる観点から好ましい。GaNバッファ層を2回以上形成する場合、第1のGaNバッファ層、第2のGaNバッファ層および第nのGaNバッファ層(ここで、nは2以上の整数)を形成する方法には、特に制限はなく、HVPE(ハイドライド気相成長法;Hydride Vapor Phase Epitaxy)法、MOCVD(有機金属化学気相堆積法;Metal Organic Chemical Vapor Deposition)法、MOC(有機金属塩化物気相成長;Metal Organic Chloride Method)法などの気相成長を用いることができる。ここで、GaNバッファ層とは、GaNのアモルファス層であり、上記気相成長方法において、400℃〜600℃の低温雰囲気で成長を行なうのが一般的である。また、GaNバッファ層全体の厚さを20nm〜100nm程度にすることにより、マスク層の開口窓部分のみにGaNバッファ層を形成することができる。
(GaN buffer layer formation process)
Next, referring to FIG. 1B and FIG. 1C, a GaN buffer layer is grown in the opening window 21 twice or more. In the present invention, it is preferable to form the GaN buffer layer twice or more from the viewpoint of improving the crystallinity of the GaN single crystal layer. In the case of forming the GaN buffer layer twice or more, a method for forming the first GaN buffer layer, the second GaN buffer layer, and the nth GaN buffer layer (where n is an integer of 2 or more) There is no limitation, HVPE (Hydride Vapor Phase Epitaxy) method, MOCVD (Metal Organic Chemical Vapor Deposition) method, MOC (Metal Organic Chloride Vapor Deposition; Metal Organic Chloride) Vapor phase growth such as Method) can be used. Here, the GaN buffer layer is an amorphous layer of GaN, and is generally grown in a low temperature atmosphere of 400 ° C. to 600 ° C. in the above vapor phase growth method. Further, by setting the total thickness of the GaN buffer layer to about 20 nm to 100 nm, the GaN buffer layer can be formed only in the opening window portion of the mask layer.

HVPE法は、図5を参照して、周囲に円筒形のヒータ102を有するホットウオール型の反応炉101の上頂部に設けられた原料ガス導入口103から導入されたHClガス113がGa溜105内のGa融液106と反応してGaClガス116となる。反応炉101の上頂部に設けられた原料ガス導入口から導入されたNH3ガス114を導入して、上記GaClガス116と反応させてGaNを合成してサセプタ107上に設置された基板109上に堆積させるものである。なお、反応性の制御の観点から、原料ガスであるHClガスおよびNH3ガスは、H2ガスなどのキャリアガスと混合して用いられるのが一般的である。 In the HVPE method, referring to FIG. 5, HCl gas 113 introduced from a raw material gas inlet 103 provided at the top top of a hot-wall type reactor 101 having a cylindrical heater 102 around is a Ga reservoir 105. It reacts with the Ga melt 106 and becomes GaCl gas 116. An NH 3 gas 114 introduced from a source gas inlet provided at the top of the reaction furnace 101 is introduced, reacted with the GaCl gas 116 to synthesize GaN, and on the substrate 109 installed on the susceptor 107. Is to be deposited. From the viewpoint of reactivity control, HCl gas and NH 3 gas, which are raw material gases, are generally used by being mixed with a carrier gas such as H 2 gas.

MOCVD法は、コールドウオール型の反応炉において、TMG(トリメチルガリウム)などのGaの有機金属化合物ガスとNH3ガスとをキャリアガスであるH2ガスとともに、加熱した基板上に吹き付けることにより、TMGとNH3が反応してできたGaNを基板上に成長させるものである。 In the MOCVD method, TMG (trimethyl gallium) or another Ga organometallic compound gas such as TMG (trimethylgallium) gas and NH 3 gas are sprayed onto a heated substrate together with H 2 gas as a carrier gas in a cold wall type reactor. GaN produced by the reaction of NH 3 and NH 3 is grown on the substrate.

MOC法は、TMGなどのGaの有機金属ガスとHClガスとをホットウオール型の反応炉で反応させてGaClを合成し、これと基板付近に流したNH3ガスとを反応させて、加熱した基板上にGaNを成長させるものである。   In the MOC method, a Ga organometallic gas such as TMG and HCl gas are reacted in a hot-wall type reactor to synthesize GaCl, and this is reacted with NH 3 gas flowed in the vicinity of the substrate to heat the substrate. GaN is grown on top.

(GaN単結晶形成工程)
次に、図1(d)を参照して、上記GaNバッファ層3上にGaN単結晶層4をエピタキシャル成長させる。本発明においては、GaNバッファ層上にGaN単結晶をエピタキシャル成長させる方法として、HVPE法を用いることが好ましい。気相成長方法としては、上記のようにHVPE法以外にも、MOCVD法、MOC法などがあるが、MOCVD法およびMOC法においては原料としてTMGなどのGaの有機金属化合物を用いるため、GaN単結晶中にCが多く混入してGaN単結晶の光の吸収係数を大きくするが、HVPE法においてはGaの有機金属化合物を用いないため、GaN単結晶中へのCの混入を低減することができる。また、HVPE法は、MOCVD法およびMOC法に比べて結晶の成長速度が大きいため、GaN単結晶をより効率よく作製することができる。HVPE法において、雰囲気温度を800℃〜1050℃程度の高温にしてGaN単結晶をエピタキシャル成長させる。このとき、GaNバッファ層は結晶化する。
(GaN single crystal formation process)
Next, referring to FIG. 1D, a GaN single crystal layer 4 is epitaxially grown on the GaN buffer layer 3. In the present invention, the HVPE method is preferably used as a method for epitaxially growing a GaN single crystal on the GaN buffer layer. As described above, the vapor phase growth method includes the MOCVD method and the MOC method in addition to the HVPE method. However, in the MOCVD method and the MOC method, a Ga organometallic compound such as TMG is used as a raw material. Although a large amount of C is mixed in the crystal to increase the light absorption coefficient of the GaN single crystal, Ga organic metal compound is not used in the HVPE method, so that the mixing of C into the GaN single crystal can be reduced. it can. In addition, since the HVPE method has a higher crystal growth rate than the MOCVD method and the MOC method, a GaN single crystal can be produced more efficiently. In the HVPE method, the GaN single crystal is epitaxially grown at an atmospheric temperature of about 800 ° C. to 1050 ° C. At this time, the GaN buffer layer is crystallized.

(GaAs基板除去工程)
次に、図1(d)および図1(e)を参照して、GaAs基板1を除去する。GaAs基板1を除去する方法には、特に制限がないが、たとえば王水によってエッチングすることができる。また、マスク層2および結晶化が不十分なGaNバッファ層3は研磨などによって除去することができる。このようにして、GaN単結晶層4が得られる。なお、このようにして得られたGaN単結晶層は、O、C、SまたはSiなどのドーパントを添加しなくても、通常n型導電性を有するが、上記ドーパントを加えることにより、GaN単結晶層の電気抵抗をさらに低減することができる。さらに、上記GaN単結晶層を所定厚さに加工することによりGaN単結晶基板が得られる。
(GaAs substrate removal process)
Next, referring to FIGS. 1D and 1E, the GaAs substrate 1 is removed. The method for removing the GaAs substrate 1 is not particularly limited, but can be etched with aqua regia, for example. The mask layer 2 and the GaN buffer layer 3 with insufficient crystallization can be removed by polishing or the like. In this way, the GaN single crystal layer 4 is obtained. The GaN single crystal layer thus obtained usually has n-type conductivity without the addition of a dopant such as O, C, S, or Si. The electric resistance of the crystal layer can be further reduced. Furthermore, a GaN single crystal substrate is obtained by processing the GaN single crystal layer to a predetermined thickness.

本発明にかかる一の発光デバイスは、図6を参照して、上記GaN単結晶基板60の一つの主面に、n型GaN層61、In0.2Ga0.8N層およびGaN層を交互に5段重ねた多重量子井戸活性層62、p型Al0.15Ga0.85N層63、p型GaN層64、p側電極65が順次積層され、GaN単結晶基板60の他の主面にn側電極66が形成された発光デバイスである。このように、発光デバイスの基板として光の吸収係数が小さいGaN単結晶基板を用いることにより、駆動電圧が小さくかつ光出力の高い発光デバイスを得ることができる。 Referring to FIG. 6, one light emitting device according to the present invention has five stages of n-type GaN layers 61, In 0.2 Ga 0.8 N layers and GaN layers alternately arranged on one main surface of the GaN single crystal substrate 60. The stacked multiple quantum well active layer 62, p-type Al 0.15 Ga 0.85 N layer 63, p-type GaN layer 64, and p-side electrode 65 are sequentially stacked, and an n-side electrode 66 is formed on the other main surface of the GaN single crystal substrate 60. It is the formed light emitting device. Thus, by using a GaN single crystal substrate having a small light absorption coefficient as the substrate of the light emitting device, a light emitting device having a low driving voltage and a high light output can be obtained.

(実施例1)
1.GaN単結晶基板の作製
(1)マスク層形成工程
図1(a)を参照して、直径50mmのGaAs基板1上に、大気圧下でのCVD法によりマスク層2として厚さ100nmのSi34層を形成した。次いで、フォトリソグラフィにより、図2においてPが4μm、Qが3.5μmである正三角形の頂点に開口窓21(開口窓は一辺が1μmの正方形)が配列した。
Example 1
1. 1. Production of GaN single crystal substrate (1) Mask layer forming step Referring to FIG. 1A, a Si 3 layer having a thickness of 100 nm is formed as a mask layer 2 on a GaAs substrate 1 having a diameter of 50 mm by a CVD method under atmospheric pressure. N 4 layer was formed. Next, by photolithography, opening windows 21 (opening window is a square having a side of 1 μm) are arranged at the vertices of an equilateral triangle having P of 4 μm and Q of 3.5 μm in FIG.

(2)GaNバッファ層形成工程
図1(b)を参照して、上記開口窓21上に、HVPE法により、原料ガスとしてHClガス(分圧60.8Pa)およびNH3ガス(分圧1.31×104Pa)を用いて、雰囲気温度475℃で、厚さ40nmの第1のGaNバッファ層3aを成長させた(第1のGaNバッファ層形成工程)。
(2) GaN buffer layer forming step Referring to FIG. 1B, HCl gas (partial pressure 60.8 Pa) and NH 3 gas (partial pressure 1. 31 × 10 4 Pa) was used to grow a first GaN buffer layer 3a having a thickness of 40 nm at an atmospheric temperature of 475 ° C. (first GaN buffer layer forming step).

続けて、図1(c)を参照して、上記第1のGaNバッファ層3a上に、HVPE法により、原料ガスとしてHClガス(分圧60.8Pa)およびNH3ガス(分圧1.31×104Pa)を用いて、雰囲気温度500℃で、厚さ40nmの第2のGaNバッファ層3bを成長させて(第2のGaNバッファ層形成工程)、厚さ80nmのGaNバッファ層3を形成した。ここで、GaNバッファ層の厚さ(80nm)はマスク層の厚さ(100nm)より小さいため、GaNバッファ層3はマスク層2の開口窓21部分にのみ形成した。 Subsequently, referring to FIG. 1C, HCl gas (partial pressure 60.8 Pa) and NH 3 gas (partial pressure 1.31) are formed on the first GaN buffer layer 3a by HVPE as source gases. The second GaN buffer layer 3b having a thickness of 40 nm is grown at the atmospheric temperature of 500 ° C. using the × 10 4 Pa) (second GaN buffer layer forming step), and the GaN buffer layer 3 having a thickness of 80 nm is formed. Formed. Here, since the thickness (80 nm) of the GaN buffer layer is smaller than the thickness (100 nm) of the mask layer, the GaN buffer layer 3 was formed only in the opening window 21 portion of the mask layer 2.

(3)GaN単結晶層形成工程
次に、図1(d)を参照して、上記GaNバッファ層3上に、HVPE法により、原料ガスとしてHClガス(分圧1.25×103Pa)、NH3ガス(分圧1.31×104Pa)および0.1質量%のO2を含有するO2およびN2の混合ガス(分圧23.4Pa)を用いて、雰囲気温度1000℃で、厚さ450μmのGaN単結晶層4を形成した。
(3) GaN Single Crystal Layer Formation Step Next, referring to FIG. 1D, HCl gas (partial pressure 1.25 × 10 3 Pa) is formed on the GaN buffer layer 3 as a source gas by HVPE. Using an NH 3 gas (partial pressure 1.31 × 10 4 Pa) and a mixed gas of O 2 and N 2 containing 0.1% by mass of O 2 (partial pressure 23.4 Pa), the ambient temperature is 1000 ° C. Thus, a GaN single crystal layer 4 having a thickness of 450 μm was formed.

(4)GaAs基板除去工程
次に、図1(d)および図1(e)を参照して、GaAs基板1を王水でエッチングすることにより除去し、マスク層2および結晶化が不十分なGaNバッファ層3はMP法によって除去して、GaN単結晶層4を得た。さらに、このGaN単結晶層4をスライス刃または内周刃によりスライスした後、CMP法により表面粗さRaが3nmで厚さが200μmであるGaN単結晶基板を得た。得られたGaN単結晶基板のキャリア濃度は5×1017cm-3であり、波長375nmの光の吸収係数は34cm-1、波長500nmの光の吸収係数は7cm-1であった。ここで、GaN単結晶基板のキャリア濃度は van der Pauw 法により室温(23℃)にて測定し、光の吸収係数は分光光度計を用いて測定した。
(4) GaAs Substrate Removal Step Next, referring to FIG. 1 (d) and FIG. 1 (e), the GaAs substrate 1 is removed by etching with aqua regia, and the mask layer 2 and crystallization are insufficient. The GaN buffer layer 3 was removed by the MP method to obtain a GaN single crystal layer 4. Further, after slicing the GaN single crystal layer 4 with a slicing blade or an inner peripheral blade, a GaN single crystal substrate having a surface roughness Ra of 3 nm and a thickness of 200 μm was obtained by CMP. The carrier concentration of the obtained GaN single crystal substrate was 5 × 10 17 cm −3 , the absorption coefficient of light with a wavelength of 375 nm was 34 cm −1 , and the absorption coefficient of light with a wavelength of 500 nm was 7 cm −1 . Here, the carrier concentration of the GaN single crystal substrate was measured at room temperature (23 ° C.) by the van der Pauw method, and the light absorption coefficient was measured using a spectrophotometer.

2.LEDの作製
発光デバイスとしては、以下のLEDを作製した。図6を参照して、まず、上記の直径が50mm、厚さが250μm、表面粗さRaが3nmのGaN単結晶基板60の一つの主面上に、MOCVD法により、厚さ1.5μmのn型GaN層61、厚さ3nmのIn0.2Ga0.8N層および厚さ15nmのGaN層を交互に5段重ねた多重量子井戸活性層62、厚さ30nmのp型Al0.15Ga0.85N層63、厚さ100nmのp型GaN層64を順次形成した。さらに、p型GaN層64上にp側電極65としてAu/Ni(p型GaN層側がAu層)層を形成した。次に、チップ分割を容易にするために、GaN単結晶基板60の他の主面をCMP法によりラッピングを行ない、GaN単結晶基板60の厚さを200μmとした。次に、GaN単結晶基板60の他の主面における各300μm×300μm区画の中央部上にn側電極66として直径80μmの大きさのTi/Al(GaN単結晶基板側がTi)層を形成した。さらに、上記n側電極が他の主面の中央部に位置するように、上記半導体層およびp側電極が形成されたGaN単結晶基板60を大きさ300μm×300μmのチップに分割してLEDを得た。得られたLEDの20mAにおける駆動電圧は3.3V、発光波長460nmにおける光出力は4.8mWであった。結果を表1にまとめた。
2. Production of LED As a light emitting device, the following LED was produced. Referring to FIG. 6, first, a 1.5 μm-thickness is formed on one main surface of GaN single crystal substrate 60 having a diameter of 50 mm, a thickness of 250 μm, and a surface roughness Ra of 3 nm by MOCVD. An n-type GaN layer 61, a multiple quantum well active layer 62 in which an In 0.2 Ga 0.8 N layer having a thickness of 3 nm and a GaN layer having a thickness of 15 nm are alternately stacked in five stages, and a p-type Al 0.15 Ga 0.85 N layer 63 having a thickness of 30 nm Then, a p-type GaN layer 64 having a thickness of 100 nm was sequentially formed. Further, an Au / Ni (p-type GaN layer side is Au layer) layer was formed as a p-side electrode 65 on the p-type GaN layer 64. Next, in order to facilitate chip division, the other main surface of the GaN single crystal substrate 60 was lapped by the CMP method, and the thickness of the GaN single crystal substrate 60 was set to 200 μm. Next, a Ti / Al (GaN single crystal substrate side is Ti) layer having a diameter of 80 μm was formed as an n-side electrode 66 on the center of each 300 μm × 300 μm section on the other main surface of the GaN single crystal substrate 60. . Further, the GaN single crystal substrate 60 on which the semiconductor layer and the p-side electrode are formed is divided into 300 μm × 300 μm chips so that the n-side electrode is located at the center of the other main surface. Obtained. The driving voltage of the obtained LED at 20 mA was 3.3 V, and the light output at an emission wavelength of 460 nm was 4.8 mW. The results are summarized in Table 1.

(実施例2)
GaN単結晶形成工程の際に、原料ガスとしてHClガス(分圧1.25×103Pa)、NH3ガス(分圧1.31×104Pa)および0.1質量%のO2を含有するO2およびN2の混合ガス(分圧6.55×102Pa)を用いた他は実施例1と同様にして、GaN単結晶基板を作製した。得られたGaN単結晶基板のキャリア濃度は2×1019cm-3であり、波長375nmの光の吸収係数は68cm-1、波長500nmの光の吸収係数は10cm-1であった。また、実施例1と同様にしてLEDを作製した。得られたLEDの20mAにおける駆動電圧は3.2V、発効波長460nmにおける光出力は3.5mWであった。結果を表1にまとめた。
(Example 2)
During the GaN single crystal formation step, HCl gas (partial pressure 1.25 × 10 3 Pa), NH 3 gas (partial pressure 1.31 × 10 4 Pa) and 0.1 mass% O 2 were used as source gases. A GaN single crystal substrate was produced in the same manner as in Example 1 except that the mixed gas of O 2 and N 2 contained (partial pressure 6.55 × 10 2 Pa) was used. The carrier concentration of the obtained GaN single crystal substrate was 2 × 10 19 cm −3 , the absorption coefficient of light with a wavelength of 375 nm was 68 cm −1 , and the absorption coefficient of light with a wavelength of 500 nm was 10 cm −1 . Further, an LED was produced in the same manner as in Example 1. The driving voltage of the obtained LED at 20 mA was 3.2 V, and the light output at the effective wavelength of 460 nm was 3.5 mW. The results are summarized in Table 1.

(実施例3)
GaN単結晶形成工程の際に、原料ガスとしてHClガス(分圧1.25×103Pa)、NH3ガス(分圧1.31×104Pa)および0.1質量%のSiH4を含有するSiH4およびH2の混合ガス(分圧93.5Pa)を用いた他は実施例1と同様にして、GaN単結晶基板を作製した。得られたGaN単結晶基板のキャリア濃度は5×1017cm-3であり、波長375nmの光の吸収係数は35cm-1、波長500nmの光の吸収係数は8cm-1であった。また、実施例1と同様にしてLEDを作製した。得られたLEDの20mAにおける駆動電圧は3.3V、発光波長460nmにおける光出力は4.7mWであった。結果を表1にまとめた。
(Example 3)
In the GaN single crystal formation step, HCl gas (partial pressure 1.25 × 10 3 Pa), NH 3 gas (partial pressure 1.31 × 10 4 Pa) and 0.1% by mass of SiH 4 are used as source gases. A GaN single crystal substrate was produced in the same manner as in Example 1 except that the mixed gas of SiH 4 and H 2 contained (partial pressure 93.5 Pa) was used. The carrier concentration of the obtained GaN single crystal substrate was 5 × 10 17 cm −3 , the absorption coefficient of light with a wavelength of 375 nm was 35 cm −1 , and the absorption coefficient of light with a wavelength of 500 nm was 8 cm −1 . Further, an LED was produced in the same manner as in Example 1. The driving voltage of the obtained LED at 20 mA was 3.3 V, and the light output at an emission wavelength of 460 nm was 4.7 mW. The results are summarized in Table 1.

(実施例4)
GaN単結晶形成工程の際に、原料ガスとしてHClガス(分圧1.25×103Pa)、NH3ガス(分圧1.31×104Pa)および1質量%のH2Sを含有するH2SおよびH2の混合ガス(分圧3.12×102Pa)を用いた他は実施例1と同様にして、GaN単結晶基板を作製した。得られたGaN単結晶基板のキャリア濃度は5×1017cm-3であり、波長375nmの光の吸収係数は39cm-1、波長500nmの光の吸収係数は10cm-1であった。また、実施例1と同様にしてLEDを作製した。得られたLEDの20mAにおける駆動電圧は3.4V、発光波長460nmにおける光出力は4.5mWであった。結果を表1にまとめた。
(Example 4)
In the GaN single crystal formation step, HCl gas (partial pressure 1.25 × 10 3 Pa), NH 3 gas (partial pressure 1.31 × 10 4 Pa) and 1% by mass of H 2 S are contained as source gases. A GaN single crystal substrate was produced in the same manner as in Example 1 except that a mixed gas of H 2 S and H 2 (partial pressure 3.12 × 10 2 Pa) was used. The carrier concentration of the obtained GaN single crystal substrate was 5 × 10 17 cm −3 , the absorption coefficient of light with a wavelength of 375 nm was 39 cm −1 , and the absorption coefficient of light with a wavelength of 500 nm was 10 cm −1 . Further, an LED was produced in the same manner as in Example 1. The driving voltage at 20 mA of the obtained LED was 3.4 V, and the light output at an emission wavelength of 460 nm was 4.5 mW. The results are summarized in Table 1.

(比較例1)
GaN単結晶形成工程の際に、原料ガスとしてHClガス(分圧1.25×103Pa)およびNH3ガス(分圧1.31×104Pa)のみを用いた他は実施例1と同様にして、GaN単結晶基板を作製した。得られたGaN単結晶基板のキャリア濃度は1×1017cm-3であり、波長375nmの光の吸収係数は26cm-1、波長500nmの光の吸収係数は4cm-1であった。また、実施例1と同様にしてLEDを作製した。得られたLEDの20mAにおける駆動電圧は5.4V、発効波長460nmにおける光出力は5.0mWであった。結果を表1にまとめた。
(Comparative Example 1)
Example 1 except that only HC1 gas (partial pressure 1.25 × 10 3 Pa) and NH 3 gas (partial pressure 1.31 × 10 4 Pa) were used as source gases during the GaN single crystal formation step. Similarly, a GaN single crystal substrate was produced. The carrier concentration of the obtained GaN single crystal substrate was 1 × 10 17 cm −3 , the absorption coefficient of light with a wavelength of 375 nm was 26 cm −1 , and the absorption coefficient of light with a wavelength of 500 nm was 4 cm −1 . Further, an LED was produced in the same manner as in Example 1. The driving voltage of the obtained LED at 20 mA was 5.4 V, and the light output at the effective wavelength of 460 nm was 5.0 mW. The results are summarized in Table 1.

(比較例2)
GaNバッファ層形成工程の際に、上記開口窓21上に、HVPE法により、原料ガスとしてHClガス(分圧60.8Pa)およびNH3ガス(分圧1.31×104Pa)を用いて、雰囲気温度500℃で、厚さ80nmのGaNバッファ層を1回で成長させ、2回目以降のGaNバッファ層を成長行なわなかった他は実施例2と同様にして、GaN単結晶基板を作製した。得られたGaN単結晶基板のキャリア濃度は2×1019cm-3であり、波長375nmの光の吸収係数は110cm-1、波長500nmの光の吸収係数は25cm-1であった。また、実施例1と同様にしてLEDを作製した。得られたLEDの20mAにおける駆動電圧は3.2V、発光波長460nmにおける光出力は2.2mWであった。結果を表1にまとめた。
(Comparative Example 2)
During the GaN buffer layer forming process, HCl gas (partial pressure 60.8 Pa) and NH 3 gas (partial pressure 1.31 × 10 4 Pa) are used as source gases on the opening window 21 by HVPE. A GaN single crystal substrate was fabricated in the same manner as in Example 2 except that a GaN buffer layer having a thickness of 80 nm was grown once at an ambient temperature of 500 ° C. and the second and subsequent GaN buffer layers were not grown. . The carrier concentration of the obtained GaN single crystal substrate was 2 × 10 19 cm −3 , the absorption coefficient of light with a wavelength of 375 nm was 110 cm −1 , and the absorption coefficient of light with a wavelength of 500 nm was 25 cm −1 . Further, an LED was produced in the same manner as in Example 1. The driving voltage of the obtained LED at 20 mA was 3.2 V, and the light output at an emission wavelength of 460 nm was 2.2 mW. The results are summarized in Table 1.

(比較例3)
サファイア基板(波長375nmおよび波長500nmの光の吸収係数が2cm-1)を用いて以下の発光デバイスを作製した。本発光デバイスは、図7参照して、大きさが400μm×300μm、厚さが200μm、表面粗さRaが3nmのサファイア基板70の一つの主面上に、MOCVD法により、厚さ1.5μmのn型GaN層61が形成され、このn型GaN層61の一部(300μm×300μm)上に、厚さ3nmのIn0.2Ga0.8N層および厚さ15nmのGaN層を交互に5段重ねた多重量子井戸活性層62、厚さ30nmのp型Al0.15Ga0.85N層63、厚さ100nmのp型GaN層64が順次形成されている。さらに、p型GaN層64上にp側電極65としてAu/Ni(p型GaN層側がAu層)層が形成されている。また、n型GaN層の残りの一部(100μm×300μm)に他の半導体層と接触しないようにn側電極として直径80μmの大きさのTi/Al(n型GaN層側がTi)層を形成した。得られたLEDの20mAにおける駆動電圧は3.7V、発光波長460nmにおける光出力は4.9mWであった。結果を表1にまとめた。
(Comparative Example 3)
The following light-emitting device was manufactured using a sapphire substrate (absorption coefficient of light having a wavelength of 375 nm and a wavelength of 500 nm was 2 cm −1 ). Referring to FIG. 7, this light emitting device has a thickness of 1.5 μm on one main surface of a sapphire substrate 70 having a size of 400 μm × 300 μm, a thickness of 200 μm, and a surface roughness Ra of 3 nm by MOCVD. N-type GaN layer 61 is formed, and a 3-nm thick In 0.2 Ga 0.8 N layer and a 15-nm thick GaN layer are alternately stacked on a part (300 μm × 300 μm) of this n-type GaN layer 61. The multi-quantum well active layer 62, the p-type Al 0.15 Ga 0.85 N layer 63 having a thickness of 30 nm, and the p-type GaN layer 64 having a thickness of 100 nm are sequentially formed. Further, an Au / Ni (p-type GaN layer side is Au layer) layer is formed on the p-type GaN layer 64 as the p-side electrode 65. In addition, a Ti / Al layer with a diameter of 80 μm (n-type GaN layer side is Ti) is formed as an n-side electrode so that the remaining part (100 μm × 300 μm) of the n-type GaN layer does not come into contact with other semiconductor layers. did. The driving voltage at 20 mA of the obtained LED was 3.7 V, and the light output at an emission wavelength of 460 nm was 4.9 mW. The results are summarized in Table 1.

Figure 0004333377
Figure 0004333377

表1から明らかなように、375nm〜500nmの波長領域にある光の吸収係数が7cm-1〜68cm-1である実施例1〜実施例4におけるLEDの駆動電圧は3.2V〜3.4Vと低く、かつ光出力は3.5mW〜4.7mWと高くなった。すなわち、低駆動電圧で高出力のLEDが得られた。これに対して、基板の波長500nmの光の吸収係数が4と小さい比較例1のLEDの駆動電圧は、5.4Vと大きくなった。これは、基板のキャリア濃度が小さく基板の電気抵抗が大きいことによるものである。また、基板の波長375nmの光の吸収係数が110cm-1と大きい比較例2のLEDの光出力は、2.2mWに低下した。これは、GaN単結晶基板の光の吸収係数が大きいことによるものである。 Table 1 As is apparent, LED driving voltage in Examples 1 to 4 the absorption coefficient of light is 7cm -1 ~68cm -1 in the wavelength region of 375nm~500nm is 3.2V~3.4V The light output was as high as 3.5 mW to 4.7 mW. That is, a high output LED with a low driving voltage was obtained. On the other hand, the driving voltage of the LED of Comparative Example 1 having a small absorption coefficient of light with a wavelength of 500 nm on the substrate was as large as 5.4V. This is due to the low carrier concentration of the substrate and the high electrical resistance of the substrate. In addition, the light output of the LED of Comparative Example 2 having a large absorption coefficient of light with a wavelength of 375 nm of the substrate as 110 cm −1 decreased to 2.2 mW. This is because the light absorption coefficient of the GaN single crystal substrate is large.

なお、実施例1〜実施例4におけるLEDの駆動電圧は3.2V〜3.4Vであり、従来の典型的なLEDである比較例3のLEDの駆動電圧3.7Vよりもさらに小さくすることができた。   In addition, the drive voltage of LED in Example 1- Example 4 is 3.2V-3.4V, and it should make it still smaller than the drive voltage 3.7V of LED of the comparative example 3 which is a conventional typical LED. I was able to.

今回開示された実施の形態および実施例はすべての点で例示であって制限的なものではないと考えられるべきである。本発明の範囲は、上記した説明でなくて特許請求の範囲によって示され、特許請求の範囲と均等の意味および範囲内のすべての変更が含まれることが意図される。   It should be understood that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

上記のように、本発明は、光の吸収係数の小さいGaN単結晶基板およびその製造方法、ならびに光出力の大きい発光デバイスを提供ために広く利用することができる。   As described above, the present invention can be widely used to provide a GaN single crystal substrate having a small light absorption coefficient, a method for manufacturing the same, and a light emitting device having a large light output.

本発明にかかる一のGaN単結晶基板の製造方法を説明する概略断面図である。ここで、(a)はマスク層形成工程を、(b)は第1のGaNバッファ層形成工程を、(c)は第2のGaNバッファ層形成工程を、(d)はGaN単結晶形成工程を、(e)はGaAs基板除去工程を示す。It is a schematic sectional drawing explaining the manufacturing method of one GaN single crystal substrate concerning this invention. Here, (a) is a mask layer forming step, (b) is a first GaN buffer layer forming step, (c) is a second GaN buffer layer forming step, and (d) is a GaN single crystal forming step. (E) shows a GaAs substrate removal step. マスク層における開口窓の配列を示す図である。It is a figure which shows the arrangement | sequence of the opening window in a mask layer. 開口窓上におけるGaN単結晶層の成長を示す図である。It is a figure which shows the growth of the GaN single-crystal layer on an opening window. 図3に続くGaN単結晶層の成長を示す図である。It is a figure which shows the growth of the GaN single-crystal layer following FIG. HVPE法を説明する概略模式図である。It is a schematic diagram explaining the HVPE method. 発光デバイスの一の形態を示す概略断面図である。It is a schematic sectional drawing which shows one form of a light-emitting device. 発光デバイスの他の形態を示す概略断面図である。It is a schematic sectional drawing which shows the other form of a light-emitting device.

符号の説明Explanation of symbols

1 GaAs基板、2 マスク層、3 GaNバッファ層、3a 第1のGaNバッファ層、3b 第2のGaNバッファ層、4 GaN単結晶層、21 開口窓、60 GaN単結晶基板、61 n型GaN層、62 多重量子井戸活性層、63 p型Al0.15Ga0.85N層、64 p型GaN層、65 p側電極、66 n側電極、70 サファイア基板、80 出力光、101 反応炉、102 ヒータ、103,104 原料ガス導入口、105 Ga溜、106 Ga融液、107 サセプタ、108 シャフト、109 基板、110 ガス排出口、113 HClガス、114 NH3ガス、116 GaClガス。 1 GaAs substrate, 2 mask layer, 3 GaN buffer layer, 3a first GaN buffer layer, 3b second GaN buffer layer, 4 GaN single crystal layer, 21 aperture window, 60 GaN single crystal substrate, 61 n-type GaN layer , 62 Multiple quantum well active layer, 63 p-type Al 0.15 Ga 0.85 N layer, 64 p-type GaN layer, 65 p-side electrode, 66 n-side electrode, 70 sapphire substrate, 80 output light, 101 reactor, 102 heater, 103 104 source gas inlet, 105 Ga reservoir, 106 Ga melt, 107 susceptor, 108 shaft, 109 substrate, 110 gas outlet, 113 HCl gas, 114 NH 3 gas, 116 GaCl gas.

Claims (5)

さが70μm〜450μmであるGaN単結晶基板であって、
前記GaN単結晶基板は、ドーパントとして酸素、硫黄およびケイ素からなる群から選ばれる少なくとも1つの元素を含み、波長375nmの光の吸収係数が34cm -1 〜68cm -1 であり、かつ波長500nmの光の吸収係数が7cm -1 〜10cm -1 であることを特徴とするGaN単結晶基板。
A GaN single crystal substrate having a thickness of 70 μm to 450 μm ,
The GaN single crystal substrates, oxygen as a dopant, wherein at least one of element selected from group consisting of sulfur and silicon, the absorption coefficient of light of wavelength 375nm is 34cm -1 ~68cm -1, and the wavelength of 500nm light GaN single crystal substrate, wherein the absorption coefficient of a 7cm -1 ~10cm -1.
前記GaN単結晶基板のキャリア濃度が5×1017cm-3〜2×1019cm-3であることを特徴とする請求項1に記載のGaN単結晶基板。 2. The GaN single crystal substrate according to claim 1, wherein the GaN single crystal substrate has a carrier concentration of 5 × 10 17 cm −3 to 2 × 10 19 cm −3 . 前記GaN単結晶基板の主面の表面粗さRaが10nm以下であることを特徴とする請求項1または請求項2のいずれかに記載のGaN単結晶基板。 3. The GaN single crystal substrate according to claim 1, wherein a surface roughness Ra of a main surface of the GaN single crystal substrate is 10 nm or less. 4. 請求項1〜請求項3のいずれかに記載のGaN単結晶基板の製造方法であって、
GaAs基板上に点状またはストライプ状の開口窓を有するマスク層を形成する工程と、前記開口窓上にGaNバッファ層を少なくとも2回成長させる工程と、前記GaNバッファ層上にHVPE法によりGaN単結晶層をエピタキシャル成長させる工程と、GaAs基板を除去する工程とを少なくとも含み、
前記GaN単結晶層をエピタキシャル成長させる工程において、原料ガスとして、NH 3 ガスおよびGa融液と反応してGaClガスとなるHClガスに加えて、O 2 およびN 2 の混合ガス、SiH 4 およびH 2 の混合ガス、またはH 2 SおよびH 2 の混合ガスを用いるGaN単結晶基板の製造方法。
A method for producing a GaN single crystal substrate according to any one of claims 1 to 3,
A step of forming a mask layer having a dotted or striped opening window on the GaAs substrate, a step of growing a GaN buffer layer on the opening window at least twice, and a GaN single layer by HVPE method on the GaN buffer layer. epitaxially growing a crystal layer, at least it viewed including the step of removing the GaAs substrate, and
In the step of epitaxially growing the GaN single crystal layer, as a source gas, in addition to HCl gas that reacts with NH 3 gas and Ga melt to become GaCl gas, a mixed gas of O 2 and N 2 , SiH 4 and H 2 mixed gas or method of manufacturing a GaN single crystal substrate using a mixed gas of H 2 S and H 2, of.
請求項1〜請求項のいずれかに記載のGaN単結晶基板上に、少なくとも1層のIII族窒化物半導体層が形成されている発光デバイス。 A light emitting device according to the GaN single crystal substrate according to any one of claim 1 to claim 3, and Group III nitride semiconductor layer at least one layer is formed.
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