JP4352579B2 - Semiconductor chip and manufacturing method thereof - Google Patents

Description

[0001]
The present invention relates to a semiconductor chip in which a recognition mark as a reference point used for grasping a place where a wire bonding apparatus should be connected in a wire bonding process in manufacturing a semiconductor device, and a method for manufacturing the same. It is.
[0002]
[Prior art]
In general, when connecting bonding pads of a semiconductor chip, two recognition marks are provided on the surface of the semiconductor chip for the purpose of relatively recognizing the position coordinates, and these are image-recognized and connected with wires. Wire bonding is performed by making the wire bonding apparatus grasp the position to be performed.
[0003]
On the other hand, Japanese Patent Application Laid-Open No. 2000-12603 (hereinafter referred to as a document) discloses a technique for preventing bonding from sticking out of a bonding pad of a semiconductor chip and preventing the protective film from being bonded.
[0004]
In this document, in order to visually recognize the center of the bonding pad, each side of all the bonding pads is provided with a convex or concave shape.
[0005]
[Problems to be solved by the invention]
However, if a dedicated recognition mark is provided on the surface of the semiconductor chip, it will hinder the miniaturization of the chip.
[0006]
Further, the shape of the convex portion or the concave portion in the literature is not a mark for recognizing the relative position coordinates, but for recognizing the center of the bonding pad, and needs to be provided on all four sides of the bonding pad.
[0007]
[Means for Solving the Problems]
To solve the problems described above, the present invention is, as a reference point Wa ear bonding device is used to grasp where to connection recognizes the relative position coordinates of a plurality of bonding locations on a semiconductor chip Bonding pads provided with recognition marks due to the level difference are provided at two locations, and a pattern having the shape of the recognition mark is formed by oxidation on the surface of the silicon substrate existing immediately below the bonding pad.
The present invention also provides a method of manufacturing a semiconductor chip in which a recognition mark is formed by a step of a scratch formed when a probing needle whose tip is processed into the shape of a recognition mark is applied to a bonding pad to perform probing. To do.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a cross-sectional view showing a first reference embodiment.
[0009]
An example of an FET is shown as a semiconductor chip formed by a normal semiconductor wafer process.
[0010]
1 is a silicon substrate, 2 is an oxide film formed on the silicon substrate 1, 3 and 4 are diffusion layers, 5 is a polysilicon film, 6 is an intermediate insulating film, 7 is a drain electrode, 8 is a source electrode, and 9 is a gate. Electrodes, 10 are passivation films, 11 to 13 are bonding pads, and 14 is a recognition mark.
[0011]
The bonding pads 11 to 13 are formed of an aluminum thin film or the like on the surface of the electrode as is well known.
[0012]
The recognition marks 14 are formed at two locations, that is, the bonding pad 11 of the drain electrode 7 and the bonding pad 12 of the source electrode 8, and are not formed on the bonding pad 13 of the base electrode 9.
[0013]
The recognition mark 14 is formed in a three-dimensional shape, that is, a step, such as a cross or a quadrangle.
[0014]
The formation method of the recognition mark 14 will be described. A resist chip having the shape of the recognition mark 14 is formed on the surface of a metal layer such as an aluminum thin film which finally becomes the bonding pads 11 and 12 through a normal photolithography process after forming a semiconductor chip. Form.
[0015]
Next, the shape of the recognition mark 14 is etched on the surface of the metal layer. At this time, the etching amount is set to about ½ of the film thickness of the metal layer so that when wire bonding is performed on the recognition mark 14 later, the bonding strength when wire connection is obtained is obtained. Recognition mark 14 that can be visually recognized by the step caused by the etching is formed.
[0016]
This recognition mark 14 serves as a reference point used for grasping the place where the wire bonding apparatus should be connected, and for recognizing relative position coordinates with a plurality of bonding positions to be connected on the semiconductor chip. used.
[0017]
Since the recognition mark 14 is a reference point for relative position coordinates, it is necessary and sufficient if it is provided at two locations on the bonding pad in the semiconductor chip, and it is not necessary to provide it on all the bonding pads.
[0018]
Even if it is provided at three or more locations, two of them are used as reference points, and the others are not necessary, so even if it is provided at three or more locations, it does not depart from the technical scope of the present invention.
[0019]
In addition, the recognition mark 14 is not necessarily formed at the center of the bonding pads 11 and 12, and may be formed at the end portion intentionally shifted from the center in 2nd wire bonding, wedge bonding, or the like.
[0020]
In the figure, the bonding pads 11 and 12 are formed on the upper surfaces of the drain electrode 7 and the source electrode 8, respectively. However, the bonding pads 11 and 12 may be formed at positions away from the electrodes by using wiring leads.
[0021]
According to a first reference embodiment as described above, since the form recognition marks 14 as a reference point for recognizing where to connection to the bonding pads 11 and 12, the wire bonding apparatus and recognition mark 14 and the bonding position Can be recognized, and wire bonding can be performed to all bonding pads to be connected including the bonding pads 11 and 12 on which the recognition mark 14 is formed.
[0022]
As a result, it is not necessary to consciously insert a mark for the purpose of recognition only into the semiconductor chip, and it is possible to improve the degree of integration of the number of elements and wiring in the semiconductor chip, leading to miniaturization of the chip. It becomes.
[0023]
Further, since the recognition mark 14 is a reference point for relative position coordinates, it is only necessary to provide two places in the semiconductor chip, and it is not necessary to provide it for all bonding pads.
[0024]
FIG. 2 is a cross-sectional view showing a second reference embodiment, which is the same as the first reference embodiment except that the recognition mark 14 is formed differently.
[0025]
A resist mask having the shape of the recognition mark 14 is formed in a region where the bonding pads 11 and 12 of the silicon substrate 1 are to be formed through a normal photolithography process.
[0026]
Next, the etching portion 15 on the surface of the silicon substrate 1 is etched into the shape of the recognition mark 14 by alkali etching or the like. Thereafter, a normal semiconductor wafer process such as formation of the oxide film 2 and the intermediate insulating film 6 is performed.
[0027]
A step is left on the surface of the bonding pads 11 and 12 of the semiconductor chip finally formed through this process, as much as the surface of the silicon substrate 1 immediately below is etched, and a recognition mark 14 is formed.
[0028]
As described above, according to the second reference embodiment, the same effects as in the first reference embodiment can be obtained.
[0029]
FIG. 3 is a cross-sectional view showing the third reference embodiment, which is the same as the first reference embodiment except that the recognition mark 14 is formed differently.
[0030]
The intermediate insulating film 6 is formed by a normal semiconductor wafer process, and a resist mask having the shape of the recognition mark 14 is formed through a normal photolithography process in the region of the intermediate insulating film 6 where the bonding pads 11 and 12 are to be formed.
[0031]
Next, the etching portion 16 of the intermediate insulating film 6 is etched into the shape of the recognition mark 14, and a normal semiconductor wafer process is further performed.
[0032]
Steps remain on the surfaces of the bonding pads 11 and 12 of the semiconductor chip finally formed through this process by the amount of etching of the surface of the intermediate insulating film 6 immediately below the bonding pads 11 and 12, thereby forming the recognition marks 14.
[0033]
Note that the recognition mark 14 can be similarly formed on the bonding pads 11 and 12 not only by the intermediate insulating film 6 but also by etching the shape of the recognition mark 14 on any of the molding films such as the oxide film 2.
[0034]
As described above, according to the third reference embodiment, the same effects as in the first reference embodiment can be obtained.
[0035]
FIG. 4 is a cross-sectional view showing the first embodiment of the present invention, which is the same as the first reference embodiment except that the method of forming the recognition mark 17 is different.
[0036]
The recognition mark 17 is formed with a convex step, whereas the recognition mark 14 of the reference embodiment described above is formed with a convex step, so there is no change in its function.
[0037]
In the region of the silicon substrate 1 where the bonding pads 11 and 12 are to be formed, a resist mask having the shape of the recognition mark 17 is formed through a normal photolithography process.
[0038]
Next, a pattern having the shape of the recognition mark 17 is formed on the oxidized portion 18 on the surface of the silicon substrate 1 by oxidation. Thereafter, a normal semiconductor wafer process such as formation of the oxide film 2 and the intermediate insulating film 6 is performed.
[0039]
On the surface of the bonding pads 11 and 12 of the semiconductor chip finally formed through this process, a convex step remains as much as the surface of the silicon substrate 1 immediately below it is oxidized, and a recognition mark 17 is formed. The
[0040]
As described above, according to the first embodiment of the present invention, an effect equivalent to that of the first reference embodiment can be obtained.
[0041]
FIG. 5 is a cross-sectional view showing a second embodiment of the present invention, which is the same as the first reference embodiment except that the method of forming the recognition mark 19 is different.
[0042]
Recognition marks 19, recognition marks that can upon performed in advance by processing the tip of the probing needle shape e.g. Cross-shaped or square recognition marks 19, the probing against the needle to the bonding pads 11 and 12 of the semiconductor chip This is a step utilizing the step of the scratch.
[0043]
In a probing process for checking the characteristics of a semiconductor chip formed through a normal semiconductor wafer process, a probing needle processed into the shape of the recognition mark 19 is applied to the bonding pads 11 and 12 for probing.
[0044]
At this time, since the surface of the bonding pads 11 and 12 is scratched in the shape of the tip of the probing needle, the recognition mark 19 is formed by the level difference of the scratch.
[0045]
As described above, according to the second embodiment of the present invention, in addition to the effects of the first reference embodiment, the recognition mark 19 is formed by utilizing the scratch of the needle in the probing process, so the number of processes increases. And can be easily implemented.
[0046]
【The invention's effect】
As described above, the present invention provides a recognition mark as a reference point for recognizing relative position coordinates to a plurality of bonding positions on a bonding pad of a semiconductor chip, thereby contributing to miniaturization of the semiconductor chip. To do.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a first reference embodiment.
FIG. 2 is a cross-sectional view showing a second reference embodiment.
FIG. 3 is a cross-sectional view showing a third reference embodiment.
FIG. 4 is a cross-sectional view showing a first embodiment of the present invention.
FIG. 5 is a sectional view showing a second embodiment of the present invention.

Claims (2)

As a reference point Wa ear bonding device is used to grasp where to connection, a plurality of Bonn loading pad provided a recognition mark due to the step for recognizing the relative position coordinates between the bonding position on the semiconductor chip The semiconductor chip is characterized in that the pattern of the shape of the recognition mark is formed by oxidation on the surface of the silicon substrate that exists immediately below the bonding pad.   As a reference point used for grasping a place where the wire bonding apparatus should be connected, 2 bonding pads provided with recognition marks by steps for recognizing relative position coordinates with respect to a plurality of bonding positions on the semiconductor chip are provided. A method of manufacturing a semiconductor chip provided at a location, wherein the recognition mark is formed by a step of a scratch formed when probing is performed by applying a probing needle whose tip is processed into the shape of the recognition mark to the bonding pad. A method of manufacturing a semiconductor chip, comprising:

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