JP4356183B2 - Solder bonding resist, semiconductor package and manufacturing method thereof - Google Patents
Solder bonding resist, semiconductor package and manufacturing method thereof Download PDFInfo
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- JP4356183B2 JP4356183B2 JP2000085621A JP2000085621A JP4356183B2 JP 4356183 B2 JP4356183 B2 JP 4356183B2 JP 2000085621 A JP2000085621 A JP 2000085621A JP 2000085621 A JP2000085621 A JP 2000085621A JP 4356183 B2 JP4356183 B2 JP 4356183B2
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- 229910000679 solder Inorganic materials 0.000 title claims description 130
- 239000004065 semiconductor Substances 0.000 title claims description 29
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 230000004907 flux Effects 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 13
- 238000005476 soldering Methods 0.000 claims description 10
- 239000000155 melt Substances 0.000 claims description 6
- 238000010438 heat treatment Methods 0.000 claims description 5
- 239000004952 Polyamide Substances 0.000 claims 1
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- 238000012360 testing method Methods 0.000 description 22
- 238000011156 evaluation Methods 0.000 description 19
- 230000000052 comparative effect Effects 0.000 description 10
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- UGODCLHJOJPPHP-AZGWGOJFSA-J tetralithium;[(2r,3s,4r,5r)-5-(6-aminopurin-9-yl)-4-hydroxy-2-[[oxido(sulfonatooxy)phosphoryl]oxymethyl]oxolan-3-yl] phosphate;hydrate Chemical compound [Li+].[Li+].[Li+].[Li+].O.C1=NC=2C(N)=NC=NC=2N1[C@@H]1O[C@H](COP([O-])(=O)OS([O-])(=O)=O)[C@@H](OP([O-])([O-])=O)[C@H]1O UGODCLHJOJPPHP-AZGWGOJFSA-J 0.000 description 1
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Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Description
【0001】
【発明の属する技術分野】
本発明は、半導体パッケージに半田ボールを搭載する際の半田接合に関し、さらには、半田ボールが搭載された半導体パッケージを、プリント配線板に半田接合により実装する際の、半田接合用レジストに関するものである。
【0002】
【従来の技術】
近年の電子機器の高機能化並びに軽薄短小化の要求に伴い、電子部品の高密度集積化、さらには高密度実装化が進んできており、これらの電子機器に使用される半導体パッケージは、従来にも増して益々小型化かつ多ピン化が進んできている。
【0003】
半導体パッケージはその小型化に伴って、従来のようなリードフレームを使用した形態のパッケージでは、小型化に限界がきているため、最近では回路基板上にチップを実装したものとして、BGA(Ball Grid Array)や、CSP(Chip Scale Package)といった、エリア実装型の新しいパッケージ方式が提案されている。これらの半導体パッケージにおいて、半導体チップの電極と、従来型半導体パッケージのリードフレームの機能とを有する、半導体搭載用基板と呼ばれるプラスチックやセラミックス等各種絶縁材料と、導体配線で構成される基板の端子との電気的接続方法として、ワイヤーボンディング方式やTAB(Tape Automated Bonding)方式、さらにはFC(Frip Chip)方式などが知られているが、最近では、半導体パッケージの小型化に有利な、FC接続方式を用いたBGAやCSPの構造が盛んに提案されている。
【0004】
BGAやCSPのプリント配線板への実装には、半田ボールで形成されたバンプによる、半田接合が採用されている。この半田接合には、フラックスが用いられ、ソルダーペーストが併用されることもある。特に半田ボールが使用される理由は、半田供給量を制御し易く、多量の半田を供給できるので、バンプが高くできるためである。また、BGAやCSPの作製工程における、半導体チップの電極と半導体搭載用基板の端子との電気的接続方法にも、半田接合が使われる場合が多い。
【0005】
一般に、半田接合のためには、半田表面と対する電極の、金属表面の酸化物などの汚れを除去すると共に、半田接合時の金属表面の再酸化を防止して、半田の表面張力を低下させ、金属表面に溶融半田が濡れ易くする、半田付け用フラックスが使用される。このフラックスとしては、ロジンなどの熱可塑性樹脂系フラックスに、酸化膜を除去する活性剤等を加えたフラックスが用いられている。
【0006】
しかしながら、このフラックスが残存していると、高温、多湿時に熱可塑性樹脂が溶融し、活性剤中の活性イオンも遊離するなど、電気絶縁性の低下やプリント配線の腐食などの問題が生じる。そのため現在は、半田接合後の残存フラックスを洗浄除去し、上記問題を解決しているが、洗浄剤の環境問題や、洗浄工程によるコストアップなどの欠点がある。
【0007】
フラックスの機能は、前記の通り、半田と金属表面の酸化物除去、再酸化防止、そして半田濡れ性向上(表面張力を低下させる)などであり、フラックスが存在し、金属表面が露出していれば、半田は制限なく濡れてしまう。そこで、一般的に半導体パッケージやプリント配線板の回路表面には、半田接合部のみへの半田の導入と、導体配線パターンの保護とのため、ソルダーレジストが使用されている。しかし、このソルダーレジストが半田接合部に残存すると、接続信頼性が低下したり、半田接合できなかったり、という問題が生じるため、ソルダーレジスト形成には、細心の注意が必要である。
【0008】
また、半導体パッケージの小型化かつ多ピン化は、バンプの微細化を促し、接合強度、信頼性の低下が懸念されている。そこで、バンプ接続部分の信頼性を得るため、チップと基板との間隙に、アンダーフィルと呼ばれる絶縁樹脂を充填して、バンプ接続部分を封止、補強する検討も盛んである。しかし、これには技術的難易度の高いアンダーフィルを充填し、硬化させる工程が必要となるため、製造工程が複雑で製造コストが高くなる問題がある。
【0009】
【発明が解決しようとする課題】
本発明は、半導体パッケージの実装時における、半田接合のこのような現状の問題点に鑑み、ソルダーレジストの形成、半田接合後の残存フラックスの洗浄除去、そして、アンダーフィルの充填などが必要なく、高温、多湿雰囲気でも電気絶縁性を保持し、接合強度、信頼性の高い半田接合を可能とする、半田接合レジスト、該半田レジストを用いた半導体パッケージ及びその製造方法を提供することを目的とする。
【0010】
即ち、本発明は、半導体パッケージの半田ボール搭載用のランドが形成された面の全面に塗布し、該半田ボール搭載用のランドに対応する位置に半田ボールを載せて、半田リフローによって半田ボールを該半田ボール搭載用のランドに半田接合させる際にはフラックスとして作用し、半田接合後は、加熱することによりイミド化して該半導体パッケージのレジストとして作用するポリアミド酸を必須成分とする半田接合用レジストであって、該半田接合用レジストの半田接合温度における溶融粘度が50Pa・s以下であることを特徴とする半田接合用レジストである。
【0011】
またさらには、半田接合用レジストを半導体パッケージの半田ボール搭載用のランドが形成された面の全面に塗布し、該半田ボール搭載用のランドに対応する位置に半田ボールを載せて、半田リフローによって半田ボールを該半田ボール搭載用のランドに半田接合させ、次いで、該半田接合用レジストを加熱することによりイミド化させて、該半導体パッケージのレジストを形成することを特徴とする半導体パッケージの製造方法である。
【0012】
【発明の実施の形態】
本発明は、ポリアミド酸を必須成分とし、これにより得られる半田接合用レジストの半田接合温度における溶融粘度が、50Pa・s以下であることを特徴とする。
【0013】
本発明に用いるポリアミド酸は、その還元作用により、半田および金属表面の酸化物などの汚れを除去し、半田接合のフラックスとして作用する。従って、このポリアミド酸としては何ら制約するところはないが、半田接合のフラックスとしての作用を高めるため、カルボキシル基1個あたりの分子量が小さいポリアミド酸ほど好ましい。更に、ポリアミド酸は、加熱により閉環してポリイミドになるため、半田接合後の洗浄除去が必要なく、高温、多湿雰囲気でも電気絶縁性を保持し、接合強度、信頼性の高い半田接合を可能とする。
【0014】
本発明において用いる、ポリアミド酸は、好ましくは重量平均分子量80000以下のものが良い。分子量が大きすぎると、半田接合時における半田接合用レジストの流動性が低下し、半田接合を阻害するため好ましくない。但し、その他の配合剤の使用により、半田接合時における溶融粘度を、50Pa・s以下に制御できれば何ら問題はない。この目的のために、可塑剤を配合したり、溶剤を加えてもよい。分子量、溶融粘度共に、特に下限はないが、分子量が極端に小さすぎたり、溶融粘度が低すぎたりすると、半田接合時のリフロー炉の予熱で半田接合用レジストが、流れ出したりして好ましくない。
【0015】
また、回路パターンの保護用レジストとして成形するためには、半田接合用レジストが塗布される基材表面との濡れ性や表面張力が重要となる。溶融状態にある半田接合温度での基材表面に対する接触角が45°以下が好ましい。45°より大きいと半田接合時の溶融状態で凝集し、均一なレジスト層形成ができなくなる。このときは、レベリング剤などを添加し、表面張力を低下させたり、基材表面を粗面化処理することで、均一なレジスト層形成が可能となる。
【0016】
ポリアミド酸の濃度は、半田接合用レジスト全体の20重量%以上とするのが好ましい。20重量%未満であると、半田および金属表面の酸化物などの汚れを除去する作用が低下し、半田接合できなくなってしまう。本発明の半田接合用レジストは、半田接合部周辺をリング状に補強する形でイミド化するため、従来のフラックスによる半田接合と比較して、接合強度、信頼性を大幅に向上させることができる。
【0017】
【実施例】
以下、実施例により更に具体的に説明するが、本発明はこれによって何ら限定されるものではない。先ず、ジアミンと酸無水物を反応させて、ポリイミド前駆体であるポリアミド酸を合成し、半田接合用レジストワニスを調製する。その特性評価のため、半田ボールシェア強度試験、温度サイクル試験、および絶縁抵抗試験を行った。試験の方法および条件は次の通りとし、実施例および比較例の評価結果は、まとめて表1に示した。
【0018】
1.半田ボールシェア強度試験
厚さ125μmの銅板(EFTEC64T、古川電気工業(株)製)を用いて、ランド径400μm、ランドピッチ1mmを含む評価用回路を形成し、そのリードフレームを半導体封止材(EME−7372、住友ベークライト(株)製)でモールド封止した後、片面から研磨して、前記の評価用回路を露出させ、20mm角の評価用パッケージを作製した。研磨の仕上げには、JIS−R6252に規定された、耐水研磨紙1000番を使用した。これをイソプロピルアルコールで洗浄した後、80℃で30分乾燥して、半田接合評価用パッケージとした。
【0019】
得られた評価用パッケージの評価用回路露出面の全面に、実施例で得られた半田接合用レジストワニスを塗布し、80℃10分、120℃10分、180℃10分乾燥して、厚さ20μmの半田接合用レジスト膜を形成した。
【0020】
本発明の半田接合用レジストを被覆した実施例の評価用パッケージ回路、および市販のフラックスを塗布した比較例の評価用パッケージ回路のランド上に、500μm径の半田ボール(Sn−Pb系(Sn10−Pb90)共晶半田、(株)日鉄マイクロメタル製)60個を搭載し、窒素雰囲気中でピーク温度300℃に設定されたリフロー炉を通して、半田ボールを評価用パッケージに接合させた。その後、実施例のパッケージについては、窒素雰囲気下で180℃30分、250℃60分熱処理して、半田接合用レジストをイミド化させた。次に、得られた半田ボール付き評価用パッケージの、半田ボールシェア強度を測定し、それぞれ60個の平均値を求めた。
【0021】
2.温度サイクル試験
温度サイクル(TC)試験用プリント配線板に、市販のフラックスを塗布し、実施例および比較例の、半田ボール付き評価用パッケージを搭載して、窒素雰囲気中でピーク温度300℃に設定されたリフロー炉を通し、評価用パッケージ実装基板をそれぞれ10個ずつ作製した。この評価用パッケージ実装基板は、評価用パッケージ、および試験用プリント配線板を介して、60個の半田ボール接合部が直列につながるように回路設計されている。
【0022】
得られた評価用パッケージ実装基板の導通を確認した後、−50℃で10分、125℃で10分を1サイクルとするTC試験を実施した。TC試験1000サイクル後の断線不良数を調べた。
【0023】
3.絶縁抵抗試験
半田メッキが施された導体間隔150μmのくし形パターンを有する、絶縁信頼性試験用プリント配線板を使用し、このプリント配線板に、実施例で得られた半田接合用レジストワニスを塗布し、80℃10分、120℃10分、180℃10分乾燥して、厚さ20μmの半田接合用レジスト膜を形成した。窒素雰囲気中でピーク温度300℃に設定されたリフロー炉を通した後、窒素雰囲気下で、180℃30分、250℃60分熱処理して半田接合用レジストをイミド化させ、試験用プリント配線板とした。
【0024】
得られた実施例の試験用プリント配線板、および別に用意した市販のフラックスを塗布した、比較例の試験用プリント配線板について、それぞれ絶縁抵抗を測定した後、さらに、85℃/85%の雰囲気中で、直流電圧50Vを印加し、1000時間経過後の絶縁抵抗を測定した。測定時の印加電圧は100Vで1分とした。
【0025】
(実施例1)
乾燥窒素ガス導入管、冷却器、温度計、撹拌機を備えた四口フラスコに、脱水精製したN-メチルピロリドン(NMP)640.00gを入れ、窒素ガスを流しながら10分間激しくかき混ぜる。次に、1,3-ビス(3-アミノフェノキシ)ベンゼン(APB、三井化学(株)製)14.32gと、α,ω-ビス(3-アミノプロピル)ポリジメチルシロキサン(APPS、MW=837、扶桑シェルテック(株)製)95.68gを投入し、系を60℃に加熱し、均一になるまでかき混ぜる。均一に溶解した後、系を氷水浴で5℃に冷却し、ベンゾフェノンテトラカルボン酸二無水物(BTDA、ダイセル化学工業(株)製)50.00gを添加した。その後、フラスコ内を5℃に保ち、3時間撹拌を続けて、半田接合用レジストワニスを作製した。
【0026】
(実施例2)
NMP 567.28g、1,3-ビス(3-アミノフェノキシ)ベンゼン23.77g、α,ω-ビス(3-アミノプロピル)ポリジメチルシロキサン68.05g、ベンゾフェノンテトラカルボン酸二無水物50.00gの割合で用いた以外は、実施例1と同様に操作して、半田接合用レジストワニスを作製した。
【0027】
(実施例3)
NMP 413.76g、1,3-ビス(3-アミノフェノキシ)ベンゼン50.00g、α,ω-ビス(3-アミノプロピル)ポリジメチルシロキサン0g(使用せず)、ベンゾフェノンテトラカルボン酸二無水物53.44gの割合で用いた以外は、実施例1と同様に操作して、半田接合用レジストワニスを作製した。
【0028】
(実施例4)
乾燥窒素ガス導入管、冷却器、温度計、撹拌機を備えた四口フラスコに、脱水精製したNMP 351.16gを入れ、窒素ガスを流しながら10分間激しくかき混ぜる。次に、2,2-ビス(4-(4-アミノフェノキシ)フェニル)プロパン(BAPP、和歌山精化工業(株)製)50.00gを投入し、系を60℃に加熱し、均一になるまでかき混ぜる。均一に溶解した後、系を氷水浴で5℃に冷却し、ベンゾフェノンテトラカルボン酸二無水物(BTDA、ダイセル化学工業(株)製)37.79gを添加した。その後、フラスコ内を5℃に保ち、3時間撹拌を続けて、半田接合用レジストワニスを作製した。
【0029】
(比較例1〜2)
半田接合評価用パッケージに、市販のフラックスを塗布し、半田接合のためのランド以外の部分を、ソルダーレジストで被覆したものを比較例2とし、ソルダーレジストを被覆していないものを比較例1として、半田ボールシェア強度試験および温度サイクル試験に供した。
【0030】
(比較例3)
比較例2の半田接合評価用パッケージを、温度サイクル(TC)試験用プリント配線板に実装した後、アンダーフィルを充填し、温度サイクル試験に供した。
【0031】
(比較例4)
絶縁信頼性試験用プリント配線板に市販のフラックスを塗布し、絶縁抵抗試験に供した。
【0032】
【表1】
【0033】
表1に示した評価結果から分かるように、本発明の半田接合用レジストを用いた場合、従来のフラックスを用いた場合に比べて、半田ボールシェア強度では、約1.8倍という高い値を示し、また、TC試験では、断線不良の発生はほとんどなくなった。絶縁抵抗試験でもほとんど低下を示さず、本発明の半田接合用レジストの効果が明白である。
【0034】
【発明の効果】
本発明の半田接合用レジストは、半田接合後の残存フラックスの洗浄除去を必要とせず、高温、多湿雰囲気でも電気絶縁性を保持し、また、半田接合用レジストが半田接合部周辺をリング状に補強する形でイミド化するため、接合強度と信頼性の高い半田接合を可能にするので、半導体パッケージのプリント配線板への搭載における工程を簡素化して、製造コストを抑制し、また、半田接合の信頼性向上に極めて有用である。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to solder bonding when mounting solder balls on a semiconductor package, and more particularly to a solder bonding resist when mounting a semiconductor package with solder balls mounted on a printed wiring board by solder bonding. is there.
[0002]
[Prior art]
In recent years, with the demand for higher functionality and lighter, thinner and smaller electronic devices, high-density integration and further high-density mounting of electronic components have progressed. Semiconductor packages used in these electronic devices have been In addition, the size and number of pins are increasing.
[0003]
With the miniaturization of semiconductor packages, the conventional package using a lead frame has a limit on miniaturization. Therefore, recently, it is assumed that a chip is mounted on a circuit board, and BGA (Ball Grid) is used. Array) and a new area mounting type packaging method such as CSP (Chip Scale Package) have been proposed. In these semiconductor packages, various insulating materials such as plastics and ceramics called semiconductor mounting substrates, which have the functions of the electrodes of the semiconductor chip and the lead frame of the conventional semiconductor package, and the terminals of the substrate composed of conductor wiring As an electrical connection method, a wire bonding method, a TAB (Tape Automated Bonding) method, and an FC (Flip Chip) method are known, but recently, an FC connection method that is advantageous for downsizing of a semiconductor package. Structures of BGA and CSP using the above are actively proposed.
[0004]
Solder bonding using bumps formed of solder balls is employed for mounting BGA and CSP on a printed wiring board. For this soldering, a flux is used, and a solder paste may be used in combination. The reason why the solder balls are used in particular is that the amount of solder supply can be easily controlled and a large amount of solder can be supplied, so that the bump can be made high. Also, solder bonding is often used for the electrical connection method between the electrodes of the semiconductor chip and the terminals of the semiconductor mounting substrate in the manufacturing process of the BGA or CSP.
[0005]
In general, for solder bonding, dirt on the surface of the electrode against the solder surface such as oxide on the metal surface is removed, and re-oxidation of the metal surface during solder bonding is prevented to reduce the surface tension of the solder. The soldering flux is used to make the molten solder wet easily on the metal surface. As this flux, a flux obtained by adding an activator for removing an oxide film to a thermoplastic resin flux such as rosin is used.
[0006]
However, if this flux remains, problems such as a decrease in electrical insulation and corrosion of printed wiring, such as melting of the thermoplastic resin at high temperature and high humidity, and liberation of active ions in the activator occur. For this reason, currently, the residual flux after soldering is removed by washing to solve the above problems, but there are disadvantages such as environmental problems of the cleaning agent and cost increase due to the cleaning process.
[0007]
As described above, the flux functions include removal of oxides on the solder and metal surfaces, prevention of re-oxidation, and improvement of solder wettability (reducing surface tension). The flux is present and the metal surface is exposed. If so, the solder gets wet without any restrictions. Therefore, generally, a solder resist is used on the circuit surface of a semiconductor package or a printed wiring board in order to introduce solder only into the solder joint and to protect the conductor wiring pattern. However, if this solder resist remains in the solder joint portion, there arises a problem that connection reliability is lowered or solder joint cannot be performed. Therefore, careful attention is required for forming the solder resist.
[0008]
In addition, the downsizing of semiconductor packages and the increase in the number of pins promote the miniaturization of bumps, and there is a concern that the bonding strength and the reliability may be reduced. Therefore, in order to obtain the reliability of the bump connection portion, it is also actively studied to seal and reinforce the bump connection portion by filling the gap between the chip and the substrate with an insulating resin called underfill. However, this requires a process of filling and curing an underfill with a high technical difficulty, and thus has a problem that the manufacturing process is complicated and the manufacturing cost is increased.
[0009]
[Problems to be solved by the invention]
In view of such current problems of solder bonding when mounting a semiconductor package, the present invention does not require solder resist formation, residual flux cleaning after solder bonding, and underfill filling, An object of the present invention is to provide a solder bonding resist, a semiconductor package using the solder resist, and a method for manufacturing the same, which can maintain solder insulation even in a high temperature and high humidity atmosphere and enable solder bonding with high bonding strength and reliability. .
[0010]
That is, the present invention applies to the entire surface of the semiconductor package on which the solder ball mounting lands are formed, places the solder balls on the positions corresponding to the solder ball mounting lands, and solders the solder balls by solder reflow. Resist for solder jointing which has a polyamic acid as an essential component which acts as a flux when soldered to the land for mounting the solder ball and is imidized by heating and acts as a resist for the semiconductor package after soldering a is a solder bonding resist, wherein the melt viscosity at solder bonding temperature of the solder bonding resist is not more than 50 Pa · s.
[0011]
Still further, a solder bonding resist is applied to the entire surface of the semiconductor package on which the solder ball mounting lands are formed, and the solder balls are placed at positions corresponding to the solder ball mounting lands, and solder reflow is performed. A method for manufacturing a semiconductor package, comprising: solder bonding a solder ball to a land for mounting the solder ball; and then imidizing the solder bonding resist by heating to form a resist for the semiconductor package. It is.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
The present invention is characterized in that polyamic acid is an essential component, and the melt viscosity at the solder bonding temperature of the solder bonding resist obtained thereby is 50 Pa · s or less.
[0013]
The polyamic acid used in the present invention removes dirt such as oxide on the solder and metal surface by its reducing action, and acts as a flux for solder bonding. Therefore, the polyamic acid is not limited at all, but a polyamic acid having a smaller molecular weight per carboxyl group is more preferable in order to enhance the action as a solder bonding flux. Furthermore, since polyamic acid is ring-closed by heating to become polyimide, there is no need for washing and removal after solder bonding, and electrical insulation is maintained even in high temperature and high humidity atmosphere, enabling solder bonding with high bonding strength and reliability. To do.
[0014]
The polyamic acid used in the present invention preferably has a weight average molecular weight of 80000 or less. If the molecular weight is too large, the fluidity of the solder bonding resist at the time of solder bonding is lowered, which hinders solder bonding. However, there is no problem if the melt viscosity at the time of soldering can be controlled to 50 Pa · s or less by using other compounding agents. For this purpose, a plasticizer may be blended or a solvent may be added. There is no particular lower limit for the molecular weight and the melt viscosity. However, if the molecular weight is too small or the melt viscosity is too low, the solder joint resist will flow out due to preheating in a reflow furnace during solder joint, which is not preferable.
[0015]
In addition, in order to form a resist for protecting a circuit pattern, wettability and surface tension with the substrate surface to which the solder bonding resist is applied are important. The contact angle with the substrate surface at the soldering temperature in the molten state is preferably 45 ° or less. If it is larger than 45 °, it will agglomerate in the molten state at the time of soldering and a uniform resist layer cannot be formed. At this time, it is possible to form a uniform resist layer by adding a leveling agent or the like to reduce the surface tension or roughen the surface of the substrate.
[0016]
The concentration of the polyamic acid is preferably 20% by weight or more of the entire solder bonding resist. If it is less than 20% by weight, the action of removing dirt such as solder and oxides on the metal surface is lowered, and solder bonding cannot be performed. Since the resist for solder bonding of the present invention is imidized in such a manner that the periphery of the solder joint is reinforced in a ring shape, the bonding strength and reliability can be greatly improved as compared with the conventional solder bonding by flux. .
[0017]
【Example】
Hereinafter, the present invention will be described more specifically with reference to examples, but the present invention is not limited thereto. First, a diamine and an acid anhydride are reacted to synthesize a polyamic acid which is a polyimide precursor to prepare a solder varnish resist varnish. In order to evaluate the characteristics, a solder ball shear strength test, a temperature cycle test, and an insulation resistance test were performed. The test method and conditions were as follows, and the evaluation results of Examples and Comparative Examples are shown together in Table 1.
[0018]
1. Solder ball shear strength test A 125 μm thick copper plate (EFTEC64T, manufactured by Furukawa Electric Co., Ltd.) is used to form an evaluation circuit including a land diameter of 400 μm and a land pitch of 1 mm. After mold-sealing with EME-7372 (manufactured by Sumitomo Bakelite Co., Ltd.), polishing was performed from one side to expose the circuit for evaluation, and a 20 mm square evaluation package was produced. For the polishing finish, water-resistant polishing paper No. 1000 specified in JIS-R6252 was used. This was washed with isopropyl alcohol and then dried at 80 ° C. for 30 minutes to obtain a solder joint evaluation package.
[0019]
The solder bonding resist varnish obtained in the example was applied to the entire surface of the evaluation circuit exposed surface of the obtained evaluation package, dried at 80 ° C. for 10 minutes, 120 ° C. for 10 minutes, and 180 ° C. for 10 minutes. A solder bonding resist film having a thickness of 20 μm was formed.
[0020]
500 μm diameter solder balls (Sn—Pb series (Sn10−) are formed on the lands of the evaluation package circuit of the example coated with the solder bonding resist of the present invention and the evaluation package circuit of the comparative example coated with a commercially available flux. 60 Pb90) eutectic solder (manufactured by Nippon Steel Micrometal Co., Ltd.) were mounted, and solder balls were joined to the evaluation package through a reflow furnace set at a peak temperature of 300 ° C. in a nitrogen atmosphere. Thereafter, the package of the example was heat-treated in a nitrogen atmosphere at 180 ° C. for 30 minutes and 250 ° C. for 60 minutes to imidize the solder bonding resist. Next, the solder ball shear strength of the obtained evaluation package with solder balls was measured, and an average value of 60 pieces was obtained for each.
[0021]
2. Temperature cycle test A printed circuit board for temperature cycle (TC) test was coated with commercially available flux, and the evaluation packages with solder balls of the examples and comparative examples were mounted, and the peak temperature was set to 300 ° C in a nitrogen atmosphere. Each of the 10 evaluation package mounting substrates was produced through the reflow oven. The evaluation package mounting board is designed so that 60 solder ball joints are connected in series via the evaluation package and the test printed wiring board.
[0022]
After confirming the continuity of the obtained packaged substrate for evaluation, a TC test was performed in which one cycle was 10 minutes at -50 ° C and 10 minutes at 125 ° C. The number of disconnection failures after 1000 cycles of the TC test was examined.
[0023]
3. Insulation resistance test Using a printed wiring board for insulation reliability testing, which has a comb-shaped pattern with a conductor spacing of 150 μm plated with solder. Resist varnish for solder bonding obtained in the example was applied to this printed wiring board. Then, it was dried at 80 ° C. for 10 minutes, 120 ° C. for 10 minutes, and 180 ° C. for 10 minutes to form a solder bonding resist film having a thickness of 20 μm. After passing through a reflow furnace set at a peak temperature of 300 ° C. in a nitrogen atmosphere, heat treatment is performed at 180 ° C. for 30 minutes and 250 ° C. for 60 minutes in a nitrogen atmosphere to imidize the solder bonding resist, and the test printed wiring board It was.
[0024]
About the test printed wiring board of the obtained Example and the printed wiring board for test of the comparative example which apply | coated the commercially available flux prepared separately, after measuring insulation resistance, respectively, it was 85 degreeC / 85% atmosphere further Among them, a DC voltage of 50 V was applied, and the insulation resistance after 1000 hours was measured. The applied voltage during measurement was 100 V for 1 minute.
[0025]
(Example 1)
In a four-necked flask equipped with a dry nitrogen gas inlet tube, a cooler, a thermometer, and a stirrer, 640.00 g of dehydrated and purified N-methylpyrrolidone (NMP) is placed, and stirred vigorously for 10 minutes while flowing nitrogen gas. Next, 14.32 g of 1,3-bis (3-aminophenoxy) benzene (APB, manufactured by Mitsui Chemicals) and α, ω-bis (3-aminopropyl) polydimethylsiloxane (APPS, MW = 837) 95.68 g, manufactured by Fuso Shelltech Co., Ltd.), and the system is heated to 60 ° C. and stirred until uniform. After uniformly dissolving, the system was cooled to 5 ° C. in an ice water bath, and 50.00 g of benzophenone tetracarboxylic dianhydride (BTDA, manufactured by Daicel Chemical Industries, Ltd.) was added. Thereafter, the inside of the flask was kept at 5 ° C., and the stirring was continued for 3 hours to prepare a resist varnish for solder bonding.
[0026]
(Example 2)
NMP 567.28 g, 1,3-bis (3-aminophenoxy) benzene 23.77 g, α, ω-bis (3-aminopropyl) polydimethylsiloxane 68.05 g, benzophenone tetracarboxylic dianhydride 50.00 g A resist varnish for solder bonding was prepared in the same manner as in Example 1 except that the ratio was used.
[0027]
(Example 3)
NMP 413.76 g, 1,3-bis (3-aminophenoxy) benzene 50.00 g, α, ω-bis (3-aminopropyl) polydimethylsiloxane 0 g (not used), benzophenone tetracarboxylic dianhydride 53 A resist varnish for solder bonding was prepared in the same manner as in Example 1 except that it was used at a ratio of 0.44 g.
[0028]
(Example 4)
In a four-necked flask equipped with a dry nitrogen gas inlet tube, a cooler, a thermometer, and a stirrer, 351.16 g of dehydrated and purified NMP is placed, and stirred vigorously for 10 minutes while flowing nitrogen gas. Next, 50.00 g of 2,2-bis (4- (4-aminophenoxy) phenyl) propane (BAPP, manufactured by Wakayama Seika Kogyo Co., Ltd.) is added, and the system is heated to 60 ° C. to be uniform. Stir until. After uniformly dissolving, the system was cooled to 5 ° C. with an ice water bath, and 37.79 g of benzophenone tetracarboxylic dianhydride (BTDA, manufactured by Daicel Chemical Industries) was added. Thereafter, the inside of the flask was kept at 5 ° C., and the stirring was continued for 3 hours to prepare a resist varnish for solder bonding.
[0029]
(Comparative Examples 1-2)
A soldering evaluation package is coated with a commercially available flux, and a part other than a land for soldering is coated with a solder resist is referred to as Comparative Example 2, and a part not coated with a solder resist is referred to as Comparative Example 1. They were subjected to a solder ball shear strength test and a temperature cycle test.
[0030]
(Comparative Example 3)
After mounting the solder joint evaluation package of Comparative Example 2 on a printed wiring board for temperature cycle (TC) test, it was filled with an underfill and subjected to a temperature cycle test.
[0031]
(Comparative Example 4)
A commercially available flux was applied to a printed wiring board for an insulation reliability test and subjected to an insulation resistance test.
[0032]
[Table 1]
[0033]
As can be seen from the evaluation results shown in Table 1, when the solder bonding resist of the present invention is used, the solder ball shear strength is about 1.8 times higher than when using the conventional flux. In addition, in the TC test, almost no disconnection failure occurred. The insulation resistance test shows almost no decrease, and the effect of the solder bonding resist of the present invention is clear.
[0034]
【The invention's effect】
The solder bonding resist of the present invention does not require cleaning and removal of residual flux after solder bonding, retains electrical insulation even at high temperatures and in a humid atmosphere, and the solder bonding resist forms a ring around the solder bonding portion. Since it is imidized in a reinforcing form, solder bonding with high bonding strength and reliability is possible, simplifying the process of mounting a semiconductor package on a printed wiring board, reducing manufacturing costs, and solder bonding It is extremely useful for improving the reliability of
Claims (4)
該半田接合用レジストの半田接合温度における溶融粘度が50Pa・s以下であることを特徴とする半田接合用レジスト。 It is applied to the entire surface of the semiconductor package on which the solder ball mounting lands are formed, the solder balls are placed on the positions corresponding to the solder ball mounting lands, and the solder balls are mounted by solder reflow. It acts as a flux when soldered to a land, and after soldering is a solder bonding resist containing polyamide acid as an essential component which acts as a resist for the semiconductor package by imidizing by heating,
A solder bonding resist having a melt viscosity of 50 Pa · s or less at a solder bonding temperature of the solder bonding resist.
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| JP2000085621A JP4356183B2 (en) | 2000-03-27 | 2000-03-27 | Solder bonding resist, semiconductor package and manufacturing method thereof |
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