Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JP4380956B2 - Semiconductor light emitting device and manufacturing method thereof - Google Patents
[go: Go Back, main page]

JP4380956B2 - Semiconductor light emitting device and manufacturing method thereof - Google Patents

Semiconductor light emitting device and manufacturing method thereof Download PDF

Info

Publication number
JP4380956B2
JP4380956B2 JP2001356983A JP2001356983A JP4380956B2 JP 4380956 B2 JP4380956 B2 JP 4380956B2 JP 2001356983 A JP2001356983 A JP 2001356983A JP 2001356983 A JP2001356983 A JP 2001356983A JP 4380956 B2 JP4380956 B2 JP 4380956B2
Authority
JP
Japan
Prior art keywords
layer
type cladding
cladding layer
carrier concentration
light emitting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2001356983A
Other languages
Japanese (ja)
Other versions
JP2003158293A (en
Inventor
忠敬 細見
幸生 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2001356983A priority Critical patent/JP4380956B2/en
Publication of JP2003158293A publication Critical patent/JP2003158293A/en
Application granted granted Critical
Publication of JP4380956B2 publication Critical patent/JP4380956B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Led Devices (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、活性層をn形クラッド層とp形クラッド層とで挟持するダブルヘテロ構造を有する半導体発光素子において通電による時間経過によっても輝度などの特性変化を小さく制御し得る半導体発光素子およびその製法に関する。
【0002】
【従来の技術】
従来の赤色系の半導体発光素子は、たとえばn形のInGaAlP系の半導体材料からなるn形クラッド層、クラッド層よりバンドギャップエネルギーが小さくなる組成のInGaAlP系の半導体材料からなる活性層、p形のInGaAlP系の半導体材料からなるp形クラッド層がそれぞれエピタキシャル成長され、ダブルヘテロ構造の発光層形成部が形成されている。
【0003】
さらにその表面にAlGaAs系化合物半導体(たとえばAlの混晶比率0.7)からなるp形のウインドウ層(電流拡散層)が設けられ、その上にウインドウ層よりAlの混晶比率の小さいAlGaAs系化合物半導体(たとえばAlの混晶比率0.5)からなる保護層が設けられている。そして、その表面の中央部にGaAsからなるコンタクト層を介してp側電極および半導体基板の裏面にn側電極が形成されている。
【0004】
この種の半導体発光素子は、通電による時間経過によって輝度変化などの特性変化が大きいと、使用上好ましくないため、85℃程度の高温通電、−45℃程度の低温通電、85℃、湿度85%程度の高温高湿通電をそれぞれ500時間程度行う信頼性試験が行われている。そして、この信頼性試験で、輝度変化などの特性が一定の範囲に入ることが要求されている。
【0005】
【発明が解決しようとする課題】
前述のように、通電による時間経過により、輝度変化など特性のバラツキが大きい場合がある。しかも、その輝度変化は、時間と共に輝度が増加したり減少するという、一定方向ではなく、上昇するものもあれば、下降するものもあるというバラツキが生じている。
【0006】
本発明は、このような状況に鑑みてなされたもので、活性層をクラッド層で挟持するダブルヘテロ構造の半導体発光素子で、通電による時間経過によっても輝度変化などの特性変化を小さくすることができる半導体発光素子およびその製法を提供することを目的とする。
【0007】
【課題を解決するための手段】
本発明者らは、InGaAlP系化合物半導体を用いた半導体発光素子において、通電による時間経過によって、輝度が増加したり、減少したりするという特性変動が生じる現象をできるだけ小さくするため鋭意検討を重ねた結果、通電による輝度などの特性変化が半導体発光素子のn形クラッド層のキャリア濃度と非常に密接な相関関係があることを見出した。さらに鋭意検討を重ねた結果、同じキャリア濃度でも、活性化率が小さすぎると、特性変動が生じやすいことを見出した。そして、このキャリア濃度や活性化率を狭い範囲に制御することにより、通電による時間変化によっても輝度変化などの特性変動が生じにくいことを見出した。ここに活性化率とは、たとえば半導体層にn形ドーパントとして取り込まれた原子数に対するキャリアとして有効な原子数の割合を意味する。
【0008】
すなわち、従来はn形クラッド層のキャリア濃度はできるだけ大きい方が、半導体層における直列抵抗が小さくなり、発光効率に寄与すると考えられ、n形クラッド層のキャリア濃度は大きいほど好ましく、また、InGaAlP系化合物半導体を用いた場合、キャリア濃度が2×1017cm-3程度以上であれば問題がないと考えられ、n形クラッド層のキャリア濃度を狭い範囲に限定するという発想は全然なかった。また、活性化率については、特性との関係では殆ど注目されていなかった。しかし、前述のように、本発明者らが鋭意検討を重ねた結果、製造時点でのn形クラッド層のキャリア濃度が高すぎると信頼性試験により輝度が増加し、n形クラッド層のキャリア濃度が低いと信頼性試験により輝度が減少し、かつ、その活性化率があまり小さすぎると信頼性試験により輝度が増加し、n形クラッド層のキャリア濃度およびその活性化率が経時変化に非常に大きく影響することを本発明者らは見出した。
【0009】
本発明による半導体発光素子は、GaAsからなる半導体基板と、該半導体基板の上に設けられ、In 0.49 (Ga y Al 1-y 0.51 P(0.05≦y≦0.5)からなり、0.1〜1.5μm厚のn形クラッド層、In 0.49 (Ga z Al 1-z 0.51 P(0.5≦z≦1.0)からなり、0.1〜1.5μm厚の活性層、およびIn 0.49 (Ga y Al 1-y 0.51 P(0.05≦y≦0.5)からなり、0.1〜1.5μm厚のp形クラッド層が順次成長されて形成される発光層形成部と、該発光層形成部上に設けられ、Al v Ga 1-v As(0.5≦v≦0.8)からなり、1〜12μm厚のウインドウ層とからなり、電流狭窄層を有しないで、チップの全面で発光させる発光ダイオードであって、前記n形クラッド層のキャリア濃度が2×1018〜2.5×1018cm-3で、かつ、n形ドーパントの活性化率が25%以上であり、p形クラッド層のキャリア濃度が5×10 16 〜2×10 18 cm -3 であるようにすることにより、通電による輝度の時間変化を抑制するように形成されている。
【0010】
この構造にすることにより、n形クラッド層のキャリア濃度と活性化率が厳密に制御されているため、通電による時間変化によっても輝度変化などの特性変化を非常に小さく抑えることができる。その結果、半導体発光素子の信頼性を非常に向上させることができる。
【0011】
本発明による半導体発光素子の製法は、GaAsからなる半導体基板上にInGaAlP系化合物半導体からなり活性層を該活性層よりバンドギャップの大きいn形クラッド層およびp形クラッド層により挟持する発光層形成部をMOCVD法により成長し、電流狭窄層を有しないで、チップの全面で発光させる半導体発光素子の製法であって、前記半導体基板上に、In0.49(GayAl1-y0.51P(0.05≦y≦0.5)からなるn形クラッド層を0.1〜1.5μmの厚さに、In0.49(GazAl1-z0.51P(0.5≦z≦1.0)からなる活性層を0.1〜1.5μmの厚さに、In0.49(GayAl1-y0.51P(0.05≦y≦0.5)からなるp形クラッド層を0.1〜1.5μmの厚さに順次成長することにより発光層形成部を形成し、該発光層形成部上にAl v Ga 1-v As(0.5≦v≦0.8)からなるウインドウ層を1〜12μmの厚さに形成し、前記n形クラッド層の成長を、前記半導体基板の温度を放射温度計により測定しながら、所定温度の±5℃以内の温度範囲にコントロールすることにより、キャリア濃度が2×1018〜2.5×1018cm-3に、かつ、活性化率が25%以上になるように、ドーパントの供給量および成長温度を設定して行い、前記p形クラッド層の成長をキャリア濃度が5×1016〜2×1018cm-3になるように形成することにより、通電による輝度の時間変化を抑制することを特徴としている。ここに所定温度とは、導入するドーパントガスの流量、MOCVD装置などにより定まり、2.25×1018cm-3にするのに最適な温度を指す。すなわち、所望のキャリア濃度にする最適温度も装置および成長条件などにより変り得るが、成長中の半導体基板の温度を、最適な温度から±5℃以内の範囲に制御することに特徴がある。
【0013】
【発明の実施の形態】
つぎに、本発明による半導体発光素子およびその製法について、図1を参照しながら説明をする。本発明による半導体発光素子は、半導体基板1の上にInGaAlP系化合物半導体からなる発光層形成部11が設けられ、さらにその発光層形成部11上にウインドウ層6が設けられ、その表面に保護層10が設けられており、n形クラッド層3のキャリア濃度が2×1018〜2.5×1018cm-3の範囲に、かつ、n形ドーパントの活性化率が25%以上に制御されている。
【0014】
発光層形成部11は、たとえばIn0.49(GayAl1-y0.51P(0.05≦y≦0.5、たとえばy=0.33)からなり、キャリア濃度が2×1018〜2.5×1018cm-3、かつ、活性化率25%以上に制御されたn形クラッド層3が0.1〜1.5μm程度、たとえば570nm程度の発光波長とするIn0.49(GazAl1-z0.51P(0.5≦z≦1.0、たとえばz=0.7)からなる活性層4が0.1〜1.5μm程度、たとえばIn0.49(GayAl1-y0.51P(0.05≦y≦0.5、たとえばy=0.33)からなり、キャリア濃度が5×1016〜2×1018cm-3にされたp形クラッド層5が0.1〜1.5μm程度それぞれ成長されて形成されている。なお、発光層形成部を構成する半導体層は、InGaAlP系化合物半導体に限らず、AlGaAs系化合物半導体など、他の発光色の半導体層を用いることができる。
【0015】
この発光層形成部11の表面に、AlvGa1-vAs(0.5≦v≦0.8)からなり、キャリア濃度が1×1018〜1×1020cm-3にされたウインドウ層6が1〜12μm程度設けられている。また、ウインドウ層6の表面には、AltGa1-tAs(0.3≦t≦0.6)からなる保護層10が0.1〜1μm程度設けられ、その上にp側電極8の下側のみにGaAsなどからなるコンタクト層7が設けられ、これらにより半導体積層部12が形成されている。なお保護層10の半導体材料としては、AluIn1-uP(0.35≦u≦0.51)であればAl混晶比率を落としてもバンドギャップエネルギーを大きくすることが可能となり、表面酸化を抑制しながら、光を損失させることなく取り出せるため、発光輝度の低下を抑えられる点で、より好ましい。
【0016】
p側電極8は、たとえばAu-Be/Ni/Mo/Auなどを全面に設けた後にパターニングすることにより形成されてもよいし、電極が設けられる部分以外にマスクを設けて、全面に電極材料を被膜してからマスクを除去するリフトオフ法により形成されてもよい。また、GaAsからなる半導体基板1の裏面には、全面にAu-Ge/Ni/Auなどがたとえば0.3μm程度の厚さに設けられ、n側電極9が形成されている。
【0017】
つぎに、n形クラッド層のキャリア濃度を2×1018〜2.5×1018cm-3の範囲に、かつ、n形ドーパントの活性化率を25%以上にする理由について説明する。前述のように、本発明者らは、通電試験などによる特性の経時変化を小さくするため鋭意検討を重ねた結果、特性の経時変化がn形クラッド層のキャリア濃度と非常に密接な関係にあることを見出した。すなわち、図1に示される構造の半導体発光素子を、n形クラッド層のキャリア濃度を種々変化させ、他の部分の構造は同じ条件で製造し、通電による時間変化に対応した加速試験、すなわち動作電流を2倍の20mAで12時間動作させた後の輝度変化を調べた結果、図2に示されるように、n形クラッド層のキャリア濃度の対数をとったものとほぼ比例関係にあることを見出した。
【0018】
この動作電流を2倍にする加速試験は、前述の高温通電や低温通電などの信頼性試験を500時間行うのに代えて、短時間で確認するために用いたもので、信頼性試験の500時間後における輝度変化の許容量(±30%)と対応する加速試験の輝度変化の許容量は、+20%と−3%で、ほぼ1:1の関係で対応することが確認されている。また、キャリア濃度の変化は、n形クラッド層を成長する際に、常に一定の成長温度(755℃)で、n形ドーパントのSiの原料ガスであるモノシランSiH4の流量を大きくすることにより、キャリア濃度を大きくし、n形ドーパントのSiの原料ガスであるモノシランSiH4の流量を小さくすることによりキャリア濃度を小さくした。なお、キャリア濃度は、CV測定およびホール測定により測定した。
【0019】
キャリア濃度が大きすぎると、初期発光効率が低く、通電することで素子の内部変化を生じ、発光効率が向上することにより、このような変化が起こると考えられ、キャリア濃度が小さいと輝度が低下するのは、初期発光効率は、高いが通電することで発光効率が低下したためと考えられる。
【0020】
したがって、図2からは、n形クラッド層のキャリア濃度が2×1018〜2.5×1018cm-3の範囲に入るように製造すれば、殆ど信頼性試験の特性変動を満たすことが判明した。そして、この条件を満たすには、n形クラッド層の成長時のドーパントガスを適切な一定量とし、成長時の温度を厳密に制御し、±5℃の範囲内で制御することにより、キャリア濃度を厳密に制御することができることを見出した。
【0021】
すなわち、図7にキャリア濃度が2×1018〜2.5×1018cm-3の範囲になるときの成長温度の関係が示されるように、キャリア濃度と成長温度がほぼ比例関係にあり、成長温度の絶対値は、MOCVD装置、計測器、計測方法などにより異なるため、その絶対値には余り意義はないが、この例では、キャリア濃度を2.25×1018cm-3にするのに最適な温度である755℃を中心として±5℃の750〜760℃の範囲に制御することで、キャリア濃度を正確に2×1018〜2.5×1018cm-3の範囲に収めることができ、信頼性試験の結果も所定の範囲内に収めることができた。なお、この場合のドーパントガスSiH4の流量は、5sccmで一定とした。
【0022】
さらに、本発明者らは、鋭意検討を重ねた結果、特性の変化が成長温度にも密接な関係を有することも見出した。すなわち、n形クラッド層3を700℃で成長させてキャリア濃度を種々変化させると、図3に示されるように、n形クラッド層のキャリア濃度と輝度変化との関係が図2に示されるものと異なることとなった。これは、同じキャリア濃度でも成長条件によって通電による輝度の変化割合が異なり、前述のキャリア濃度でも、必ずしも満足な結果が得られないことを意味している。
【0023】
そこでn形クラッド層のキャリア濃度を調べると共に、その半導体層に取り込まれているドーパント(不純物)原子であるSiの取り込まれた不純物濃度を、SIMSによる分析(二次イオン質量分析)などで調べ、ドーパントの活性化率(キャリア濃度/取り込まれた不純物濃度×100(%))を算出した。図4は、その結果が示されたものであり、図2に示される成長条件では、キャリア濃度が2×1018〜2.5×1018cm-3の間では、活性化率が50%〜40%の変化であるのに対して、図3に示される成長条件では、キャリア濃度が2×1018〜2.5×1018cm-3の間でも活性化率が30%〜20%となっていることが窺える。このことは、同一キャリア濃度でも成長条件によって活性化率が変化していることが分る。
【0024】
そこで、本発明者らは、さらに成長温度とドーパントの原料ガスSiH4の流量を変化させ、種々の条件で成長させ、キャリア濃度と活性化率との関係を調べた。その結果、図5に示されるように、比較的高い温度で成長させると、原料ガスSiH4の流量とキャリア濃度がほぼ比例関係にあると共に、活性化率が高いのに対して、低い温度で成長させると、流量の割りにキャリア濃度が上がらず、活性化率が低下することが分った。なお、図5において、活性化率は「活X%」(Xは活性化率の値)として表示されている。そして、さらにキャリア濃度を一定にした状態における活性化率を変化させた発光素子を製造し、活性化率に対する輝度変化について調べた。その結果、図6に示されるように、活性化率の低下に伴い輝度が上昇し、活性化率が25%以下になると、加速試験による輝度変化が顕著になることを見出した。この結果から、成長条件が変ることも考慮すると、キャリア濃度のみならず、活性化率も25%以上になるように製造する必要がある。この両方を満たす範囲を図5に斜線で示してある。
【0025】
本発明の半導体発光素子によれば、n形クラッド層のキャリア濃度およびドーパントの活性化率が所定の範囲内に制御されているため、前述のように、通電による時間経過や、高温通電、低温通電、高温高湿通電などの信頼性試験を行っても、その輝度などの電気特性の変動が非常に小さい範囲に制御され、非常に信頼性の優れた半導体発光素子が得られる。n形クラッド層のキャリア濃度や活性化率を制御することが必要なのは、p形クラッド層は、少なくとも活性層側のキャリア濃度が低く抑えられており、通電による時間経過によっても余り変動しないが、n形クラッド層は、不活性なSi原子が大量に存在するため、キャリア濃度が大きすぎると、初期発光効率が低く、通電することで素子の内部変化を生じ、発光効率が向上することにより、このような変化が起こると考えられ初期発光効率が低く、通電することによって活性化され、発光効率が向上するようになり輝度が上昇することになると考えられる。
【0026】
つぎに、この半導体発光素子の製法について説明をする。たとえばn形GaAs基板1をMOCVD(有機金属化学気相成長)装置内に入れ、反応ガスのトリエチルガリウム(TEG)またはトリメチルガリウム(TMG)、アルシン(AsH3)、ホスフィン(PH3)、トリメチルアルミニウム(TMA)、トリメチルインジウム(TMIn)、n形ドーパントとしてのSiH4、p形層形成の場合はp形ドーパントとしてのジメチル亜鉛(DMZn)の必要なガスをそれぞれ導入する。
【0027】
まず、基板温度を放射温度計により測定しながら、厳密に755℃に制御し、ドーパントガスのSiH4を5sccm、反応ガスのTMG、TMA、TMIn、PH3をそれぞれ必要量導入して、成長中の温度変化が±5℃の範囲に収まるように、放射温度計により基板温度を測定しながら、In0.49(Ga0.33Al0.670.51Pからなるn形クラッド層3を0.3〜1μm程度成長する(成長時間は、20分程度)。ついで通常の半導体発光素子を製造する場合と同様に必要な反応ガス、ドーパントガスを導入して、図1に示されるように、ノンドープのIn0.49(Ga0.70Al0.300.51Pからなる活性層4を0.3〜1μm程度、In0.49(Ga0.33Al0.670.51Pからなるp形クラッド層5を0.3〜1μm程度、たとえばAl0.7Ga0.3Asからなるp形ウインドウ層6を1〜10μm程度、Al0.5Ga0.5Asからなる保護層10を0.1〜1μm程度、GaAsからなるコンタクト層7を0.2〜1μm程度それぞれ連続的に成長する。
【0028】
その後、Au-Be/Ni/Mo/Auなどをリフトオフ法、マスク蒸着、または全面に成膜した後にホトリソグラフィ法によるパターニングにより、p側電極8を形成し、さらに半導体基板1の裏面にAu-Ge/Ni/Auなどを全面に設けてn側電極9を形成し、チップ化することにより図1に示されるLEDチップが得られる。
【0029】
【発明の効果】
本発明によれば、n形クラッド層のキャリア濃度が狭い範囲に制御されているため、通電による時間経過によっても、輝度などの特性変化を非常に小さく抑えることができる。その結果、信頼性の高い半導体発光素子が得られる。
【図面の簡単な説明】
【図1】本発明による半導体発光素子の断面構造の一例を示す説明図である。
【図2】n形クラッド層のキャリア濃度に対する通電による輝度変化の関係を示す図である。
【図3】n形クラッド層のキャリア濃度に対する通電による輝度変化の関係を示す図である。
【図4】n形クラッド層のキャリア濃度に対する活性化率の関係を示す図である。
【図5】n形クラッド層のキャリア濃度と活性化率及び成長温度の関係を示す図である。
【図6】n形クラッド層の活性化率に対する通電による輝度変化の関係を示す図である。
【図7】所望のキャリア濃度と成長温度との関係を示す図である。
【符号の説明】
3 n形クラッド層
4 活性層
5 p形クラッド層
11 発光層形成部
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor light-emitting device having a double hetero structure in which an active layer is sandwiched between an n-type clad layer and a p-type clad layer, and a semiconductor light-emitting device capable of controlling a change in characteristics such as luminance to be small even over time due to energization It relates to the manufacturing method.
[0002]
[Prior art]
Conventional red semiconductor light emitting devices include, for example, an n-type cladding layer made of an n-type InGaAlP-based semiconductor material, an active layer made of an InGaAlP-based semiconductor material having a lower band gap energy than the cladding layer, and a p-type A p-type cladding layer made of an InGaAlP-based semiconductor material is epitaxially grown to form a light emitting layer forming portion having a double hetero structure.
[0003]
Further, a p-type window layer (current diffusion layer) made of an AlGaAs compound semiconductor (for example, Al mixed crystal ratio of 0.7) is provided on the surface, and an AlGaAs system having an Al mixed crystal ratio smaller than that of the window layer thereon. A protective layer made of a compound semiconductor (for example, a mixed crystal ratio of Al of 0.5) is provided. A p-side electrode and an n-side electrode are formed on the back surface of the semiconductor substrate via a contact layer made of GaAs at the center of the surface.
[0004]
This type of semiconductor light-emitting element is not preferable for use if the characteristic change such as luminance change is great with the passage of time due to energization. Therefore, high temperature energization of about 85 ° C., low temperature energization of about −45 ° C., 85 ° C., humidity 85% A reliability test is performed in which about 500 hours of high-temperature and high-humidity energization is performed. In this reliability test, it is required that characteristics such as luminance change fall within a certain range.
[0005]
[Problems to be solved by the invention]
As described above, there may be a large variation in characteristics such as a change in luminance over time due to energization. In addition, the luminance change has a variation in that the luminance increases or decreases with time, not in a fixed direction, but increases in some cases and decreases in some cases.
[0006]
The present invention has been made in view of such a situation, and it is a double-heterostructure semiconductor light emitting device in which an active layer is sandwiched between cladding layers, and it is possible to reduce a change in characteristics such as a luminance change over time due to energization. An object of the present invention is to provide a semiconductor light emitting device that can be manufactured and a method for manufacturing the same.
[0007]
[Means for Solving the Problems]
In the semiconductor light-emitting device using an InGaAlP-based compound semiconductor, the present inventors have made extensive studies to minimize the phenomenon in which the characteristic variation in which the luminance increases or decreases with the passage of time due to energization is as small as possible. As a result, it has been found that a change in characteristics such as luminance due to energization has a very close correlation with the carrier concentration of the n-type cladding layer of the semiconductor light emitting device. As a result of further intensive studies, it was found that even if the carrier concentration is the same, if the activation rate is too small, characteristic fluctuations are likely to occur. Then, it has been found that by controlling the carrier concentration and the activation rate within a narrow range, characteristic variations such as luminance changes are less likely to occur even with time changes due to energization. Here, the activation rate means, for example, the ratio of the number of atoms effective as a carrier to the number of atoms incorporated as an n-type dopant in the semiconductor layer.
[0008]
That is, conventionally, it is considered that the carrier concentration of the n-type cladding layer is as large as possible, and the series resistance in the semiconductor layer is reduced, which contributes to the light emission efficiency. The larger the carrier concentration of the n-type cladding layer, the better. When a compound semiconductor is used, it is considered that there is no problem if the carrier concentration is about 2 × 10 17 cm −3 or more, and there has been no idea of limiting the carrier concentration of the n-type cladding layer to a narrow range. Further, little attention has been paid to the activation rate in relation to the characteristics. However, as described above, as a result of intensive studies by the present inventors, if the carrier concentration of the n-type cladding layer at the time of manufacture is too high, the luminance is increased by the reliability test, and the carrier concentration of the n-type cladding layer is increased. Is low, the luminance decreases due to the reliability test, and if the activation rate is too small, the luminance increases due to the reliability test, and the carrier concentration and the activation rate of the n-type cladding layer are very changed over time. The present inventors have found that this greatly affects.
[0009]
A semiconductor light emitting device according to the present invention comprises a semiconductor substrate made of GaAs , and is provided on the semiconductor substrate, and is made of In 0.49 (Ga y Al 1-y ) 0.51 P (0.05 ≦ y ≦ 0.5), 0.1 to 1.5 [mu] m thick n-type cladding layer, in 0.49 (Ga z Al 1 -z) 0.51 consists P (0.5 ≦ z ≦ 1.0) , 0.1~1.5μm thickness of the active layers, and in consist 0.49 (Ga y Al 1-y ) 0.51 P (0.05 ≦ y ≦ 0.5), p -type cladding layer of 0.1~1.5μm thickness Ru is formed by sequentially growing A light-emitting layer forming portion, and provided on the light-emitting layer forming portion , made of Al v Ga 1-v As (0.5 ≦ v ≦ 0.8), and a window layer having a thickness of 1 to 12 μm. A light-emitting diode that does not have a layer and emits light on the entire surface of the chip, and the carrier concentration of the n-type cladding layer is 2 × 10 18 to 2.5 × 10 18 cm. -3, and, by activation rate of n-type dopant Ri der least 25%, the carrier concentration of the p-type cladding layer is to be a 5 × 10 16 ~2 × 10 18 cm -3, energization It is formed so as to suppress a change in luminance due to time .
[0010]
By adopting this structure, the carrier concentration and the activation rate of the n-type cladding layer are strictly controlled, so that a change in characteristics such as a change in luminance can be suppressed to a very small value even with a time change due to energization. As a result, the reliability of the semiconductor light emitting element can be greatly improved.
[0011]
A method of manufacturing a semiconductor light emitting device according to the present invention includes: a light emitting layer forming portion in which an active layer made of an InGaAlP-based compound semiconductor is sandwiched between an n-type cladding layer and a p-type cladding layer having a larger band gap than the active layer on a semiconductor substrate made of GaAs was grown by MOCVD at no current confining layer, a method of a semiconductor light emitting device Ru emit light on the whole surface of the chip, on the semiconductor substrate, in 0.49 (Ga y Al 1 -y) 0.51 P ( the n-type cladding layer consisting of 0.05 ≦ y ≦ 0.5) to a thickness of 0.1~1.5μm, in 0.49 (Ga z Al 1-z) 0.51 P (0.5 ≦ z ≦ 1. 0) to a thickness of 0.1 to 1.5 μm, and a p-type cladding layer of In 0.49 (Ga y Al 1-y ) 0.51 P (0.05 ≦ y ≦ 0.5) to 0 forming a light emitting layer forming portion by sequentially grown to a thickness of .1~1.5Myuemu, A window layer made of Al v Ga 1-v As ( 0.5 ≦ v ≦ 0.8) was formed to a thickness of 1~12μm on the light emitting layer forming portion, the growth of the n-type cladding layer, said semiconductor While controlling the temperature of the substrate with a radiation thermometer and controlling it within a temperature range within ± 5 ° C. of the predetermined temperature, the carrier concentration is 2 × 10 18 to 2.5 × 10 18 cm −3 and active The dopant supply amount and growth temperature are set so that the conversion rate is 25% or more, and the growth of the p-type cladding layer is performed so that the carrier concentration becomes 5 × 10 16 to 2 × 10 18 cm −3. It is characterized by suppressing the time change of the brightness | luminance by electricity supply. Here, the predetermined temperature is determined by the flow rate of the dopant gas to be introduced, the MOCVD apparatus, and the like, and indicates an optimum temperature for obtaining 2.25 × 10 18 cm −3 . That is, the optimum temperature for obtaining a desired carrier concentration can be changed depending on the apparatus and growth conditions, but the temperature of the semiconductor substrate during growth is controlled within a range of ± 5 ° C. from the optimum temperature.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Next, a semiconductor light emitting device and a method for manufacturing the same according to the present invention will be described with reference to FIG. In the semiconductor light emitting device according to the present invention, a light emitting layer forming part 11 made of an InGaAlP-based compound semiconductor is provided on a semiconductor substrate 1, and a window layer 6 is provided on the light emitting layer forming part 11, and a protective layer is formed on the surface thereof. 10 is provided, the carrier concentration of the n-type cladding layer 3 is controlled in the range of 2 × 10 18 to 2.5 × 10 18 cm −3 , and the activation rate of the n-type dopant is controlled to 25% or more. ing.
[0014]
The light emitting layer forming portion 11 is made of, for example, In 0.49 (Ga y Al 1-y ) 0.51 P (0.05 ≦ y ≦ 0.5, for example, y = 0.33), and has a carrier concentration of 2 × 10 18 to 2 .5 × 10 18 cm -3 and about n-type cladding layer 3 is controlled to 25% or more activation rate 0.1 to 1.5 [mu] m, for example, the emission wavelength of about 570nm in 0.49 (Ga z Al 1-z ) 0.51 P (0.5 ≦ z ≦ 1.0, for example, z = 0.7), the active layer 4 is about 0.1 to 1.5 μm, for example, In 0.49 (Ga y Al 1-y ). The p-type cladding layer 5 made of 0.51 P (0.05 ≦ y ≦ 0.5, for example, y = 0.33) and having a carrier concentration of 5 × 10 16 to 2 × 10 18 cm −3 is 0.1. Each of them is grown up to about 1.5 μm. In addition, the semiconductor layer which comprises a light emitting layer formation part is not restricted to an InGaAlP type compound semiconductor, The semiconductor layer of other luminescent colors, such as an AlGaAs type compound semiconductor, can be used.
[0015]
A window made of Al v Ga 1-v As (0.5 ≦ v ≦ 0.8) and having a carrier concentration of 1 × 10 18 to 1 × 10 20 cm −3 on the surface of the light emitting layer forming portion 11. The layer 6 is provided about 1 to 12 μm. The surface of the window layer 6, Al t Ga 1-t As protective layer 10 made of (0.3 ≦ t ≦ 0.6) is provided about 0.1 to 1 [mu] m, p-side electrodes thereon 8 A contact layer 7 made of GaAs or the like is provided only on the lower side, thereby forming a semiconductor laminated portion 12. As the semiconductor material of the protective layer 10, if Al u In 1-u P (0.35 ≦ u ≦ 0.51), the band gap energy can be increased even if the Al mixed crystal ratio is decreased. Since the light can be extracted without losing the surface while suppressing the surface oxidation, it is more preferable in that the decrease in the emission luminance can be suppressed.
[0016]
The p-side electrode 8 may be formed, for example, by patterning after providing Au—Be / Ni / Mo / Au or the like over the entire surface, or by providing a mask in addition to the portion where the electrode is provided, It may be formed by a lift-off method in which the mask is removed after coating. On the back surface of the semiconductor substrate 1 made of GaAs, Au—Ge / Ni / Au or the like is provided on the entire surface to a thickness of about 0.3 μm, for example, and an n-side electrode 9 is formed.
[0017]
Next, the reason why the carrier concentration of the n-type cladding layer is in the range of 2 × 10 18 to 2.5 × 10 18 cm −3 and the activation rate of the n-type dopant is 25% or more will be described. As described above, the present inventors have made extensive studies to reduce the change over time of the characteristics due to the current test and the like, and as a result, the change over time in the characteristics has a very close relationship with the carrier concentration of the n-type cladding layer. I found out. That is, the semiconductor light emitting device having the structure shown in FIG. 1 is manufactured by changing the carrier concentration of the n-type cladding layer, and the other parts of the structure are manufactured under the same conditions. As a result of investigating the luminance change after operating the current for 20 hours at 20 mA which is twice as much, as shown in FIG. 2, it is almost proportional to the logarithm of the carrier concentration of the n-type cladding layer. I found it.
[0018]
The acceleration test for doubling the operating current is used for checking in a short time instead of performing the reliability test such as the above-described high-temperature energization and low-temperature energization for 500 hours. It has been confirmed that the permissible amount of change in luminance (± 30%) after the time and the permissible amount of change in luminance in the accelerated test are + 20% and −3%, corresponding to a substantially 1: 1 relationship. In addition, the carrier concentration is changed by increasing the flow rate of monosilane SiH 4 which is a raw material gas of Si of the n-type dopant at a constant growth temperature (755 ° C.) when growing the n-type cladding layer. The carrier concentration was reduced by increasing the carrier concentration and decreasing the flow rate of monosilane SiH 4 , which is the Si source gas for the n-type dopant. The carrier concentration was measured by CV measurement and Hall measurement.
[0019]
If the carrier concentration is too high, the initial light emission efficiency is low, and internal changes in the device occur when energized, and this change is considered to occur due to the improvement in light emission efficiency. If the carrier concentration is low, the luminance decreases. The reason for this is considered to be that the initial luminous efficiency is high but the luminous efficiency is lowered by energization.
[0020]
Therefore, from FIG. 2, if the n-type cladding layer is manufactured so that the carrier concentration is in the range of 2 × 10 18 to 2.5 × 10 18 cm −3 , the characteristics variation of the reliability test is almost satisfied. found. In order to satisfy this condition, the carrier gas concentration is controlled by adjusting the dopant gas during the growth of the n-type cladding layer to an appropriate constant amount, strictly controlling the temperature during the growth, and within a range of ± 5 ° C. Found that it can be strictly controlled.
[0021]
That is, as shown in FIG. 7, the relationship between the growth temperature when the carrier concentration is in the range of 2 × 10 18 to 2.5 × 10 18 cm −3 , the carrier concentration and the growth temperature are in a substantially proportional relationship, Since the absolute value of the growth temperature differs depending on the MOCVD apparatus, measuring instrument, measuring method, etc., the absolute value is not so meaningful, but in this example, the carrier concentration is set to 2.25 × 10 18 cm −3 . By controlling the temperature within the range of 750 to 760 ° C., ± 5 ° C., centering on 755 ° C. which is the optimum temperature for the carrier temperature, the carrier concentration is accurately within the range of 2 × 10 18 to 2.5 × 10 18 cm −3. The reliability test results were within the predetermined range. In this case, the flow rate of the dopant gas SiH 4 was constant at 5 sccm.
[0022]
Furthermore, as a result of intensive studies, the present inventors have also found that the change in characteristics has a close relationship with the growth temperature. That is, when the n-type cladding layer 3 is grown at 700 ° C. to change the carrier concentration variously, as shown in FIG. 3, the relationship between the carrier concentration of the n-type cladding layer and the luminance change is shown in FIG. It became different. This means that even with the same carrier concentration, the rate of change in luminance due to energization varies depending on the growth conditions, and even with the carrier concentration described above, satisfactory results are not necessarily obtained.
[0023]
Therefore, the carrier concentration of the n-type cladding layer is investigated, and the impurity concentration of Si, which is a dopant (impurity) atom incorporated in the semiconductor layer, is examined by SIMS analysis (secondary ion mass spectrometry). The activation rate of the dopant (carrier concentration / concentrated impurity concentration × 100 (%)) was calculated. FIG. 4 shows the results. Under the growth conditions shown in FIG. 2, the activation rate is 50% when the carrier concentration is between 2 × 10 18 and 2.5 × 10 18 cm −3. Whereas the change is ˜40%, under the growth conditions shown in FIG. 3, the activation rate is 30% to 20% even when the carrier concentration is between 2 × 10 18 and 2.5 × 10 18 cm −3. I can see that This indicates that the activation rate varies depending on the growth conditions even at the same carrier concentration.
[0024]
Therefore, the present inventors further changed the growth temperature and the flow rate of the dopant source gas SiH 4 to grow under various conditions, and investigated the relationship between the carrier concentration and the activation rate. As a result, as shown in FIG. 5, when the growth is performed at a relatively high temperature, the flow rate of the source gas SiH 4 and the carrier concentration are approximately proportional to each other, and the activation rate is high, whereas at a low temperature. It was found that when grown, the carrier concentration did not increase for the flow rate, and the activation rate decreased. In FIG. 5, the activation rate is displayed as “active X%” (X is a value of the activation rate). Then, a light emitting device having a changed activation rate in a state where the carrier concentration was made constant was manufactured, and a change in luminance with respect to the activation rate was examined. As a result, as shown in FIG. 6, it was found that the luminance increases as the activation rate decreases, and that the luminance change due to the acceleration test becomes significant when the activation rate is 25% or less. From this result, considering that the growth conditions change, it is necessary to manufacture not only the carrier concentration but also the activation rate of 25% or more. A range satisfying both of these is shown by hatching in FIG.
[0025]
According to the semiconductor light emitting device of the present invention, the carrier concentration of the n-type cladding layer and the activation rate of the dopant are controlled within a predetermined range. Even when a reliability test such as energization or high-temperature and high-humidity energization is performed, the variation in electrical characteristics such as luminance is controlled within a very small range, and a highly reliable semiconductor light emitting device can be obtained. It is necessary to control the carrier concentration and the activation rate of the n-type cladding layer. The p-type cladding layer has at least a low carrier concentration on the active layer side, and it does not change much over time due to energization. Since the n-type cladding layer contains a large amount of inert Si atoms, if the carrier concentration is too large, the initial light emission efficiency is low, causing an internal change of the element by energization, and the light emission efficiency is improved. It is considered that such a change occurs, the initial luminous efficiency is low, and it is activated by energization, so that the luminous efficiency is improved and the luminance is increased.
[0026]
Next, a manufacturing method of this semiconductor light emitting device will be described. For example, an n-type GaAs substrate 1 is placed in a MOCVD (metal organic chemical vapor deposition) apparatus, and reactive gases such as triethylgallium (TEG) or trimethylgallium (TMG), arsine (AsH 3 ), phosphine (PH 3 ), trimethylaluminum. Necessary gases of (TMA), trimethylindium (TMIn), SiH 4 as an n-type dopant, and dimethyl zinc (DMZn) as a p-type dopant in the case of forming a p-type layer are introduced.
[0027]
First, while measuring the substrate temperature with a radiation thermometer, the temperature is strictly controlled to 755 ° C., and 5 sccm of the dopant gas SiH 4 and necessary amounts of the reaction gases TMG, TMA, TMIn, and PH 3 are introduced, respectively. The n-type cladding layer 3 made of In 0.49 (Ga 0.33 Al 0.67 ) 0.51 P is grown by about 0.3 to 1 μm while measuring the substrate temperature with a radiation thermometer so that the temperature change in the range of ± 5 ° C. (Growth time is about 20 minutes). Then, as in the case of manufacturing a normal semiconductor light emitting device, necessary reaction gas and dopant gas are introduced, and the active layer 4 made of non-doped In 0.49 (Ga 0.70 Al 0.30 ) 0.51 P as shown in FIG. The p-type cladding layer 5 made of In 0.49 (Ga 0.33 Al 0.67 ) 0.51 P is made about 0.3 to 1 μm, for example, the p-type window layer 6 made of Al 0.7 Ga 0.3 As is made 1 to 10 μm. The protective layer 10 made of Al 0.5 Ga 0.5 As is continuously grown to about 0.1 to 1 μm, and the contact layer 7 made of GaAs is continuously grown to about 0.2 to 1 μm.
[0028]
Thereafter, Au-Be / Ni / Mo / Au or the like is formed on the entire surface by lift-off method, mask vapor deposition, or patterning by photolithography method, and then the p-side electrode 8 is formed. An LED chip shown in FIG. 1 can be obtained by forming an n-side electrode 9 by providing Ge / Ni / Au or the like over the entire surface and forming a chip.
[0029]
【The invention's effect】
According to the present invention, since the carrier concentration of the n-type cladding layer is controlled within a narrow range, the change in characteristics such as luminance can be suppressed to a very small value even with the passage of time due to energization. As a result, a highly reliable semiconductor light emitting device can be obtained.
[Brief description of the drawings]
FIG. 1 is an explanatory view showing an example of a cross-sectional structure of a semiconductor light emitting device according to the present invention.
FIG. 2 is a diagram showing a relationship of luminance change due to energization with respect to carrier concentration of an n-type cladding layer.
FIG. 3 is a diagram showing a relationship of luminance change due to energization with respect to a carrier concentration of an n-type cladding layer.
FIG. 4 is a diagram showing the relationship of the activation rate with respect to the carrier concentration of the n-type cladding layer.
FIG. 5 is a diagram showing the relationship between the carrier concentration, activation rate, and growth temperature of an n-type cladding layer.
FIG. 6 is a diagram showing a relationship of luminance change due to energization with respect to the activation rate of the n-type cladding layer.
FIG. 7 is a diagram showing a relationship between a desired carrier concentration and a growth temperature.
[Explanation of symbols]
3 n-type cladding layer 4 active layer 5 p-type cladding layer 11 light emitting layer forming part

Claims (2)

GaAsからなる半導体基板と、該半導体基板の上に設けられ、In0.49(GayAl1-y0.51P(0.05≦y≦0.5)からなり、0.1〜1.5μm厚のn形クラッド層、In0.49(GazAl1-z0.51P(0.5≦z≦1.0)からなり、0.1〜1.5μm厚の活性層、およびIn0.49(GayAl1-y0.51P(0.05≦y≦0.5)からなり、0.1〜1.5μm厚のp形クラッド層が順次成長されて形成される発光層形成部と、該発光層形成部上に設けられ、AlvGa1-vAs(0.5≦v≦0.8)からなり、1〜12μm厚のウインドウ層とからなり、電流狭窄層を有しないで、チップの全面で発光させる発光ダイオードであって、前記n形クラッド層のキャリア濃度が2×1018〜2.5×1018cm-3で、かつ、n形ドーパントの活性化率が25%以上であり、p形クラッド層のキャリア濃度が5×1016〜2×1018cm-3であるようにすることにより、通電による輝度の時間変化を抑制する半導体発光素子。A semiconductor substrate made of GaAs, and provided on the semiconductor substrate, made of In 0.49 (Ga y Al 1-y ) 0.51 P (0.05 ≦ y ≦ 0.5), having a thickness of 0.1 to 1.5 μm. the n-type cladding layer made of in 0.49 (Ga z Al 1- z) 0.51 P (0.5 ≦ z ≦ 1.0), 0.1~1.5μm thickness active layer, and an in 0.49 (Ga y A light emitting layer forming portion formed by sequentially growing a 0.1-1.5 μm-thick p-type cladding layer made of Al 1-y ) 0.51 P (0.05 ≦ y ≦ 0.5), and the light emission Provided on the layer forming portion, made of Al v Ga 1-v As (0.5 ≦ v ≦ 0.8), made of a window layer having a thickness of 1 to 12 μm, and having no current confinement layer, A light-emitting diode that emits light on the entire surface, wherein the n-type cladding layer has a carrier concentration of 2 × 10 18 to 2.5 × 10 18 cm −3 , and an n-type dopant activity A semiconductor light emitting device that suppresses a change in luminance over time due to energization by having a conversion rate of 25% or more and a carrier concentration of the p-type cladding layer being 5 × 10 16 to 2 × 10 18 cm −3 . GaAsからなる半導体基板上にInGaAlP系化合物半導体からなり活性層を該活性層よりバンドギャップの大きいn形クラッド層およびp形クラッド層により挟持する発光層形成部をMOCVD法により成長し、電流狭窄層を有しないで、チップの全面で発光させる半導体発光素子の製法であって、前記半導体基板上に、In0.49(GayAl1-y0.51P(0.05≦y≦0.5)からなるn形クラッド層を0.1〜1.5μmの厚さに、In0.49(GazAl1-z0.51P(0.5≦z≦1.0)からなる活性層を0.1〜1.5μmの厚さに、In0.49(GayAl1-y0.51P(0.05≦y≦0.5)からなるp形クラッド層を0.1〜1.5μmの厚さに順次成長することにより発光層形成部を形成し、該発光層形成部上にAl v Ga 1-v As(0.5≦v≦0.8)からなるウインドウ層を1〜12μmの厚さに形成し、前記n形クラッド層の成長を、前記半導体基板の温度を放射温度計により測定しながら、所定温度の±5℃以内の温度範囲にコントロールすることにより、キャリア濃度が2×1018〜2.5×1018cm-3に、かつ、活性化率が25%以上になるように、ドーパントの供給量および成長温度を設定して行い、前記p形クラッド層の成長をキャリア濃度が5×1016〜2×1018cm-3になるように形成することにより、通電による輝度の時間変化を抑制することを特徴とする半導体発光素子の製法。A light-emitting layer forming portion is formed by MOCVD on a semiconductor substrate made of GaAs and an active layer made of an InGaAlP-based compound semiconductor is sandwiched between an n-type cladding layer and a p-type cladding layer having a larger band gap than the active layer, and a current confinement layer in no, a process for preparing a semiconductor light-emitting device Ru emit light on the whole surface of the chip, on the semiconductor substrate, in 0.49 (Ga y Al 1 -y) 0.51 P (0.05 ≦ y ≦ 0.5) the n-type cladding layer to a thickness of 0.1~1.5μm consisting active layer composed of in 0.49 (Ga z Al 1- z) 0.51 P (0.5 ≦ z ≦ 1.0) 0.1 A p-type cladding layer made of In 0.49 (Ga y Al 1-y ) 0.51 P (0.05 ≦ y ≦ 0.5) is formed to a thickness of 0.1 to 1.5 μm. forming a light emitting layer forming portion by sequentially growing, Al v Ga 1-v As to the light emitting layer forming portion on A window layer composed of 0.5 ≦ v ≦ 0.8) formed to a thickness of 1~12Myuemu, the growth of the n-type cladding layer, while the temperature of the semiconductor substrate is measured by a radiation thermometer, a predetermined temperature The dopant is supplied so that the carrier concentration is 2 × 10 18 to 2.5 × 10 18 cm −3 and the activation rate is 25% or more by controlling the temperature within ± 5 ° C. The amount of growth and the growth temperature are set, and the growth of the p-type cladding layer is formed so that the carrier concentration is 5 × 10 16 to 2 × 10 18 cm −3 , thereby suppressing the temporal change in luminance due to energization. A method for producing a semiconductor light-emitting element.
JP2001356983A 2001-11-22 2001-11-22 Semiconductor light emitting device and manufacturing method thereof Expired - Fee Related JP4380956B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001356983A JP4380956B2 (en) 2001-11-22 2001-11-22 Semiconductor light emitting device and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001356983A JP4380956B2 (en) 2001-11-22 2001-11-22 Semiconductor light emitting device and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JP2003158293A JP2003158293A (en) 2003-05-30
JP4380956B2 true JP4380956B2 (en) 2009-12-09

Family

ID=19168397

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001356983A Expired - Fee Related JP4380956B2 (en) 2001-11-22 2001-11-22 Semiconductor light emitting device and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JP4380956B2 (en)

Also Published As

Publication number Publication date
JP2003158293A (en) 2003-05-30

Similar Documents

Publication Publication Date Title
US7652281B2 (en) Light emitting diode
JP5018433B2 (en) Epitaxial wafer for semiconductor light emitting device and semiconductor light emitting device
JPH1012923A (en) Light-emitting device and manufacture thereof
JP2002231997A (en) Nitride based semiconductor light emitting device
JP3602856B2 (en) Semiconductor light emitting device and method of manufacturing the same
JPH10321903A (en) Semiconductor light emitting device and method of manufacturing the same
JP2900754B2 (en) AlGaInP light emitting device
JP3458007B2 (en) Semiconductor light emitting device
JP3981218B2 (en) Epitaxial wafer for light emitting device and light emitting device
JPH08162671A (en) Nitride semiconductor light emitting diode
JP4380956B2 (en) Semiconductor light emitting device and manufacturing method thereof
JP2001094151A (en) Nitride-based compound semiconductor light emitting device and method of manufacturing the same
JPH1168150A (en) Semiconductor light emitting device and method of manufacturing the same
JP2006261219A (en) Semiconductor light emitting device
JP2006135215A (en) Manufacturing method of semiconductor light emitting device
JPH11186605A (en) Electrode forming method of gallium nitride based compound semiconductor and manufacture of element
JP2004356601A (en) Light emitting diode
JP2004356600A (en) Semiconductor light emitting device
JP2012174876A (en) Semiconductor light-emitting element and method for manufacturing semiconductor light-emitting element
JP3622292B2 (en) Semiconductor light emitting device
JP2937060B2 (en) Algainp based light emission device
JP2006253403A (en) Method for growing light emitting diode epitaxial wafer
JP2937054B2 (en) Algainp-based light-emitting device
JP3340859B2 (en) Semiconductor light emitting device
JP3697749B2 (en) Semiconductor light emitting device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20040520

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20061030

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20061128

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070129

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070327

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070525

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20080129

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080228

A911 Transfer of reconsideration by examiner before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20080407

A912 Removal of reconsideration by examiner before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A912

Effective date: 20080502

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090526

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20090526

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090915

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121002

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 4380956

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131002

Year of fee payment: 4

LAPS Cancellation because of no payment of annual fees