JP4419658B2 - Solid-state imaging device - Google Patents

Description

  The present invention relates to a solid-state imaging device in which an on-chip lens is provided corresponding to each light-receiving unit on a semiconductor substrate in which an imaging region including a plurality of light-receiving units is formed. ) For improving the structure.

Conventionally, solid-state imaging devices such as CCD image sensors and CMOS image sensors have been widely used in video cameras, digital still cameras, and the like.
FIG. 4 is a cross-sectional view showing an example of the element structure of a conventional solid-state imaging device, and shows an example of a CMOS image sensor.
In the figure, photosensors 20 including a P + layer 11, an N layer 12, and an N− layer 13 from the top are provided in a two-dimensional array on the upper layer portion of the semiconductor substrate 10 to form a rectangular imaging region, Wiring films 40, 50, 60, an intralayer lens 70, a color filter 80, an on-chip lens 90 and the like are disposed on the semiconductor substrate 10 with an interlayer insulating film 30 interposed therebetween.

By the way, in a video camera, a digital still camera, or the like, there is an exit pupil determined by the lens aperture used therein. Since the exit pupil distance, which is the distance from the lens focal point to the exit pupil, is finite, the principal ray incident on the solid-state imaging device is tilted as the distance from the center of the solid-state image sensor, which is the center of the optical system, to the periphery, and the incident angle Becomes larger.
Therefore, for example, in a solid-state imaging device having an on-chip lens as shown in FIG. 4, when the arrangement pitch of the photo sensor arranged on the semiconductor substrate and the on-chip lens is equal, that is, on-chip directly above the photo sensor of each pixel. If there is a lens, the light incident on the on-chip lens is not collected at the center of the photosensor around the semiconductor substrate, but is scattered by the wiring formed adjacent to the photosensor, resulting in a decrease in sensitivity. cause. This is a cause of uneven sensitivity of the screen called shading.

Therefore, as a technique for correcting the shading, a method of making the pitch of the on-chip lens smaller than the pitch of the photosensor is used. Specifically, the arrangement of the on-chip lens is realized mainly by applying a reduction magnification (hereinafter referred to as shrink) around the optical center of the solid-state imaging device (see, for example, Patent Document 1).
This is a technique called so-called exit pupil correction. In particular, with the CCD image sensor as the center, an on-chip lens, an intra-layer lens, an impurity layer, etc. are shrunk, and the center and peripheral portions of the imaging region By shifting the position, the light incident on the on-chip lens is condensed on the photosensor also in the peripheral portion of the solid-state imaging device. In particular, recently, solid-state imaging devices have been installed in mobile devices such as mobile phones and personal information portable terminals, and an optical system with a very short exit pupil distance is used for miniaturization. Increasing the incident angle of light on the screen, the on-chip lens exit pupil correction technology is becoming increasingly important.
Patent Publication No. 2600250

  However, even when the above-described conventional exit pupil correction technology is used, in the CMOS image sensor, there are various transistors and a large number of wirings in each pixel, so that the photosensor cannot be made rectangular on the silicon substrate. Therefore, due to the photosensor shape and the shape of the light shielding film opening, the way in which the amount of light falls at the four corners of the pixel is different, and there is a place where the sensitivity is particularly lowered, resulting in unnatural shading.

  Therefore, the present invention corrects non-uniform shading with respect to the distance from the center of the screen due to the asymmetric photosensor shape and the shape of the light shielding film opening, and makes it possible to make the shading amount uniform over the entire imaging region, resulting in sensitivity variations. An object of the present invention is to provide a solid-state imaging device capable of reducing and improving sensitivity.

In order to achieve the above-described object, a solid-state imaging device of the present invention includes an imaging region including a plurality of light receiving units, a plurality of on-chip lenses that collect incident light toward the light receiving unit, and one pixel. and a one of said light receiving portion and one of the on-chip lens within the on-chip lens is formed shifted toward the predetermined position of the imaging region from directly above the light receiving portion in the same pixel, the The shrink rate of the on-chip lens has different values in the horizontal direction and the vertical direction, the shrink rate of the on-chip lens is symmetric in the vertical line and the horizontal line passing through the center of the shrink, and the shrink rate of the on-chip lens is partially changed in the horizontal direction and the vertical direction of the imaging region, the distance between two adjacent on-chip lens of said plurality of on-chip lens is at least 2 Characterized by the presence kind.

According to the solid-state imaging device of the present invention, the on-chip lens is formed so as to be shifted from a position immediately above the light receiving unit in the pixel toward a predetermined position in the imaging region, and the shrink rate of the on-chip lens is in the horizontal direction and the vertical direction. Due to the structure in which the shrink rate of the on-chip lens partially changes in the horizontal direction and the vertical direction of the imaging region, and there are multiple intervals between two adjacent on-chip lenses, the light receiving part has an asymmetric shape. Regardless, since the position of the on-chip lens can be optimized, the shading amount can be made uniform over the entire imaging region, and as a result, there is an effect that reduction in sensitivity unevenness and improvement in sensitivity can be realized.

  In the embodiment of the present invention, the shrink rate of the on-chip lens, the inner layer lens disposed below the on-chip lens, the wiring film, and the like is set to different values in the horizontal direction and the vertical direction, and the shrinking center is set from the center of the imaging region. By shifting, the arrangement of the on-chip lens and the like is optimized with respect to the light receiving portion having an asymmetric structure so that uniform shading characteristics can be obtained. Further, by partially changing the shrink ratio in the horizontal direction and the vertical direction, further optimal element arrangement is performed, and uniform shading characteristics are achieved.

FIG. 1 is a sectional view showing an example of an element structure of a solid-state imaging device according to an embodiment of the present invention.
The solid-state imaging device according to the present embodiment is configured as a CMOS image sensor including one light receiving unit and one on-chip lens in one pixel, and an upper layer portion of the semiconductor substrate 110 has a P + layer 111, Photosensors 120 including an N layer 112 and an N− layer 113 are provided in a two-dimensional array. The electrode film 140, the wiring films 150 and 160, and the inner lens 170 are disposed on the semiconductor substrate 110 via the interlayer insulating film 130. A color filter 180, an on-chip lens 190, and the like are disposed.

In the solid-state imaging device according to the present embodiment, the N-layer 113 of the photosensor 120, the wiring, as shown in each of the layers that affect the condensing of the photosensor, specifically, arrows A to O in FIG. The film 160, the in-layer lens 170, the color filter 180, and the on-chip lens 190 are shrunk at a shrink rate that is individually set, and are disposed in a state of being shifted from the center of the photosensor 120 by a predetermined shift amount. .
Note that the shift amount (shrink rate) of each layer increases as the layer becomes farther from the photosensor 120. However, even within each layer, it does not have a uniform shift amount, and the vertical direction of each layer. and it is formed by different shift amounts in the horizontal direction, and is further formed with a different shift amount in the vertical and horizontal directions. Further, the center of the shrink is also arranged at a position different from the center of the imaging region.

Hereinafter, a specific example of the shrink structure in such an imaging apparatus will be described.
FIG. 2 is a plan view showing a specific example of the shrink structure of the imaging region in the present embodiment.
In the figure, a vertical line 202 and a horizontal line 203 passing through the shrink center 201 are drawn in the imaging area 200, and the shrink rate and the shrink direction of the areas A to D divided by the vertical line 202 and the horizontal line 203 are indicated by arrows a to d and a ′. ~ D '.
In this embodiment, the shrinkage rate in each region is symmetrical with respect to the horizontal direction and the vertical direction across the vertical line 202 and the horizontal line 203, but different shrinkage rates are used in the horizontal direction and the vertical direction. Even in the same horizontal direction, different shrink ratios are used in the portions indicated by arrows a and a ′.

For example, as shown in FIG. 3, when the same shrink rate is used in the vertical direction and the horizontal direction, if uniform shrink is applied in each of the areas A to D, it goes to the outer periphery of the imaging area. Accordingly, the amount of shift of the joint between the pixels becomes large, and a joint can be seen on the screen. Further, when the difference in the shrink rate is large, the electrical connection cannot be established.
Therefore, as shown in FIG. 2, by applying different shrinkage in each of the areas A to D, no shift occurs at the joint of each pixel, so that the joint is not visible on the screen.
Further, by shifting the center of the imaging region and the center of the shrink, it is possible to obtain optimum light collection in each layer.

The above embodiment is an example of the present invention, and various modifications can be made to the specific form of the present invention, for example, the method of applying the shrink rate and the selection of the layer to which the shrink is applied.
Further, the example in which the present invention is applied to the CMOS image sensor has been described above, but the present invention can be similarly applied to a CCD image sensor.

It is sectional drawing which shows the example of the element structure of the solid-state imaging device by the Example of this invention. It is a top view which shows the shrink structure in the solid-state imaging device shown in FIG. It is a top view which shows the shrink structure in the conventional solid-state imaging device. It is sectional drawing which shows the example of the element structure of the solid-state imaging device by a prior art example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 110 ... Semiconductor substrate, 111 ... P layer, 112 ... N layer, 113 ... N-layer, 120 ... Photo sensor, 130 ... Interlayer insulating film, 140 ... Electrode film, 150, 160 ... Wiring Membrane, 170 ... intra-layer lens, 180 ... color filter, 190 ... on-chip lens.

Claims (4)

An imaging region including a plurality of light receiving units, and a plurality of on-chip lenses that collect incident light toward the light receiving unit, and one light receiving unit and one on-chip lens in one pixel Including
The on-chip lens is formed to be shifted from a position immediately above the light receiving unit in the pixel toward a predetermined position in the imaging region,
The shrink rate of the on-chip lens is a value different in the horizontal direction and the vertical direction,
In the vertical and horizontal lines passing through the center of the shrink, the shrink rate of the on-chip lens is symmetric,
The shrink rate of the on-chip lens partially changes in the horizontal direction and the vertical direction of the imaging region,
There are at least two kinds of intervals between two adjacent on-chip lenses of the plurality of on-chip lenses .
Solid-state imaging device. The solid-state imaging device according to claim 1, wherein a center of the shrink is deviated from a center of the imaging region. Wherein the elements constituting one pixel, at least one element is positioned below the on-chip lens, the solid-state imaging according to claim 1, wherein are formed shifted toward a predetermined position of the imaging area apparatus. The elements located below the on-chip lens, a color filter, interlayer lens, the wiring film, the impurity mask, the electrode film, a solid-state imaging device according to claim 3, further comprising a number of isolation layers.

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