JP4428068B2 - Image data processing apparatus for ink jet printing apparatus - Google Patents

Description

  The present invention scans an inkjet head in which a plurality of ink discharge nozzles are arranged in the sub-scanning direction in the main scanning direction, and performs pixel scanning for one row in the main scanning direction for a plurality of scans of the inkjet head. The present invention relates to an image data processing apparatus for an ink jet printing apparatus that generates image data to be sent to an ink jet printing apparatus formed based on raster image data.

The inkjet head of the inkjet printing apparatus has a large number of ink ejection nozzles arranged (the direction in which the ink ejection nozzles are arranged is the sub-scanning direction), and each color such as black, cyan, magenta, yellow, etc. The ink jet head is moved in the main scanning direction while ejecting ink, and an image is printed on a medium such as recording paper.
When the ink jet head scans in the main scanning direction, each ink ejection nozzle does not form pixels continuously in the main scanning direction at regular intervals due to the physical characteristics of the ink jet head and other reasons. In many cases, the ink is controlled to be ejected.
In order to perform ink ejection at such timing, it is necessary to rearrange the original image data (raster image data input in a raster scan manner) in accordance with the ink ejection order.

Furthermore, in the ink jet printing apparatus, in order to improve the print image quality by absorbing the characteristic difference between the plurality of ink ejection nozzles formed on the ink jet head, for example, as described in Patent Document 1, the arrangement of pixel dots and The correspondence relationship with the ink discharge nozzles that form the pixel dots may be set in a complicated manner, and in order to cope with such a case, it is necessary to rearrange the data actually sent to the inkjet head.
Since the data rearrangement process as described above directly corresponds to the ink ejection nozzles of the inkjet head, the raster image data is processed after the dither process is completed when so-called dither process is required. Image data.

Conventionally, such data rearrangement processing has been generally performed by software processing. However, the inventors of the present application have a simple hardware configuration as described in Japanese Patent Application No. 2002-371015. A data rearrangement conversion circuit that executes rearrangement processing is proposed to increase the processing speed.
Japanese Patent Application Laid-Open No. 2001-232728

However, recently, there has been a further increase in the demand for higher print processing speed, and it is not always sufficient to improve the speed by simply collecting pixel dot data that are used simultaneously in the data arrangement conversion circuit. There is a need to increase the speed of data reading and writing to the inkjet head by increasing the speed of reading and writing of data to and from a buffer memory that stores and holds image data.
The speeding up of reading and writing to the buffer memory can be realized by using a higher-speed memory, but the high-speed memory is expensive and causes an increase in device cost.
The present invention has been made in view of such circumstances, and an object of the present invention is to improve processing capability while suppressing an increase in apparatus cost as much as possible.

  According to a first aspect of the present application, an inkjet head in which a plurality of ink discharge nozzles are arranged in the sub-scanning direction is scanned in the main scanning direction, and one row of pixel dots in the main scanning direction is scanned in the inkjet head In an image data processing apparatus for an ink jet printing apparatus that generates image data to be sent to an ink jet printing apparatus formed by a plurality of scans based on raster image data, the raster image data input in a raster scanning state is A data arrangement conversion circuit for rearranging image data of pixel dots continuously formed by one ink ejection nozzle, and a conversion buffer for storing image data rearranged by the data arrangement conversion circuit Memories that control writing and reading of data to the memory and its conversion buffer memory A re-controller, and the data arrangement conversion circuit is configured to organize and output pixel dot image data into word-unit data of the conversion buffer memory, and the conversion buffer memory includes a row address and a column The memory controller is configured with a memory that designates an address together with the same signal line, and the memory controller divides the address of the conversion buffer memory into a plurality of basic groups having the same storage capacity, and writes or reads data In one of the times, addresses are specified sequentially between the basic groups, and in the other of data writing or reading, addresses in the basic group are continuously specified, and a single row address So that multiple basic groups are included in the address range specified by It is constant.

The handling of the received data received in units of words from the data rearrangement conversion circuit is normally performed by sequentially writing the received data to successive addresses, and reading out and sending out the data at the addresses required by the inkjet head. , Can be handled.
However, in such handling, data can be written to the conversion buffer memory at a high speed, but the data reading speed from the conversion buffer memory is greatly reduced. As a result, the data sending speed to the inkjet head is reduced. However, it is limited by the low data reading speed.

The reduction in the speed at the time of data reading will be briefly described.
The address for reading / writing to the conversion buffer memory is designated by switching the row address as the upper address and the column address as the lower address by using the same signal line together.
When writing data to the conversion buffer memory, the write address is continuously changed, so after setting the row address, only the column address is sequentially updated and addressed. When data is read from the buffer memory, the row address and column address are updated every time one data is read.

This is because the ink ejection nozzles of the inkjet head are arranged in the sub-scanning direction orthogonal to the scanning direction of the raster image, whereas the data is raster image data. This is because when the data is collected from the conversion buffer memory, the storage address of each data jumps over the boundary of the column address.
The difference between the writing speed and the reading speed will be described with a specific example. If roughly speaking, it takes two clocks to specify the row address and the column address and actually access the data. Assuming that it takes 1 clock to access data, only 100 clocks are required for accessing 100 words of data, while 200 clocks are required for reading. is there.

The present invention pays attention to this point and writes the processing time while making it possible to use a memory designed to reduce the cost by specifying the row address and the column address together with the same signal line as the conversion buffer memory. Address setting for the conversion buffer memory is performed so that the processing capacity as a whole can be improved by distributing the time between reading and reading.
That is, the address of the conversion buffer memory is divided into a plurality of basic groups having the same storage capacity, and addresses are sequentially designated between the basic groups at one of data writing or data reading. On the other side of writing or reading, addresses in the basic group are designated successively.
At this time, by setting so that a plurality of the basic groups are included in an address range specified by a single row address, both when writing data to the conversion buffer memory and when reading data, It becomes possible to access a plurality of times continuously within an address range designated by a single row address, and the row address rewrite frequency is distributed between the write side and the read side.
This means that the rewrite frequency of the row address is increased at the time of writing as compared with the case where the above-mentioned write address is continuously changed. The speed can be dramatically improved.
The “word unit” which is the data output form of the data arrangement conversion circuit is not limited to the number of output signal lines corresponding to the number of bits of the word of the conversion buffer memory, and the conversion buffer memory includes a plurality of memories. This means that it corresponds to the word configuration of the element, and includes the case where two or three words are output simultaneously and distributed and stored in a plurality of memory elements.

According to a second invention of the present application, in addition to the configuration of the first invention, the memory controller may provide information on which scanning timing of the plurality of scans or the plurality of ink ejections. Either one of the information on whether to correspond to nozzle arrangement elements and the basic group, and the other information and the data element in the basic group, and in the column address, Bits for specifying a basic group and bits for specifying data elements in the basic group are mixed.
That is, the basic group can be configured in a clear and simple manner by simplifying the read / write address setting by configuring the basic group according to the physical configuration and operation of the inkjet head. Is possible.

  According to a third invention of the present application, in addition to the configuration of the second invention, the ink jet printing apparatus prints an image at a resolution that is an integral multiple of the arrangement resolution of the plurality of ink discharge nozzles. And the memory controller converts the image data in units of words input from the data arrangement conversion circuit into an image raster into two-dimensional coordinates with the main scanning direction as a horizontal axis and the sub-scanning direction as a vertical axis. In the state of being arranged corresponding to the arrangement, the entire data width of the image on the horizontal axis is virtually divided into frames having a set data width, and the frames are virtually divided into packets having a data width of 1 word. And is virtually divided into large sections for each data arranged at the same interval on the basis of the arrangement interval of the ink discharge nozzles on the vertical axis. Are virtually divided into blocks having a set data width, and the data width of the area specified by the one frame and the one block can be designated by a single row address or an integer thereof. The address for reading / writing data to / from the conversion buffer memory, a bit for specifying the major division, a bit for specifying the block, a bit for specifying the frame, and the packet And a bit corresponding to the sequence of the ink ejection nozzles in the block, and a bit for identifying the packet and a bit corresponding to the sequence of the ink ejection nozzles in the block. Are arranged on the lower side and are specially arranged in one packet and one block. And it is configured to areas that are to be with the base group.

That is, with respect to the address designation for the conversion buffer memory, raster image data (strictly speaking, the raster image data is rearranged by the data rearrangement conversion circuit based on the concept of frame, packet, block, and major division defined as described above. (Later data) is hierarchically coordinated, so that it is possible to easily address the conversion buffer memory.
The reason will be described below with reference to the drawings.
In the following description, an image for one line in the main scanning direction is formed by four main scans, in other words, pixel dots of a print image are formed at a constant period of one in four in the main scanning direction, In the sub-scanning direction, the case where the ink discharge nozzles are arranged at equal pitch with a resolution of 1/4 of the print image in the sub-scanning direction will be described as an example.

FIG. 5 shows raster image data input to the data arrangement conversion circuit as a two-dimensional data arrangement of the horizontal axis (horizontal axis) and the vertical axis (vertical axis) in correspondence with the pixel dot arrangement of the image. Show.
In FIG. 5, each cell arranged vertically and horizontally represents a pixel dot, and the numerical value in each cell is a serial number of data arrangement in the horizontal axis direction (starting number is “0”) and data in the vertical axis direction. Pairs with sequential numbers (starting number is “0”) are displayed separated by commas. That is, for example, the pixel dots with the second data arrangement number in the horizontal direction and the third data arrangement number in the vertical direction are “1, 2”.
The horizontal width in FIG. 5 is the horizontal width (full width) of the input raster image, and the vertical width is described as a data width that can be stored in the conversion buffer memory.
Pixel dots continuously ejected and formed by the same main scanning are divided into four groups “HP0” to “HP3” in the horizontal direction, and the group to which each pixel dot belongs is shown in the top row, and “ The group to which each pixel dot belongs is shown at the left end in four groups of “VP0” to “VP3”. “VP0” to “VP3” are sections for each data arranged at the same interval based on the arrangement interval of the ink discharge nozzles, that is, the large category.

If one word of the conversion buffer memory is composed of image data of 4 pixel dots, raster image data as shown in FIG. 5 is input to the data arrangement conversion circuit and the image data is rearranged. It becomes the arrangement as shown in. The numbers in each cell in FIG. 6 are the same as those in FIG. 5. In FIG. 6, when viewed strictly in pixel dots, it is not an array of raster images, but can be viewed as raster images when viewed in words. .
The arrangement of the pixel dots in FIG. 6 is grouped into the above-described large sections, that is, the groups “VP0” to “VP3”, and the arrangement shown in FIG. 7 is obtained. Also in FIG. 7, each cell corresponds to a pixel dot, and the numbers in each cell are the same as those in FIGS.

Next, for each of the major divisions “VP0” to “VP3”, the cells in FIG. 7 are grouped into one cell in units of one word to obtain the arrangement shown in FIG. In each cell of FIG. 8, the serial number of the data arrangement in the word unit on the horizontal axis (“0” to “PE”) and the serial number of the data arrangement in the pixel dot unit on the vertical axis (“0” to “ZE”). ) And comma separated.
8 is common to the major sections (“VP0” to “VP3”), the displayed arrangement is for one major section.

If the word unit division is removed from the arrangement of FIG. 8 to make one group, the arrangement shown in FIG. 9 is obtained. In the horizontal axis of FIG. 9, a single square means the full width of the image.
Each square in FIG. 9 includes a serial number (“0” to “BLE”) in which the serial number of the vertical axis data sequence is equally divided by “PL” and the original vertical axis data sequence serial number. The numbers are separated by commas. The block is composed of “PL” pieces.

The horizontal axis in FIG. 9 is divided by a set number (“FE + 1”) is the frame, and FIG. 9 is an arrangement of the frame and the block shown in FIG. Shows the serial number of the frame ("0" to "FE") and the serial number of the block ("0" to "BLE") separated by commas. In the horizontal axis, the packet is obtained by dividing one frame into units of one word.
By dividing the raster image data hierarchically as described above, the coordinates of each pixel dot of the raster image data (original raster image data) are expressed in 2-bit values and the numbers of the respective segments are shown in FIG. ) And FIG. 11B.
That is, the coordinate of the pixel dot on the vertical axis is the number of the block of “b” bits (“B #”) from the upper bit side as shown as “line number (L #)” in FIG. ), A serial number (“Z #”) in one block represented by “z” bits, and a number of the major division (“0” to “3”) of “v” bits. Here, the serial number “Z #” in one block corresponds to the arrangement of the ink discharge nozzles. 5 to 10 exemplify the case where the large division is four divisions, the “v” bit is represented by 2 bits in FIG. 11A.

  On the other hand, the coordinate of the pixel dot on the horizontal axis is the frame number (“F #”) of “f” bits from the upper bit side, as shown as “dot number (D #)” in FIG. ), A packet number (“P #”) in one frame represented by “p” bits, and “w” bits corresponding to a count of the number of dots contained in one word. However, in relation to the fact that the packet is defined by the data after being rearranged by the data rearrangement conversion circuit, the packet number (“P #”) is “HP0” to “HP3”. It is divided into “lp” bits indicating which group it belongs to, and “hp” bits higher than that. That is, p = hp + lp. 5 to 10 exemplify the case of dividing into four groups “HP0” to “HP3”, and therefore, lp = 2 is displayed in FIG. 11B.

By defining as described above, one word can be specified by the major division (“VP”), “B #”, “F #”, “P #”, “Z #”. The address for writing to and reading from the conversion buffer memory can be designated as shown in FIG.
In FIG. 11C, the topmost “VP” to “Z #” are used for addressing the conversion buffer memory, and in reality, this address is divided into a row address and a column address.
This means that the address data to the conversion buffer memory can be uniquely specified only by changing the arrangement order of the bit strings from the pixel dot coordinates of the raster image data in FIGS. 11 (a) and 11 (b). Yes.
FIG. 11C shows a logical address expressed in units of 1 byte, and the signal of the bit “mw” indicated by “NC” is not used as an address signal of the conversion buffer memory. This means an identification bit of a byte in one word.

  Furthermore, in performing the hierarchical division as described above, regarding the setting of the size of one frame and one block when dividing into the frame on the horizontal axis and dividing into the block on the vertical axis Sets the data amount of the area specified by one frame and one block to a data width that can be specified by a single row address or an integral multiple thereof, and one packet and one said The area specified by the block is set as the basic group, and the address ("P #") for specifying the packet is specified in the addressing to the conversion buffer memory as illustrated in FIG. And the corresponding bit (“Z #”) of the ink discharge nozzles in the block are arranged on the lower side.

  In this way, when the size of the frame and the block and the bit arrangement for addressing are set, the data amount of the area specified by one frame and one block, which is the most ideal state, is set. The case of setting the data width that can be specified by a single row address will be described. When image data is written in the conversion buffer memory in units of words, the major division (“VP”), the block (“B #”), When the frame (“F #”) and the ink discharge nozzle corresponding bit (“Z #”) are fixed (that is, the row address is not changed), only the number of packets in one frame. The packet number (“P #”) changes, and then the frame number (“F #”) changes to change the row address. While repeating the operation of only the number ( "P #") changes, with the progress of the writing, the major divisions ( "VP"), "Z #" and "B #" will change.

On the other hand, when data is read from the conversion buffer memory, the major division (“VP”), the block (“B #”), the frame (“F #”), and the packet (“P #”) are fixed. In the state (that is, the state where the row address is not changed), only the ink discharge nozzle corresponding bit (“Z #”) in one block is changed, and the other number (“F #”, etc.) is subsequently changed. In many cases, the row address changes, and the operation of changing only the ink discharge nozzle corresponding bit (“Z #”) is repeated.
Accordingly, as the number of packets in one frame increases, writing becomes faster and reading becomes slower, and conversely, reading increases as the number of sections corresponding to the ink ejection nozzles in one block increases. The trade-off is that writing is slow.
In the above, the case where the data amount of the area specified by one frame and one block, which is the most ideal state, is set to a data width that can be specified by a single row address has been described. In the case of setting to an integral multiple of the data width, the speed is reduced by the change of the row address in one frame, but basically the same as described above.

According to a fourth aspect of the present application, the ink jet printing apparatus is configured to print an image with a resolution that is a power of two of the arrangement resolution of the plurality of ink discharge nozzles.
In other words, the configuration is such that an image is printed at a resolution that is a power of two of the arrangement resolution of the plurality of ink ejection nozzles, and the number of sections of the large section (“VP”) is set to a power of two. Thus, the bit arrangement of the large section is filled without a gap.

According to the first aspect of the invention, the row address rewrite frequency is distributed between the write side and the read side, and the speed at the time of reading can be drastically improved while the write speed is reduced slightly. Using low-cost memory, the increase in device cost was suppressed as much as possible, and the processing capacity was improved.
In addition, according to the second aspect, the basic group can be clearly and simply configured by configuring the basic group according to the physical configuration and operation of the inkjet head. It becomes possible to simplify the address setting for reading and writing, and the device cost can be further suppressed.

According to the third aspect of the invention, since the address data to the conversion buffer memory can be uniquely specified only by changing the arrangement order of the bit strings from the coordinates of the pixel dots of the raster image data, the address of the conversion buffer memory is generated. The circuit can be greatly simplified, and the device cost can be further suppressed.
According to the fourth aspect of the invention, by setting the number of divisions of the large division (“VP”) to a power of two, the bit arrangement of the large division is filled without any gaps, and pixel dots It is possible to further simplify the coordinate designation.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment in which an image data processing apparatus for an ink jet printing apparatus according to the present invention is provided in a photographic print system will be described with reference to the drawings.
As shown in FIG. 4, a photographic print system DP exemplified in the present embodiment includes a photographic film reader FS that reads a frame image of a developed photographic film 1 (hereinafter simply referred to as “film 1”). The printer unit EP prints the frame image read by the photographic film reading device FS on the recording paper 2.

[Schematic configuration of photographic film reader FS]
In the housing of the photographic film reader FS, as schematically shown in FIG. 4, a halogen lamp 10, a light guide 11 composed of an optical fiber bundle, and a CCD line sensor for photoelectrically converting a frame image of the film 1 A unit 13, a lens 14 for forming an image of the film 1 on the CCD line sensor unit 13, a mirror 15 for bending the optical path by 90 degrees, and an output signal of the CCD line sensor unit 13 are amplified and A / A signal processing circuit 16 that performs D conversion and the like is provided. Further, a setup filter 17 for device adjustment is disposed between the halogen lamp 10 and the light incident end of the light guide 11 so as to be able to move in and out of the optical path. A motor 18 is provided to drive the setup filter 17 back and forth.
A film transporting mechanism (not shown) is provided outside the housing of the photographic film reading device FS in a state of being located below the light emitting end of the light guide 11 so that the film 1 is positioned at a predetermined reading position. A carrier 12 is detachably provided.

The CCD line sensor unit 13 includes three lines of CCD line sensors in which about 5000 CCD elements are arranged in the width direction of the film 1, and the light receiving surface of each CCD line sensor has red, green, and blue colors, respectively. A color filter is formed to detect the frame image of the film 1 by color separation.
In the photographic film reading device FS, when the film 1 is set on the film carrier 12, the film transport mechanism starts transporting the film 1, sequentially reading the frame images, and digital image data for each of red, green, and blue. Is output to the printer unit EP.

[Overall configuration of printer unit EP]
As schematically shown in FIG. 4, the printer unit EP is configured separately from the photographic film reading device FS, and discharges ink to the recording paper 2 inside the housing to thereby record the recording paper 2. The image data inputted from the ink jet printing apparatus 20 for forming an image thereon and the signal processing circuit 16 of the photographic film reader FS is subjected to predetermined image processing, and the image data after image processing is subjected to ink jet printing. An image processing device 21 that performs conversion processing to image data to be printed by the device 20, and image data processed by the image processing device 21 is organized into image data to be sent to the ink jet printing device 20. Pull out the recording paper 2 from the data output device 22 that functions as an image data processing device for the printing device and the recording paper roll 23 A recording paper transporting system PT to be transported and a cutter 24 for cutting the recording paper 2 transported by the recording paper transporting system PT into a predetermined print size are provided and printed by the ink jet printing apparatus 20. The recording paper 2 is discharged onto a tray 25 provided outside the housing.

  The image processing apparatus 21 has a monitor 26 for simulating and displaying a print image, and an operator for observing the simulated image displayed on the monitor 26 and inputting a correction amount for image processing. An operation console 27 is connected to an external input / output device 28 such as an MO drive device or a CD-R drive device. By providing the external input / output device 28, in addition to the image data of the film 1 input from the photographic film reader FS, photographic prints can be performed using image data recorded on various recording media such as CD-R media and memory cards. The image data read by the photographic film reader FS can be recorded and stored in those recording media.

[Schematic Configuration of Inkjet Printing Apparatus 20]
The ink jet printing apparatus 20 includes an ink jet head 31 and a head controller 32 that controls the ink jet head 31, and the ink jet head 31 is attached to a guide rod 31a as shown in FIG. It is movable in the main scanning direction (longitudinal direction of the guide rod 31a) indicated by the arrow A while being supported and guided, and is moved in the main scanning direction via a timing belt or the like by driving means such as a pulse motor (not shown). Driven.
A nozzle unit 41 having a large number of ink discharge nozzles 41 a arranged in the conveyance direction (sub-scanning direction) of the recording paper 2 indicated by an arrow B is attached to the bottom of the inkjet head 31.
The ink discharge nozzles 41a are provided for each ink color to be used, and FIG. 3 illustrates an example in which four rows of ink discharge nozzles 41a are provided in total for each color of yellow, cyan, magenta, and black. is doing. Of course, in order to print a higher quality image, an ink ejection nozzle for ejecting the light-colored ink of each color may be provided.

In the present embodiment, the inkjet printing apparatus 20 exemplifies a case where the ink discharge amount is changed in four stages including a state where ink is not discharged, and each pixel dot formed by each ink discharge nozzle 41a is It is expressed by 2-bit image data.
The head controller 32 controls the presence / absence of ink ejection and the ink ejection amount for each ink ejection nozzle 41a based on the image data received from the data output device 22 in units of ink ejection nozzles.
The ink jet printing apparatus 20 performs a printing operation for moving the ink jet head 31 in the main scanning direction while ejecting ink from the ink ejection nozzle 41a under the control of the head controller 32, and a recording paper conveying operation for conveying the recording paper 2 for a set length. Are alternately repeated to print an image on the recording paper 2.

[Processing Operation of Image Processing Device 21]
The image processing device 21 receives image data in which each pixel is expressed by gradation of data such as 8 bits or 12 bits from the photographic film reading device FS or the external input / output device 28, and changes the ink color of the ink jet printing device 20. After executing image processing including processing for converting into corresponding image data, the image data is further dithered in consideration of the four-step gradation expression of the ink jet printing apparatus 20, and a data output device 22 to output. The image processing apparatus 21 includes a microprocessor, and executes the dither processing by software processing.

[Configuration of Data Output Device 22]
The image processing apparatus 21 handles image data as raster image data, and the output image data is also raster image data composed of image data of each pixel dot.
On the other hand, the inkjet head 31 has a suitable ink discharge frequency due to physical characteristics, and also has a suitable moving speed for the moving speed of the inkjet head 31. In this case, the continuous pixel dots are not continuously formed as they are, but ink is ejected by skipping several pixel dots, and one line of pixel dots in the main scanning direction is subjected to a plurality of main scans. Form.
In the present embodiment, a case where ink is ejected at a resolution of 1/4 of the print resolution in the main scanning direction in one main scanning, that is, a case where ink is ejected at a cycle of 4 pixel dots will be described as an example.
The data output device 22 organizes the raster image data received from the image processing device 21 as well as data corresponding to the operation of the inkjet head 31 as described above.

  In the data output device 22, the raster image data received from the image processing device 21 is continuously received by one ink discharge nozzle 41 a as shown in FIG. 1 in order to organize the arrangement order of the image data as described above. A data rearrangement circuit 51 that rearranges the image data of the pixel dots that are formed in this way, a conversion buffer memory 52 that stores the image data rearranged by the data rearrangement circuit 51, and The output buffer memory 53 that stores and holds image data for the ink ejection nozzles 41 a that eject ink in the same main scan, which is read from the conversion buffer memory 52, and the writing and reading of image data to and from the conversion buffer memory 52 are controlled. From the image data stored in the memory controller 54 and the output buffer memory 53. A P / S conversion circuit 55 to be sent to the head controller 32 serially reads out the image data of the pixel dots corresponding to the arrangement order of the discharge nozzle 41a by the image data of the second bit width is provided.

  The data arrangement conversion circuit 51 includes a pair of registers for storing and holding the raster image data input in a raster scan state for a plurality of pixel dots, and rearranges the bit arrangement of the data stored and held in the registers. The sorting is performed by outputting the output. The rearrangement of the bit arrangement is performed by connecting the correspondence between the bits in the pair of registers by wiring.

The data arrangement conversion circuit 51 organizes and outputs the data in word units so as to be equal to the data length of one word in the conversion buffer memory 52.
The conversion buffer memory 52 is configured by a memory (specifically, a DRAM such as SDRAM, for example) that designates a row address and a column address together using the same signal line. In this embodiment, the conversion buffer memory An example will be described in which the data length of one word of 52 is 32 bits.
By setting the data length of one word in the conversion buffer memory 52 to 32 bits, the data of 16 pixel dots is organized into data of one word.
In addition, a function equivalent to setting the data length of one word in the conversion buffer memory 52 to 32 bits is used by using two DRAMs each having a data length of 16 bits. It can also be realized by outputting simultaneously and writing each word to each DRAM. Addressing in this case can also be handled in the same manner as described below.

The conversion buffer memory 52 has at least a storage capacity capable of storing image data of pixel dots corresponding to the entire width in the main scanning direction on the recording paper 2 and the width of the ink ejection nozzles 41a in one row in the sub scanning direction. Preferably, while the inkjet head 31 is moved in the main scanning direction and the printing operation is performed, in order to receive the image data necessary for the next printing operation, the recording head is fed by one recording paper conveying operation. It is desirable to provide an additional capacity capable of storing image data of pixel dots corresponding to the number of lines to be stored.
In the present embodiment, the resolution of an image to be printed on the recording paper 2 is 1440 dpi (main scanning direction) × 720 dpi (sub-scanning direction), and the arrangement pitch of the ink discharge nozzles 41a in the sub-scanning direction is expressed by the resolution. and as 180dpi, the integral multiple of the arrangement resolution of the ink discharge nozzles 41a (specifically 2 ^twice) illustrates a case of printing forms an image at a resolution of, the conversion buffer memory 52, for each color, 32, An example will be described in which a ring buffer memory having a storage capacity for 768 × 4,096 pixel dots is configured.

  A memory controller 54 that controls writing and reading of data to and from the conversion buffer memory 52 converts the word unit image data input from the data arrangement conversion circuit 51 into the horizontal scanning axis and the sub scanning direction. Virtual two-dimensional coordinates (see FIG. 6 etc.) as vertical axes are arranged in correspondence with the raster arrangement of the image, and the entire data width of the image on the horizontal axis is virtually divided into frames having a set data width. Further, the frame is virtually divided into packets having a data width of one word, and virtually divided into large sections for each data arranged at the same interval on the vertical axis with reference to the arrangement interval of the ink discharge nozzles. In addition, the large division is virtually equally divided into blocks having a set data width, and the one frame and the one block are specially divided. The data amount of the area to be processed is set to a data width that can be specified by a single row address, the address for reading and writing data to the conversion buffer memory, the bit for specifying the major division, and the block are specified And a bit for specifying the frame, a bit for specifying the packet, and a corresponding bit of the ink ejection nozzle in the block, and specifying the packet Bits for this purpose and corresponding bits of the ink ejection nozzles in the block are arranged on the lower side.

In the present embodiment, assuming that there are nine address signal lines for specifying column addresses, the data width that can be specified by one row address is 512 words (2 ⁹ ), and one frame and one block The data amount specified by is assumed to be 512 words.
The major divisions are four divisions as in FIG. 5 and the like. In each of the four divisions, if the entire horizontal axis width (data number: 2,048 words) is divided into 64 frames, the horizontal axis There are 32 packets (one word width) in the width of one frame, and the number of data in one block on the vertical axis is 16 (512 words / 32 packets). The number of blocks is 64.
Therefore, the major division is represented by 2 bits (4: corresponding to “v” in FIG. 11A), and the block number corresponds to 6 bits (64: corresponding to “b” in FIG. 11A). The number of bits corresponding to the arrangement of the ink ejection nozzles in the block is represented by 4 bits (16: corresponding to “z” in FIG. 11A), and the frame number is 6 It is represented by 64 bits (corresponding to “f” in FIG. 11B), and the number of the packet in the frame is represented by 5 bits (32 bits: corresponding to “hp + lp” in FIG. 11B). Is done.

The memory controller 54 divides the address of the conversion buffer memory 52 into a plurality of basic groups, with the area specified by one horizontal axis packet and one vertical axis block divided in this way as a basic group.
Since the packet is a segment of one word width on the horizontal axis, at any scanning timing among a plurality of scans (“HP0” to “HP3”) for completing one pixel dot column. The data arrangement in the block holds information corresponding to the arrangement elements of the ink discharge nozzles 41a.
Therefore, the basic group defined in the present embodiment is associated with information indicating which scan timing of the plurality of scans (“HP0” to “HP3”) is the individual basic group itself. Thus, the data elements in the basic group are associated with information corresponding to the arrangement elements of the plurality of ink ejection nozzles 41a.

By dividing into the basic groups in this manner, addresses are sequentially designated between the basic groups at the time of data writing, and addresses in the basic group are continuously set at the time of data reading. It will be specified.
As a result, when data is written, the row address is updated once every 32 words, and when data is read, the row address is updated once every 16 words. Compared with the case where the row address is updated every time one word is read, the decrease in the writing speed is very small, and the reading speed is drastically improved.

  In order to perform the address designation as described above, the memory controller 54 includes a raster image scanning control unit 61 for controlling the write address and a nozzle distribution control unit for controlling the read address, as shown in FIG. 62, a dot counter 63 that generates “dot number (L #)” shown in FIG. 11B, and a line counter 64 that generates “line number (L #)” shown in FIG. The address generation circuit 65 generates the addresses shown in FIG. 11C from the output of the dot counter 63 (“dot number (L #)”) and the output of the dot counter 63 (“line number (L #)”). And switching between the dot counter 63 and the line counter 64 under the control of the raster image scanning control unit 61 and the nozzle distribution control unit 62 A pair of multiplexers 66 and 67 for is provided. As the configurations of the dot counter 63 and the line counter 64, for example, bit strings such as “B #”, “Z #”, “F #” in FIGS. 11A and 11B are individually provided. A counter for counting may be provided so that the initial count value and the count clock can be input from the raster image scanning control unit 61 or the nozzle distribution control unit 62.

As described with reference to FIG. 11, the raster image scan of the memory controller 54 is performed by associating the position data on the two-dimensional coordinates of each pixel dot of the raster image data with the address of the conversion buffer memory 52 as described above. Since both the control unit 61 and the nozzle distribution control unit 62 control the position data on the two-dimensional coordinates as a reference, the raster image scanning control unit 61 and the nozzle distribution control unit 62 use the dot counter. 63, the line counter 64 and the address generation circuit 65 can be shared.
Moreover, as is apparent from the comparison between FIG. 11A and FIG. 11B and FIG. 11C, the address can be generated only by the connection setting of the wiring between bits.
The conversion buffer memory 52 is composed of a DRAM that designates a row address and a column address together with the same signal line. Therefore, although not shown, the address generated by the address generation circuit 65 is omitted. Are output separately for a row address and a column address. At this time, the most significant “VP” is output as the bank address of the memory. The address output in this way is further subjected to address conversion for using the conversion buffer memory 52 as a ring buffer.

[Another embodiment]
Hereinafter, other embodiments of the present invention will be listed.
(1) In the above embodiment, the memory controller 54 sequentially designates addresses between the basic groups at the time of data writing, and continuously in the basic group at the time of data reading. Although the case of designating an address is shown as an example, conversely, when writing data, the addresses in the basic group are designated continuously, and when reading data, the basic groups are sequentially specified. It is also possible to configure so as to specify an address.

(2) In the above embodiment, each basic group is associated with information indicating which scanning timing of the plurality of scans ("HP0" to "HP3") is the individual basic group itself. In this example, the data elements in the basic group are associated with information corresponding to the arrangement elements of the plurality of ink discharge nozzles 41a. On the contrary, the individual basic groups themselves are The data element in the basic group is associated with information corresponding to the arrangement element of the plurality of ink discharge nozzles 41a, and is any scanning timing of the plurality of scans ("HP0" to "HP3"). Such information may be associated.

(3) The above embodiment exemplifies a case where the raster image data is hierarchically divided on the two-dimensional coordinates, so that the two-dimensional coordinate position of the pixel dot and the address of the conversion buffer memory are easily combined. However, the relationship between the two-dimensional coordinate position of the pixel dot and the address of the conversion buffer memory may be configured as a data table for addressing, and further, the data table may be used for writing and reading image data. The data tables may be provided separately for the data write schedule (raster scan) and the data read schedule (nozzle allocation).

(4) In the above embodiment, the large division is divided into four groups “VP0” to “VP3”, and one pixel dot column is completed by four main scans “HP0” to “HP3”. Although the case is illustrated, the number of these divisions and the like can be changed as appropriate, and the same applies to the arrangement resolution and print resolution of the ink discharge nozzles 41a.

Main part block block diagram concerning embodiment of this invention The block block diagram of the memory controller concerning embodiment of this invention The perspective view from the diagonally lower side of the inkjet head concerning embodiment of this invention 1 is a block configuration diagram of a photo print system according to an embodiment of the present invention. A table coordinately displaying raster image data for explaining the present invention A table coordinately displaying raster image data for explaining the present invention The figure explaining segmentation of the coordinated table for demonstrating this invention The figure explaining segmentation of the coordinated table for demonstrating this invention The figure explaining segmentation of the coordinated table for demonstrating this invention The figure explaining segmentation of the coordinated table for demonstrating this invention The figure which shows the relationship between the two-dimensional arrangement | positioning of raster image data and address for demonstrating this invention

Explanation of symbols

DESCRIPTION OF SYMBOLS 20 Inkjet printing apparatus 31 Inkjet head 41a Ink discharge nozzle 51 Data arrangement conversion circuit 52 Conversion buffer memory 54 Memory controller

Claims (4)

Inkjet that scans an inkjet head in which a plurality of ink discharge nozzles are arranged in the sub-scanning direction in the main scanning direction and forms pixel dots for one row in the main scanning direction by a plurality of scans of the inkjet head An image data processing apparatus for an ink jet printing apparatus that generates image data to be sent to a printing apparatus based on raster image data,
A data arrangement conversion circuit for rearranging the raster image data input in a raster scanning state so that image data of pixel dots continuously formed by one ink ejection nozzle is continuous, and the data arrangement conversion circuit A conversion buffer memory for storing the rearranged image data, and a memory controller for controlling writing and reading of data to and from the conversion buffer memory,
The data arrangement conversion circuit is configured to organize and output pixel dot image data into word-unit data of the conversion buffer memory,
The conversion buffer memory is composed of a memory that specifies a row address and a column address by using the same signal line together,
The memory controller divides the address of the conversion buffer memory into a plurality of basic groups having the same storage capacity, and designates the addresses sequentially between the basic groups when writing or reading data. In the other of data writing or reading, addresses in the basic group are continuously specified, and a plurality of the basic groups are included in an address range specified by a single row address. An image data processing apparatus for an ink jet printing apparatus set to 1. The memory controller includes information on which scanning timing of the plurality of scans or information on whether it corresponds to an array element of the plurality of ink ejection nozzles and the basic group. And associating the other information with the data elements in the basic group,
2. The ink jet printing apparatus according to claim 1, wherein a bit for specifying the basic group and a bit for specifying a data element in the basic group are mixed in the column address. Image data processing device. The inkjet printing apparatus is configured to print an image with a resolution that is an integral multiple of the resolution of the plurality of ink ejection nozzles arranged;
The memory controller is
In a state where image data in units of words input from the data arrangement conversion circuit are arranged in correspondence with the raster arrangement of the image in two-dimensional coordinates with the main scanning direction as the horizontal axis and the sub-scanning direction as the vertical axis. The entire data width of the image on the horizontal axis is virtually equally divided into frames having a set data width, and the frame is virtually equally divided into packets having a data width of 1 word. Virtually divided into large sections for each data arranged at the same interval with reference to the arrangement interval of the ink discharge nozzles, and further virtually divided the large sections into blocks having a set data width,
The data amount of the area specified by the one frame and the one block is set to a data width that can be specified by a single row address or an integer multiple thereof,
A data read / write address for the conversion buffer memory, a bit for specifying the major division, a bit for specifying the block, a bit for specifying the frame, and a packet for specifying the packet The bit is specified by the bit and the corresponding bit of the ink discharge nozzle in the block, and the bit for specifying the packet and the bit corresponding to the ink discharge nozzle in the block are on the lower side. 3. The image data processing apparatus for an ink jet printing apparatus according to claim 2, wherein the image data processing apparatus is arranged so that an area specified by one packet and one block is defined as the basic group.   The image data processing apparatus for an ink jet printing apparatus according to claim 3, wherein the ink jet printing apparatus is configured to print an image with a resolution that is a power of two of an arrangement resolution of the plurality of ink ejection nozzles.

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