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JP4428992B2 - Glass ceramic substrate with built-in coil - Google Patents
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JP4428992B2 - Glass ceramic substrate with built-in coil - Google Patents

Glass ceramic substrate with built-in coil Download PDF

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JP4428992B2
JP4428992B2 JP2003397228A JP2003397228A JP4428992B2 JP 4428992 B2 JP4428992 B2 JP 4428992B2 JP 2003397228 A JP2003397228 A JP 2003397228A JP 2003397228 A JP2003397228 A JP 2003397228A JP 4428992 B2 JP4428992 B2 JP 4428992B2
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ferrite
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JP2005159123A (en
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光太 池田
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Kyocera Corp
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Description

本発明は、ガラスセラミックス焼結体から成る絶縁基体の内部に、ガラスセラミック絶縁層と同時焼成されて形成されるとともに内部にコイル用導体が埋設されたインダクタンス値を上げるためのフェライト層が設けられたコイル内蔵ガラスセラミック基板に関する。   According to the present invention, a ferrite layer for increasing an inductance value is provided in which an insulating base made of a sintered glass ceramic body is formed by simultaneous firing with a glass ceramic insulating layer and a coil conductor is embedded therein. The present invention relates to a glass ceramic substrate with a built-in coil.

従来、携帯電話機を始めとする移動体通信機器等の電子機器には、多数の電子装置が組み込まれている。かかる携帯電話機等の通信機器は、近年小型化が急激に進んでおり、これに搭載される各種電子装置も小型化、薄型化が要求されている。例えば、ガラスセラミック基板の内部にコイルを内蔵した構成のLCフィルタが知られている。このLCフィルタの場合、従来チップ部品のコイルを用いていたのをガラスセラミック基板の内部に内蔵することで小型化、薄型化ができるという利点を有する。   2. Description of the Related Art Conventionally, many electronic devices are incorporated in electronic devices such as mobile communication devices such as mobile phones. Such communication devices such as mobile phones have been rapidly reduced in size in recent years, and various electronic devices mounted thereon are required to be reduced in size and thickness. For example, an LC filter having a configuration in which a coil is built in a glass ceramic substrate is known. In the case of this LC filter, there is an advantage that it is possible to reduce the size and thickness by incorporating the coil of the conventional chip component inside the glass ceramic substrate.

しかしながら、コイル内蔵ガラスセラミック基板では、サイズの制約上100nHを超えるコイルの内蔵は困難であった。そこで、近年ではガラスセラミック基板の内部にフェライト層を内蔵させることにより100nHを超えるコイルを内蔵することができ、これによりチップコイルの表面実装工程の簡略化およびコイル内蔵ガラスセラミック基板の小型化が図られている。   However, in the glass ceramic substrate with a built-in coil, it is difficult to incorporate a coil exceeding 100 nH due to size restrictions. Therefore, in recent years, it is possible to incorporate a coil exceeding 100 nH by incorporating a ferrite layer in the glass ceramic substrate, thereby simplifying the surface mounting process of the chip coil and reducing the size of the glass ceramic substrate with a built-in coil. It has been.

例えば、携帯電話機に使用されるフェライト層を内蔵したコイル内蔵ガラスセラミック基板は、一般に、たとえば図1に断面図で示すように、複数のガラスセラミック絶縁層から成る絶縁基体1の内部に、コイル用導体3と、コイル用導体3の上下面を覆うとともにガラスセラミック絶縁層と同じ大きさのフェライト層2と、フェライト層2の上下面にコイル用導体3に対向するようにそれぞれ形成された接地導体層4によって形成されている。   For example, a glass-ceramic substrate with a built-in coil used in a cellular phone generally has a coil-use substrate inside an insulating substrate 1 composed of a plurality of glass-ceramic insulating layers, as shown in a sectional view in FIG. A conductor 3, a ferrite layer 2 covering the upper and lower surfaces of the coil conductor 3 and having the same size as the glass ceramic insulating layer, and a ground conductor formed on the upper and lower surfaces of the ferrite layer 2 so as to face the coil conductor 3. Formed by layer 4.

このようなコイル内蔵ガラスセラミック基板においては、今後さらに小型化、薄型化、高機能化を行なっていくためには、内部にフェライト層2を設けたコイル内蔵ガラスセラミック基板の上面や下面に半導体チップやチップ部品を表面実装する必要がある。そして、コイル用導体3の上下の接地導体層4によって、コイル用導体3に発生する電気力線がコイル内蔵ガラスセラミック基板の上面や下面に搭載される半導体チップやチップ部品に電気的な影響を与えることがなく、その結果、コイル内蔵ガラスセラミック基板に形成された回路の誤動作を防ぐことができる。   In such a glass-ceramic substrate with a built-in coil, in order to further reduce the size, the thickness, and the functionality, a semiconductor chip is formed on the upper and lower surfaces of the glass-ceramic substrate with a built-in coil provided with a ferrite layer 2 therein. And chip parts need to be surface mounted. And by the ground conductor layers 4 above and below the coil conductor 3, the electric lines of force generated in the coil conductor 3 have an electrical influence on the semiconductor chips and chip components mounted on the upper and lower surfaces of the coil-embedded glass ceramic substrate. As a result, malfunction of the circuit formed on the glass ceramic substrate with a built-in coil can be prevented.

また、フェライト層を内蔵したコイル内蔵ガラスセラミック基板では、コイル用導体に発生する電気力線がコイル用導体の上下の接地導体層間に閉じ込められて電気力線が安定することから、電気力線の乱れによって生じるフェライト層の磁気飽和が起きにくくなるため、大きな電流を流した際のインダクタンスの低下を防ぐことができる。
特開平6−20839号公報 特開平6−21264号公報
In addition, in a glass-ceramic substrate with a built-in coil having a ferrite layer, the electric lines of force generated in the coil conductor are confined between the upper and lower ground conductor layers of the coil conductor and the electric lines of force are stabilized. Since the magnetic saturation of the ferrite layer caused by disturbance is less likely to occur, it is possible to prevent a decrease in inductance when a large current is passed.
JP-A-6-20839 JP-A-6-21264

しかしながら、コイル用導体は、コイル用導体間の各層の厚みによってはコイル用導体の上下の接地導体層と電磁的な結合が強くなり、高いインダクタンス値や重畳特性といった電気特性が劣化する。   However, depending on the thickness of each layer between the coil conductors, the coil conductor is strongly electromagnetically coupled to the upper and lower ground conductor layers of the coil conductor, and electrical characteristics such as high inductance values and superposition characteristics are deteriorated.

また、コイル用導体と接地導体層の結合が更に強くなれば、コイル用導体と接地導体層との間に生じた浮遊容量とコイル用導体の持つインダクタンスによって、共振現象が生じ、コイルとしての特性が出ない状態になる。   If the coupling between the coil conductor and the ground conductor layer is further strengthened, a resonance phenomenon occurs due to the stray capacitance generated between the coil conductor and the ground conductor layer and the inductance of the coil conductor. Will not appear.

本発明は以上のような従来の技術における問題点に鑑みて完成されたものであり、その目的は、コイル内蔵ガラスセラミック基板内部のコイル用導体が接地導体層に影響を受けにくくかつコイルとして高いインダクタンス特性や重畳特性を得ることができるコイル内蔵ガラスセラミック基板を提供することにある。   The present invention has been completed in view of the above-described problems in the prior art, and its purpose is that the coil conductor inside the glass-ceramic substrate with a built-in coil is not easily affected by the ground conductor layer and is high as a coil. An object of the present invention is to provide a glass-ceramic substrate with a built-in coil that can obtain inductance characteristics and superposition characteristics.

本発明のコイル内蔵ガラスセラミック基板は、複数のガラスセラミック絶縁層が積層されて成る絶縁基体の内部に、前記ガラスセラミック絶縁層と同時焼成されて形成されるとともに内部に複数層のコイル用導体が埋設され、前記ガラスセラミック絶縁層と同じ大きさのフェライト層と、該フェライト層の上下面に前記コイル用導体に対向するようにそれぞれ形成された接地導体層とが設けられており、前記コイル用導体間の距離をT1、前記コイル用導体と前記接地導体層との間の距離をT2としたとき、T1<T2であり、前記コイル用導体間の前記フェライト層の透磁率が、前記コイル用導体と前記接地導体層との間の前記フェライト層の透磁率よりも小さいことを特徴とするものである。 The glass-ceramic substrate with a built-in coil according to the present invention is formed in the insulating substrate formed by laminating a plurality of glass ceramic insulating layers, and is fired simultaneously with the glass ceramic insulating layer, and a plurality of layers of coil conductors are formed therein. buried, the glass ceramic insulating layer and the same size as the ferrite layer, and a ground conductor layer formed respectively are provided so as to face the coil conductors on the upper and lower surfaces of the ferrite layer, the coil when the distance between the use conductors T1, the distance between the conductor and the ground conductor layer coil was T2, Ri T1 <T2 der, permeability of the ferrite layer between the coil conductor, said It is smaller than the magnetic permeability of the ferrite layer between the coil conductor and the ground conductor layer .

本発明のコイル内蔵ガラスセラミック基板によれば、複数のガラスセラミック絶縁層が積層されて成る絶縁基体の内部に、ガラスセラミック絶縁層と同時焼成されて形成されるとともに内部に複数層のコイル用導体が埋設され、ガラスセラミック絶縁層と同じ大きさのフェライト層と、フェライト層の上下面にコイル用導体に対向するようにそれぞれ形成された接地導体層とが設けられており、コイル用導体間の距離をT1、コイル用導体と接地導体層との間の距離をT2としたとき、T1<T2であることから、コイル用導体とその上下の接地導体層と電磁的な結合が弱くなり、コイル用導体と接地導体層との間に生じる浮遊容量を抑え、高いインダクタンス値や重畳特性といった電気特性が得られる。また、コイル用導体と接地導体層との間に生じた浮遊容量とコイル用導体の持つインダクタンスによる使用周波数における共振現象を防ぐことができる。また、コイル用導体間で磁束の方向が異なり打ち消しあうため、フェライト層の透磁率を低くすることで磁束の打ち消しあう力を弱め、重畳特性を向上させることができる。 According to the glass-ceramic substrate with a built-in coil of the present invention, a plurality of layers of coil conductors are formed inside an insulating substrate formed by laminating a plurality of glass ceramic insulating layers and simultaneously fired with the glass ceramic insulating layer. There are embedded, and the same size as the ferrite layers between the glass-ceramic insulating layer, and a ground conductor layer formed respectively provided so as to face the coil conductors on the upper and lower surfaces of the ferrite layer, between the conductive coil Is T1, and the distance between the coil conductor and the ground conductor layer is T2, since T1 <T2, the electromagnetic coupling between the coil conductor and the upper and lower ground conductor layers is weakened. The stray capacitance generated between the coil conductor and the ground conductor layer is suppressed, and electrical characteristics such as a high inductance value and superposition characteristics can be obtained. Further, it is possible to prevent a resonance phenomenon at the operating frequency due to stray capacitance generated between the coil conductor and the ground conductor layer and the inductance of the coil conductor. In addition, since the direction of magnetic flux differs between the coil conductors and cancels out, the magnetic flux canceling force can be weakened by lowering the permeability of the ferrite layer, and the superposition characteristics can be improved.

本発明のコイル内蔵ガラスセラミック基板(以下、基板ともいう)を図面に基づいて以下に詳細に説明する。図1は本発明の基板の実施の形態の一例を示す断面図であり、1は複数のガラスセラミック絶縁層から成る絶縁基体、2はフェライト層、3はコイル用導体、4はコイル用導体3の上下に設けられた接地導体層、5は半導体チップやチップ部品を搭載する搭載用電極、6は基板を外部電気回路に電気的に接続するための電極パッドである。   The coil-embedded glass ceramic substrate (hereinafter also referred to as a substrate) of the present invention will be described in detail with reference to the drawings. FIG. 1 is a cross-sectional view showing an example of an embodiment of a substrate of the present invention, wherein 1 is an insulating base composed of a plurality of glass ceramic insulating layers, 2 is a ferrite layer, 3 is a coil conductor, and 4 is a coil conductor 3. Ground conductor layers 5 are provided above and below, 5 is a mounting electrode for mounting a semiconductor chip and chip components, and 6 is an electrode pad for electrically connecting the substrate to an external electric circuit.

複数のガラスセラミック絶縁層を積層して成る絶縁基体1は、まず、ガラス粉末およびフィラー粉末(セラミック粉末)、さらに有機バインダ,可塑剤,有機溶剤等を混合してスラリーを得て、このスラリーを用いてドクターブレード法,圧延法,カレンダーロール法等によってガラスセラミックグリーンシート(以下、グリーンシートともいう)を製作し、このグリーンシートを複数積層した後、大気中または加湿窒素雰囲気中で800〜1100℃の温度で焼成することによって作製される。   The insulating substrate 1 formed by laminating a plurality of glass ceramic insulating layers is first obtained by mixing a glass powder and a filler powder (ceramic powder), and further mixing an organic binder, a plasticizer, an organic solvent and the like to obtain a slurry. A glass ceramic green sheet (hereinafter also referred to as a green sheet) is manufactured by a doctor blade method, a rolling method, a calender roll method, and the like, and after stacking a plurality of the green sheets, 800 to 1100 in the air or in a humidified nitrogen atmosphere. It is produced by firing at a temperature of ° C.

上記のガラス粉末としては、例えばSiO−B系,SiO−B−Al系,SiO−B−Al−MO系(但し、MはCa,Sr,Mg,BaまたはZnを示す),SiO−Al−MO−MO系(但し、MおよびMは同じまたは異なっていて、Ca,Sr,Mg,BaまたはZnを示す),SiO−B−Al−MO−MO系(但し、MおよびMは上記と同じである),SiO−B−M O系(但し、MはLi,NaまたはKを示す),SiO−B−Al−M O系(但し、Mは上記と同じである),Pb系ガラス,Bi系ガラス等を用いることができる。 Examples of the glass powder include SiO 2 —B 2 O 3 system, SiO 2 —B 2 O 3 —Al 2 O 3 system, SiO 2 —B 2 O 3 —Al 2 O 3 —MO system (M Represents Ca, Sr, Mg, Ba or Zn), SiO 2 —Al 2 O 3 —M 1 O—M 2 O system (where M 1 and M 2 are the same or different, and Ca, Sr, Mg , Ba or Zn), SiO 2 —B 2 O 3 —Al 2 O 3 —M 1 O—M 2 O system (where M 1 and M 2 are the same as above), SiO 2 —B 2 O 3 —M 3 2 O system (where M 3 represents Li, Na or K), SiO 2 —B 2 O 3 —Al 2 O 3 —M 3 2 O system (where M 3 is the same as above) Pb glass, Bi glass, etc. can be used.

また、フィラー粉末としては、例えばAl,SiO,ZrOとアルカリ土類金属酸化物との複合酸化物や、TiOとアルカリ土類金属酸化物との複合酸化物,AlおよびSiOから選ばれる少なくとも1種を含む複合酸化物(例えばスピネル,ムライト,コージェライト)等を用いることができる。 Examples of the filler powder include Al 2 O 3 , SiO 2 , a composite oxide of ZrO 2 and an alkaline earth metal oxide, a composite oxide of TiO 2 and an alkaline earth metal oxide, and Al 2 O. A composite oxide (for example, spinel, mullite, cordierite) containing at least one selected from 3 and SiO 2 can be used.

本発明において、コイル用導体3間の距離をT1、コイル用導体3と接地導体層4との間の距離をT2としたとき、T1<T2である。   In the present invention, when the distance between the coil conductors 3 is T1, and the distance between the coil conductor 3 and the ground conductor layer 4 is T2, T1 <T2.

具体的には、T1はコイル用導体3間のインダクタンスの安定の点で0.1mm未満がよく、T2は接地導体層4に吸収される電気力線の関係で0.1mm以上がよい。T1が0.1mmを超えると、コイル用導体3間から漏れ磁束が発生し、インダクタンスが安定化しないこととなる。T2が0.1mm未満では、接地導体層4に電気力線が吸収されて電磁的な結合が増え、コイル用導体3と接地導体層4とでの共振現象が起きる。   Specifically, T1 is preferably less than 0.1 mm from the viewpoint of stability of inductance between the coil conductors 3, and T2 is preferably 0.1 mm or more in relation to electric lines of force absorbed by the ground conductor layer 4. When T1 exceeds 0.1 mm, a leakage magnetic flux is generated between the coil conductors 3 and the inductance is not stabilized. When T2 is less than 0.1 mm, electric lines of force are absorbed by the ground conductor layer 4 to increase electromagnetic coupling, and a resonance phenomenon occurs between the coil conductor 3 and the ground conductor layer 4.

このフェライト層2は、内部にコイル用導体3が埋設された状態で絶縁基体1の内部に形成されており、99重量%以上のフェライトおよび1重量%以下のガラスから成るものである。フェライト層2のフェライトとしては、ZnFe,MnFe,FeFe,CoFe,NiFe,BaFe12,SrFe12およびCuFeのうちの少なくとも1種のフェライトを用いることが、より高い透磁率を得られる点で好ましい。 The ferrite layer 2 is formed inside the insulating substrate 1 with the coil conductor 3 embedded therein, and is made of 99 wt% or more of ferrite and 1 wt% or less of glass. The ferrite of the ferrite layer 2 includes ZnFe 2 O 4 , MnFe 2 O 4 , FeFe 2 O 4 , CoFe 2 O 4 , NiFe 2 O 4 , BaFe 12 O 4 , SrFe 12 O 4, and CuFe 2 O 4 . It is preferable to use at least one type of ferrite because a higher magnetic permeability can be obtained.

また、コイル用導体3間のフェライト層2の透磁率が、コイル用導体3と接地導体層4との間のフェライト層2の透磁率よりも小さくなるようにしている。この場合、コイル用導体3間で磁束の方向が異なり打ち消しあうため、フェライト層2の透磁率を低くすることで磁束の打ち消しあう力を弱め、重畳特性を向上させることができるという利点がある。 In addition, the magnetic permeability of the ferrite layer 2 between coils conductor 3 is designed to be smaller than the magnetic permeability of the ferrite layer 2 between the coil conductor 3 and the ground conductor layer 4. In this case, the direction of the magnetic flux differs between the coil conductors 3 and cancels out. Therefore, there is an advantage that the magnetic flux canceling force can be weakened by reducing the magnetic permeability of the ferrite layer 2 and the superposition characteristics can be improved.

フェライト層2の形成は、まずフェライト粉末に適当な有機バインダ,可塑剤,有機溶剤等を混合してスラリーを得て、このスラリーを用いてドクターブレード法,圧延法,カレンダーロール法等によってフェライトグリーンシートを製作する。次に、フェライトグリーンシートをコイル用導体3を覆うものとしてガラスセラミックグリーンシートと同じ大きさの同形状にカットし、ガラスセラミックグリーンシート積層体の内部に、フェライトグリーンシート間にコイル用導体3となるパターンを形成して、コイル用導体3の上下面を覆うようにして積層する。   The ferrite layer 2 is formed by first mixing a ferrite powder with a suitable organic binder, plasticizer, organic solvent, etc. to obtain a slurry, and using this slurry, a ferrite green by a doctor blade method, a rolling method, a calendar roll method, etc. Make a sheet. Next, the ferrite green sheet is cut into the same shape as the glass ceramic green sheet so as to cover the coil conductor 3, and the coil conductor 3 and the ferrite green sheet are placed between the ferrite green sheets inside the glass ceramic green sheet laminate. A pattern is formed and laminated so as to cover the upper and lower surfaces of the coil conductor 3.

フェライト層2となるフェライトグリーンシートを形成するのに用いるフェライト粉末は、仮焼済みのフェライト粉末で、粒径が均一で球形状に近いものがよい。これは、均一な焼結状態を得ることができるからであり、例えばフェライト粉末のなかに部分的に小さい粒径のものが存在した場合、その部分のみ結晶粒の成長が低下し、焼結後に得られるフェライト層2の透磁率が安定しにくい傾向がある。   The ferrite powder used to form the ferrite green sheet to be the ferrite layer 2 is preferably a calcined ferrite powder having a uniform particle size and a nearly spherical shape. This is because a uniform sintered state can be obtained. For example, when a ferrite powder having a small particle size is present, the growth of crystal grains is reduced only in that portion, and after sintering, The magnetic permeability of the obtained ferrite layer 2 tends to be difficult to stabilize.

フェライト層2は、1重量%以下のガラスを含んで成るものである。ただし、この1重量%以下のガラスは焼成時にガラスセラミック絶縁層から拡散して混入するものであり、焼成前のフェライトグリーンシートには含まれない。   The ferrite layer 2 comprises 1% by weight or less of glass. However, this 1% by weight or less of glass is diffused and mixed from the glass ceramic insulating layer during firing, and is not included in the ferrite green sheet before firing.

メタライズ配線層から成るコイル用導体3は、フェライト層2に上下面を覆われてフェライト層2に埋設されており、Cu,Ag,Au,Ag合金等の金属粉末に、適当な有機バインダ,溶剤を混練して作製した導体ペーストを、スクリーン印刷法やグラビア印刷法等によりフェライトグリーンシートの表面に塗布し、ガラスセラミックグリーンシートおよびフェライトグリーンシートと同時焼成されて形成される。   The coil conductor 3 made of a metallized wiring layer is embedded in the ferrite layer 2 with the upper and lower surfaces covered with the ferrite layer 2, and an appropriate organic binder, solvent and the like in a metal powder such as Cu, Ag, Au, and Ag alloy. The conductive paste prepared by kneading the above is applied to the surface of the ferrite green sheet by a screen printing method, a gravure printing method, or the like, and is fired simultaneously with the glass ceramic green sheet and the ferrite green sheet.

メタライズ層から成る搭載用電極5は、Cu,Ag,Au,Ag合金等の金属粉末に、適当な有機バインダ,溶剤を混練して作製した導体ペーストを、スクリーン印刷法やグラビア印刷法等によりガラスセラミックグリーンシートの表面に塗布しておくことによって、絶縁基体1の上面や下面に形成される。   The mounting electrode 5 made of a metallized layer is made of a conductive paste prepared by kneading a metal powder such as Cu, Ag, Au, and Ag alloy with an appropriate organic binder and a solvent by a screen printing method or a gravure printing method. By applying on the surface of the ceramic green sheet, it is formed on the upper and lower surfaces of the insulating substrate 1.

なお、搭載用電極5は、半田等による半導体チップやチップ部品,外部電気回路の配線導体との接合を強固なものにするために、その表面にニッケル層および金層をメッキ法により順次被着するとよい。   The mounting electrode 5 has a nickel layer and a gold layer sequentially deposited on the surface thereof by a plating method in order to strengthen the bonding with a semiconductor chip or chip component by solder or the like and a wiring conductor of an external electric circuit. Good.

外部電気回路に電気的に接続されるメタライズ配線層から成る電極パッド6は、Cu,Ag,Au,Ag合金等の金属粉末に適当な有機バインダ,溶剤を混練して作製した導体ペーストを、スクリーン印刷法やグラビア印刷法等によりガラスセラミックグリーンシートの表面に塗布しておくことによって、絶縁基体1の上面、下面の少なくとも一方に形成されている。   An electrode pad 6 made of a metallized wiring layer electrically connected to an external electric circuit is obtained by applying a conductive paste prepared by kneading a suitable organic binder and solvent to a metal powder such as Cu, Ag, Au, or Ag alloy. It is formed on at least one of the upper surface and the lower surface of the insulating substrate 1 by being applied to the surface of the glass ceramic green sheet by a printing method, a gravure printing method or the like.

なお、メタライズ配線層から成る電極パッド6は、半田等による半導体チップやチップ部品,外部電気回路の配線導体との接合を強固なものにするために、その表面にニッケル層および金層をメッキ法により順次被着するとよい。   The electrode pad 6 made of a metallized wiring layer is plated with a nickel layer and a gold layer on its surface in order to strengthen the bonding with a semiconductor chip or chip component by solder or the like, or a wiring conductor of an external electric circuit. It is good to deposit sequentially.

本発明の基板において、接地導体層4は、フェライト層2の上下面に少なくともコイル用導体3に対向するようにそれぞれ形成されている。メタライズ層から成る接地導体層4は、Cu,Ag,Au,Ag合金等の金属粉末に適当な有機バインダ,溶剤を混練して作製した導体ペーストを、スクリーン印刷法やグラビア印刷法等によりガラスセラミックグリーンシートまたはフェライトグリーンシートの表面に塗布し、ガラスセラミックグリーンシートおよびフェライトグリーンシートと同時焼成されて形成される。   In the substrate of the present invention, the ground conductor layer 4 is formed on the upper and lower surfaces of the ferrite layer 2 so as to face at least the coil conductor 3. The grounding conductor layer 4 made of a metallized layer is made of a glass ceramic using a conductive paste prepared by kneading a suitable organic binder and solvent with a metal powder such as Cu, Ag, Au, or Ag alloy by screen printing or gravure printing. It is formed by coating the surface of a green sheet or a ferrite green sheet and simultaneously firing the glass ceramic green sheet and the ferrite green sheet.

本発明の基板におけるコイル用導体(内蔵コイル)3の重畳特性を図2のグラフに示す。図2において、横軸は電流(単位:mA)を、縦軸はインダクタンス(単位:μH)を表し、実線の直線はインダクタンス規格値2μH、破線の特性曲線は従来の基板における内蔵コイルの重畳特性、実線の特性曲線は本発明の基板における内蔵コイルの重畳特性を示している。   The superposition characteristics of the coil conductor (built-in coil) 3 on the substrate of the present invention are shown in the graph of FIG. In FIG. 2, the horizontal axis represents current (unit: mA), the vertical axis represents inductance (unit: μH), the solid line represents the inductance standard value of 2 μH, and the dashed characteristic curve represents the superposition characteristics of the built-in coil on the conventional substrate. The solid characteristic curve indicates the superposition characteristic of the built-in coil in the substrate of the present invention.

図2において、従来の基板はT1(0.2mm)>T2(0.1mm)、本発明の基板はT1(0.1mm)<T2(0.2mm)となっており、本発明の基板は一般に携帯電話機の電源用回路で使用される最大電流である300mAでのインダクタンス値が、規格値である2μH以上を十分に満たすことが可能である。すなわち、本発明の基板は、コイル用導体3に発生する電気力線が接地導体層4に吸収され、電磁的な結合が生じることを防ぐようにコイル用導体3と接地導体層4との間の距離を十分に取れるため、コイル用導体3に電流を流した際のフェライト層2の磁気飽和が起きにくくなり、重畳特性の劣化を防ぐことができる。   In FIG. 2, the conventional substrate is T1 (0.2 mm)> T2 (0.1 mm), and the substrate of the present invention is T1 (0.1 mm) <T2 (0.2 mm). In general, the inductance value at 300 mA, which is the maximum current used in the power supply circuit of a mobile phone, can sufficiently satisfy the standard value of 2 μH or more. That is, in the substrate of the present invention, the electric lines of force generated in the coil conductor 3 are absorbed by the ground conductor layer 4 so as to prevent electromagnetic coupling between the coil conductor 3 and the ground conductor layer 4. Therefore, the magnetic saturation of the ferrite layer 2 is less likely to occur when a current is passed through the coil conductor 3, and deterioration of the superposition characteristics can be prevented.

また、図3は横軸は周波数(単位:MHz)を、縦軸はインダクタンス(単位:μH)を表し、実線の直線は一般的に携帯電話機の電源回路に使用される最高周波数である5MHz、破線の特性曲線は従来の基板における内蔵コイルの周波数特性、実線の特性曲線は本発明の基板における内蔵コイルの周波数特性を示している。 In FIG. 3 , the horizontal axis represents the frequency (unit: MHz), the vertical axis represents the inductance (unit: μH), and the solid line is generally 5 MHz, which is the highest frequency used in the power supply circuit of a mobile phone. The broken line characteristic curve represents the frequency characteristic of the built-in coil in the conventional substrate, and the solid line characteristic curve represents the frequency characteristic of the built-in coil in the substrate of the present invention.

図3において、従来の基板はT1(0.2mm)>T2(0.1mm)、本発明の基板はT1(0.1mm)<T2(0.2mm)となっており、本発明の基板は一般的に携帯電話機の電源回路に使用される最高周波数である5MHzで安定したインダクタンス値が得られている。これは、本発明の基板は、コイル用導体3に発生する電気力線が接地導体層4に吸収によって電磁的な結合によって生じる浮遊容量が減少するため、この浮遊容量とインダクタンス値によって起きる共振周波数(10MHz)がより高くなり、フェライト層内の浮遊容量に対する距離が十分に確保されており、5MHzにおいて使用可能となっている。   In FIG. 3, the conventional substrate is T1 (0.2 mm)> T2 (0.1 mm), and the substrate of the present invention is T1 (0.1 mm) <T2 (0.2 mm). In general, a stable inductance value is obtained at 5 MHz, which is the highest frequency used in a power supply circuit of a mobile phone. This is because, in the substrate of the present invention, the stray capacitance generated by electromagnetic coupling is reduced by the electric lines of force generated in the coil conductor 3 being absorbed in the ground conductor layer 4, so that the resonance frequency generated by the stray capacitance and the inductance value is reduced. (10 MHz) becomes higher, a sufficient distance from the stray capacitance in the ferrite layer is secured, and it can be used at 5 MHz.

また、コイル用導体3に発生する電気力線の放射を接地導体層4によって閉じ込める閉磁路となり重畳特性が改善されることから、電気力線の放射が抑制されているため、本発明の基板の上面や下面に搭載される半導体チップやチップ部品に対する電磁的な影響も抑制される。   Further, since the superposition characteristics are improved because the radiation of the electric force lines generated in the coil conductor 3 is confined by the ground conductor layer 4, the electric field lines are suppressed from being emitted. Electromagnetic effects on semiconductor chips and chip components mounted on the upper and lower surfaces are also suppressed.

本発明のコイル内蔵ガラスセラミック基板の実施の形態の一例を示す断面図である。It is sectional drawing which shows an example of embodiment of the glass ceramic substrate with a built-in coil of this invention. 本発明のコイル内蔵ガラスセラミック基板における内蔵コイルの重畳特性を示すグラフである。It is a graph which shows the superimposition characteristic of the built-in coil in the glass ceramic substrate with a built-in coil of this invention. 本発明のコイル内蔵ガラスセラミック基板における内蔵コイルの周波数特性を示すグラフである。It is a graph which shows the frequency characteristic of the built-in coil in the glass ceramic substrate with a built-in coil of this invention.

符号の説明Explanation of symbols

1:絶縁基体
2:フェライト層
3:コイル用導体
4:接地導体層
5:搭載用電極
6:電極パッド
1: Insulating substrate 2: Ferrite layer 3: Coil conductor 4: Ground conductor layer 5: Mounting electrode 6: Electrode pad

Claims (1)

複数のガラスセラミック絶縁層が積層されて成る絶縁基体の内部に、前記ガラスセラミック絶縁層と同時焼成されて形成されるとともに内部に複数層のコイル用導体が埋設され、前記ガラスセラミック絶縁層と同じ大きさのフェライト層と、該フェライト層の上下面に前記コイル用導体に対向するようにそれぞれ形成された接地導体層とが設けられており、前記コイル用導体間の距離をT1、前記コイル用導体と前記接地導体層との間の距離をT2としたとき、T1<T2であり、前記コイル用導体間の前記フェライト層の透磁率が、前記コイル用導体と前記接地導体層との間の前記フェライト層の透磁率よりも小さいことを特徴とするコイル内蔵ガラスセラミック基板。 In an insulating substrate in which a plurality of glass-ceramic insulating layers are laminated, the coil conductors of the plurality of layers therein while being formed by co-firing the glass ceramic insulating layer is embedded, and the glass ceramic insulating layer A ferrite layer having the same size and ground conductor layers formed on the upper and lower surfaces of the ferrite layer so as to face the coil conductor are provided, and the distance between the coil conductors is T1, and the coil when the distance between the use conductor and the ground conductor layer and T2, T1 <T2 der is, permeability of the ferrite layer between the coil conductor, and the ground conductor layer and the coil conductors A glass-ceramic substrate with a built-in coil, which is smaller than the magnetic permeability of the ferrite layer in between .
JP2003397228A 2003-11-27 2003-11-27 Glass ceramic substrate with built-in coil Expired - Fee Related JP4428992B2 (en)

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