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JP4446752B2 - DC motor control circuit - Google Patents
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JP4446752B2 - DC motor control circuit - Google Patents

DC motor control circuit Download PDF

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JP4446752B2
JP4446752B2 JP2004008751A JP2004008751A JP4446752B2 JP 4446752 B2 JP4446752 B2 JP 4446752B2 JP 2004008751 A JP2004008751 A JP 2004008751A JP 2004008751 A JP2004008751 A JP 2004008751A JP 4446752 B2 JP4446752 B2 JP 4446752B2
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attenuation
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monitoring
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JP2005204423A (en
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善彦 松尾
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Shindengen Electric Manufacturing Co Ltd
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Description

本発明は、直流モータを制御する回路に関するものであり、特に負荷電流をモータに供給する為の出力Hブリッジを有する直流モータの制御回路に関するものである。   The present invention relates to a circuit for controlling a DC motor, and more particularly to a control circuit for a DC motor having an output H bridge for supplying a load current to the motor.

従来の直流モータの制御回路を図6に示す。この制御回路は、モータに負荷電流を供給する出力Hブリッジ11を有する駆動回路1と、負荷電流を電圧に変換し検出電圧として供給する電流検出回路2と、基準電圧を供給する基準電圧回路3と、基準電圧と検出電圧を比較する比較回路4と、出力Hブリッジ11にオン信号と検出電圧が基準電圧を超えた場合一定期間オフ信号を供給するON/OFF設定回路6と、オフ期間において高速減衰期間と低速減衰期間の比率を決定する減衰設定回路7と、ON/OFF設定回路6と減衰設定回路7の信号を受け出力Hブリッジ11に減衰モード(高速か低速)の信号を送る出力減衰回路8とオン、オフの期間をON/OFF設定回路6に送る発振回路5を有する。   A conventional DC motor control circuit is shown in FIG. This control circuit includes a drive circuit 1 having an output H-bridge 11 that supplies a load current to the motor, a current detection circuit 2 that converts the load current into a voltage and supplies it as a detection voltage, and a reference voltage circuit 3 that supplies a reference voltage A comparison circuit 4 that compares the reference voltage and the detection voltage, an ON / OFF setting circuit 6 that supplies an off signal to the output H bridge 11 when the on signal and the detection voltage exceed the reference voltage for a certain period, and in the off period Attenuation setting circuit 7 for determining the ratio between the high-speed attenuation period and the low-speed attenuation period, and the output of the ON / OFF setting circuit 6 and the attenuation setting circuit 7 and the output of the attenuation mode (high speed or low speed) to the output H-bridge 11 The oscillation circuit 5 has an attenuation circuit 8 and an ON / OFF setting circuit 6 for sending an ON / OFF period.

ここで図3に従って出力Hブリッジ11の説明を行う。出力Hブリッジ11は、4つのスイッチング素子S1,S2,S3,S4により構成された駆動回路である。図3(a)に示すようにオン時はスイッチング素子S1とスイッチング素子S4若しくはスイッチング素子S2とスイッチング素子S3とを閉じることにより、スイッチング素子S1及びスイッチング素子S4がオンの時は矢印(1)の方向に、スイッチング素子S2及びスイッチング素子S3がオンの時は矢印(2)の方向に負荷電流が流れる。この電流を電圧に変換して得る検出電圧が基準電圧を超えると、出力Hブリッジ11をオフさせて電流を減衰させ、オフ期間終了後再びオンに転じ、負荷電流が増加する。この繰り返しにより定電流制御を行う。   Here, the output H bridge 11 will be described with reference to FIG. The output H bridge 11 is a drive circuit configured by four switching elements S1, S2, S3, and S4. As shown in FIG. 3A, the switching element S1 and the switching element S4 or the switching element S2 and the switching element S3 are closed when the switching element S1 and the switching element S4 are turned on. When the switching element S2 and the switching element S3 are on, the load current flows in the direction of the arrow (2). When the detection voltage obtained by converting this current into a voltage exceeds the reference voltage, the output H bridge 11 is turned off to attenuate the current, and then turn on again after the off period ends to increase the load current. By repeating this, constant current control is performed.

出力Hブリッジ11をオフし電流を減衰させるには、高速減衰と低速減衰の二通りあり、図3(a)に示すように、スイッチング素子S1とスイッチング素子S4とを閉じ矢印(1)の方向にオン電流が流れている場合、スイッチング素子S1とスイッチング素子S4を開放させ、スイッチング素子S2とスイッチング素子S3を閉じるとモータの負荷である誘導負荷の両端にほぼモータ電源電圧に等しい逆起電力が生じ、電位差が大きい為図3(b)に示すように矢印(3)の方向にて電流が大きく減衰する。これを高速減衰という。図3(a)にて矢印(2)の方向にオンしている場合は図3(b)の矢印(4)の方向に電流が減衰する。   There are two ways to turn off the output H-bridge 11 and attenuate the current: high-speed attenuation and low-speed attenuation. As shown in FIG. 3A, the switching element S1 and the switching element S4 are closed, and the direction of the arrow (1) When an on-current is flowing through the switching element S1, the switching element S4 is opened, and the switching element S2 and the switching element S3 are closed. Since the potential difference is large, the current is greatly attenuated in the direction of the arrow (3) as shown in FIG. This is called fast decay. When the current is turned on in the direction of the arrow (2) in FIG. 3A, the current is attenuated in the direction of the arrow (4) in FIG.

また図3(c)に示すようにオフ時にスイッチング素子S1 を開放し、スイッチング素子S2及びスイッチング素子S4を閉じると、矢印(5)の方向にて電流が減衰する。モータの両端には2つのスイッチの電圧降下分のみ電位差がつくので逆起電力が小さく負荷電流の減衰量は小さい。これを低速減衰という。図3(a)にて矢印(2)の方向にオンしている場合は図3(c)の矢印(6)の方向にて電流が減衰する。   As shown in FIG. 3C, when the switching element S1 is opened at the time of OFF and the switching element S2 and the switching element S4 are closed, the current is attenuated in the direction of the arrow (5). Since there is a potential difference for the voltage drop of the two switches at both ends of the motor, the back electromotive force is small and the attenuation of the load current is small. This is called slow decay. When it is turned on in the direction of the arrow (2) in FIG. 3A, the current is attenuated in the direction of the arrow (6) in FIG.

上記にある通り高速減衰と低速減衰をオフ期間中に組み合わせ電流の減衰量を制御する。また、出力のスイッチング素子に並列にダイオードが入っている場合は、全てのスイッチング素子を開放する事により、高速減衰になる。スイッチング素子S1及びスイッチング素子S4を閉じ矢印(1)の方向にオン電流が流れている場合、スイッチング素子S4のみ閉じると低速減衰になる。スイッチング素子S2及びスイッチング素子S3を閉じ矢印(2)の方向にオン電流が流れている場合、スイッチング素子S2のみ閉じると低速減衰になる。   As described above, high-speed attenuation and low-speed attenuation are combined during the off period to control the amount of current attenuation. In addition, when a diode is inserted in parallel with the output switching element, high-speed attenuation is achieved by opening all the switching elements. When the switching element S1 and the switching element S4 are closed and the on-current is flowing in the direction of the arrow (1), if only the switching element S4 is closed, slow decay occurs. When the switching element S2 and the switching element S3 are closed and an on-current is flowing in the direction of the arrow (2), when only the switching element S2 is closed, slow decay occurs.

ON/OFF設定回路6は比較器から供給される信号をトリガにし、所定の周期を有するオフ信号及びオン信号を出力する。オン信号は出力Hブリッジ11がオフからオンに転じる際、スパイク電流が発生し、誤動作する可能性があるので一定期間のオン信号を出力し、この間出力は強制オン状態となり比較回路4から供給される信号、即ち検出電圧が基準電圧に達した際に出力される信号を無視する。この周期は内蔵タイマもしくは外部設定により設定される。   The ON / OFF setting circuit 6 uses a signal supplied from the comparator as a trigger, and outputs an off signal and an on signal having a predetermined cycle. When the output H-bridge 11 changes from OFF to ON, a spike current is generated and the ON signal outputs a ON signal for a certain period because there is a possibility of malfunction. During this period, the output is forced ON and supplied from the comparison circuit 4 In other words, a signal output when the detected voltage reaches the reference voltage is ignored. This cycle is set by a built-in timer or external setting.

減衰設定回路7は、ON/OFF設定回路6から供給される信号と内蔵タイマもしくは外部設定により設定される。信号により所定の周期を有する減衰信号を出力する。   The attenuation setting circuit 7 is set by a signal supplied from the ON / OFF setting circuit 6 and a built-in timer or external setting. An attenuation signal having a predetermined period is output by the signal.

制御回路の動作を図7に従い行なう。時刻T1においてオン信号が出力されると出力Hブリッジ11はオンに転じる。この時負荷電流は基準電圧により設定される電流値に達していないので、負荷電流は増加する。時刻T2においてオン期間が終了し、負荷電流が増加して、負荷電流を電圧に変換して得た検出電圧が基準電圧に達すると、比較器がこれを検出し信号をON/OFF設定回路6に送る。ON/OFF設定回路6はオフ信号を出力Hブリッジ11と減衰設定回路7に送る。出力減衰回路8は減衰設定回路7の信号により出力Hブリッジ11にオフ時間における減衰モード(高速減衰か低速減衰)の信号を送る。これによりT2〜T3の期間は高速減衰T3〜T4の期間まで低速減衰となる。オフ期間が終了すると再びオンに転じ、負荷電流は増加する。これにより定電流制御を行なう。   The operation of the control circuit is performed according to FIG. When an ON signal is output at time T1, the output H bridge 11 turns ON. At this time, since the load current does not reach the current value set by the reference voltage, the load current increases. When the on-period ends at time T2, the load current increases, and the detection voltage obtained by converting the load current into a voltage reaches the reference voltage, the comparator detects this and sends the signal to the ON / OFF setting circuit 6 Send to. The ON / OFF setting circuit 6 sends an OFF signal to the output H bridge 11 and the attenuation setting circuit 7. The output attenuation circuit 8 sends an attenuation mode signal (high-speed attenuation or low-speed attenuation) in the off time to the output H bridge 11 by the signal of the attenuation setting circuit 7. As a result, during the period from T2 to T3, the slow decay is performed until the period from fast decay T3 to T4. When the off period ends, it turns on again and the load current increases. Thus, constant current control is performed.

また、従来の直流モータの制御回路の例として、下記のような構成の制御回路がある(特許文献1参照)。この制御回路は、出力Hブリッジと、出力Hブリッジの出力スイッチ素子をパルス幅変調信号によりスイッチング駆動し、出力Hブリッジによる負荷に対するチャージモード、低速減衰モード、高速減衰モードを選択的に設定可能なPWM制御回路と、負荷に対する高速減衰モードで負荷の電流が第一の設定電流値以下に低下した場合に低速減衰モードに切り換え制御するための制御信号を生成し、PWM制御回路を制御する出力制御ロジック回路を具備している。
特開2002−204150公報
In addition, as an example of a conventional DC motor control circuit, there is a control circuit having the following configuration (see Patent Document 1). This control circuit can drive and switch the output H bridge and the output switch element of the output H bridge with a pulse width modulation signal, and can selectively set the charge mode, the slow decay mode, and the fast decay mode for the load by the output H bridge. PWM control circuit and output control for controlling the PWM control circuit by generating a control signal for switching to the low-speed attenuation mode when the load current drops below the first set current value in the high-speed attenuation mode for the load A logic circuit is provided.
JP 2002-204150 A

上記いずれの従来例においても、負荷電流が減衰するとき高速減衰を用いると、負荷電流が大きく減少するので電流の追従性は良いが、負荷電流のリプルが大きくなる。また、低速減衰を用いた場合、負荷電流の減衰量が小さいのでリプルは小さいが電流の追従性が悪くなる。   In any of the above conventional examples, when high-speed attenuation is used when the load current is attenuated, the load current is greatly reduced, so that the current followability is good, but the load current ripple is increased. In addition, when low-speed attenuation is used, the load current attenuation is small, so the ripple is small, but the current follow-up property is deteriorated.

従って、負荷電流を基準電圧に対して等しくするには低速減衰を用いるのが良いが、モータ負荷の時定数、オフ時間、モータの電源電圧の組み合わせによってはオフ期間中に十分電流が減衰せずに再びオンに転じる際、前記にある通り、オン期間中は強制オンとなり、オフに入らないため負荷電流が基準に対し徐々に大きくなってしまう可能性がある。また負荷電流を充分に減衰させるためにオフ期間を延ばすと、モータの振動数が可聴域に入り振動を発する可能性がある。   Therefore, it is better to use slow decay to make the load current equal to the reference voltage. However, depending on the combination of the time constant of the motor load, the off time, and the motor power supply voltage, the current does not decay sufficiently during the off period. When turning on again, as described above, the load current is forcibly turned on during the on period and does not turn off, so that the load current may gradually increase with respect to the reference. Further, if the off period is extended to sufficiently attenuate the load current, the motor frequency may enter the audible range and generate vibration.

この問題を解決するには一般的にオフ期間中に低速減衰と高速減衰を組み合わせ、定電流制御を行なう事により対処するが、高速減衰と低速減衰の最適な比率はモータの時定数、電源電圧、負荷電流等により変化するため状況に応じ、逐次外部より信号を与えて比率を変化させるか、またはどの条件でも使用できる様に高速減衰の比率を長めにして制御している。ただし後者の方法を用いると負荷電流は基準に追従するものの、リプル分が大きくなる為、モータのノイズ、損失が大きくなり、また平均電流が小さくなる為トルクが小さくなってしまう。前者の方法においても最適な減衰比率はモータの回転子の位置にもよるため、常に最適比率にて制御するのは技術的に非常に困難である。   In order to solve this problem, it is generally handled by combining low-speed attenuation and high-speed attenuation during the off period and performing constant current control. The optimal ratio of high-speed attenuation and low-speed attenuation is the motor time constant, power supply voltage, etc. Depending on the situation, a signal is sequentially applied from the outside to change the ratio according to the situation, or the high-speed attenuation ratio is controlled to be long so that it can be used under any conditions. However, if the latter method is used, the load current follows the reference, but the ripple amount increases, so that the noise and loss of the motor increase, and the average current decreases, resulting in a decrease in torque. Even in the former method, since the optimum damping ratio depends on the position of the rotor of the motor, it is technically very difficult to always control at the optimum ratio.

本発明は、上記問題に鑑みてなされたものであり、減衰比率の設定を内部で処理し、出力オン/オフの1周期毎に逐次変化させることで常に最適な比率にて負荷電流の減衰を行なうことが可能である直流モータの制御回路を提供する。   The present invention has been made in view of the above-mentioned problems. The attenuation ratio setting is internally processed, and the load current is always attenuated at an optimum ratio by sequentially changing the output on / off cycle. Provided is a DC motor control circuit that can be implemented.

上記課題を解決するために、本発明直流モータの制御回路は、負荷電流をモータに供給する為の出力Hブリッジを有する駆動手段と、前記モータ内に流れる負荷電流を電圧に変換し検出電圧として供給する電流検出手段と、前記負荷電流の大きさを決める基準電圧手段と、前記検出電圧を前記基準電圧を比較する比較手段とを有する制御回路において、前記比較手段の信号により前記検出電圧が前記基準電圧を上回った時の時間を検出する監視手段と、前周期での減衰比率と前記監視手段の信号により次のオフ周期での減衰比率を決定する減衰決定手段とを備え、前記検出電圧が前記基準電圧に達したタイミングをオン期間中、オン期間を過ぎ前記監視手段で監視する所定の監視期間内、監視期間後の三段階に分けて検出する負荷電流制御手段を備えてある。   In order to solve the above-described problems, a control circuit for a DC motor according to the present invention includes a driving unit having an output H bridge for supplying a load current to the motor, and converts the load current flowing in the motor into a voltage as a detection voltage. In a control circuit having current detection means to supply, reference voltage means for determining the magnitude of the load current, and comparison means for comparing the detection voltage with the reference voltage, the detection voltage is determined by the signal from the comparison means. Monitoring means for detecting a time when the voltage exceeds a reference voltage; and attenuation determining means for determining an attenuation ratio in the next off-cycle based on an attenuation ratio in the previous cycle and a signal of the monitoring means, and the detection voltage is A load current control method for detecting the timing at which the reference voltage is reached in three stages during the ON period, within a predetermined monitoring period that is monitored by the monitoring means after the ON period, and after the monitoring period. It is equipped with.

前記減衰比較手段は前回のオフ期間における比率を基準にし、次のオフ期間において、前記検出電圧が前記基準電圧に達した点がオン期間中であれば前記減衰比較手段に信号を送り、次のオフ期間にて高速減衰の比率を増やし、監視期間内であれば減衰比率が適当と判断し比率を維持し、監視期間を超えると次のオフ期間にて低速減衰の比率を増やすように、前記減衰比較手段から前記駆動手段に信号を出力するようにしてある。   The attenuation comparison means is based on the ratio in the previous off period, and in the next off period, if the point where the detected voltage reaches the reference voltage is in the on period, it sends a signal to the attenuation comparison means, Increase the rate of fast decay in the off period, maintain the rate if the decay rate is appropriate if it is within the monitoring period, and increase the rate of slow decay in the next off period when the monitoring period is exceeded A signal is output from the attenuation comparing means to the driving means.

前記監視手段は、前記発振手段から供給されるオン期間、監視期間、並びにオフ期間の3つの信号により、どのタイミングで前記検出電圧が前記基準電圧に達したかを検出し、信号を前記減衰比較手段に送るように構成してある。   The monitoring means detects at what timing the detected voltage has reached the reference voltage based on three signals of an on period, a monitoring period, and an off period supplied from the oscillating means, and compares the signal with the attenuation comparison Configured to be sent to the means.

本発明によれば、高速減衰の比率が高ければ、低速減衰の比率を増やし、低速減衰の比率が高ければ高速減衰の比率を増やす減衰比較回路を有する負荷電流制御手段を備えているので定電流制御時のリプル分を可能な限り少なくし基準電圧にできる限り近似させる。この制御を逐次回路内部にて行うので、外部からの制御無しで直流モータのノイズ、損失を減じ、トルクを大きくする事が可能となる効果がある。   According to the present invention, since the load current control means having the attenuation comparison circuit for increasing the ratio of the low-speed attenuation if the ratio of the high-speed attenuation is high and increasing the ratio of the high-speed attenuation if the ratio of the low-speed attenuation is high is provided. The ripple at the time of control is reduced as much as possible to approximate the reference voltage as much as possible. Since this control is performed inside the sequential circuit, it is possible to reduce the noise and loss of the DC motor and increase the torque without any external control.

発明を実施するための最良の形態の回路図を図1に示す。この制御回路は、従来の制御回路と同様に、負荷電流をモータに供給する為の出力Hブリッジ11を有する駆動回路1を有する。なお、出力Hブリッジ11については、従来の出力Hブリッジ11と同様の構成であるため、構成及び作用の説明は省略する。また、制御回路は、従来の制御回路と同様に、前記モータ内に流れる負荷電流を電圧に変換し検出電圧として供給する電流検出回路2と、負荷電流の大きさを決める基準電圧回路3と、検出電圧を基準電圧を比較する比較回路4と、出力Hブリッジ11にオン信号と検出電圧が基準電圧を超えた場合一定期間オフ信号を供給するON/OFF設定回路6とを有する。   A circuit diagram of the best mode for carrying out the invention is shown in FIG. This control circuit has a drive circuit 1 having an output H-bridge 11 for supplying a load current to the motor, as in the conventional control circuit. Since the output H bridge 11 has the same configuration as that of the conventional output H bridge 11, description of the configuration and operation is omitted. The control circuit, like the conventional control circuit, converts a load current flowing in the motor into a voltage and supplies it as a detection voltage, a reference voltage circuit 3 that determines the magnitude of the load current, A comparison circuit 4 that compares the detection voltage with a reference voltage, and an ON / OFF setting circuit 6 that supplies an ON signal to the output H bridge 11 and supplies an OFF signal for a predetermined period when the detection voltage exceeds the reference voltage.

さらに、本実施例における制御回路は、駆動手段オン期間、監視期間、並びにオフ期間の3つの信号を供給する発振回路5と、比較回路4の信号により前記検出電圧が前記基準電圧を上回った時の時間を検出する監視回路9と、前周期での減衰比率と監視回路9の信号により次のオフ周期での減衰比率を決定する減衰比較回路7とを備えてある。また、本実施例における制御回路は、前記検出電圧が前記基準電圧に達したタイミングを、オン期間中及びオン期間を過ぎた際に監視回路9で監視する所定の監視期間内、監視期間後の段階に分けて検出する負荷電流制御手段を備えてある。   Further, the control circuit in this embodiment is configured such that when the detection voltage exceeds the reference voltage by the oscillation circuit 5 that supplies three signals of the driving means ON period, the monitoring period, and the OFF period, and the signal of the comparison circuit 4 And the attenuation comparison circuit 7 for determining the attenuation ratio in the next off period based on the attenuation ratio in the previous period and the signal of the monitoring circuit 9. Further, the control circuit in this embodiment is configured to monitor the timing at which the detected voltage reaches the reference voltage during the on-period and after the monitoring period within the predetermined monitoring period monitored by the monitoring circuit 9 when the on-period has passed. Load current control means for detecting in stages is provided.

続いて、本発明の特長である負荷電流制御手段の一実施例を図4に示す。この実施例では、負荷電流制御手段は、減衰比較回路7及び監視回路9で構成してある。減衰比較回路7はUP/DOWNカウンタ71を備え、監視回路9は、立下りエッジ回路91、NAND回路92及び2つのラッチ回路93,94を備えてあり、発振回路5のオン期間の信号は立下りエッジ回路91及びNAND回路92に出力し、発振回路5の監視期間の信号はNAND回路92に出力し、発振回路5のオフ期間の信号はラッチ回路93,94のクリア信号としてラッチ回路93,94に出力するようにしてある。また、比較回路4の出力信号はラッチ回路93,94に出力するようにしてある。   Subsequently, an embodiment of the load current control means which is a feature of the present invention is shown in FIG. In this embodiment, the load current control means comprises an attenuation comparison circuit 7 and a monitoring circuit 9. The attenuation comparison circuit 7 includes an UP / DOWN counter 71, and the monitoring circuit 9 includes a falling edge circuit 91, a NAND circuit 92, and two latch circuits 93 and 94. The signal output to the falling edge circuit 91 and the NAND circuit 92 is output, the signal during the monitoring period of the oscillation circuit 5 is output to the NAND circuit 92, and the signal during the off period of the oscillation circuit 5 is used as the clear signal of the latch circuits 93 and 94. 94 is output. The output signal of the comparison circuit 4 is output to the latch circuits 93 and 94.

以上のように構成してある制御回路を図2の動作波形図を用いて説明を行なう。先ず、オン信号により駆動回路1はオンに転じ負荷電流が上昇する。オン信号終了後検出電圧が基準電圧に達した場合、所定の期間オフに入り、この時減衰比較回路7により供給される信号に従い高速減衰もしくは低速減衰にて負荷電流を減衰させる。この検出電圧が基準電圧に達するタイミングを、図2に示す様にタイミングをオン期間中、オン期間を過ぎ監視回路9で監視する所定の監視期間内、監視期間後の三段階に分けて検出する。   The control circuit configured as described above will be described with reference to the operation waveform diagram of FIG. First, the drive circuit 1 is turned on by the ON signal, and the load current increases. When the detection voltage reaches the reference voltage after the end of the ON signal, the load voltage is turned OFF for a predetermined period. At this time, the load current is attenuated by high-speed attenuation or low-speed attenuation according to the signal supplied by the attenuation comparison circuit 7. As shown in FIG. 2, the timing at which the detected voltage reaches the reference voltage is detected in three stages after the monitoring period, within the predetermined monitoring period monitored by the monitoring circuit 9 during the ON period, during the ON period. .

先ず、図2Aの様にオン期間中であれば前回のオフ期間において負荷電流が十分減衰されなかったと判断し、前回の比率に対して高速減衰の比率を増やし負荷電流の減衰量を増やす。また、図2Bの様に監視期間内であれば比率は最適であったとして前回の比率を維持する。図2Cの様につまり監視期間以後からオフ期間前であれば、前回の減衰量が大きすぎると判断し、次期間において低速減衰の比率を増やし、減衰比較回路7から駆動回路に信号を出力して、負荷電流の減衰量を小さくする。   First, as shown in FIG. 2A, if it is during the ON period, it is determined that the load current is not sufficiently attenuated during the previous OFF period, and the rate of high-speed attenuation is increased with respect to the previous ratio to increase the amount of attenuation of the load current. Further, as shown in FIG. 2B, if the ratio is within the monitoring period, the previous ratio is maintained assuming that the ratio is optimal. As shown in FIG. 2C, that is, after the monitoring period and before the off period, it is determined that the previous attenuation amount is too large, the ratio of the low-speed attenuation is increased in the next period, and a signal is output from the attenuation comparison circuit 7 to the drive circuit. Reduce the attenuation of the load current.

また、オン期間は従来方式と同様に出力を強制オン状態にし、比較回路4からの信号は無視する。また図2では3種類の負荷電流波形を示しており便宜的に同じ幅になっているが、実際は負荷電流が基準に達しかつオン期間が終了した時点でオフ期間に入る。この時監視期間は解除される。   During the ON period, the output is forcibly turned on as in the conventional method, and the signal from the comparison circuit 4 is ignored. In FIG. 2, three types of load current waveforms are shown and have the same width for the sake of convenience, but in actuality, the load enters the off period when the load current reaches the reference and the on period ends. At this time, the monitoring period is canceled.

続いて、図4図示の減衰比較回路7及び監視回路9の動作について説明を行う。なお、監視回路9の各部動作波形図は図4に示す。   Next, operations of the attenuation comparison circuit 7 and the monitoring circuit 9 shown in FIG. 4 will be described. The operation waveform diagram of each part of the monitoring circuit 9 is shown in FIG.

発振回路5よりオン期間、監視期間、オフ期間のいずれかの信号が入力される。この信号を用いて、オン期間中に負荷電流が基準に達すると、比較回路4からの出力信号はオン信号の立下りエッジ回路91により生成された信号Dにより信号がラッチ回路93に供給され、ラッチされる。この信号は減衰比較回路7にUPクロックとして供給される。   One signal of an on period, a monitoring period, and an off period is input from the oscillation circuit 5. Using this signal, when the load current reaches the reference during the ON period, the output signal from the comparison circuit 4 is supplied to the latch circuit 93 by the signal D generated by the falling edge circuit 91 of the ON signal, Latched. This signal is supplied to the attenuation comparison circuit 7 as an UP clock.

続いて、監視期間中に負荷電流が基準に達すると、監視期間の信号はNAND回路92に供給されるが、NAND回路92では信号は出力されないため、減衰比較回路7には信号は出力されない。   Subsequently, when the load current reaches the reference during the monitoring period, a signal in the monitoring period is supplied to the NAND circuit 92, but no signal is output from the NAND circuit 92. Therefore, no signal is output to the attenuation comparison circuit 7.

続いて、監視期間以後からオフ期間前までの間に負荷電流が基準に達すると、比較回路4からの出力信号とNAND回路92により生成された信号Eにより信号がラッチ回路93に供給され、ラッチされる。この信号は減衰比較回路7にDOWNクロックとして供給される。これらの信号を減衰比較回路7に有するUP/DOWNカウンタ71に送りカウンタの数を逐次変化させ、減衰比率を決定する。   Subsequently, when the load current reaches the reference after the monitoring period and before the off period, a signal is supplied to the latch circuit 93 by the output signal from the comparison circuit 4 and the signal E generated by the NAND circuit 92, and the latch circuit 93 Is done. This signal is supplied to the attenuation comparison circuit 7 as a DOWN clock. These signals are sent to the UP / DOWN counter 71 included in the attenuation comparison circuit 7, and the number of counters is sequentially changed to determine the attenuation ratio.

以上のように高速減衰の比率が高いと判断した場合は負荷電流のリプル分が大きい為、低速減衰の比率を増やし、低速減衰の比率が高いと判断した場合は負荷電流を電圧に変換して得た検出電圧が基準電圧による設定値より高くなる可能性があるので高速減衰の比率を増やし、比率が適当であれば維持させる。以上の方法にて負荷電流を電圧に変換して得た検出電圧が基準電圧で決められた設定値により近似させるように制御する。   As described above, when it is determined that the ratio of high-speed attenuation is high, the ripple amount of the load current is large. Therefore, the ratio of low-speed attenuation is increased, and when it is determined that the ratio of low-speed attenuation is high, the load current is converted to voltage. Since the obtained detection voltage may be higher than the set value by the reference voltage, the ratio of high-speed attenuation is increased and maintained if the ratio is appropriate. Control is performed so that the detected voltage obtained by converting the load current into voltage by the above method is approximated by the set value determined by the reference voltage.

なお、本実施例に示した直流モータの制御回路は集積回路で一回路として組み込むことが可能である。   The DC motor control circuit shown in this embodiment can be integrated as an integrated circuit.

本発明直流モータの制御回路によれば、高速減衰の比率が高ければ、低速減衰の比率を増やし、低速減衰の比率が高ければ高速減衰の比率を増やす減衰比較回路を有する負荷電流制御手段を備えているので定電流制御時のリプル分を可能な限り少なくし基準電圧にできる限り近似させる。この制御を逐次回路内部にて行うので、外部からの制御無しで直流モータのノイズ、損失を減じ、トルクを大きくする事が可能となる。   According to the DC motor control circuit of the present invention, load current control means having an attenuation comparison circuit that increases the low-speed attenuation ratio if the high-speed attenuation ratio is high and increases the high-speed attenuation ratio if the low-speed attenuation ratio is high is provided. Therefore, the ripple during constant current control is reduced as much as possible to approximate the reference voltage as much as possible. Since this control is performed inside the sequential circuit, it is possible to reduce the noise and loss of the DC motor and increase the torque without external control.

本発明に係る直流モータの制御回路のブロック図である。It is a block diagram of a control circuit of a DC motor according to the present invention. 図1図示実施例における動作波形図である。1 is an operation waveform diagram in the embodiment shown in FIG. 本発明に係る出力Hブリッジの回路図である。It is a circuit diagram of the output H bridge concerning the present invention. 本発明に係る第一実施例の要部を示したブロック図である。It is the block diagram which showed the principal part of the 1st Example which concerns on this invention. 図4図示実施例における各部信号を示す波形図である。4 is a waveform diagram showing each signal in the embodiment shown in FIG. 従来における直流モータの制御回路のブロック図である。It is a block diagram of the control circuit of the conventional DC motor. 図6図示従来例における動作波形図である。FIG. 7 is an operation waveform diagram in the conventional example shown in FIG. 6.

符号の説明Explanation of symbols

1 駆動回路
2 電流検出回路
3 基準電圧回路
4 比較回路
5 発振回路
6 ON/OFF設定回路
7 減衰比較回路(減衰設定回路)
8 出力減衰回路
9 監視回路
11 出力Hブリッジ
71 UP/DOWNカウンタ
91 立下りエッジ回路
92 NAND回路
93,94 ラッチ回路
S1,S2,S3,S4 スイッチング素子
Reference Signs List 1 drive circuit 2 current detection circuit 3 reference voltage circuit 4 comparison circuit 5 oscillation circuit 6 ON / OFF setting circuit 7 attenuation comparison circuit (attenuation setting circuit)
8 Output attenuation circuit 9 Monitoring circuit 11 Output H bridge 71 UP / DOWN counter 91 Falling edge circuit 92 NAND circuit 93, 94 Latch circuit S1, S2, S3, S4 Switching element

Claims (2)

負荷電流をモータに供給する為の出力Hブリッジを有する駆動手段と、前記モータ内に流れる負荷電流を電圧に変換し検出電圧として供給する電流検出手段と、前記負荷電流の大きさを決める基準電圧手段と、前記検出電圧前記基準電圧を比較する比較手段とを有する制御回路において、前記比較手段の信号により前記検出電圧が前記基準電圧を上回った時の時間を検出する監視手段と、前周期での減衰比率と前記監視手段の信号により次のオフ周期での減衰比率を決定する減衰比較手段とを備え、前記検出電圧が前記基準電圧に達したタイミングをオン期間中、オン期間を過ぎ前記監視手段で監視する所定の監視期間内、監視期間後の三段階に分けて検出する負荷電流制御手段を備え、前記減衰比較手段は前回のオフ期間における比率を基準にし、次のオフ期間において、前記検出電圧が前記基準電圧に達した点がオン期間中であれば前記減衰比較手段に信号を送り、次のオフ期間にて高速減衰の比率を増やし、監視期間内であれば減衰比率が適当と判断し比率を維持し、監視期間を超えると次のオフ期間にて低速減衰の比率を増やすように、前記減衰比較手段から前記駆動手段に信号を出力するようにしてあることを特徴とする直流モータの制御回路。 Driving means having an output H bridge for supplying a load current to the motor, current detecting means for converting the load current flowing in the motor into a voltage and supplying it as a detection voltage, and a reference voltage for determining the magnitude of the load current and means, in a control circuit having a comparing means for comparing said detection voltage and the reference voltage, monitoring means for detecting the time when the detected voltage by a signal of the comparing means exceeds the reference voltage, the preceding period And an attenuation comparison means for determining an attenuation ratio in the next off period based on a signal from the monitoring means, and the timing at which the detected voltage reaches the reference voltage during the on period, after the on period has passed. within a predetermined monitoring period for monitoring by the monitoring means comprises a load current control means for detecting divided into three stages after the monitoring period, the ratio the damping comparing means in the preceding off period In the next off period, if the point where the detected voltage reaches the reference voltage is in the on period, a signal is sent to the attenuation comparison means, and the fast decay ratio is increased and monitored in the next off period. If it is within the period, the attenuation ratio is determined to be appropriate and the ratio is maintained. If the monitoring period is exceeded, a signal is output from the attenuation comparison means to the drive means so that the rate of low-speed attenuation is increased in the next off period. A control circuit for a direct current motor, characterized by being configured as described above . 前記監視手段は、前記発振手段から供給されるオン期間、監視期間、並びにオフ期間の3つの信号により、どのタイミングで前記検出電圧が前記基準電圧に達したかを検出し、信号を前記減衰比較手段に送るように構成してあることを特徴とする請求項記載の直流モータ制御回路。 The monitoring means detects at what timing the detected voltage has reached the reference voltage based on three signals of an on period, a monitoring period, and an off period supplied from the oscillating means, and compares the signal with the attenuation comparison 2. The DC motor control circuit according to claim 1 , wherein the DC motor control circuit is configured to be sent to the means.
JP2004008751A 2004-01-16 2004-01-16 DC motor control circuit Expired - Fee Related JP4446752B2 (en)

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