JP4447938B2 - Position detection device - Google Patents

Description

  The present invention relates to a position detection device that detects movement position data of two members that move relative to each other, and more particularly to a position detection device that detects movement position data of two members according to the distance of relative movement.

  The position detection device detects the movement position of the two members that move relative to each other. Here, the configuration of the position detection device will be described below. The position detection device includes a scale in which a periodic signal whose signal level varies at a certain wavelength is recorded along a certain direction, a head unit that detects the periodic signal recorded in the scale, and a cycle that is detected from the head unit. And an arithmetic processing unit that performs signal processing of the signal and outputs position information. The scale and the head portion are attached to the movable portion and the reference portion of the two members that move relative to each other. In the position detection device, the head unit detects the scale of a periodic signal whose signal level varies according to the relative movement of the two members, and supplies the detected periodic signal to the arithmetic processing unit. The arithmetic processing unit outputs position information indicating the relative movement position of the two members based on the periodic signal detected by the head unit. In such a position detection device, in order to detect the position with high resolution by further interpolating the recording wavelength of the periodic signal recorded on the scale, the detected periodic signal is converted into polar coordinates to generate an angle signal. Is used to generate position information.

  By the way, in the position detection device, the sine signal and the cosine signal supplied from the head unit are quantized by an ADC (analog to digital converter), and then are subjected to polar coordinate conversion by arctan (sin θ / cos θ), and the angle data is divided into desired divisions. Normalized to numbers and interpolated. In the interpolation using the ADC, polar coordinate conversion is generally performed using a lookup table. However, the ADC basically has no hysteresis and can only provide an unstable output, and the number of divisions also depends on the resolution of the ADC. For high interpolation, a high resolution ADC and a large capacity are required. Requires a lookup table, that is, memory.

  As a method for solving such a problem, a digital filter having an LPF (Low Pass Filter) effect that removes a high-frequency component from the modulo number, such as angle data, has been proposed (for example, Patent Document 1). reference.).

  Normally, the data output from the ADC does not output one value continuously, and data changing in a Gaussian distribution is output as shown in FIG.

  Similarly, the data read from the look-up table for obtaining the angle data is not angle data at one point with respect to the XY plane but angle data that changes in a Gaussian distribution in a certain region. Therefore, even if there is a defect in the lookup table, the current position can be inferred by integrating the angle data read from the lookup table.

  The LPF is generally called an integrator and is effective only in a finite region. Therefore, in the case of modulo data such as angle data, a special LPF is required. However, since LPF is possible only in a finite region, when data having a folded portion such as a modulo number is input, the output signal becomes dull as shown in FIG.

Therefore, in Patent Document 1, a phase comparison type LPF using a phase accumulator (VCO, Voltage Control Oscillator) is adopted. As shown in FIG. 21, the phase comparison type LPF has a phase comparison output or charge pump output of a PLL (Phase Locked Loop) in a finite region, and the output is multiplied by the LPF. Further, as shown in FIG. 22, the phase-compared value exists in a finite region between V _{L and} V _H as long as it does not go out of the lock range.

  However, the digital filter has an effect of stabilizing the high division. On the other hand, since the integration is performed in the time domain, the angle data is not obtained when the head unit moves at a high speed relative to the scale. There is a problem that does not change correctly. On the other hand, if the LPF is removed in order to avoid such inconvenience during high speed movement, there is a problem that it is difficult to ensure stability at low speed.

JP 2001-74501 A

  The problem to be solved is that stable data output is performed regardless of the speed at which the head portion and the scale move relatively.

In order to solve the above-described problem , the present invention provides a recording medium on which a position signal composed of a periodic signal is recorded, and a relative movement with respect to the recording medium along the recording direction of the position signal. And an absolute value signal generation unit that generates an absolute value signal indicating an absolute position between the recording medium and the detection head within one cycle based on a position signal detected by the detection head. A position detection device having a reference signal generating means for generating a reference signal, an integration calculating means for performing an integration calculation on an input signal based on the reference signal generated by the reference signal generating means, and the integration calculating means. A phase comparison unit that compares the phase of the integral calculation signal with the phase of the absolute value signal and generates a phase error signal according to the comparison result, and the reference signal generation unit Deviation detection means for detecting a deviation of the absolute value signal based on the quasi signal and generating a predetermined signal; and a phase error signal generated by the phase comparison means in accordance with the signal generated by the deviation detection means Gain increase / decrease means for increasing / decreasing the gain of the deviation signal generation means for detecting a deviation of the absolute value signal and generating a deviation signal based on the reference signal generated by the reference signal generation means Means, a subtraction process means for subtracting the deviation signal generated by the deviation signal generation means and the absolute value signal, and outputting the value after the subtraction as an absolute value, and a subtraction process by the subtraction processing means A comparator for comparing the value with a predetermined value, and the gain increasing / decreasing unit sets the gain of the phase error signal to 1 when a signal indicating that the predetermined value is smaller is supplied from the comparing unit. Less than Of the predetermined value, when a signal indicating that the larger the predetermined value from said comparing means is supplied, the gain of the phase error signal to 1, the integral calculation means it is generated by the reference signal generating means based on the reference signal, wherein the gain is integral calculation increase or decrease the signal by the gain adjusting unit.

In order to solve the above-mentioned problem, the present invention moves relative to the recording medium along the recording direction of the position signal and the recording medium on which the position signal composed of a periodic signal is recorded, Absolute value signal generation for generating an absolute value signal indicating an absolute position between the recording medium and the detection head within one cycle based on one or more detection heads for detecting a position signal and the position signal detected by the detection head A reference signal generation means for generating a reference signal, and a first integration calculation means for performing an integration calculation on the input signal based on the reference signal generated by the reference signal generation means; A phase comparison means for comparing the phase of the absolute value signal with the signal integrated by the first integration calculation means and generating a phase error signal according to the comparison result; and the reference signal generation Deviation detection means for detecting a deviation of the absolute value signal based on the reference signal generated by the stage and generating a predetermined signal, and generated by the phase comparison means according to the signal generated by the deviation detection means First gain increase / decrease means for increasing / decreasing the gain of the phase error signal, and the gain of the phase error signal whose gain has been increased / decreased by the first gain increase / decrease means in accordance with the signal generated by the deviation detection means. Based on the second gain increasing / decreasing means for increasing / decreasing and the reference signal generated by the reference signal generating means, a second integral calculating for performing an integrating calculation on the phase error signal whose gain has been increased / decreased by the second gain increasing / decreasing means. and means, the phase error signal gain is increased or decreased by the first gain adjusting unit, and an adding arithmetic means for adding operation on the integral calculation signal by the second integral calculation section, the upper The deviation detecting means detects a deviation of the absolute value signal based on the reference signal generated by the reference signal generating means, and generates a deviation signal, and the deviation generated by the deviation signal generating means A subtraction processing means for performing an absolute value subtraction process on the signal and the absolute value signal; a comparison means for comparing the value subjected to the absolute value subtraction process by the subtraction processing means with a predetermined value; When the signal indicating that the predetermined value is smaller is supplied from the comparing means, the increasing / decreasing means sets the gain of the phase error signal to a predetermined value of 1 or less, and the predetermined value is larger from the comparing means. When the signal is supplied, the gain of the phase error signal is set to 1, and the second gain increasing / decreasing means supplies the signal indicating that the predetermined value is smaller from the comparing means. By the first gain increasing / decreasing means When the gain of the phase error signal whose gain has been increased or decreased is set to a predetermined value of 1 or less and a signal indicating that the predetermined value is larger is supplied from the comparing means, the gain is increased or decreased by the first gain increasing / decreasing means. is the gain of the phase error signal to zero, the first integral calculation section, based on the reference signal generated by said reference signal generating means, the integrating operation of the addition operation signal by the addition operation means Features .

In order to solve the above-mentioned problem, the present invention moves relative to the recording medium along the recording direction of the position signal and the recording medium on which the position signal composed of a periodic signal is recorded, Absolute value signal generation for generating an absolute value signal indicating an absolute position between the recording medium and the detection head within one cycle based on one or more detection heads for detecting a position signal and the position signal detected by the detection head A reference signal generating means for generating a reference signal, an integration calculating means for performing an integration operation on an input signal based on the reference signal generated by the reference signal generating means, and the integration A phase comparison unit that compares the phase of the absolute value signal with the signal that has been integrated by the calculation unit and generates a phase error signal according to the comparison result, and the phase comparison unit The phase error signal is converted into an absolute value signal and an absolute value conversion means for generating a predetermined signal from the converted signal and generated by the phase comparison means according to the signal supplied from the absolute value conversion means Gain increasing / decreasing means for increasing / decreasing the gain of the phase error signal, wherein the absolute value converting means converts the phase error signal supplied from the phase comparing means into an absolute value signal, and the converting means. A comparison means for comparing the absolute value signal converted in step (b) with a predetermined value, and the gain increase / decrease means receives the signal indicating that the predetermined value is smaller from the comparison means. When the gain of the error signal is set to a predetermined value of 1 or less and a signal indicating that the predetermined value is larger is supplied from the comparison means, the gain of the phase error signal is set to 1, and the integration calculation means By reference signal generation means Based on the generated reference signal, wherein the gain is integral calculation increase or decrease the signal by the gain adjusting unit.

Furthermore, in order to solve the above-mentioned problem, the present invention moves relative to the recording medium in which a position signal composed of a periodic signal is recorded and the recording medium along the recording direction of the position signal. Absolute value signal generation for generating an absolute value signal indicating an absolute position between the recording medium and the detection head within one cycle based on one or more detection heads for detecting a position signal and the position signal detected by the detection head A reference signal generation means for generating a reference signal, and a first integration calculation means for performing an integration calculation on the input signal based on the reference signal generated by the reference signal generation means; A phase comparison unit that compares the phase of the absolute value signal with the signal integrated by the first integration calculation unit and generates a phase error signal according to the comparison result; and the phase comparison unit The phase error signal generated by step (b) is converted into an absolute value signal, and an absolute value conversion unit that generates a predetermined signal from the converted signal, and the phase comparison according to the signal supplied from the absolute value conversion unit First gain increase / decrease means for increasing / decreasing the gain of the phase error signal generated by the means, and phase error whose gain has been increased / decreased by the first gain increase / decrease means in accordance with the signal generated by the absolute value conversion means Based on the second gain increase / decrease means for increasing / decreasing the gain of the signal and the reference signal generated by the reference signal generation means, an integration operation is performed on the phase error signal whose gain is increased / decreased by the second gain increase / decrease means. 2 integration calculation means, and an addition calculation means for adding and calculating the phase error signal whose gain has been increased or decreased by the first gain increase and decrease means and the signal that has been integrated and calculated by the second integral calculation means. The absolute value converting means converts the phase error signal supplied from the phase comparing means into an absolute value signal, and compares the absolute value signal converted by the converting means with a predetermined value. And the first gain increase / decrease means sets the gain of the phase error signal to a predetermined value of 1 or less when the signal indicating that the predetermined value is smaller is supplied from the comparing means. When a signal indicating that the predetermined value is larger is supplied from the comparing means, the gain of the phase error signal is set to 1, and the second gain increasing / decreasing means indicates that the predetermined value is smaller than the comparing means. Is supplied, the gain of the phase error signal whose gain has been increased or decreased by the first gain increasing / decreasing means is set to a predetermined value of 1 or less, and a signal indicating that the predetermined value is larger from the comparing means. When supplied, the first gain increasing / decreasing means The gain of the phase error signal whose gain has been increased or decreased by 0 is set to 0, and the first integration calculation means integrates the signal added and calculated by the addition calculation means based on the reference signal generated by the reference signal generation means It is characterized by calculating.

  The position detection device according to the present invention can handle a modulo number such as angle data obtained from a periodic signal, and a deviation between an input value (angle data PI) and an output value (smooth angle data PF) is increased. When the head unit 3 is moving at a high speed with respect to the scale 2, the effect of the LPF is removed by forcibly setting the gain value of the gain increasing / decreasing unit to 1, so that the smooth angle data PF Can be output correctly, and when the deviation between the input value (angle data PI) and the output value (smooth angle data PF) is small, that is, when the head unit 3 is moving at a low speed with respect to the scale 2. Since the gain increase / decrease unit increases / decreases a predetermined gain to the phase error signal and exhibits the LFP effect, stable smooth angle data PF can be output.

  In addition, since the position detection device according to the present invention uses the same integrator (phase accumulator) when the head unit moves at a low speed relative to the scale and also when the head unit moves at a high speed, the output smooth angle data There is an advantage that no error occurs in the PF.

  Furthermore, the position detection device according to the present invention increases or decreases the gain by a desired multiplier for the deviation between the input value (angle data PI) and the output value (smooth angle data PF), and sets a multiplier that determines the cutoff frequency fc of the LPF. Since it is controlled, the cut-off frequency fc can be changed according to the relative speed of the head unit and the scale, higher-order noise components can be controlled, and a stable output can be obtained at any speed. Obtainable.

  The position detection device according to the present invention has a configuration suitable for the control system because the delay speed when the relative speed of the head unit and the scale is low and the delay speed when the relative speed is high change smoothly. .

  Hereinafter, as an embodiment of the present invention, a position detection device for detecting a linear movement position of a machine tool that moves linearly (for example, a machine tool having two members including a fixed portion and a movable portion) will be described with reference to the drawings. While explaining. FIG. 1 is a block diagram of a position detection apparatus to which the present invention is applied.

  As shown in FIG. 1, the position detection device 1 includes a scale 2 on which signals are recorded at predetermined intervals, a head unit 3 that moves relative to the scale 2 and reads signals recorded on the scale 2, and a head unit 1, a first analog / digital conversion unit 4 that digitally converts the signal read by the head 3, a second analog / digital conversion unit 5 that digitally converts the signal read by the head unit 3, and a first analog / digital conversion unit 4 and polar coordinate conversion based on the data supplied from the second analog / digital conversion unit 5 to generate angle data PI and amplitude data LI, and angle data PI supplied from the polar conversion unit 6 The PLL low-pass filter 7 that performs predetermined processing and generates smooth angle data PF, and amplitude data LI and PL supplied from the polar coordinate converter 6 Based on data supplied from the low-pass filter 7, a noise detection unit 8 that detects noise included in the angle data PI, a filter control unit 9 that performs predetermined arithmetic processing, and a smoothing generated by the PLL low-pass filter 7 Differentiating circuit 10 that performs predetermined signal processing on the angle data PF, integrating circuit 11 that performs predetermined processing on the output value (differential value) of the differentiating circuit 10, and a clock generation unit (reference signal) that generates a sampling clock (reference signal) Signal generation unit) 12.

  The position detection device 1 may be configured to include a response limiting unit (not shown) between the PLL low-pass filter 7 and the differentiation circuit 10. In this case, the response limiter generates response limit angle data PH for which response is limited from the smooth angle data PF supplied from the PLL low pass filter 7, and the generated response limit angle data PH is input to the differentiating circuit 10. Supply.

  In the position detection device 1, the scale 2 and the head unit 3 are respectively attached to two members that linearly move, and the relative movement positions of the two members are detected. For example, the scale 2 is attached to the movable part of the two members, and the head part 3 is attached to the fixed part of the two members. In the position detection device 1, a position signal is recorded on the scale 2, and the head unit 3 detects the position signal recorded on the scale 2 in accordance with the linear movement of the machine tool or the like, and this machine tool. And so on. The position detection device 1 outputs a continuous signal generated by a position signal as movement position information of the machine tool or the like.

  Therefore, in the position detection apparatus 1 according to the present invention, the movement position information of the machine tool can be provided by supplying a continuous signal to the control device that controls the operation of the machine tool.

  The contents of each component of the position detection device 1 will be described in more detail.

  The scale 2 has a long shape as shown in FIG. The scale 2 is attached to one member of two members that move linearly, for example, a movable portion so that the longitudinal direction thereof is parallel to the moving direction of the two members. A magnetic signal repeated at a predetermined wavelength λ along the longitudinal direction is recorded as a position signal on the scale 2.

  The shape of the scale 2 is determined according to the content of the relative movement of the machine tool that detects the movement position. For example, when detecting the moving position of a machine tool that moves linearly, the scale 2 preferably has a long shape as shown in FIG. 2, but the rotating position of a rotating member is detected. When doing so, it is preferable to have a disk shape. Further, the position signal is a periodic signal repeated at a constant wavelength, and may be any signal as long as it is recorded along the relative movement direction. For example, the position signal may be a signal that is detected optically. For example, when the rotational position is detected using a disk-shaped scale, the recording position of the position signal is generally recorded on the arc portion of the scale.

  As illustrated in FIG. 3, the head unit 3 includes a first position detection head 15 and a second position detection head 16 that detect a position signal. The head part 3 having such heads 15 and 16 is attached to a member to which the scale 2 is not attached, for example, a fixed part, among the two members that move linearly. Accordingly, the scale 2 and the head unit 3 move relative to each other as the two members move linearly. Each of the heads 15 and 16 includes a magnetic head that converts a magnetic signal, such as an MR head or a coil sensor, into an electric signal. Each head 15, 16 is fixed at a position where a position signal can be detected. That is, when the scale 2 is linearly moved in the longitudinal direction, the position signal recorded in the longitudinal direction of the scale 2 can be always detected, for example, at a position facing the position signal.

  Further, the first position detection head 15 and the second position detection head 16 are arranged apart from each other by (m + 1/4) λ in the longitudinal direction of the scale 2, that is, the relative movement direction of the machine tool. λ is the wavelength of the position signal, and m is an integer. Since the position signal is a periodic signal having a wavelength λ, the second position detection head 16 detects a signal having a ¼ wavelength phase shifted from the signal detected by the first position detection head 15. The

  Therefore, as shown in FIG. 4A, a sine wave signal that is repeated with a period λ is detected from the first position detection head 15 as shown in FIG. 4A, and the second position detection head 16 From FIG. 4B, as shown in FIG. 4B, a sine wave signal that is repeated with a period λ along with the relative movement of the machine tool and has a ¼ wavelength phase shifted from the signal detected by the first position detection head 15 Detected. Hereinafter, a signal detected by the first position detection head 15 is referred to as a SIN signal, and a signal detected by the second position detection head 16 is referred to as a COS signal.

  Such a head unit 3 supplies the SIN signal to the first analog / digital conversion unit 4 and supplies the COS signal to the second analog / digital conversion unit 5.

  In the case where the position signal is optically recorded on the scale 2, the head 3 detects these using the optical head, as shown in FIGS. 4 (A) and 4 (B). A SIN signal and a COS signal can be output.

  Further, the first position detection head 15 and the second position detection head 16 are arranged so that a phase shift of ¼ wavelength occurs in a signal to be detected. Since the position in one cycle of the position signal need only be specified by the angle from the two signals detected by the polar coordinate conversion unit 5, it may be arranged so as to cause a phase shift not only with the ¼ wavelength but also with other phase values. .

  When MR heads are used as the first position detection head 15 and the second position detection head 16, the wavelength of the position signal detected by the MR head is 1 of the wavelength of the position signal recorded on the scale 2. / 2. At this time, when the MR head is used, a periodic signal having a wavelength half that of the position signal recorded on the scale 2 is output from the first position detection head 15 and the second position detection head 16. . In the present apparatus, signals output from the first position detection head 15 and the second position detection head 16 are used as position signals in the following processing.

  The first analog / digital converter 4 converts the SIN signal supplied from the head unit 3 into digital data. The second analog / digital conversion unit 5 converts the COS signal supplied from the head unit 3 into digital data. The sampling clocks of the first analog / digital conversion unit 4 and the second analog / digital conversion unit 5 are supplied from the clock generation unit 12. A sampling clock used for the first analog / digital conversion unit 4 and the second analog / digital conversion unit 5 is a polar coordinate conversion unit 6, a PLL low-pass filter 7, a noise detection unit 8, a filter control unit 9, a differential, which will be described later. It is also supplied to the circuit 10 and the integration circuit 11 and is referred to as a reference clock. Note that the sampling clock has a resolution corresponding to the first analog / digital conversion unit 4 and the second analog / digital conversion unit 5, that is, an A / D quantization unit, and the machine tool to be position-detected is linear. It is assumed that the clock has a frequency sufficiently higher than the time required for moving. For example, if a specification is required that at least 1 microsecond is required for the machine tool to be position-detected to move by the A / D quantization unit, it is assumed that the sampling clock has a sufficiently higher frequency.

  The first analog / digital conversion unit 4 and the second analog / digital conversion unit 5 convert the SIN signal and the COS signal, for example, into 10-bit digital data, and supply the digital data to the polar coordinate conversion unit 6. To do. A signal obtained by converting the SIN signal into digital data is hereinafter referred to as SIN data, and a signal obtained by converting the COS signal into digital data is hereinafter referred to as COS data.

  The polar coordinate conversion unit 6 converts SIN data and COS data into polar coordinates, and outputs amplitude data and angle data indicating the relative movement position of the scale 2 and the head unit 3 within one wavelength λ of the position signal recorded on the scale 2. Generate.

  That is, when the COS data is taken on the horizontal axis and the SIN data is taken on the vertical axis and the vector is drawn, a Lissajous waveform that rotates in the left-right direction according to the relative movement direction of the scale 2 and the head unit 3 as shown in FIG. It becomes. In this Lissajous waveform, one rotation corresponds to one wavelength λ of the position signal, and an angle indicates an absolute position within one wavelength of the position signal. From this, the absolute position of the scale 2 and the head 3 within one wavelength λ can be expressed by performing polar coordinate conversion on the SIN data and the COS data. That is, since the position signal recorded on the scale 2 is a periodic signal, angle data indicating position information within one period can be generated by converting the level of the periodic signal into polar coordinates.

  The PLL low-pass filter 7 performs a low-pass filtering process for removing high frequency components on the angle data PI converted by the polar coordinate converter 6. The PLL low-pass filter 7 calculates an input / output phase error, and performs feedback control so that the phase error becomes zero. That is, the PLL low-pass filter 7 has a circuit configuration similar to a PLL (Phase Locked Loop) circuit configuration.

  As shown in FIG. 6, the PLL low-pass filter 7 is normally composed of a feedback closed circuit including a phase comparator 20, an LPF 21, and a voltage control oscillator (VCO) 22. The transmission frequency and phase of the VCO 22 are compared by the phase comparator 20 and a signal proportional to the error is output. This error signal is amplified through the LPF 21 and input to the VCO 22, and the frequency of the VCO 22 is changed in a direction that reduces the transmission frequency and phase difference between the input signal and the VCO 22. The VCO 22 includes a phase accumulator 23 and a signal converter (θ → SIN) 24. Further, the phase comparator 20 is configured by a multiplier.

  In the position detection apparatus 1 according to the present invention, a phase comparison type is adopted for the LPF used in the interpolation circuit. Since the signal output from the VOC phase accumulator is an angle value (angle data), as shown in FIG. 7, the phase comparator 20 is composed of an adder, and the VCO signal converter (θ → Since (SIN) is unnecessary, the configuration is removed.

Therefore, by using the PLL low-pass filter 7 as shown in FIG. 7, it is possible to obtain a good filter effect on the angle data, and furthermore, it is possible to perform high division even with a small-capacity look-up table by the averaging effect over a finite region. It becomes. The cutoff frequency is given by the following equation.
fc = A · fs / 2π
Therefore, in order to improve the frequency response, the cut-off frequency (fc) may be increased, and A is usually set to 1 or less. Here, when A is set to 1, the cutoff frequency is
fc = fs / 2π
This is the maximum value. The above is a case of a periodic signal, and in the case of angle data traveling in one direction, it is possible to follow up to fs / 2.

  Here, a specific configuration example of the PLL low-pass filter 7 of the phase detection device 1 according to the present invention will be described below. A configuration example is shown by the first PLL low-pass filter 7 to the third PLL low-pass filter 7.

  As shown in FIG. 8, the first PLL low-pass filter 7 includes a deviation detector 30 that detects the deviation of the input signal, and a phase comparator 31 that compares the input signal and generates a phase error signal. The gain detector 32 increases or decreases the gain of the phase error signal according to the deviation detected by the deviation detector 30 and the integrator 33 is a phase accumulator.

  The deviation detector 30 receives the sampling clock fs generated by the clock generator 12 and the angle data PI supplied from the polar coordinate converter 6. The deviation detector 30 detects the deviation of the angle data PI based on the sampling clock fs and generates a deviation signal. The deviation detector 30 supplies the generated deviation signal to the gain increase / decrease unit 32.

  For example, as shown in FIG. 9, the deviation detector 30 detects the deviation of the angle data PI supplied from the polar coordinate converter 6 based on the sampling clock fs generated from the clock generator 12, and generates a deviation signal. The subtraction signal generator 34, the angle data PI supplied from the polar coordinate converter 6 and the deviation signal generated by the deviation signal generator 34, and a subtractor 35 that converts the subtracted value into an absolute value. And a comparison unit 36 that compares the subtraction value generated by the subtraction unit 35 with a predetermined value V.

  The phase comparator 31 receives the angle data PI of the entire circumference from the polar coordinate converter 6 and receives the smoothed angle data PF as feedback from the integrator 33. The phase comparator 31 obtains a phase error between the angle data PI and the smooth angle data PF and generates a phase error signal PE. The phase comparator 31 supplies the generated phase error signal PE to the gain increase / decrease unit 32.

  As shown in FIG. 10A, the gain increasing / decreasing unit 32 includes an increasing / decreasing unit 37 and a switch 38. The increase / decrease unit 37 increases / decreases the gain of the phase error signal PE supplied from the phase comparator 31 according to the signal supplied from the deviation detector 30, and generates the phase error signal PE with the gain increased / decreased. . The increase / decrease unit 37 supplies the switch 38 with the phase error signal PE whose gain has been increased or decreased. The switch 38 has a terminal a to which the phase error signal PE whose gain has been increased or decreased from the multiplier 37 is supplied, and a terminal b to which the phase error signal PE is supplied from the phase comparator 31. The terminal a and the terminal b are switched according to the supplied signal.

  For example, when the signal supplied from the comparison unit 36 of the deviation detector 30 is a signal indicating that the predetermined value V is smaller (V <| A−B |), the switch 38 is connected to the terminal b. The switch is switched to the terminal a, and if the signal indicates that the predetermined value V is larger (V> | AB |), the switch is switched to the terminal a.

  When the gain increase / decrease unit 32 is configured as shown in FIG. 10A, the frequency response is as shown in FIG. The solid line indicates when the predetermined value is larger than the subtraction value (deviation) generated by the subtracting unit 35, that is, when the switch 38 is switched to the terminal a side, and the dotted line is generated by the subtracting unit 35. It is shown that the predetermined value is smaller than the subtraction value (deviation), that is, the switch 38 is switched to the terminal b side. The cutoff frequency fc when the switch 38 is switched to the terminal a side is A · fs / 2π, and the cutoff frequency fc when the switch 38 is switched to the terminal b side is fs / 2π.

  Further, as shown in FIG. 10B, the gain increasing / decreasing unit 32 increases the gain of the phase error signal PE supplied from the phase comparator 31 in accordance with the signal supplied from the comparing unit 36 of the deviation detector 30. It may be configured to increase or decrease continuously. In the case of such a configuration, as shown in FIG. 12, the frequency response is such that the cut-off frequency fc is changed from A · fs / 2π to fs / according to the signal supplied from the comparator 36 of the deviation detector 30. It continuously changes between 2π.

  The integrator 33 performs an integration operation based on the phase error signal PE whose gain has been increased / decreased by the gain increase / decrease unit 32 and the sampling clock fs generated by the clock generator 12, and the signal after the integration is used as the smooth angle data PF. Output to the differentiation circuit 10. Further, the integrator 33 supplies the smooth angle data PF to the phase comparator 31.

  Therefore, the first PLL low-pass filter 7 obtains the deviation of the angle data for each sample inputted in advance, so that the deviation is large, that is, the head unit 3 moves relatively fast with respect to the scale 2. In some cases, A can be forcibly switched so as to be 1, so that a high-speed response can be handled. Note that the value to be switched is set to A times or less.

  Next, a second configuration of the PLL low-pass filter 7 will be described below. In addition, about the component which performs the same operation | movement as the 1st structural example mentioned above, the same code | symbol as a 1st structural example is attached | subjected and description is abbreviate | omitted.

  As shown in FIG. 13, the second PLL low-pass filter 7 includes a deviation detector 30 that detects the deviation of the input signal, and a phase comparator 31 that compares the input signal and generates a phase error signal. The first gain increasing / decreasing unit 40 that increases / decreases the gain of the phase error signal according to the signal generated by the deviation detector 30 and the first gain increasing / decreasing unit according to the signal generated by the deviation detector 30 A second gain increasing / decreasing unit 41 for increasing / decreasing the gain of the phase error signal whose gain has been increased / decreased at 40, and a first integration for performing an integration operation based on the output signal of the second gain increasing / decreasing unit 41 and the sampling clock fs. Based on the adder 42, the output signal of the first integrator 42 and the output signal of the first gain increase / decrease unit 40, the added signal, and the sampling clock fs. Second integrator for integration Consisting of 4.

  As shown in FIG. 14A, the first gain increasing / decreasing unit 40 includes an increasing / decreasing unit 45 and a switch 46. The increase / decrease unit 45 increases / decreases the gain of the phase error signal PE supplied from the phase comparator 31 according to the signal supplied from the deviation detector 30, and generates the phase error signal PE with the gain increased / decreased. The increase / decrease unit 45 supplies the switch 46 with the phase error signal PE whose gain has been increased or decreased. The switch 46 has a terminal a to which the phase error signal PE whose gain is increased or decreased from the increase / decrease unit 45 and a terminal b to which the phase error signal PE is supplied from the phase comparator 31. The terminal a and the terminal b are switched according to the supplied signal. The first gain increase / decrease unit 40 increases or decreases the gain of the speed deviation of the phase error signal PE.

  For example, when the signal supplied from the comparison unit 36 of the deviation detector 30 is a signal indicating that the predetermined value V is smaller (V <| A−B |), the switch 46 is connected to the terminal. The switch is switched to the b side, and if the signal indicates that the predetermined value V is larger (V> | AB |), the switch is switched to the terminal a side.

  As shown in FIG. 14A, the second gain increase / decrease unit 41 includes an increase / decrease unit 47 and a switch 48. The increase / decrease unit 47 increases / decreases the gain of the phase error signal PE in which the gain supplied from the first gain increase / decrease unit 40 is increased / decreased according to the signal supplied from the deviation detector 30, and increases / decreases the phase error. A signal PE is generated. The increase / decrease unit 47 supplies the phase error signal PE with the gain increased or decreased to the switch 48. The switch 48 has a terminal a to which the phase error signal PE whose gain is increased or decreased from the increase / decrease unit 47 and a terminal b to which a predetermined signal is supplied, and corresponds to the signal supplied from the deviation detector 30. Then, the terminal a and the terminal b are switched. The second gain increase / decrease unit 41 increases / decreases the gain of acceleration deviation of the phase error signal PE.

  For example, when the signal supplied from the comparison unit 36 of the deviation detector 30 is a signal indicating that the predetermined value V is smaller (V <| A−B |), the switch 48 is connected to the terminal. The switch is switched to the a side, and if the signal indicates that the predetermined value V is larger (V> | AB |), the switch is switched to the terminal b side.

  Therefore, when the switch 46 of the first gain increasing / decreasing unit 40 is switched to the terminal a side, the switch 48 of the second gain increasing / decreasing unit 41 is switched to the terminal b side, while the first gain increasing / decreasing unit 40 When the switch 46 is switched to the terminal b side, the switch 48 of the second gain increasing / decreasing unit 41 is switched to the terminal a side.

  Further, as shown in FIG. 14B, the first gain increase / decrease unit 40 receives the phase error signal PE supplied from the phase comparator 31 in accordance with the signal supplied from the comparator 36 of the deviation detector 30. The second gain increase / decrease unit 41 is supplied from the comparison unit 36 of the deviation detector 30 as shown in FIG. 14 (B). A configuration may be used in which the gain of the phase error signal PE supplied from the first gain increase / decrease unit 40 is increased or decreased stepwise in accordance with the signal. In the case of such a configuration, when a signal indicating that the predetermined value is smaller from the deviation detector 30, that is, a signal indicating that the deviation is small, is supplied, the first gain increase / decrease unit 40 The gain increase / decrease value of the error signal PE is set to a predetermined value A, and the second gain increase / decrease unit 41 sets the gain increase / decrease value of the phase error signal PE whose gain is increased / decreased to the predetermined value A by the first gain increase / decrease unit 40. A predetermined value B is set. When a signal indicating that the predetermined value is larger from the deviation detector 30, that is, a signal indicating that the deviation is large, the first gain amplifying unit 40 increases or decreases the gain of the phase error signal PE. The second gain increase / decrease unit 41 sets the gain increase / decrease value of the phase error signal PE whose gain has been increased / decreased to the predetermined value B by the first gain increase / decrease unit 40 to the predetermined value B. It is assumed that A> B, and A and B are added to be 1.

  The first PLL low-pass filter 7 and the second PLL low-pass filter 7 described above are configured separately from a deviation detector 30 that detects a deviation and a phase comparator 31 that generates a phase error signal. This is a configuration example for obtaining a deviation per unit time of the angle data PI supplied from the polar coordinate conversion unit 6.

  Since the phase comparator 31 outputs the smooth angle data PF so as to follow the angle data PI supplied from the polar coordinate converter 6, the angle data PI and the smooth angle data PF directly compare the phases with a delay time. Will do. Therefore, the phase error signal generated by the phase comparator 31 is a deviation, and the gain increasing / decreasing unit 32 can be controlled by this deviation.

  Here, the configuration of the PLL low-pass filter 7 that does not have the deviation detector 30 (third PLL low-pass filter 7) will be described below. In addition, about the component which performs the same operation | movement as the 1st structural example and 2nd structural example which were mentioned above, the same code | symbol as a 1st structural example and a 2nd structural example is attached, and description is abbreviate | omitted.

  As shown in FIG. 15, the third PLL low-pass filter 7 compares the input signals and generates a phase error signal, and the phase error signal generated by the phase comparator 31 is an absolute value. An absolute value converter 50 that converts the gain of the phase error signal, a first gain increase / decrease unit 40 that increases or decreases the gain of the phase error signal according to the signal converted by the absolute value converter 50, and an absolute value converter 50 In accordance with the signal, a second gain increase / decrease unit 41 that increases / decreases the gain of the phase error signal whose gain has been increased / decreased by the first gain increase / decrease unit 40, an output signal of the second gain increase / decrease unit 41, and the sampling clock fs Based on the first integrator 42 for performing an integration operation, an addition processing unit 43 for adding the output signal of the first integrator 42 and the output signal of the first gain increase / decrease unit 40, and after the addition processing And the sampling clock fs Come, and a second integrator 44 which performs integration operations. Further, it is necessary to determine whether the phase error signal generated by the phase comparator 31 is delayed or advanced with respect to the reference phase, and it is assumed that it is handled with a signed or two's complement. In order to convert from 2's complement to an absolute value, if the 2's complement MSB is 0, it is left as it is. If the MSB is 1, all bits smaller than the MSB are inverted and 1 is added.

  The absolute value converter 50 converts the phase error signal PE supplied from the phase comparator 31 into an absolute value signal, compares the converted absolute value signal with a predetermined value, and generates a predetermined signal according to the comparison result. To do.

  The configurations of the first gain increasing / decreasing unit 40 and the second gain increasing / decreasing unit 41 are the same as those of the second PLL low-pass filter 7. Therefore, the first gain increasing / decreasing unit 40 and the second gain increasing / decreasing unit 41 simply replace the signal supplied from the deviation detector 30 with the signal supplied from the absolute value converter 50, and the subsequent operations are the same. 2 is the same as the PLL low pass filter 7.

  Further, only the deviation detector 30 in the first PLL low-pass filter 7 is replaced with the absolute value converter 50, and the subsequent operation is the same as that of the first PLL low-pass filter 7. Therefore, the gain increasing / decreasing unit 32 increases / decreases the gain of the phase error signal PE supplied from the phase comparator 31 according to the signal supplied from the replaced absolute value converter 50.

  The first integrator 42 performs an integration operation based on the signal supplied from the second gain increase / decrease unit 41 and the sampling clock fs supplied from the clock generator 12, and the signal after the integration operation is added to the adder 43. To supply.

  The adder 43 adds the signal supplied from the first integrator 42 and the signal supplied from the first gain increase / decrease unit 40, and supplies the signal after the addition process to the second integrator 44. To do.

  The second integrator 44 performs an integration operation based on the signal supplied from the adder 43 and the sampling clock fs supplied from the clock generator 12, and uses the signal after the integration operation as a smoothing angle data PF as a differentiation circuit. 10 is output. Further, the second integrator 44 supplies the smooth angle data PF to the phase comparator 31.

  The noise detection unit 8 includes noise in the angle data PI input to the PLL low-pass filter 7 based on the amplitude data LI supplied from the polar coordinate conversion unit 6 and the phase error data PE supplied from the PLL low-pass filter 7. It performs processing to detect whether or not.

  The filter control unit 9 controls the PLL low-pass filter 7 for initialization, suppression of external noise, cut-up at overload, cut-down at steady state, and gain interlocking processing.

  Smoothing angle data PF, which is smoothed angle data, is supplied from the PLL low-pass filter 7 to the differentiating circuit 10. Here, the operation of the differentiation circuit 10 will be described. The smoothed angle data PF supplied from the PLL low pass filter 7 is compared with the sampling clock fs, the comparison result is divided from the smoothed angle data PF, and the divided value is made an absolute value (hereinafter referred to as a differential signal). Further, a predetermined signal (hereinafter referred to as a polarity signal) is generated from the comparison result and the smooth angle data PF.

  Note that the amount of change in the smooth angle data PF may increase instantaneously when noise, quantization error, impact, vibration, or the like occurs. In such a case, the two-phase increase / decrease pulse that is finally output from this device must be counted for every one count. For example, the pulse is skipped by one count or more, and the order of the count values is broken. There is a possibility that. Therefore, a response control unit is provided in the preceding stage of the differentiating circuit 10, and the response control unit performs a restriction (slew rate restriction) to clip the change amount when the change amount of the smooth angle data PF exceeds a certain value. Also good.

  Similarly, the smooth angle data PF is similar to that when noise, quantization error, minute vibrations, etc. occur in spite of the fact that the machine tool that is originally the object of measurement of this apparatus is stationary, The smooth angle data PF may change even though the smooth angle data PF does not change. Therefore, a response control unit is provided in the preceding stage of the differentiating circuit 10, and when the smoothing angle data PF is only slightly changed by the response control unit, a dead zone (hysteresis) is provided to limit the amount of change to 0, and In other parts, it is possible to limit the change by this hysteresis.

  The integration circuit 11 generates continuous data based on the differentiation signal and the polarity signal supplied from the differentiation circuit 10. Further, for example, the starting point of the continuous data output from the integration circuit 11 is used as the origin, and the amount of movement relative to the machine tool is obtained from the distance from the origin to the position of the continuous data output after a predetermined time has elapsed. be able to. The origin signal may be recorded on the scale 2, a head for detecting the origin signal may be provided, and the relative movement amount with the machine tool may be obtained based on the origin signal supplied from the head. In addition, a reset signal generation unit that generates a reset signal may be provided, and the amount of movement relative to the machine tool may be obtained based on the reset signal supplied from the reset signal generation unit.

  The position detection device 1 configured as described above changes the gain of the phase error signal PE generated by the phase comparator 31 based on the deviation between the angle data PI supplied from the polar coordinate converter 6 and the smooth angle data PF. Therefore, a modulo number such as angle data obtained from the periodic signal can be handled, and when the deviation between the input value (angle data PI) and the output value (smooth angle data PF) becomes large, that is, the head portion. When 3 is moving at a high speed with respect to the scale 2, the effect of the LPF is removed by forcibly setting the gain value of the gain increasing / decreasing unit 32 to 1, so that the smooth angle data PF is output correctly. When the deviation between the input value (angle data PI) and the output value (smooth angle data PF) is small, that is, when the head unit 3 is moving at a low speed with respect to the scale 2. To perform an increase or decrease in predetermined gain to the phase error signal by the gain adjuster 32, so to exert the effect of the LFP, it is possible to output a stable smoothed angle data PF.

  Further, the position detection device 1 according to the present invention uses the same integrator (phase accumulator) 33 when the head unit 3 moves at a low speed with respect to the scale 2 and when it moves at a high speed, so that it is output. There is an advantage that no error occurs in the smooth angle data PF.

  Further, the position detection apparatus 1 according to the present invention increases or decreases the gain by a desired multiplier for the deviation between the input value (angle data PI) and the output value (smooth angle data PF), and determines the LPF cutoff frequency fc. Therefore, the cut-off frequency fc can be changed in accordance with the relative speed between the head unit 3 and the scale 2, and higher-order noise components can be controlled, which is stable at any speed. Output can be obtained.

  The position detection device 1 according to the present invention has a configuration suitable for a control system because the delay speed when the relative speed between the head unit 3 and the scale 2 is low and the delay speed when the relative speed is high change smoothly. It has become.

  Further, the position detection device 1 according to the present invention is an encoder that outputs modulo number data indicating an absolute position within one cycle of a position signal (for example, a rotary encoder that outputs an absolute value signal of one cycle at one point) It is widely used for a linear scale that outputs modulo number data indicating an absolute position within one cycle).

  Therefore, the position detection apparatus 1 may have a configuration other than the scale shown in FIG. 2. For example, as shown in FIG. 16, a rectangular pattern having a predetermined size is opened and the rectangular pattern is continuously formed. It may be a scale 2a. The head unit 60 that detects a periodic signal from the scale 2a moves relative to the longitudinal direction of the scale 2a (direction a in the drawing). Here, the configuration of the head unit 60 will be described.

  As shown in FIG. 17, the head unit 60 includes a light source unit 61 that emits light having a predetermined wavelength λ, a collimator lens 62 that converts the light into parallel light, a slit 63 having a gap of a predetermined width, and a scale 2a. A condenser lens 64 that collects the transmitted light and a light receiving unit 65 that receives the light. The size of the rectangular pattern formed on the scale 2a is the wavelength λ size of the light emitted from the light source unit 61.

  In this configuration, the scale 2a is fixed and the head unit 60 moves in the longitudinal direction on the scale 2a. However, the head unit 60 may be fixed and the scale 2a may be moved.

  The light source unit 61 generates light having a predetermined wavelength λ and emits the light to the collimator lens 62. The light source unit 61 may be capable of changing the wavelength of light generated according to the size of the rectangular pattern formed on the scale 2a.

  The collimator lens 62 converts the light emitted from the light source unit 61 into parallel light and emits it to the slit 63.

  The slit 63 has a gap of a predetermined width, converts the light emitted from the collimator lens 62 into light of a predetermined width, and emits the converted light of the predetermined width to the scale 2a.

  The light emitted to the scale 2a passes through the scale 2a irradiated with the light and enters the condenser lens 64.

  The condensing lens 64 condenses the light incident through the scale 2 a and emits the collected light to the light receiving unit 65.

  The light receiving unit 65 receives the light emitted from the condenser lens 64 and generates a predetermined signal. The signal generated by the light receiving unit 65 has a waveform corresponding to the rectangular pattern of the scale 2a. This signal waveform indicates the modulo number. The signal generated by the light receiving unit 65 is input to the PLL low pass filter 7.

  Therefore, by making the pattern formed on the scale a rectangular pattern, the head 3 can be miniaturized to one composed of one detection head.

  The scale 2a may be a pattern that can detect an absolute value within one period by the head 3 constituted by a single detection head. As shown in FIG. 18, a right triangle pattern having a predetermined size is used. The scale 2b in which the window is opened and the pattern is continuously formed may be used.

It is a block diagram which shows the structure of the position detection apparatus which concerns on this invention. It is a figure for demonstrating the scale of the 1st example with which the position detection apparatus which concerns on this invention is equipped, and the position signal and origin signal which were recorded on this scale. It is a figure for demonstrating the positional relationship with the scale and head part with which the position detection apparatus which concerns on this invention is equipped. (A) is a waveform diagram of a signal reproduced from the first position detection head of the head unit, and (B) is a waveform diagram of a signal reproduced from the second position detection head of the head unit. It is a figure for demonstrating the Lissajous waveform of the SIN signal and COS signal which are output from a head part. It is a block diagram which shows the structure of a normal LPF. It is a block diagram which shows the structure of a phase comparison type LPF. It is a block diagram which shows the 1st structure of the PLL low pass filter with which the position detection apparatus which concerns on this invention is equipped. It is a block diagram which shows the structure of the deviation detection part of the PLL low pass filter shown in FIG. (A) is a block diagram showing a first configuration of a gain increasing / decreasing unit of the PLL low-pass filter shown in FIG. 8, and (B) is a second configuration of a gain increasing / decreasing unit of the PLL low-pass filter shown in FIG. FIG. FIG. 11 is a waveform diagram of a frequency response when the gain increase / decrease unit has the configuration shown in FIG. It is a wave form diagram of a frequency response when a gain increase / decrease part is the structure shown in FIG.10 (B). It is a block diagram which shows the 2nd structure of the PLL low pass filter with which the position detection apparatus which concerns on this invention is equipped. (A) is a block diagram showing a first configuration of a gain increasing / decreasing unit of the PLL low-pass filter shown in FIG. 13, and (B) is a second configuration of a gain increasing / decreasing unit of the PLL low-pass filter shown in FIG. FIG. It is a block diagram which shows the 2nd structure of the PLL low pass filter with which the position detection apparatus which concerns on this invention is equipped. It is a figure for demonstrating the scale of the 2nd example with which the position detection apparatus which concerns on this invention is equipped. It is a block diagram which shows the structure of the head part which detects a signal from the scale shown in FIG. It is a figure for demonstrating the scale of the 3rd example with which the position detection apparatus which concerns on this invention is equipped. It is a wave form diagram of the data output from ADC. It is a wave form diagram of an output signal at the time of using the conventional LPF. It is a block diagram of a phase comparison type LPF. It is a figure which shows that the value which carried out the phase comparison exists in a finite area | region.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Position detection apparatus, 2 scale, 3 head part, 4th analog / digital conversion part, 5th 2nd analog / digital conversion part, 6 polar coordinate conversion part, 7 PLL low pass filter, 8 noise detection part, 10 differentiation circuit , 11 integration circuit, 12 clock generator

Claims (8)

A recording medium on which a position signal composed of a periodic signal is recorded; one or more detection heads that move relative to the recording medium along a recording direction of the position signal to detect the position signal; and the detection In a position detection device having an absolute value signal generation unit that generates an absolute value signal indicating an absolute position between the recording medium and the detection head within one cycle based on a position signal detected by the head,
A reference signal generating means for generating a reference signal;
Based on the reference signal generated by the reference signal generation means, an integration calculation means for performing an integration calculation on the input signal;
A phase comparison means for comparing the phase of the absolute value signal with the signal calculated by the integration calculation means, and generating a phase error signal according to the comparison result;
Deviation detection means for detecting a deviation of the absolute value signal based on the reference signal generated by the reference signal generation means and generating a predetermined signal;
Gain increasing / decreasing means for increasing / decreasing the gain of the phase error signal generated by the phase comparing means according to the signal generated by the deviation detecting means,
The deviation detecting means detects a deviation of the absolute value signal based on the reference signal generated by the reference signal generating means, and generates a deviation signal, and the deviation signal generating means generates the deviation signal. Subtraction processing means for subtracting the deviation signal and the absolute value signal and outputting the value after subtraction as an absolute value; comparison means for comparing the value subtracted by the subtraction processing means with a predetermined value; With
The gain increasing / decreasing means sets the gain of the phase error signal to a predetermined value equal to or less than 1 when a signal indicating that the predetermined value is smaller is supplied from the comparing means, and the predetermined value from the comparing means is When a large signal is supplied, the gain of the phase error signal is set to 1,
The position detecting device that integrates and calculates a signal whose gain has been increased or decreased by the gain increasing / decreasing means based on the reference signal generated by the reference signal generating means. The detection head moves relative to the recording medium along the recording direction of the position signal, detects the position signal, and the first detection head in the recording direction of the position signal. A second detection head that is provided at a predetermined distance from the first detection head and moves relative to the recording medium in conjunction with the first detection head, and detects the position signal.
The absolute value signal generation unit is a polar coordinate conversion unit that converts a position signal detected by the detection head into an angle signal that indicates a relative position between the recording medium and the detection head within one cycle. The position detection device according to claim 1. A recording medium on which a position signal composed of a periodic signal is recorded; one or more detection heads that move relative to the recording medium along a recording direction of the position signal to detect the position signal; and the detection In a position detection apparatus having an absolute value signal generation unit that generates an absolute value signal indicating an absolute position between the recording medium and the detection head within one cycle based on a position signal detected by the head,
A reference signal generating means for generating a reference signal;
First integration calculation means for performing integration calculation on the input signal based on the reference signal generated by the reference signal generation means;
Phase comparison means for comparing the phase of the absolute value signal with the signal integrated by the first integration calculation means, and generating a phase error signal according to the comparison result;
Deviation detection means for detecting a deviation of the absolute value signal based on the reference signal generated by the reference signal generation means and generating a predetermined signal;
First gain increasing / decreasing means for increasing / decreasing the gain of the phase error signal generated by the phase comparing means according to the signal generated by the deviation detecting means;
Second gain increase / decrease means for increasing / decreasing the gain of the phase error signal whose gain has been increased / decreased by the first gain increase / decrease means in accordance with the signal generated by the deviation detection means;
Based on the reference signal generated by the reference signal generation means, second integration calculation means for performing an integration calculation on the phase error signal whose gain has been increased or decreased by the second gain increase / decrease means;
An addition calculation means for adding and calculating a phase error signal whose gain has been increased or decreased by the first gain increase / decrease means and a signal obtained by integration calculation by the second integral calculation means;
The deviation detecting means detects a deviation of the absolute value signal based on the reference signal generated by the reference signal generating means, and generates a deviation signal, and the deviation signal generating means generates the deviation signal. A subtraction processing means for performing an absolute value subtraction process on the deviation signal and the absolute value signal; a comparison means for comparing the value subjected to the absolute value subtraction process by the subtraction processing means with a predetermined value;
The first gain increasing / decreasing means sets the gain of the phase error signal to a predetermined value equal to or less than 1 when the signal indicating that the predetermined value is smaller is supplied from the comparing means, and sets the predetermined value from the comparing means to the predetermined value. When a signal indicating that is greater is supplied, the gain of the phase error signal is set to 1,
When the signal indicating that the predetermined value is smaller is supplied from the comparison unit, the second gain increase / decrease unit sets the gain of the phase error signal whose gain is increased or decreased by the first gain increase / decrease unit to 1 When a signal indicating that the predetermined value is larger is supplied from the comparison means, the gain of the phase error signal whose gain has been increased or decreased by the first gain increase / decrease means is set to 0,
The position detection device, wherein the first integration calculation means integrates the signal added and calculated by the addition calculation means based on the reference signal generated by the reference signal generation means. The detection head moves relative to the recording medium along the recording direction of the position signal, detects the position signal, and the first detection head in the recording direction of the position signal. A second detection head that is provided at a predetermined distance from the first detection head and moves relative to the recording medium in conjunction with the first detection head, and detects the position signal.
The absolute value signal generation unit is a polar coordinate conversion unit that converts a position signal detected by the detection head into an angle signal that indicates a relative position between the recording medium and the detection head within one cycle. The position detection device according to claim 3 . A recording medium on which a position signal composed of a periodic signal is recorded; one or more detection heads that move relative to the recording medium along a recording direction of the position signal to detect the position signal; and the detection In a position detection apparatus having an absolute value signal generation unit that generates an absolute value signal indicating an absolute position between the recording medium and the detection head within one cycle based on a position signal detected by the head,
A reference signal generating means for generating a reference signal;
Based on the reference signal generated by the reference signal generation means, an integration calculation means for performing an integration calculation on the input signal;
A phase comparison means for comparing the phase of the absolute value signal with the signal calculated by the integration calculation means, and generating a phase error signal according to the comparison result;
An absolute value conversion means for converting the phase error signal generated by the phase comparison means into an absolute value signal and generating a predetermined signal from the converted signal;
Gain increasing / decreasing means for increasing / decreasing the gain of the phase error signal generated by the phase comparing means according to the signal supplied from the absolute value converting means,
The absolute value conversion means includes a conversion means for converting the phase error signal supplied from the phase comparison means into an absolute value signal, and a comparison means for comparing the absolute value signal converted by the conversion means with a predetermined value. And
The gain increasing / decreasing means sets the gain of the phase error signal to a predetermined value equal to or less than 1 when a signal indicating that the predetermined value is smaller is supplied from the comparing means, and the predetermined value is supplied from the comparing means. When a large signal is supplied, the gain of the phase error signal is set to 1,
The position detecting device that integrates and calculates a signal whose gain has been increased or decreased by the gain increasing / decreasing means based on the reference signal generated by the reference signal generating means. The detection head moves relative to the recording medium along the recording direction of the position signal, detects the position signal, and the first detection head in the recording direction of the position signal. A second detection head that is provided at a predetermined distance from the first detection head and moves relative to the recording medium in conjunction with the first detection head, and detects the position signal.
The absolute value signal generation unit is a polar coordinate conversion unit that converts a position signal detected by the detection head into an angle signal that indicates a relative position between the recording medium and the detection head within one cycle. The position detection device according to claim 5 . A recording medium on which a position signal composed of a periodic signal is recorded; one or more detection heads that move relative to the recording medium along a recording direction of the position signal to detect the position signal; and the detection In a position detection apparatus having an absolute value signal generation unit that generates an absolute value signal indicating an absolute position between the recording medium and the detection head within one cycle based on a position signal detected by the head,
A reference signal generating means for generating a reference signal;
First integration calculation means for performing integration calculation on the input signal based on the reference signal generated by the reference signal generation means;
Phase comparison means for comparing the phase of the absolute value signal with the signal integrated by the first integration calculation means, and generating a phase error signal according to the comparison result;
An absolute value conversion means for converting the phase error signal generated by the phase comparison means into an absolute value signal and generating a predetermined signal from the converted signal;
First gain increasing / decreasing means for increasing / decreasing the gain of the phase error signal generated by the phase comparing means according to the signal supplied from the absolute value converting means;
Second gain increase / decrease means for increasing / decreasing the gain of the phase error signal whose gain has been increased / decreased by the first gain increase / decrease means in accordance with the signal generated by the absolute value conversion means;
Based on the reference signal generated by the reference signal generation means, second integration calculation means for performing an integration calculation on the phase error signal whose gain has been increased or decreased by the second gain increase / decrease means;
An addition calculation means for adding and calculating a phase error signal whose gain has been increased or decreased by the first gain increase / decrease means and a signal obtained by integration calculation by the second integral calculation means;
The absolute value conversion means includes a conversion means for converting the phase error signal supplied from the phase comparison means into an absolute value signal, and a comparison means for comparing the absolute value signal converted by the conversion means with a predetermined value. And
The first gain increasing / decreasing means sets the gain of the phase error signal to a predetermined value equal to or less than 1 when the signal indicating that the predetermined value is smaller is supplied from the comparing means, and sets the predetermined value from the comparing means to the predetermined value. When a signal indicating that is greater is supplied, the gain of the phase error signal is set to 1,
When the signal indicating that the predetermined value is smaller is supplied from the comparison unit, the second gain increase / decrease unit sets the gain of the phase error signal whose gain is increased or decreased by the first gain increase / decrease unit to 1 When a signal indicating that the predetermined value is larger is supplied from the comparison means, the gain of the phase error signal whose gain has been increased or decreased by the first gain increase / decrease means is set to 0,
The position detection device, wherein the first integration calculation means integrates the signal added and calculated by the addition calculation means based on the reference signal generated by the reference signal generation means. The detection head moves relative to the recording medium along the recording direction of the position signal, detects the position signal, and the first detection head in the recording direction of the position signal. A second detection head that is provided at a predetermined distance from the first detection head and moves relative to the recording medium in conjunction with the first detection head, and detects the position signal.
The absolute value signal generation unit is a polar coordinate conversion unit that converts a position signal detected by the detection head into an angle signal that indicates a relative position between the recording medium and the detection head within one cycle. The position detection device according to claim 7 .

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