JP4475199B2 - Fault detection circuit - Google Patents

Description

The present invention relates to a failure detection circuit that detects a failure of a diode that is difficult to immediately detect the occurrence of a failure .

  In a load driving system that switches voltage inputs from a plurality of external power sources as necessary and supplies a voltage from a selected external power source to a load, for example, a diode OR circuit having a plurality of ORed diodes. A connection circuit (a so-called OR connection circuit) is used as a power supply switching circuit. This diode OR circuit is configured to output a DC input voltage from a power source that inputs a relatively high voltage among a plurality of power sources to a load by using a rectifying function of the diode. Here, examples of the external power source include a DC-DC converter, a fuel cell, and a battery.

  By the way, Patent Documents 1 to 3 propose measures for detecting a failure of an element or circuit in which the occurrence of a failure immediately becomes apparent, such as a light emitting diode, a switching element, or an integrated circuit.

JP 2000-150963 A Japanese Patent Laid-Open No. 9-80120 Japanese Patent Laid-Open No. 11-127065

  When an external power supply is connected to the load drive system having the diode OR connection circuit, a voltage exceeding the rated voltage may be input to the diode in the diode OR connection circuit due to chattering or static electricity. When such an excessive voltage is input to the diode, the diode is destroyed, and as a result, the rectification function is lost and a short circuit may occur. However, even if the diode fails in the short-circuit mode, the load drive system itself is not likely to immediately become inoperable, and it is often not noticed that the diode has failed for a while. That is, unlike the light emitting diode and the switching element, the diode can be said to be an element in which it is difficult to immediately know the occurrence of a failure.

  When the diode is short-circuited, current flows from the external power source to the load drive system via the short-circuited diode, but at this time, the load drive system is not immediately disturbed. However, when the external power source is a backup battery, if this state is left for a while, overdischarge occurs, and as a result, there is a possibility that it cannot be used in an emergency.

  In spite of such problems, conventionally, for example, as disclosed in Patent Documents 1 to 3, elements such as light emitting diodes, switching elements, integrated circuits, etc., where the occurrence of a failure is immediately apparent A measure for detecting a fault in a circuit has been proposed, and a measure for detecting a fault in a diode that is difficult to immediately detect the occurrence of the fault as described above has not been proposed.

The present invention has been made in view of such a problem, and an object of the present invention is to provide a failure detection circuit capable of detecting a failure of a diode that is difficult to immediately detect the occurrence of the failure .

The load driving system according to the reference example includes a load circuit, a plurality of external power supply connection terminals to which an external power supply is connected, and a parallel connection to each other, and each end is commonly connected to the load circuit and a plurality of other ends. A plurality of diodes connected to each of the external power supply connection terminals, and a failure detection circuit for detecting a failure of the plurality of diodes.

The first and second failure detection circuits of the present invention include a load circuit, a plurality of external power supply connection terminals to which an external power supply is connected, and arranged in parallel to each other, and each one end is commonly connected to the load circuit. This is a circuit applied to a load driving system including a plurality of diodes having the other end connected to each of a plurality of external power supply connection terminals.
The first failure detection circuit detects and amplifies the potential difference between both ends of the diode, adds the reference voltage to the amplified voltage and outputs the amplified voltage, and the voltage output from the amplification circuit includes the reference voltage. And a comparison circuit for outputting a failure occurrence signal when the value is within the range of.
The second failure detection circuit detects and amplifies the potential difference between both ends of the diode, adds the reference voltage to the amplified voltage and outputs the amplified voltage, and the voltage output from the amplification circuit includes the reference voltage. And a delay circuit that outputs a failure occurrence signal when a period during which the detection signal is output from the comparison circuit exceeds a predetermined period. Yes.

In the load drive system according to the reference example, a failure detection circuit detects a failure of a plurality of diodes. For example, a potential difference between both ends of the diode is detected, and a failure is detected based on the detection result.

In the failure detection circuit according to the reference example, a potential difference between both ends of the diode is detected, and a failure is detected based on the detection result. For example, when the absolute value of the potential difference (hereinafter referred to as “detection voltage”) across the diode detected by the failure detection circuit is smaller than a set value (positive integer), a signal indicating a failure in the short-circuit mode of the diode (Failure occurrence signal) is output. Here, the “set value” is larger than the absolute value of the potential difference between both ends (hereinafter referred to as “short-circuit voltage”) when the diode is destroyed and short-circuited due to application of a voltage exceeding the maximum rating, etc. This is a value smaller than the absolute value of the potential difference between both ends when the diode is normal (hereinafter referred to as “normal voltage”). Thus, when the diode is short-circuited, a failure occurrence signal is output from the failure detection circuit, and no detection signal is output when the diode is normal.

In the first and second failure detection circuits of the present invention, the “predetermined range” is, for example, a value obtained by adding a value obtained by multiplying a set value by a magnification equal to the amplification factor of the detection voltage to the reference voltage. A value obtained by subtracting a value obtained by multiplying the set value by a magnification of the same rate as the amplification factor of the detection voltage is used as the lower limit value. As a result, even when the detected voltage or the set value is very small, the magnitude relationship between the detected voltage and the set value can be accurately determined.

In the second failure detection circuit of the present invention, the “predetermined period” is longer than a period in which the absolute value of the detection voltage is smaller than a set value due to a cause other than a short circuit of the diode , for example, and the diode is short-circuited. and a period shorter than the period in which the absolute value is smaller than the set value of the detection voltage when being. Thus, the failure occurrence signal is not output when the diode is not actually short-circuited, and the failure occurrence signal is output only when the diode is actually short-circuited.

According to the load drive system according to the reference example , the failure detection circuit detects the failure of the plurality of diodes, so that it is possible to detect the failure of the diode that is difficult to immediately know the occurrence of the failure.

According to the first and second failure detection circuits of the present invention, since the potential difference between both ends of the diode is detected and the failure is detected based on the detection result, it is difficult to immediately know the occurrence of the failure. It becomes possible to detect a failure of the diode.

In the first failure detection circuit of the present invention, when the absolute value of the detection voltage is smaller than the set value, a failure occurrence signal is output. Therefore , in the short-circuit mode of the diode where it is difficult to immediately know the occurrence of the failure. Can be detected.

In the second failure detection circuit of the present invention is smaller than the absolute value of the set value of the detection voltage, and when the small period exceeds a predetermined period of time, since the output a failure signal, the load driving The failure occurrence signal is not output due to causes other than the short circuit of the diode such as noise in the system, and the failure occurrence signal is output only when the diode is actually short-circuited. This makes it possible to accurately detect a failure in the short-circuit mode of the diode that is difficult to immediately detect the occurrence of the failure.

  Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 1 shows a schematic configuration of a load drive system 1 according to an embodiment of the present invention. In the load driving system 1, a high-voltage power source (first power source P1, second power source P2, and third power source P3) is connected to the input side, and a load (fourth power source P4) is connected to the output side. The output of the fourth power supply P4 is connected to the motor M. Here, the first power supply P1 and the second power supply P2 are, for example, DC-DC converters, the third power supply P3 is, for example, a backup high-voltage battery, and the fourth power supply P4 is, for example, a load driving low-voltage battery. It is a voltage power supply. The first power supply P1, the second power supply P2, and the third power supply P3 correspond to a specific example of “external power supply” of the present invention.

  The load driving system 1 switches high-voltage DC input voltages supplied from a plurality of high-voltage power supplies (first power supply P1, second power supply P2, and third power supply P3) as necessary, and supplies them from the selected high-voltage power supply. It functions as a step-down DC-DC converter that converts a high-voltage direct-current input voltage into a lower direct-current output voltage and supplies it to a load (fourth power supply P4).

  The load drive system 1 includes a diode logical sum connection circuit 10, a power supply main body 20 (load circuit), and a failure detection circuit 30.

  The diode OR connection circuit 10 is arranged in parallel with each other, and one end of each is connected in common to the power supply main body 20, and the other end is connected to each of the input terminals T1, T2, T3 (external power supply connection terminals). Diodes 11, 12, and 13 are provided. The anodes of these diodes 11, 12, and 13 are connected to the input terminals T1, T2, and T3, respectively. The input terminals T1, T2, and T3 are respectively connected to the first power supply P1, the second power supply P2, and the third power supply P3. Connected to each. Further, the diode OR connection circuit 10 includes a diode 14 connected in parallel with the diode 13. The anode of the diode 14 is connected to the power supply main body 20 side. That is, the diode 13 and the diode 14 are connected such that the forward directions are opposite to each other.

  Thus, the diode OR circuit 10 inputs a relatively high voltage among the first power supply P1, the second power supply P2, and the third power supply P3 using the rectification function of the diodes 11, 12, and 13. The circuit functions as a circuit that outputs a DC input voltage from the power supply to the power supply main unit 20. Further, by using the rectification function of the diodes 11, 12, and 14, a relatively high voltage among the voltages input from the first power supply P1 and the second power supply P2 is larger than the voltage input from the third power supply P3. At this time, a power source that inputs a relatively high voltage among the first power source P1 and the second power source P2 functions as a circuit that charges the third power source P3.

  The power supply body 20 is a switching power supply device configured by connecting, for example, an inverter circuit, a voltage conversion transformer, a rectifier circuit, and a smoothing circuit (all not shown) in this order, and is selected by the diode OR connection circuit 10 The DC voltage input from the power source (hereinafter referred to as “selected power source”) is switched and converted into an AC voltage, and the DC output voltage obtained by transforming and rectifying the AC voltage is supplied to the fourth power source P4. It is designed to supply power.

  The failure detection circuit 30 is configured by connecting a differential amplifier circuit 31, a comparison circuit 32, and a delay circuit 33 in this order. The failure detection circuit 30 is connected to the diode 11, the diode 12, and the diodes 13 and 14. One by one.

  The differential amplifier circuit 31 includes a voltage divider D including a resistor R1 and a resistor R2, a differential amplifier AP1 having an amplification factor α1 (= 1 + 2R4 / R3), and a differential amplifier AP2 having an amplification factor α2 (= R5 / F6). Are connected in this order. The input of the differential amplifier circuit 31 is connected to both ends of one of the diodes 11, 12, 13, and 14. The differential amplifier circuit 31 divides the respective voltages at both ends of the diode by the voltage divider D, and generates a potential difference between the divided voltages (equal to the potential difference V1 (detection voltage) at both ends of the diode) as a differential amplifier AP1. Is amplified to a potential difference V2 (= V1 × α1), the amplified potential difference V2 is amplified to a voltage V3 (= V1 × α1 × α2) by a differential amplifier AP2, and an offset is added to the amplified voltage V3 by a reference voltage Vref. In addition, an output voltage 31A (= V1 × α1 × α2 + Vref) is output.

  Here, the value of the potential difference V1 is based on the cathode side of the diodes 11, 12, and 13, so that when the forward voltage is applied to the diodes 11, 12, and 13, it becomes a positive integer. When a reverse voltage is applied to 13, a negative integer is obtained. Since the diode 14 is connected in the opposite direction to the diode 13, the anode side of the diode 14 serves as a reference for the potential difference V1. For this reason, the value of the potential difference V1 is a negative integer when a forward voltage is applied to the diode 14, and is a positive integer when a reverse voltage is applied to the diode 14.

  The comparison circuit 32 includes two comparators CMP1 and CMP2. The input of the comparison circuit 32 is connected to the output of the differential amplifier circuit 31. The comparison circuit 32 is a so-called window comparator. When the output voltage 31A of the differential amplifier circuit 31 is a value within a predetermined range, specifically, the threshold value set in the circuit including the comparator CMP1 is set. When the value is not more than the upper limit Vmax and not less than the lower limit Vmin of the threshold value set in the circuit including the comparator CMP2, the detection signal 32A having a predetermined level is output.

  That is, the comparison circuit 32 outputs the detection signal 32A when the output voltage 31A of the differential amplifier circuit 31 is within a predetermined range (in the abnormal region A), as shown in FIGS. 3 (A) and 3 (B). However, the detection signal 32A is not output when it is outside the predetermined range (within the normal region B).

  Here, the upper limit Vmax of the threshold value is a value obtained by multiplying the reference voltage Vref by the amplification factors α1 and α2 and the set value e (= Vref + e × α1 × α2), and the lower limit Vmin of the threshold value. Is a value (= Vref−e × α1 × α2) obtained by subtracting the amplification factor α1 and α2 multiplied by the set value e from the reference voltage Vref. Here, the set value e is greater than zero volts and smaller than the reverse voltage when the diode is normal.

  When a reverse voltage is applied to the diodes 11, 12, 13, and 14, when the output voltage 31 </ b> A of the differential amplifier circuit 31 is equal to or higher than Vmax, the diode is normal and the detection signal 32 </ b> A is not output. When the output voltage 31A of the differential amplifier circuit 31 is smaller than Vmax, the diode is determined to be abnormal, and the detection signal 32A is output. When a forward voltage is applied to the diodes 11, 12, 13, and 14, and the output voltage 31A of the differential amplifier circuit 31 is a value equal to or lower than Vmin, the diode is normal and the detection signal 32A is output. If the output voltage 31A of the differential amplifier circuit 31 is greater than Vmin, the diode is determined to be abnormal and the detection signal 32A is output.

  Since the diodes 13 and 14 are connected in parallel so that the forward voltages are opposite to each other, it is not necessary to consider whether or not the forward voltage is applied to the diodes 13 and 14.

  The delay circuit 33 includes a switching element that turns on and off the detection signal 32A, an integration circuit connected to the output thereof, and a switching circuit that shapes the output of the integration circuit. Here, the integration circuit includes, for example, a resistor and a capacitor. The input of the delay circuit 33 is connected to the output of the comparison circuit 32. As shown in FIGS. 4A and 4B, the delay circuit 33 generates a failure occurrence signal when the period t1 during which the detection signal 32A is continuously output is equal to or shorter than the mask period tm (predetermined period). 33A is not output. On the other hand, as shown in FIGS. 5A and 5B, when the period t2 during which the detection signal 32A is continuously output exceeds the mask period tm, the failure occurrence signal 33A is output. .

  Here, the mask period tm is from a period in which the detection signal 32A is erroneously output due to a cause other than a short circuit of the diodes 11, 12, 13, 14 such as noise in the diode OR connection circuit 10 or the failure detection circuit 30. Longer than the period in which the detection signal 32A is continuously output when the diodes 11, 12, 13, and 14 are short-circuited. Thus, the delay circuit 33 does not output the failure occurrence signal 33A when the diodes 11, 12, 13, and 14 are not actually short-circuited, and the diodes 11, 12, 13, and 14 are actually short-circuited. The failure occurrence signal 33A is output only when the error occurs.

  In addition, the output of each failure detection circuit 30 (the output of the delay circuit 33) of this embodiment is connected to the input of the arithmetic processing circuit 40, and the output of the arithmetic processing circuit 40 is connected to the input of the alarm device 50. Here, the arithmetic processing circuit 40 includes, for example, a microprocessor and a logic circuit. When the failure occurrence signal 33A is input, the arithmetic processing circuit 40 outputs an alarm signal 40A for outputting an alarm to the alarm device 50. When the alarm device 40 receives the alarm signal 40A from the arithmetic processing circuit 40, for example, at least one of the diodes 11, 12, 13, and 14 lights a lamp indicating that the short-circuit mode has failed. .

  Next, the operation of the drive system configured as described above will be described.

  The diode OR connection circuit 10 uses the rectifying function of the diodes 11, 12, and 13 to select a power supply (selection) that inputs a relatively high voltage among the first power supply P1, the second power supply P2, and the third power supply P3. DC input voltage Vin from the power source) is output to the power source main body 20. At this time, by using the rectification function of the diodes 11, 12, and 14, a relatively higher voltage among the voltages input from the first power supply P1 and the second power supply P2 is higher than the voltage input from the third power supply P3. When it is large, the power source that inputs a relatively high voltage among the first power source P1 and the second power source P2 charges the third power source P3 only during that time.

  The power source main body 20 switches the DC input voltage input from the selected power source to convert it into an AC voltage, and supplies a DC output voltage obtained by transforming and rectifying the AC voltage to the fourth power source P4.

  The differential amplifier circuit 31 amplifies the potential difference V1 between both ends of the diode and continues to output a voltage 31A obtained by adding an offset by the reference voltage Vref to the amplified voltage. The comparison circuit 32 determines whether or not the output voltage 31A is within a predetermined range (in the abnormal region A). As a result of the determination, when the output voltage 31A is outside the predetermined range (in the normal region B), the detection signal 32A is not output, and conversely, the output voltage 31A is in the predetermined range (in the abnormal region A). In the case, the detection signal 32A is output.

  The delay circuit 33 determines whether or not the period during which the detection signal 32A is continuously output exceeds the mask period tm. As a result of the determination, when the period during which the detection signal 32A is continuously output is within the mask period tm, the failure occurrence signal 33A is not output, and conversely, the period during which the detection signal 32A is continuously output is masked. When the period tm is exceeded, the failure occurrence signal 33A is output.

  As a result, the detection signal 32A is erroneously output due to a cause other than a short circuit of the diode, such as noise in the diode OR connection circuit 10 or the failure detection circuit 30, and the diode is generated based on the erroneously output detection signal 32A. It is possible to prevent the output of a signal (corresponding to the lighting of the lamp in this embodiment) indicating that at least one of 11, 12, 13, and 14 has failed in the short-circuit mode to the outside. , 13, and 14 can output such a signal to the outside only when at least one of them is actually short-circuited.

  Therefore, according to the failure detection circuit 30 of the present embodiment, the failure in the short-circuit mode of the diodes 11, 12, 13, and 14 in the diode OR connection circuit 10 can be accurately detected.

  Although the present invention has been described with reference to the embodiment, the present invention is not limited to this embodiment, and various modifications can be made.

  For example, in the above embodiment, the delay circuit 33 is provided, but the detection signal 32A is erroneously output due to a cause other than a short circuit of the diode, such as noise in the diode OR connection circuit 10 or the failure detection circuit 30. If there is substantially no delay, the delay circuit 33 may be omitted. However, in this case, it is necessary to input the detection signal 32A to the arithmetic processing circuit 40 as the failure occurrence signal 33A.

  In the above-described embodiment, the case where four diodes are included in the diode OR connection circuit 10 has been described. However, the present invention is not limited to this, and the diode OR connection circuit 10 includes It is sufficient that at least two diodes are included. Also, different diodes in the forward direction may or may not be included in the diode OR circuit 10 as in the present embodiment.

  In addition, the present invention is not limited to the configurations of the power supply main body 20, the differential amplifier circuit 31, the comparison circuit 32, and the delay circuit 33 described in the above embodiment, and other configurations having similar functions are possible. You may have.

  Further, according to the present invention, the output voltage of the power source connected to the output side of the load drive system 1 does not need to be lower than that of the power source connected to the input side of the power source system 1, Good. However, in this case, the power source body 20 needs to be a boost type.

It is a functional block diagram of the drive system which concerns on one embodiment of this invention. It is a circuit diagram showing the structure of the failure detection circuit of FIG. It is a wave form diagram for demonstrating operation | movement of a failure detection circuit. It is another waveform diagram for demonstrating operation | movement of a failure detection circuit. It is another waveform diagram for demonstrating operation | movement of a failure detection circuit.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Power supply system, 10 ... Diode OR connection circuit, 11, 12, 13, 14 ... Diode, 20 ... Power supply main-body part, 30 ... Fault detection circuit, 31 ... Differential amplifier circuit, 31A ... Output voltage, 32 ... Comparison Circuit 32A ... Detection signal 33 ... Delay circuit 33A ... Fault occurrence signal 40 ... Arithmetic processing circuit 40 ... Alarm device 40A ... Alarm signal P1 ... First power source P2 ... Second power source P3 ... Third Power supply, P4 ... Fourth power supply, T1, T2, T3 ... Input terminal, T4, T5, T6, T7 ... Output terminal, A ... Abnormal area, B ... Normal area, e ... Set value, M ... Motor, tm ... Mask Period, V1 ... potential difference across the diode, Vref ... reference voltage, Vmax ... upper limit voltage, Vmin ... lower limit voltage.

Claims (2)

A load circuit, a plurality of external power supply connection terminals to which an external power supply is connected, and one end connected in common to the load circuit and the other end connected to each of the plurality of external power supply connection terminals. A circuit applied to a load driving system comprising a plurality of connected diodes,
An amplification circuit that detects and amplifies the potential difference between both ends of the diode, adds a reference voltage to the amplified voltage, and outputs the amplified voltage;
A comparator that outputs a failure occurrence signal when the voltage output from the amplifier circuit is within a predetermined range including the reference voltage;
Have
A failure detection circuit characterized by that. A load circuit, a plurality of external power supply connection terminals to which an external power supply is connected, and one end connected in common to the load circuit and each other end connected to each of the plurality of external power supply connection terminals. A circuit applied to a load driving system comprising a plurality of connected diodes,
An amplification circuit that detects and amplifies the potential difference between both ends of the diode, adds a reference voltage to the amplified voltage, and outputs the amplified voltage;
A comparison circuit that outputs a predetermined detection signal when the voltage output from the amplifier circuit is within a predetermined range including the reference voltage;
A delay circuit that outputs a failure occurrence signal when a period during which the detection signal is output from the comparison circuit exceeds a predetermined period;
Have
A failure detection circuit characterized by that.

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