JP4477486B2 - TDMA communication device - Google Patents

Description

  The present invention relates to a TDMA communication apparatus that performs TDMA communication, and more particularly to slot synchronization and frame synchronization in a TDMA communication apparatus.

  In TDMA communication, a frame in which a predetermined number of slots are allocated in a time-sharing manner is repeated, and communication is performed by setting in advance slots (transmission slots) in which all stations performing communication respectively transmit. For this reason, all stations that perform TDMA communication must communicate in synchronization with a predetermined reference timing, and require slot synchronization that synchronizes slot timing and frame synchronization that matches slot numbers between stations. . Various methods of slot synchronization and frame synchronization have been disclosed so far, including Non-Patent Document 1.

(Conventional slot synchronization)
8A and 8B are conceptual diagrams showing a conventional slot synchronization method. FIG. 8A shows a case where a predetermined reference timing signal exists, and FIG. 8B shows a case where a unique word UW of slot data of the reference station is used as the reference timing. .

  As shown in FIG. 8 (a), when a reference timing signal such as a GPS 1PPS signal is present in conventional TDMA communication, the local station receives the reference timing signal and receives a local slot of the local station. The timing was updated.

  Further, as shown in FIG. 8B, when the unique word UW included in the received packet from the reference station is used, the partial slot length from the unique word UW to the slot end, that is, immediately after receiving the unique word UW. Since the time until the slot timing of the reference station is known in advance, the local slot timing of the own station is updated using this value.

(Conventional frame synchronization)
FIG. 9 is a conceptual diagram showing a conventional frame synchronization method.
In FIG. 9, the top row shows the time-series frame (slot) configuration of the reference station 101, and the second row shows the time-series frame (slot) configuration of the reference station 102. The third row shows the time-series frame (slot) configuration of the own station, and the fourth row shows the transmission timing.
FIG. 9 shows frame synchronization of the local station 100 when the reference station is switched from the reference station 101 to the reference station 102.

In a conventional TDMA communication apparatus, when the reference station 101 is a reference station, the local station 100 performs frame synchronization with the reference station 101. That is, the slot number of the own station 100 is matched with the slot number of the reference station 101. However, when the received packet from the reference station 101 is interrupted and the reference station is switched to the reference station 102, the local station 100 performs frame synchronization with the reference station 102 when the received packet from the reference station 102 is acquired. As a result, the slot number of the local station 100 matches the slot number of the reference station 102.
Edited by Naoshi Iida, "Wave Summit Lecture Satellite Communications", 1st edition, Ohmsha, February 1997, p. 266-283

  However, the following problems to be solved exist in slot synchronization and frame synchronization of the conventional TDMA communication apparatus.

(Slot synchronization problems)
In the slot synchronization method as shown in FIG. 8 (a), since it synchronizes with a predetermined reference slot timing received from the outside regardless of the slot timing (local slot timing) of its own station, as shown in FIG. 8 (a). There is a possibility that a very small slot having an extremely short slot length may occur. However, some types of programs are premised on the end in the slot, and in some cases, the program may not end and a bug may occur. Moreover, the number of slots changes due to an increase in the minimum number of slots, resulting in inconvenience in slot management.

  Further, in the slot synchronization method as shown in FIG. 8B, slot synchronization is performed by using the unique word UW of the received packet from the reference station, but a TDMA communication network such as UAIS (Universal Automatic Identification System). In a system in which any of the stations can be a reference station, there is no unique word UW that only the reference station has. In this case, even if an attempt is made to substitute the start flag, slot synchronization cannot be performed only for a specific reference station because the start flag does not include data for identifying the reference station.

(Problems with frame synchronization)
In the frame synchronization method as shown in FIG. 9, if the reference station 101 and the reference station 102 are not frame-synchronized, the last slot number received from the reference station 101 and the first slot number received from the reference station 102 are discontinuous. .

  On the other hand, the local station 100 is set in advance to perform transmission using a predetermined slot number. Since the local station 100 was originally synchronized with the reference station 101 in frame, if the transmission was performed using the slot numbers 2 and 5 of the local station, this is the same as the transmission performed using the slot numbers 2 and 5 of the reference station 101. This is recognized by each station that performs communication. However, when frame synchronization is performed as described above, slot numbers 2 and 5 of the own station 100 correspond to slot numbers 2 and 5 of the reference station 102 from the time when the reference station switches to the reference station 102. If this corresponds to the reference station 101, it corresponds to slot numbers 0 and 3. For this reason, the preset transmission slot number of the local station 100 changes, and communication between all stations performing TDMA communication is not performed according to the standard.

  In accordance with the above problems, an object of the present invention is to provide a TDMA communication apparatus capable of accurately and reliably performing slot synchronization and frame synchronization.

  The present invention provides a TDMA communication apparatus in which a plurality of slots are allocated to one frame in a time-sharing manner, and each station that performs communication performs data transmission in a slot reserved by performing slot synchronization and frame synchronization, respectively. Local slot timing generating means for generating timing, slot data analyzing means for detecting a global slot number common to each station that communicates from received slot data and transmission slot numbers of other stations that communicate, and local slot timing A global slot counter that counts the slot number in synchronization with the global slot number detected by the slot data analysis means, a local slot counter that continuously counts the slot number based on the local slot timing, Storage means for storing the transmission slot number of all stations that perform communication including the transmission slot number of the local station based on the slot number counted by the cull slot counter and the difference value of the global slot number with respect to the slot number counted by the local slot counter; And a control means for performing transmission control according to the slot number counted by the local slot counter using the transmission slot number and the difference value stored by the storage means.

  Here, in the TDMA communication apparatus of the present invention, the control means uses the transmission slot number of the own station based on the global slot number or the number of slots to be skipped from the current transmission slot number to the next transmission slot number as transmission data. It is characterized by including.

  In this configuration, a global slot counter that counts slot numbers in synchronization with a global slot number that is a reference in the communication network, and a local slot counter that continuously counts slot numbers only within the local station regardless of the communication network, Thus, even when the reference station is changed, transmission / reception to / from other stations that perform communication is managed by a slot number (hereinafter referred to as “local slot number”) counted by the local slot timing counter. As the transmission slot number information of the local station to be transmitted to, the global slot number or the number of slots to be skipped from the current slot to the next reserved slot is used. Specifically, when it is necessary to transmit the transmission slot number based on the global slot number as in the SOTDMA system in which the next slot is reserved beyond the frame, the continuously changing local stored in the storage means The transmission control depends on the transmission slot number based on the local slot number from the transmission slot number of all stations including the transmission slot number of the local station set by the slot number and the difference value between the global slot number and the local slot number. Done. Also, the transmission slot number of the own station to be transmitted to another station is transmitted with the global slot number from the transmission slot number stored as the local slot number and the difference value. That is, it does not change depending on the communication environment at that time, the setting of the reference station, etc., but the transmission slot number of its own station to be notified to other stations is based on the common global slot number that changes depending on the communication environment at that time, the setting of the reference station, etc. . On the other hand, when it is not necessary to use a global slot number for reservation of the next slot as in the ITDMA system that reserves a slot in the same frame, the number of slots to be skipped set by the local slot number is included in the packet data to be transmitted. Used.

  The TDMA communication apparatus according to the present invention further includes reference timing acquisition means for acquiring a reference timing at which all stations performing communication are synchronized, and the control means uses a front side in the slot in which the acquired reference timing starts from the immediately preceding local slot timing. If it is within a predetermined period, the local slot timing is synchronized with the current reference timing, but the count of the local slot counter is stopped.

  In this configuration, immediately after the local slot timing is detected, if the reference timing is detected within a predetermined time (predetermined numerical value of a preset slot length), slot synchronization at this time is performed. The number is not updated. That is, it is not detected as a boundary between local slots and is not recognized as a new slot. For this reason, a short slot up to the synchronization timing (reference timing) and a slot corresponding to one slot length after synchronization become one continuous slot, and a slot length longer than one slot is secured. Further, when synchronizing with the reference timing outside the predetermined period in the slot thus set, the slot length corresponding to the specified period is secured as a minimum. At this time, the reference value for this determination, that is, the length of the designated range (period) is set from the execution time of the program to be used.

  The slot data analyzing means of the TDMA communication apparatus according to the present invention detects the identification data unique to the reference station, counts from the global slot timing at which the slot starts to the timing at which the identification data ends, and the immediately preceding local slot timing. The slot delay amount is detected by subtracting from the count value until the end of the identification data until the end of the identification data, and based on the slot delay amount by the control means, a single slot starting from the local slot timing after the predetermined slot from which the slot delay amount is obtained The slot length is adjusted or the slot lengths of a plurality of slots are adjusted to perform slot synchronization.

  In this configuration, an ID number and a start flag included in the slot data are used as identification data unique to the reference station. Then, when the station completely receives the slot data in which these are detected, the slot delay is determined from the immediately preceding local slot timing and reference timing, and the time from the head (reference timing) of this slot data to the start flag. Calculate the amount. Since this slot delay amount corresponds to the difference between the slot timing of the local station (local slot timing) and the slot timing of the reference station, the slot delay amount and the normal one slot length are added from the time of the next local slot timing. Count the time to generate local slot timing for update. Here, if the slot delay amount is divided and added to a plurality of slots, there is little change in the slot length in each slot, and the timing of slot synchronization is gradually obtained using the plurality of slots. By updating the slot length in this way, the local slot timing matches the reference timing, and slot synchronization is performed.

  According to the present invention, even when there is a reference signal such as 1PPS, even when a specific reference station is not continuously present, slot synchronization and reliability can be performed accurately and reliably without causing confusion in the communication network. A TDMA communication apparatus capable of frame synchronization can be configured.

The TDMA communication apparatus of the present invention will be described with reference to FIGS.
FIG. 1 is a diagram showing a schematic configuration of transmission / reception packet data processed by the TDMA communication apparatus of this embodiment. In the present embodiment, transmission / reception packet data used in AIS will be described as an example.
As shown in FIG. 1, transmission / reception packet data to be processed by the communication apparatus of the present embodiment is roughly divided into five blocks. A preamble (PREAMBLE), a start flag (STARTFLAG), and communication data ( DATA), frame check sequence (FCS), and end flag (END FLAG). Communication data includes dynamic data such as latitude and longitude information, static data such as navigation messages and ship names, and a communication state (COMMUNICATION STATE) common to each station that performs communication. The communication state is the last part of the communication data. Exists.
As shown in Tables 1 and 2, the communication state has a data structure corresponding to the TDMA communication method. In the case of the SOTDMA method, the communication state has the data structure shown in Table 1.

  As shown in Table 1, in the case of the SOTDMA system, the communication state includes “SyncState”, “Slot Timeout”, and “Sub Message”. “Sync State” indicates the synchronization reference, “SlotTimeout” indicates the number of frames that continue to reserve the same slot, and “Sub Message” conforms to the number of receiving stations and the global slot number according to the value of “Slot Timeout”. The transmission slot number, UTC time, and the number of skips to the reserved slot number of the next frame when “SlotTimeout” is “0”.

  On the other hand, the data structure shown in Table 2 is used for the ITDMA system.

  As shown in Table 2, in the ITDMA system, the communication state includes “Sync State”, “Slot Increment”, “Number of Slots”, and “Keep Flag”. “Sync State” indicates the synchronization reference, “SlotIncrement” indicates the number of skips to the next reserved slot in the same frame, and “Number of Slots” indicates the slot length of the next reserved slot, that is, the continuous transmission used for the next transmission. The number of slots is indicated, and “Keep Flag” indicates information for setting whether or not to use the current slot number in the next frame.

  As described above, in the TDMA communication apparatus according to the present embodiment, transmission slot number reservation according to the global slot number and transmission reservation slot reservation based on the number of slots to be skipped are performed according to the TDMA communication method at that time. Is called. The TDMA communication apparatus according to the present embodiment uses the configuration described later to perform transmission control using a local slot number unique to the apparatus that is not affected by the global slot number, and the transmission packet data according to communication conditions. Attach the global slot number or the number of slots to skip.

FIG. 2 is a block diagram showing a schematic configuration of the TDMA communication apparatus of this embodiment.
The transmission unit 2 converts the baseband signal of the transmission packet data into an RF signal and outputs it to the transmission / reception switch 3. In response to a transmission / reception switching control command from the CPU 1, the transmission / reception switch 3 makes the transmission unit 2 and the antenna 4 conductive during transmission and makes the antenna 4 conductive with the reception unit 5 during reception. The antenna 4 transmits the RF signal input from the transmission unit 2 to the outside via the transmission / reception switch 3 and outputs the received RF signal to the reception unit 5 via the transmission / reception switch 3. The receiving unit 5 converts the input RF signal into a baseband signal and outputs it to the demodulator 6, and the demodulator 6 converts the input baseband signal into a bit stream and outputs it to the received packet analysis unit 7.

  The received packet analysis unit 7 detects a start flag from the bit stream and cuts out received packet data (corresponding to “slot data” in the present invention) corresponding to each slot. Then, the received packet analysis unit 7 checks the received packet data, and if there is no problem, outputs the received packet data to the CPU 1 together with the number of data bits. The received packet analysis unit 7 calculates the slot delay amount by subtracting the reference timing detected from the slot timing input from the slot timing generation counter 10. Further, the received packet analysis unit 7 detects the local slot number at the time of reception using the local slot number input from the local slot counter 8. The received packet analyzing unit 7 corresponds to “slot data analyzing means” of the present invention.

  The slot timing generation counter 10 generates a slot timing signal based on the slot timing generation control signal from the slot timing control circuit 11 and outputs it to the received packet analysis unit 7, the local slot counter 8, the global slot counter 9, and the CPU 1. To do. The slot timing control circuit 11 generates the slot timing generation control signal based on the slot control signal input from the CPU 1 and the 1PPS signal input from the GPS receiver 20 which is an external device to generate the slot timing generation counter 10. Output to. Here, the slot control signal is a signal instructing adjustment of slot timing based on the slot delay amount or the like. The slot timing generation counter 10 corresponds to “slot timing generation means”.

  Based on the slot timing signal input from the slot timing generation counter 10, the local slot counter 8 counts up the local slot numbers with serial numbers that do not cause skipping of numbers according to the communication status. The counted up local slot number is output to the CPU 1 and the received packet analysis unit 7.

  The global slot counter 9 counts up the global slot number based on the slot timing signal input from the slot timing generation counter 10. At this time, when the global slot counter set value is input from the CPU 1, the global slot counter 9 updates the global slot number being counted up to the slot number designated by the CPU 1.

  The memory 12 stores the transmission schedule set by the local slot number from the transmission slot number acquired from the packet data from the other station and the transmission slot number reserved for transmission by the own station, and the global slot number and A slot counter offset value that is a difference value (offset) from the local slot number is stored. This memory 12 corresponds to the “storage means” of the present invention.

The CPU 1 outputs a transmission control signal to the transmission unit 2 based on the slot timing signal and the transmission schedule stored in the memory 12. When the time information cannot be obtained from the GPS receiver 20, the CPU 1 obtains the slot length stored in advance and the ID information or the received packet data included in the received packet data input from the received packet analysis unit 7. Using the slot delay amount and the slot timing signal input from the slot timing generation counter 10, a slot control signal for slot synchronization is generated and output to the slot timing control circuit 11. On the other hand, when the time information is obtained from the GPS receiver 20, the slot control signal is not output from the CPU 1, and the 1PPS signal is directly input from the GPS receiver 20 to the slot timing control circuit 11. Further, the CPU 1 calculates a global slot counter setting value using the slot number of the reference station included in the received packet data input from the received packet analysis unit 7 and the local slot number at the time of reception, and stores it in the global slot counter 9. The global slot number is updated by outputting. Thereby, frame synchronization is realized. At this time, the CPU 1 newly calculates a slot counter offset value using the updated global slot number output from the global slot counter 9 and the local slot number output from the local slot counter 8. The newly calculated slot counter offset value is written in the memory 12, and the slot counter offset value is updated.
Since the CPU 1 and the slot timing control circuit 11 control the slot timing as described above, the CPU 1 and the slot timing control circuit 11 correspond to the “control means” of the present invention.

  Next, a slot synchronization method and a frame synchronization method of the TDMA communication apparatus having such a configuration will be described.

(1) Frame synchronization method in slot synchronization state FIG. 3 is a conceptual diagram showing a frame synchronization method in slot synchronization state. In the following example, a frame synchronization method of the own station 100 when the reference station is switched from the reference station 101 to the reference station 102 will be described. Further, the description will be made assuming that the local station 100 has been synchronized with the reference station 101 in advance.
When the reference station 101 is the reference, the own station 100 is frame-synchronized with the reference station 101 as described above. At this time, the slot number of the reference station 101 and the global slot number of the own station 100 are the same value, and the local slot number of the own station 100 is also the same in the case of FIG. As a result, the slot counter offset value is stored in the memory 12 as “0”. At this time, the transmission schedule stores numbers “2” and “5” as transmission slot numbers.

  Next, when the reference station 101 cannot transmit packet data for some reason and the reference station is switched from the reference station 101 to a new reference station 102, the CPU 1 starts from the received packet data received from the received packet analysis unit 7. The slot number “1” of the reference station 102 which is a new reference is detected. The CPU 1 uses the detected slot number “1” of the reference station 102 to synchronize with the slot timing signal, and from the global slot number “4” corresponding to the slot number of the reference station 101 counted by the global slot counter 9, the slot number of the reference station 102. The global slot number is updated to “1”. At this time, the CPU 1 generates a slot counter offset value “4” by subtracting the updated local slot number “5” output from the local slot counter and the updated global slot number “1” into the memory 12. Write.

  Then, the CPU 1 continues to generate a transmission control signal based on the local slot number and the transmission schedule stored in the memory 12 and output it to the transmission unit 2. That is, based on the local slot number, the CPU 1 outputs a transmission control signal at the time of the “2” slot and the “5” slot stored in the transmission schedule. At this time, when transmitting the global slot number of the SOTDMA communication system, transmission control for attaching the transmission slot number according to the corresponding global slot number to the transmission packet data using the local slot number and the difference value is performed. Do. For example, in the example of FIG. 3, the slot number obtained by subtracting the difference value from the transmission slot numbers “2” and “5” according to the local slot number is attached. Here, when the subtraction result is less than “0”, the subtraction result returns to “5” and transitions in the direction in which the numerical value decreases in order. For example, if the local slot number is “5”, the subtraction result is “1”, and if the local slot number is “2”, the subtraction result is “4” instead of “−2”.

  On the other hand, when transmitting the number of slots to be skipped in the SOTDMA communication system or ITDMA communication system, the number of slots counted according to the local slot number is calculated and transmission control attached to the transmission packet data is performed.

  Thus, by using the local slot number in any TDMA communication system, the transmission timing (transmission cycle for every three slots in FIG. 3) does not change even if the slot number is used as a reference. Thereby, transmission control is performed without changing the transmission timing.

  By performing such frame synchronization control, a TDMA communication apparatus is configured to continue the TDMA communication without causing a transmission stop without disturbing the transmission timing even when the reference station is switched and the reference global slot number becomes discontinuous. can do.

(2) Slot synchronization method and frame synchronization method when a timing pulse signal such as a 1PPS signal can be detected FIGS. 4 and 5 are conceptual diagrams showing a slot synchronization and frame synchronization method in a state where a 1PPS signal can be acquired. FIG. 4 shows a case where the reference slot timing (1PPS signal) is detected outside the slot update mask period, and FIG. 5 shows a case where the reference slot timing (1PPS signal) is detected within the slot update mask period. Show. This slot update mask period corresponds to the “predetermined period” of the present invention.

  When the 1PPS signal is input from the GPS receiver 20, the slot timing control circuit 11 updates the detection timing of the 1PPS signal based on the detection timing of the 1PPS signal and the slot timing signal output from the slot timing generation counter 10. It is detected whether it is within the mask period. As a detection method, for example, as shown in FIGS. 4 and 5, the slot timing signal is a signal in which “0” and “1” are inverted in the half time of the reference slot length St, and the first half time from the slot timing. Is the state “0”, and the latter half of the time is the state “1”. Then, the first half of the state “0” is set as the slot update mask period. As a result, when the slot timing control circuit 11 detects that the slot timing signal is in the state “0” at the time when the 1PPS signal is detected, it can detect that it is within the slot update mask period. On the other hand, when it is detected that the slot timing signal is in the state “1” when the 1PPS signal is detected, it can be detected that it is outside the slot update mask period. When time information is input from the GPS receiver 20, the CPU 1 sets the global slot counter to be updated to the slot number “X” of the reference station at the timing of the 1PPS signal. In this case, the CPU 1 and the slot timing control circuit 11 correspond to the “reference timing acquisition unit” of the present invention.

(2-1) When the detection timing of the 1PPS signal is outside the slot update mask period (FIG. 4)
If the detection timing of the 1PPS signal is outside the slot update mask period, that is, not within the slot update mask period, the slot timing control circuit 11 synchronizes the slot timing to the input 1PPS signal to the slot timing control circuit 11. The slot control signal to be output is output. The slot control circuit 11 outputs a slot timing generation control signal to the slot timing generation counter 10 based on the 1PPS signal, and the slot timing generation counter 10 outputs a slot timing signal.

  The local slot counter 8 updates (increments) the local slot number from “N + 2” to “N + 3” based on the input slot timing signal.

  Here, when the CPU 1 calculates the slot number “X” at the rising timing of the 1PPS signal based on the time information input from the GPS receiver 20, the received packet data is sent to the global slot counter 9 at the rising timing of the 1PPS signal. The global slot counter 9 is set so as to output a new reference slot number “X” included in. Based on the input 1PPS signal, the global slot counter 9 updates the immediately preceding (at that time) global slot number “M + 2” to the reference slot number “X”. At this time, the CPU 1 generates a slot counter offset value “N + 3-X” that is output from the local slot counter and that is obtained by subtracting the updated local slot number “N + 3” from the updated global slot number “X”. Write to.

  Then, the CPU 1 continues to generate a transmission control signal based on the local slot number and the transmission schedule and output it to the transmission unit 2. At this time, the global slot number or the number of slots to be skipped is used to set the transmission slot number of the own station to be given to the transmission packet data.

  By using such a configuration and control, when a 1 PPS signal is detected outside the slot update mask period, the update slot length Stu is shorter than the reference slot length St, but is set by the slot update mask period. The minimum required slot length can be secured. For example, as described above, if the half-hour length of the reference slot length St is set to the minimum slot length necessary for the execution of the program used by the TDMA communication apparatus of the present embodiment, at least half the reference slot length St. An update slot length Stu longer than the length (St / 2) can be secured.

(2-2) When the detection timing of the 1PPS signal is within the slot update mask period (FIG. 5)
On the other hand, the slot timing control circuit 11 outputs a slot control signal for synchronizing the slot timing with the 1PPS signal input to the slot timing control circuit 11 at the detection timing of the 1PPS signal. The slot control circuit 11 outputs a slot timing generation control signal to the slot timing generation counter 10 based on the input slot control signal and 1PPS signal, and the slot timing generation counter 10 outputs a slot timing signal. At this time, if the detection timing of the 1PPS signal is within the slot update mask period, the falling edge of the slot timing signal does not occur, so the count of the local slot counter 8 is not updated.

  When the CPU 1 calculates the slot number “X” at the detection timing of the 1PPS signal from the time information of the GPS receiver 20, the CPU 1 outputs the slot number “X” of the new reference station to the global slot counter 9. Based on the input 1PPS signal, the global slot counter 9 updates the global slot number “M + 2” immediately before (at that time) to the slot number “X” of the reference station.

  On the other hand, since the slot timing signal is not output from the slot timing generation counter 10 at the detection timing of the 1PPS signal, the local slot counter 8 does not update (increment) the local slot number “N + 2”, but uses the next slot timing signal. The local slot number is updated (incremented) from “N + 2” to “N + 3”.

  At this time, the CPU 1 generates a slot counter offset value “N + 2-X” that is a difference between the local slot number “N + 2” output from the local slot counter and the updated global slot number “X” at the detection timing of the 1PPS signal. To write to the memory 12.

  Then, the CPU 1 continues to generate a transmission control signal based on the local slot number and the transmission schedule and output it to the transmission unit 2. At this time, the global slot number or the number of slots to be skipped is used to set the transmission slot number of the own station to be given to the transmission packet data.

  By using such a configuration and control, when a 1PPS signal is detected within the slot update mask period, the slot is not updated at that time, so the updated slot length Stu is greater than the reference slot length St. The minimum required slot length set by the slot update mask period can be secured.

  With the configuration as described above, when a reference timing signal such as a 1PPS signal is detected, the minimum necessary slot length is ensured, transmission timing is not disturbed, and TDMA communication is performed without causing transmission suspension. A continuous TDMA communication device can be configured.

(3) Slot synchronization method and frame synchronization method when timing pulse signal such as 1PPS signal cannot be detected and synchronized with a specific reference station FIG. 6 shows slot synchronization and frame synchronization when synchronized with a specific reference station. It is a conceptual diagram which shows a method. FIG. 7 is a conceptual diagram showing a method for calculating the update set slot length.
When there is no common reference timing pulse signal such as a 1PPS signal and the timing is synchronized with the slot timing of a specific reference station in the TDMA communication network, first, the CPU 1 is based on the received data received from the received packet analysis unit 7. Confirm that the ID number of the transmitting station is that of the reference station. Then, the CPU 1 uses the slot delay amount calculated by the received packet analysis unit 7 based on the time relationship among the slot timing of the own station, the start timing of the received packet, and the timing of the start flag STF. Calculate the length. Here, the data consisting of the ID number and the start flag STF corresponds to the “identification data” of the present invention. In this case, the CPU 1 and the received packet analysis unit 7 serve as the “reference timing acquisition unit” of the present invention. Equivalent to.

Here, the slot delay amount is calculated as follows.
First, the received packet analysis unit 7 counts the time from when the slot timing signal from the slot timing generation counter 10 is detected to when the start flag STF of the received packet data of the reference station received first is detected. Then, along with the analysis of the received packet data, the slot delay amount is calculated from the following equation.
The time from the slot timing of the local station 100 to the start flag STF obtained by the count is n counts, and the start flag STF (bottom) is received from the head (tip) of the received packet data where the detected start flag STF is known in advance. )), The slot delay amount is
(Slot delay amount) = nu
It becomes. The update set slot length is calculated using this slot delay amount.

Next, the update set slot length is calculated as follows (see FIG. 7).
As shown in FIG. 7A, when the head of the received packet data is present within the half time St / 2 of the reference slot length from the slot timing of the local station 100, the slot delay amount (nu) is the reference slot length. The half time is shorter than St / 2. Therefore, as described above, if this slot delay amount (n−u) is set as the update-set slot length, it becomes shorter than the reference slot length half time St / 2, which may cause problems in program execution. . Therefore, in this case, a value (St + (n−u)) obtained by adding the reference slot length St to the slot delay amount (n−u) is set as the update set slot length Stu.

  As shown in FIG. 7B, when the head of the received packet data and the start flag STF are present after the half time St / 2 of the reference slot length from the slot timing of the local station 100, the slot delay amount (n− u) is longer than the half time St / 2 of the reference slot length. For this reason, as described above, even if this slot delay amount (n−u) is set to the update set slot length, there is no problem because it is longer than the half time St / 2 of the reference slot length. Therefore, in this case, the slot delay amount (n−u) is set as it is to the update set slot length Stu.

  As shown in FIG. 7C, when the leading edge of the received packet and the start flag STF are in different slots at the slot timing of the local station, the slot delay amount (nu) is a negative value. The slot delay amount (n−u) becomes a negative value, which means that the head of the received packet data in which the detected start flag STF exists at that time is used as a reference for the update set slot length Stu. This is ahead of the slot timing. Therefore, a value (St + (n−u)) obtained by adding the reference slot length St to the slot delay amount (n−u) is set as the update set slot length Stu.

  Further, the CPU 1 uses the local slot number RRSN at the time of reception input from the received packet analysis unit 7, the local slot number URSN at the time of updating the global slot number, and the reference station slot number SSN analyzed from the received packet. Thus, the set global slot number UGSN at the time of update is determined from the following equation.

USGN = (SSN + (URSN−RRSN) +1)% (number of slots per frame)
Note that “%” in this expression is a remainder operator, which divides the value before the remainder operator by the value after the remainder operator and returns the remainder.

  The local slot number RRSN at the time of reception is a local slot number with respect to the slot center position (time) of the received packet, and is a value obtained by adding the half time St / 2 of the reference slot length to the above-described slot delay length (nu). If (St / 2 + (n−u)) is shorter than the reference slot length St, the local slot number when the start flag STF is detected is used as it is. Otherwise, “1” is set as the local slot number when the start flag STF is detected. ”Is used.

  In this way, after determining the update time set slot length Stu and the set global slot number USGN, the CPU 1 outputs a slot control signal including the update time set slot length Stu to the slot timing control circuit 11. Based on the input slot control signal, the slot timing control circuit 11 outputs a slot timing generation control signal to the slot timing generation counter 10 at an interval corresponding to the update set slot length Stu at the time of an update setting slot. Thus, slot timing signals are generated from the slot timing generation counter 10 at intervals different from the reference slot length St, and slot synchronization is performed.

  Further, the CPU 1 outputs the set global slot number USGN to the global slot counter 9 in synchronization with the start timing of the update slot. The global slot counter 9 updates the global slot number to the input set global slot number USGN, and frame synchronization is performed.

  Further, the CPU 1 calculates a difference between the local slot number at the time of update from the local slot counter 8 and the global slot number set in the global slot counter 9 and stores the difference value in the memory 12 as a slot counter offset value.

  For example, in the example of FIG. 6, the local slot number “N + 3” is detected when the start flag STF of the received packet data of the reference station slot number “X + 1” from the reference station is detected at the time of the local slot number “N + 1” of the local station 100. When the slot synchronization and the frame synchronization are performed in the slot “”, the ID number of the reference station is detected from the received packet data of the reference station slot number “X + 1”, and the reference station slot number “X + 1” and the local slot number “N + 1” are The slot delay amount (nu) is detected from the time relationship. At this time, since the timing of the start flag STF and the received packet exists in the first half time St / 2 of the slot of the local slot number “N + 1”, the update set slot length Stu becomes St + (nu). Further, since the local slot number URSN at the time of update is “N + 3”, the local slot number RRSN at the time of reception is “N + 1”, and the reference station slot number SSN is “X + 1”, the set global slot number UGSN is “X + 3”. Become.

  Next, the local slot number is determined from the update set slot length Stu (= St + (n−u)), the set global slot number USGN (= “X + 3”), and the update local slot number URSN (= “N + 3”). The slot length of the number “N + 3” is set to the update set slot length Stu (= St + (n−u)) to generate a slot timing signal, and the global slot number of the corresponding slot is updated to “X + 3”. Then, the difference value “N−X” between the local slot number “N + 3” and the global slot number “X + 3” at the time of update is stored as a slot counter offset value.

  With the above-described configuration, even if there is no reference timing signal such as a 1PPS signal, slot synchronization and frame synchronization are performed with respect to a specific reference station, and the necessary minimum slot length is secured. Thus, it is possible to configure a TDMA communication apparatus that continues the TDMA communication without causing a transmission stop without disturbing the transmission timing.

  In the above description, the slot update mask period is set to the first half of the slot. However, the slot update mask period may be changed to an appropriate length according to conditions such as the execution time of the program.

  In the above description, the slot length is adjusted with one update slot. For example, in FIG. 6, slot adjustment for slot synchronization is performed in a slot whose local slot number is “N + 3”, which is a slot at the time of update. However, the slot length may be adjusted sequentially not only in the update slot but also in a plurality of subsequent slots. For example, when performing slot synchronization from the update slot to m slots, the update set slot length Stu 'is set to St + (nu) / m. Of course, this (nu) may be positive or negative. As a result, slot synchronization is performed at the (m + 1) th slot. In this way, slot synchronization may be gradually performed in a plurality of slots. At this time, the slot lengths of the slots for adjusting the slot length need not all be the same.

  In the above description, the transmission slot of the own station is controlled from the transmission schedule and the slot counter offset value stored in the memory 12. However, if it is clear that the timing of editing the data of the slot to be transmitted is n slots before the timing of actually transmitting the transmission slot of the own station, the global slot counter is set when editing the transmission slot data. By reading and using a value advanced by n slots with respect to that value, the transmission slot number of the own station to be transmitted to another station can be obtained.

The figure which showed the structure of the transmission / reception packet data of TDMA communication The block diagram which shows schematic structure of the TDMA communication apparatus of this invention Conceptual diagram showing a frame synchronization method in a slot-synchronized state Conceptual diagram showing a method of slot synchronization and frame synchronization when a 1PPS signal is detected outside the slot update mask period Conceptual diagram showing a method of slot synchronization and frame synchronization when a 1PPS signal is detected within a slot update mask period Conceptual diagram showing the method of slot synchronization and frame synchronization when synchronizing with a specific reference station Conceptual diagram showing the method for calculating the slot length set when updating Conceptual diagram showing a conventional slot synchronization method Conceptual diagram showing a conventional frame synchronization method

Explanation of symbols

1-CPU (central processing unit)
2-transmission unit 3-transmission / reception switch 4-antenna 5-reception unit 6-demodulator 7-received packet analysis unit 8-local slot counter 9-global slot counter 10-slot timing generation counter 11-slot timing control circuit 12- Memory 20-GPS receiver

Claims (4)

In a TDMA communication apparatus in which a plurality of slots are allocated to one frame in a time-sharing manner, and each station that performs communication performs data transmission in slots reserved by performing slot synchronization and frame synchronization,
Local slot timing generating means for generating local slot timing in the own station;
Slot data analyzing means for detecting a global slot number common to each station performing communication and a transmission slot number of another station performing communication from received slot data;
A global slot counter that counts a slot number in synchronization with the global slot number detected by the slot data analysis means based on the local slot timing;
A local slot counter that continuously counts slot numbers based on the local slot timing;
A transmission slot number of all stations performing communication including a transmission slot number of the local station based on a slot number counted by the local slot counter, and a difference value of the global slot number with respect to a slot number counted by the local slot counter, Storage means for storing;
Control means for performing transmission control according to the slot number counted by the local slot counter using the transmission slot number stored in the storage means and the difference value;
A TDMA communication apparatus comprising:   2. The TDMA communication according to claim 1, wherein the control means includes, in transmission data, a transmission slot number of the local station based on the global slot number or a number of slots to be skipped from the current transmission slot number to the next transmission slot number. apparatus. Reference timing acquisition means for acquiring a reference timing for synchronizing all stations performing communication,
The control means synchronizes the local slot timing with the acquired reference timing when the acquired reference timing is within a predetermined period on the front side in the slot starting from the immediately preceding local slot timing. The TDMA communication apparatus according to claim 1 or 2, wherein the slot synchronization is performed by stopping the communication. The slot data analyzing means detects identification data unique to the reference station, counts from the reference timing at which the slot starts to the timing at which the identification data ends, and from the immediately preceding local slot timing to the timing at which the identification data ends. The difference between the count value and the slot delay amount is detected,
The control means adjusts the slot length of a single slot starting from the local slot timing after the predetermined slot from which the slot delay amount is acquired based on the slot delay amount, or adjusts the slot length of a plurality of slots to adjust the slot length. The TDMA communication apparatus according to claim 1 or 2, wherein synchronization is performed.

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