JP4481528B2 - Semiconductor manufacturing apparatus and semiconductor device manufacturing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor manufacturing apparatus such as a single wafer heat treatment apparatus for a semiconductor wafer, and more particularly to a cold wall type lamp annealing apparatus.
[0002]
[Prior art]
Conventionally, when a semiconductor element such as a MOS transistor is formed on a semiconductor substrate, many methods have been adopted in which impurities are ion-implanted and thermally diffused by heat-treating the source / drain regions. The heat treatment apparatus used at this time is generally a lamp annealing apparatus.
[0003]
FIG. 11 is a schematic sectional view of a conventional lamp annealing apparatus. The wafer 102 is heated by the heat source 103 in a state where a semiconductor wafer 102 (hereinafter referred to as a wafer) 102 such as silicon is transferred to the processing chamber 101. As the heating source 103, a plurality of halogen lamps made of tungsten filaments are disposed, and a reflector that reflects light is disposed on the opposite side of the processing chamber across the lamps. A gas pipe 108 is attached to the wall of the processing chamber 101, and nitrogen gas is supplied at a flow rate of about 5 l (liter) / min to 10 l / min at room temperature from the direction indicated by the arrow 104. Further, a gas pipe 105 is attached to the wall of the processing chamber 101, and the indoor gas is discharged through the gas pipe 105 in the direction indicated by the arrow 109 (outside the room). A wafer support 107 is installed in the processing chamber 101, and support pins 106 are implanted on the surface thereof. A wafer 102 is placed on the support pins 106. In this state, the inside of the processing chamber 101 is heated by the heating source 103. Then, the impurity ion-implanted into the wafer 102 is thermally diffused to form an impurity diffusion region in the wafer 102.
[0004]
As described above, the lamp annealing apparatus used for the heat source 103 has been used in a process of diffusing impurities introduced into a silicon wafer (hereinafter referred to as a wafer). In this case, for example, after transferring the wafer to the processing chamber,₂While introducing gas or the like, the lamp emits light, the wafer temperature is heated to about 400 ° C. to 1100 ° C. and held for a certain period of time (about 10 to 60 seconds), the lamp is turned off, and the wafer is allowed to cool to a low temperature. It is performed on the condition that the wafer is taken out of the processing chamber. All gases supplied into the processing chamber are introduced into the processing chamber at room temperature, and the temperature is not adjusted before entering the processing chamber.
[0005]
[Problems to be solved by the invention]
Incidentally, in the step of diffusing impurities in the wafer, it is important that the diffusion length can be adjusted arbitrarily. In particular, with the miniaturization of devices, it is necessary to control the diffusion length to be small. The diffusion length corresponds to the heat treatment temperature and the heat treatment time. In order to shorten the diffusion length, it is necessary to lower the heat treatment temperature or shorten the time. However, if the heat treatment temperature is not raised to a certain level, impurities are not activated and the resistance of the substrate increases, so there is a limit to lowering the temperature. When the impurity is boron (B) or arsenic (As), it is necessary to raise the temperature to about 1000 ° C. The processing time can shorten the time held at the set temperature, but if it is shortened to near 0 seconds, it cannot be further shortened. Therefore, as a method of further suppressing the diffusion length, a method of shortening the time when the wafer is hot as much as possible by increasing the wafer heating rate (temperature increase rate) and the wafer cooling rate (temperature decrease rate) is studied. Has been. The temperature raising rate can be increased to about 250 ° C./sec by applying large electric power to the lamp.
[0006]
However, the temperature drop rate is N₂In air cooling with gas, the speed is increased only to about 90 ° C./sec even if helium gas having a high heat exchange efficiency is introduced into the processing chamber at about 70 to 80 ° C./sec. This is less than half of the heating rate. Even if only the rate of temperature increase is increased, if the rate of temperature decrease is slow, impurities eventually diffuse in the process of temperature decrease, and the effect of increasing the rate of temperature increase cannot be exhibited. As a result, there is a problem that it is impossible to control the diffusion length to be small.
The present invention has been made under such circumstances, and a semiconductor manufacturing apparatus that realizes high-speed temperature rising / falling of a lamp annealing apparatus in order to quickly and accurately perform thermal diffusion of an impurity diffusion region in a semiconductor device and the semiconductor manufacturing A method of manufacturing a semiconductor device using the apparatus is provided.
[0007]
[Means for Solving the Problems]
  The present invention is characterized in that in the lamp annealing apparatus, the temperature of the atmospheric gas introduced into the processing chamber is adjusted in order to realize high-speed temperature rise and fall, and the gas cooled in the temperature lowering process can be introduced into the chamber. Further, the present invention is characterized in that a shielding object can be inserted between the wafer and the lamp in order to completely block the radiated light from the lamp when the temperature lowering step is started. The timing for switching the gas temperature and inserting the shielding object can be set to an optimum time by measuring the wafer temperature and feeding back the temperature data. This makes it possible to raise and lower the temperature of the wafer at high speed, and to perform heat treatment while suppressing the diffusion of impurities.
  That is, the semiconductor manufacturing apparatus of the present invention is introduced into a processing chamber for storing a substrate to be processed and the processing chamber.The temperature of the gas used for cooling is lower than room temperatureMeans for adjusting to the inside of the processing chamber.Lower than room temperatureA pipe for introducing gas and the processing chamber are arranged opposite to each other.A lampA heating source,At the same time that the substrate to be processed reaches a predetermined set temperature by the heating source, a gas having a temperature lower than room temperature reaches the substrate to be processed so that cooling of the substrate to be processed is started.It is characterized by that.
[0008]
  You may make it further comprise the light-shielding member which interrupts | blocks the light radiated | emitted from the said heat source. A light blocking member that blocks light emitted from the heating source transmits or blocks light emitted from the heating source by moving between the heating source and a substrate to be processed housed in the processing chamber. You may do it. The light blocking member that blocks the light emitted from the heating source may be cooled when not in a position to block the light emitted from the heating source. The light blocking member that blocks the light emitted from the heating source isThe processing chamberThe substrate may be moved according to the substrate temperature of the substrate to be processed stored in the substrate. A measuring instrument is installed in the processing chamber, and the measuring instrument may measure the substrate temperature of the substrate to be processed. A plurality of branch pipes are attached to the pipe attached to the processing chamber, and these branch pipes supply the same gas to the processing chamber through the pipe, and the temperature of the gas is: You may make it differ for every branch piping. The plurality of branch pipes may have branch pipes having a gas temperature of 0 ° C. or lower or 20 ° C. or lower. The gas introduced into the processing chamber may be supplied from any of the plurality of branch pipes, and the branch pipe that supplies the gas may be selected according to the substrate temperature of the substrate to be processed. The pipe may have at least one second branch pipe branched so that the gas contacts the outside of the processing chamber.
[0009]
According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: sequentially forming a gate insulating film and a gate electrode in an element region of a main surface of a first conductivity type semiconductor substrate; A step of ion-implanting a second conductivity type impurity; and a step of heat-treating the semiconductor substrate to diffuse the ion-implanted impurity to form a source / drain region. It is characterized by being performed in any one of the semiconductor manufacturing apparatuses.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, a first embodiment will be described with reference to FIGS.
FIG. 1 is a schematic sectional view of a lamp annealing apparatus, FIG. 2 is a characteristic diagram showing a change in wafer temperature over time when the present invention and a conventional semiconductor manufacturing apparatus are used, and FIG. It is a characteristic view which shows the depth distribution of the impurity in the wafer at the time of using an apparatus. The wafer 2 is heated by the heating source 3 in a state where the wafer 2 such as silicon is transferred into the processing chamber 1. As the heating source 3, a plurality of halogen lamps made of tungsten filaments are disposed, and a reflector that reflects light is disposed on the opposite side of the processing chamber 1 across the lamps. A pipe 4 attached to the wall of the processing chamber 1 for supplying gas to the processing chamber 1 is connected to a plurality of branch pipes 13 and 14. Nitrogen gas is supplied into the processing chamber 1 from the branch pipes 13 and 14 through the gas pipe 4 at a flow rate of about 5 l (liter) / min to 10 l / min at room temperature from the direction indicated by the arrow 7. Then, the gas in the room is discharged in the direction (outside the room) indicated by the arrow 9 by the gas pipe 8 attached to the wall of the processing chamber 1. A wafer support 10 is installed in the processing chamber 1, and support pins 12 are implanted on the surface thereof.
[0011]
The wafer 2 is placed on the support pins 12. In this state, the inside of the processing chamber 1 is heated by the heating source 3. Then, the impurities ion-implanted into the wafer 2 are thermally diffused to form impurity diffusion regions such as source / drain regions in the wafer 2.
Each of the branch pipes 13 and 14 passes through the heat exchanger 5 where the temperature of the gas is adjusted. That is, the same gas is supplied into the processing chamber 1 by two or more paths, and the heat exchanger 5 is attached to each path, so that the temperature can be adjusted for each path. It is possible. Selection of a route to be introduced into the processing chamber 1 is performed by a switching valve 6 attached to a branch point between the gas pipe 4 and the branch pipes 13 and 14. The operation of the switching valve 6 is automatically performed according to a preset control program. As for the temperature setting of the nitrogen gas, for example, one of the two paths 13 and 14 is set to 25 ° C., and the other one is set to 10 ° C. The wafer temperature is measured by an optical temperature measuring instrument 11 disposed on the wafer support 10 below the processing chamber 1. The temperature measuring method may be a contact type temperature measuring device.
[0012]
Annealing treatment at 1000 ° C. with a holding time of 0 seconds is performed in the following order. Here, 0 second annealing means that the temperature lowering process is started at the same time when the wafer temperature reaches 1000 ° C. Electric power is supplied to the heat source 3 to raise the wafer temperature, and the wafer temperature is raised from 600 ° C. to 1000 ° C. at a temperature raising rate of 200 ° C./sec. When the temperature increase is started, a route of 10 ° C. (for example, branch wiring 14) is selected as the nitrogen gas temperature. In this state, by setting the switching valve 6 to start the operation at a slightly low temperature just before the temperature measured by the wafer temperature measuring device 11 reaches 1000 ° C., the nitrogen gas actually set at 10 ° C. is processed. When entering the chamber 1 and reaching the wafer 2, it is possible to end the holding time and reach the temperature lowering process. The time specification for starting the operation of the switching valve 6 is changed according to the introduced gas flow rate and the rate of temperature rise so that the time when the wafer processing enters the temperature lowering process and the time when the low-temperature nitrogen gas reaches the wafer 2 are substantially matched. Is possible. In the temperature lowering process, it is desirable to introduce a gas having a large flow rate of 20 l / min or more to enhance the cooling effect of the wafer 1.
[0013]
FIG. 2 is a characteristic diagram for explaining the change of the wafer temperature with time. The vertical axis represents the wafer temperature (° C.), and the horizontal axis represents the heat treatment time (seconds). The figure shows a characteristic line A representing the change over time of the wafer temperature when using the semiconductor manufacturing apparatus of the present invention and a characteristic line B representing the change over time of the wafer temperature using the conventional semiconductor manufacturing apparatus. It is. A characteristic line C indicated by a dotted line indicates a desired wafer temperature necessary for the heat treatment. In the conventional example, even after reaching 1000 ° C., the wafer temperature rises and it is delayed to enter the temperature lowering process (characteristic line B). This is because the lamp has a heat capacity, so that the radiant heat from the heating source stops. This is because it takes time and the wafer temperature rises during that time. On the other hand, when the lamp annealing apparatus shown in FIG. 1 which is the semiconductor manufacturing apparatus of the present invention is used, the cooled gas is introduced into the processing chamber during the time of entering the temperature lowering process. Even if the radiant heat remains, since the air cooling effect by the gas is added, the rise in the wafer temperature is suppressed. As a result, an excessive increase (hereinafter referred to as overshoot) of the wafer temperature with respect to the set temperature is suppressed as compared with the conventional example (characteristic line A). Also, it can be seen that the temperature drop is steep in the temperature lowering process, and the temperature lowering rate is faster than the conventional example. In this case, the cooling rate is 100 ° C./second or more at the maximum.
[0014]
FIG. 3 is a characteristic diagram showing the depth distribution of impurities in the wafer, and the vertical axis indicates the impurity concentration (/ cm in the diffusion region in the wafer).^ThreeThe horizontal axis represents the substrate depth from the wafer surface. The figure shows a characteristic line D indicating the depth profile of the impurity concentration after annealing of the wafer when the semiconductor manufacturing apparatus of the present invention is used, and the impurity concentration after annealing of the wafer when using the conventional semiconductor manufacturing apparatus. A characteristic line E indicating the depth profile and a characteristic line F indicating the depth profile of the impurity concentration of the wafer before annealing are shown. Boron difluoride ions (BF) as impurities on the (100) plane of a wafer made of silicon single crystal₂ ⁺) Using an ion implantation apparatus, acceleration energy 1 keV, dose 1E15 cm^-2The results are shown in FIG. 5, after implantation at an implantation angle of 0 ° C., annealing is performed at 1000 ° C. for 0 seconds, and then the concentration of boron in the wafer is analyzed by a secondary ion mass spectrometer. In this embodiment, it can be seen that the diffusion of impurities in the wafer is suppressed as compared with the conventional example. This is due to the effects of suppressing overshoot and increasing the cooling rate.
According to this embodiment, as a result of realizing the rapid temperature increase / decrease in the temperature of the lamp annealing apparatus, it becomes possible to quickly and accurately carry out thermal diffusion of the impurity diffusion region formed in the semiconductor substrate.
[0015]
Next, a second embodiment will be described with reference to FIGS.
FIG. 4 is a schematic cross-sectional view of a lamp annealing apparatus, FIG. 5 is a characteristic diagram showing a change in wafer temperature over time when the present invention and the conventional semiconductor manufacturing apparatus are used, and FIG. 6 is the present invention and conventional semiconductor manufacturing. FIG. 7 is a cross-sectional view illustrating the shutter portion, and FIG. 8 is a plan view illustrating the shutter portion. FIG. 7 is a characteristic diagram showing the depth distribution of impurities in the wafer when the apparatus is used. The wafer 22 is heated by the heating source 23 in a state where the wafer 22 such as silicon is transported into the processing chamber 21. For the heating source 23, a plurality of halogen lamps made of tungsten filaments are arranged, and a reflector that reflects light is arranged on the opposite side of the processing chamber 21 with the lamps interposed therebetween. A pipe 24 attached to the wall of the processing chamber for supplying gas to the processing chamber 21 is connected to a plurality of branch pipes 33 and 34. Nitrogen gas is supplied from the branch pipes 33 and 34 through the gas pipe 24 to the inside of the processing chamber 21 at a flow rate of about 5 l (liter) / min to 10 l / min at room temperature. Then, the gas in the room is discharged in the direction (outside the room) indicated by the arrow 29 by the gas pipe 28 attached to the wall of the processing chamber 21. A wafer support 20 is installed in the processing chamber 21, and support pins 32 are implanted on the surface thereof. A wafer 22 is placed on the support pins 32.
[0016]
In addition, a plurality of second branch pipes 36 are branched from the gas pipe 24, and the gas is configured to flow along the upper surface and the lower surface of the processing chamber 21 from the front ends thereof. Further, a light shielding member (hereinafter referred to as a shutter) 35 that blocks light from the heating source is inserted between the heating source 23 and the processing chamber 21. The shutter 35 is usually installed outside the processing chamber. The shutter 35 is movable and is placed on a guide rail (not shown) arranged on the outside so as not to block the light from the heating source. An arm (not shown) driven at high speed is configured to be inserted between the heating source and the processing chamber from the outside when the temperature is lowered.
In this state, the inside of the processing chamber 21 is heated by the heating source 23. Then, the impurities ion-implanted into the wafer 22 are thermally diffused to form impurity diffusion regions such as source / drain regions in the wafer 22.
[0017]
The branch pipes 33 and 34 pass through the heat exchanger 25, respectively, where the temperature of the gas is adjusted. That is, the same gas is supplied into the processing chamber 21 through two or more paths, and the heat exchanger 25 is attached to each path, so that the temperature can be adjusted for each path. It is possible. Selection of a route to be introduced into the processing chamber 21 is performed by a switching valve 26 attached to a branch point between the gas pipe 24 and the branch pipes 33 and 34. The operation of the switching valve 26 is automatically performed according to a preset control program. As for the temperature setting of the nitrogen gas, for example, one of the two paths (branch pipes) 33 and 34 is set to 25 ° C., and the other one is set to 10 ° C. The wafer temperature is measured by an optical temperature measuring device 31 disposed on the wafer support 20 below the processing chamber 21. The temperature measuring method may be a contact type temperature measuring device.
[0018]
The annealing process under the conditions of 1000 ° C. and holding time of 0 second by the lamp annealing apparatus of FIG. 4 is performed in the following order. At the same time, the lamp output is cut. Electric power is supplied to the heating source 23 to raise the wafer temperature, and the wafer temperature is raised from 600 ° C. to 1000 ° C. at a temperature raising rate of 200 ° C./sec. For example, a route (for example, the branch wiring 34) of 10 ° C. is selected as the nitrogen gas temperature when the temperature increase is started. In this state, by setting the switching valve 26 to start operation at a slightly lower temperature immediately before the temperature measured by the wafer temperature measuring device 31 reaches 1000 ° C., the nitrogen gas set at 10 ° C. is actually processed. When entering the chamber 21 and reaching the wafer 22, it is possible to end the holding time and reach the temperature lowering process. The time for starting the operation of the switching valve 26 is changed according to the introduced gas flow rate or the rate of temperature rise so that the time when the wafer processing enters the temperature lowering process and the time when the low-temperature nitrogen gas reaches the wafer 22 can be substantially matched. It becomes possible.
[0019]
When the temperature falls, the shutter 35 is inserted at the same time as the wafer temperature reaches 1000 ° C., and the radiant heat from the heating source 23 is cut off. At the same time, the lamp output of the heating source 23 is also cut. As the shutter material, it is desirable to use a material having a large heat capacity, such as metal or ceramic, and strong against heat stress. For example, the shutter can be configured such that stainless steel is used as a base material having good thermal conductivity, carbon is applied to the wafer side, and gold foil or the like is attached to the heating source side. In this way, forming the surface layer on the surface of the substrate has the purpose of preventing the deterioration of the substrate, but the shutter effect is achieved by making the heating source side a surface with high reflectivity and the wafer side with a surface with low reflectivity. There is also an aim to improve. Therefore, a noble metal such as Au, Al or Pt can be coated on the heating source side, and a layer of carbon (C) or black SiC can be formed on the wafer side.
[0020]
Next, a structure different from the shutter described above will be described with reference to FIGS. The shutter shown in FIG. 7 is configured such that two movable shutters 37 and 38 that block light from the heating source are inserted between the heating source and the processing chamber. Two shutters 37 and 38 completely cover the heating source. The shutters 37 and 38 are usually installed outside the processing chamber. These shutters are mounted on guide rails arranged outside the processing source so as not to block the light from the heating source, and the shutters 37 and 38 are outside when the temperature is lowered by an arm driven at high speed with high-pressure air. To be inserted between the heating source and the processing chamber. The shutter of FIG. 8 is configured such that, for example, four movable shutters 39 to 42 that block light from the heating source are inserted between the heating source and the processing chamber. The shutters 39 to 42 are configured to completely cover the heating source with four sheets. The shutters 39 to 42 are usually installed outside the processing chamber, and each one of these shutters is fixed on a fulcrum 43 arranged outside so as not to block the light of the heating source, and these are driven at a high speed by the fulcrum 43. By doing so, it is configured to be inserted between the heating source and the processing chamber from the outside when the temperature is lowered. Since the shutters of FIGS. 7 and 8 have a short traveling distance, the blocking speed is much faster than that of the second embodiment.
[0021]
FIG. 5 is a characteristic diagram for explaining the change of the wafer temperature with time. The vertical axis represents the wafer temperature (° C.), and the horizontal axis represents the heat treatment time (seconds). The figure shows a characteristic line A representing the change over time of the wafer temperature when the semiconductor manufacturing apparatus of the present invention is used, and a characteristic line B representing the change over time of the wafer temperature when using the conventional semiconductor manufacturing apparatus. It is. A characteristic line C indicated by a dotted line indicates a desired wafer temperature necessary for the heat treatment. In the conventional example, even after reaching 1000 ° C., the wafer temperature rises and it is delayed to enter the temperature-decreasing process (characteristic line B). This is because it takes time and the wafer temperature rises during that time. On the other hand, when the lamp annealing apparatus shown in FIG. 4 which is the semiconductor manufacturing apparatus of the present invention is used, the cooled gas is introduced into the processing chamber at the time of entering the temperature lowering process, and the shutter is used. Since the radiant heat from the lamp is effectively cut off, even if the radiant heat from the lamp remains, the air cooling effect by the gas is added, so that an increase in the wafer temperature is suppressed. As a result, an excessive increase (hereinafter referred to as overshoot) of the wafer temperature with respect to the set temperature is suppressed as compared with the conventional example (characteristic line A). Also, it can be seen that the temperature drop is steep in the temperature lowering process, and the temperature lowering rate is faster than the conventional example. The overshoot of the wafer temperature is further suppressed as compared with the first embodiment, and the cooling rate is 150 ° C./second or more at the maximum.
[0022]
FIG. 6 is a characteristic diagram showing the depth distribution of impurities in the wafer, and the vertical axis indicates the impurity concentration (/ cm in the diffusion region in the wafer).^ThreeThe horizontal axis represents the substrate depth from the wafer surface. The figure shows a characteristic line D indicating the depth profile of the impurity concentration after annealing of the wafer when the semiconductor manufacturing apparatus of the present invention is used, and the impurity concentration after annealing of the wafer when using the conventional semiconductor manufacturing apparatus. A characteristic line E indicating the depth profile and a characteristic line F indicating the depth profile of the impurity concentration of the wafer before annealing are shown. Boron difluoride ions (BF) as impurities on the (100) plane of a wafer made of silicon single crystal₂ ⁺) Using an ion implantation apparatus, acceleration energy 1 keV, dose 1E15 cm^-2The results are shown in FIG. 5, after implantation at an implantation angle of 0 ° C., annealing is performed at 1000 ° C. for 0 seconds, and then the concentration of boron in the wafer is analyzed by a secondary ion mass spectrometer. In this example, it is understood that the diffusion of impurities in the wafer is suppressed as compared with the conventional example, and is close to the profile before annealing (see the characteristic line E). This is due to the effects of suppressing overshoot and increasing the cooling rate.
[0023]
According to this embodiment, as a result of realizing the rapid temperature increase / decrease in the temperature of the lamp annealing apparatus, it becomes possible to quickly and accurately carry out thermal diffusion of the impurity diffusion region formed in the semiconductor substrate. According to this embodiment, the optimum timing for inserting the shielding object can be set by measuring the wafer temperature and feeding back the temperature data. This makes it possible to raise and lower the temperature of the wafer at high speed, and to perform heat treatment while suppressing the diffusion of impurities. Moreover, although the gas used for the semiconductor manufacturing apparatus of this invention was nitrogen gas in the Example, it is not limited to this gas. For example, there are Ne, Ar, Kr, Xe and the like.₂Gas, N₂/ H₂In the case of using a process gas such as a gas, these process gases can be applied.
For example, a lamp as shown in FIG. 9 is used as the heating source shown in the first and second embodiments. There is a structure in which the bean balls shown in FIG. 9B are arranged in a disk shape (FIG. 9A) or a structure in which rod-shaped lamps are arranged (FIG. 9C).
[0024]
Next, a method of manufacturing a semiconductor device using the lamp annealing apparatus shown in these embodiments will be described with reference to FIG. FIG. 10 is a process cross-sectional view illustrating a method for manufacturing a semiconductor device.
An insulating film 41 made of a silicon oxide film or the like is formed on the main surface of a semiconductor substrate 40 such as silicon, and a patterned photoresist 42 is formed thereon (FIG. 10A). Impurities, for example, boron (B) 43 is ion-implanted into the semiconductor substrate 40 using the patterned photoresist 42 as a mask (FIG. 10B). After removing the photoresist 42, the semiconductor substrate 40 is heat-treated by the lamp annealing apparatus described in the first and second embodiments, and the ion-implanted boron 43 is thermally diffused (about 1200 ° C.) to form a P well 44. Form. Thereafter, an element isolation region 45 is formed, and a gate electrode such as polysilicon is formed in the element region partitioned by the element isolation region 45. That is, the gate electrode 47 is formed in the element region where the P well 44 is formed and the element region other than the P well via the gate insulating film 46 such as a silicon oxide film.
[0025]
The gate insulating film 46 is newly formed after the insulating film 41 is removed. Then, arsenic (As) is ion-implanted into the P well 44 and boron (B) is ion-implanted into the semiconductor substrate 40 in the region other than the P well, and then the lamp annealing apparatus described in the first and second embodiments is used. Impurities are thermally diffused by heat treatment to form an N type source / drain region 48 in the P well 44 and a P type source / drain region 49 in a region other than the P well. In this way, a semiconductor element having a CMOS structure is formed on the semiconductor substrate 40.
Since the semiconductor manufacturing apparatus of the present invention is used, the impurity diffusion regions such as the well region and the source / drain regions are formed quickly and accurately as a result of the rapid temperature increase / decrease in temperature of the lamp annealing device.
[0026]
【The invention's effect】
The present invention provides a plurality of gas paths to be introduced into the processing chamber, controls the gas temperature for each path, and uses a temperature data feedback from a wafer temperature measuring instrument or the like to increase the temperature of the heat treatment process, the temperature decrease process, etc. It is possible to raise and lower the temperature of the wafer at high speed by switching the gas path according to the process and changing the gas temperature introduced into or outside the processing chamber. Also, by moving a light shielding member (shutter), which is an opaque member, between the heating source and the wafer by feedback of temperature data from the wafer temperature measuring instrument, etc., the radiant heat from the heating source is blocked and the wafer is moved at high speed. It is possible to lower the temperature. As described above, heat treatment can be performed while suppressing diffusion of impurities in the wafer.
[Brief description of the drawings]
FIG. 1 is a schematic sectional view of a lamp annealing apparatus which is a semiconductor manufacturing apparatus of the present invention.
FIG. 2 is a characteristic diagram showing a change in wafer temperature over time when the present invention and a conventional semiconductor manufacturing apparatus are used.
FIG. 3 is a characteristic diagram showing a depth distribution of impurities in a wafer when the present invention and a conventional semiconductor manufacturing apparatus are used.
FIG. 4 is a schematic cross-sectional view of a lamp annealing apparatus which is a semiconductor manufacturing apparatus of the present invention.
FIG. 5 is a characteristic diagram showing a change in wafer temperature over time when the present invention and a conventional semiconductor manufacturing apparatus are used.
FIG. 6 is a characteristic diagram showing the depth distribution of impurities in a wafer when the present invention and a conventional semiconductor manufacturing apparatus are used.
FIG. 7 is a cross-sectional view illustrating a shutter portion used in the semiconductor manufacturing apparatus of the present invention.
FIG. 8 is a plan view illustrating a shutter portion used in the semiconductor manufacturing apparatus of the present invention.
9A and 9B are a cross-sectional view and a plan view of a lamp used in the semiconductor manufacturing apparatus of the present invention.
FIG. 10 is a cross-sectional view illustrating a method for manufacturing a semiconductor device using the semiconductor manufacturing apparatus of the present invention.
FIG. 11 is a schematic sectional view of a conventional lamp annealing apparatus.
[Explanation of symbols]
1, 21, 101 ... processing chamber,
2, 22, 102... Substrate to be processed (wafer),
3, 23, 103 ... heating source,
4, 8, 24, 28, 105, 108 ... piping,
5, 25 ... heat exchanger, 6, 26 ... switching valve,
7, 9, 27, 29, 104, 109 ... arrows indicating gas flow,
10, 20, 107 ... wafer support,
11, 31 ... temperature measuring instrument, 12, 32, 106 ... support pins,
13, 14, 33, 34 ... branch piping,
35, 37, 38, 39, 40, 41, 42 ... shielding member (shutter)
36: Second branch pipe.

Claims (10)

A processing chamber for storing a substrate to be processed; means for adjusting a temperature of a gas used for cooling introduced into the processing chamber to a temperature lower than room temperature; and the chamber is attached to the processing chamber and is lower than the room temperature in the processing chamber. A pipe for introducing a gas having a temperature; and a heating source including a lamp disposed opposite to the processing chamber, and the substrate to be processed reaches a predetermined set temperature by the heating source, and at the same time, a temperature lower than the normal temperature. A semiconductor manufacturing apparatus comprising control means for causing the gas to reach the substrate to be processed to start cooling the substrate to be processed.   The semiconductor manufacturing apparatus according to claim 1, further comprising a light blocking member that blocks light emitted from the heating source.   A light blocking member that blocks light emitted from the heating source transmits or blocks light emitted from the heating source by moving between the heating source and a substrate to be processed housed in the processing chamber. The semiconductor manufacturing apparatus according to claim 2.   4. The semiconductor manufacturing apparatus according to claim 3, wherein the light shielding member that blocks light emitted from the heating source is cooled when the light shielding member is not in a position that blocks light emitted from the heating source. 5. . 5. The semiconductor according to claim 4, wherein the light shielding member that blocks light emitted from the heating source includes a control unit that moves the light according to the substrate temperature of the substrate to be processed housed in the processing chamber. Manufacturing equipment.   The semiconductor manufacturing apparatus according to claim 5, wherein a measuring instrument is installed in the processing chamber, and the measuring instrument measures a substrate temperature of the substrate to be processed.   A plurality of branch pipes are attached to the pipe attached to the processing chamber. These branch pipes supply the same gas to the processing chamber through the pipes, and the temperature of the gas is branched. The semiconductor manufacturing apparatus according to claim 1, wherein the semiconductor manufacturing apparatus is different for each pipe.   The gas introduced into the processing chamber is supplied from one of the plurality of branch pipes, and the branch pipe for supplying the gas is selected according to the substrate temperature of the substrate to be processed. Item 8. The semiconductor manufacturing apparatus according to Item 7.   The at least one 2nd branch piping is branched to the said piping so that the said gas may contact the outer side of the said processing chamber, The Claim 1 thru | or 8 characterized by the above-mentioned. Semiconductor manufacturing equipment.   A step of sequentially forming a gate insulating film and a gate electrode in an element region of the main surface of the first conductive type semiconductor substrate; and a step of ion-implanting a second conductive type impurity into the main surface of the semiconductor substrate using the gate electrode as a mask And heat-treating the semiconductor substrate to diffuse the ion-implanted impurities to form source / drain regions, the heat-treating step according to any one of claims 1 to 9. The method for manufacturing a semiconductor device is performed in the semiconductor manufacturing apparatus.

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