JP4485973B2 - Burst signal receiver - Google Patents

Description

  The present invention relates to a burst signal receiving apparatus that generates detection signals of burst packets arranged in a certain section with a signal sequence having different levels.

  Currently, the PON (Passive Optical Network) method is adopted for the network configuration and access circuit method of FTTH (Fiber To The Home), FTTB / C (Fiber To The Building / Curb), and FTTCab (Fiber To The Cabinet) services. There are many cases. In the PON system, an optical communication network is provided by an OLT (Optical Line Terminal) of a station side terminal device and an ONU (Optical Network Unit) of a user side terminal device. Here, the format of the optical transmission signal from the ONU to the OLT is a burst signal, and the OLT must have a function as an optical burst signal receiver. There are various PON systems such as ATM (Asynchronous Transfer Mode) -PON system, B (Broadband) -PON system, E (Ethernet (registered trademark))-PON system, etc. Signal.

One signal sequence among the signal sequences having different levels constituting such a burst signal is referred to herein as a burst packet. Since noise occurs in such no-signal portions between burst packets, a device that receives and reproduces burst signals outputs a detection signal when a burst packet is input, and does not output a detection signal otherwise. A function was desired. Conventionally, by inputting an input signal to an amplifier having a large gain using a fixed reference or reverse phase signal inside the IC as a threshold value, the output has been used as a burst packet detection signal.
Patent Document 1 is known as a conventional technique.
Japanese Patent Laid-Open No. 10-163828

In detecting burst packets, it is necessary to provide a margin so that no burst packet detection signal is output even though a burst signal that can be reproduced by the burst signal receiving device is input. Practically, it is necessary to be able to detect a burst packet that is -3 dBm smaller than the minimum input value that can be reproduced. When using a signal that has been regenerated using offset, noise generated in the no-signal part, or reset that occurs when a single-phase signal is converted into a two-phase signal, the noise caused by the reset causes the burst packet Since erroneous detection is performed, it is difficult to generate a detection signal for a burst packet.
The present invention has been made in consideration of the above circumstances, and an object thereof is to obtain a signal detect output which is a burst packet detection signal, and to improve the input dynamic range of the burst signal equivalent amplification IC. It is to provide a burst signal receiving apparatus capable of

The present invention has been made to solve the above-described problems. The present invention is directed to a photodiode that receives an optical burst signal, a high amplification factor when the signal level is low, and a high amplification factor when the signal level is low. in by amplifying, the optical module comprising a preamplifier for outputting a burst packet signals, the converts the current from the photodiode into a voltage signal of negative phase, enter the burst packet signals, the peak of the signal A positive phase in which the first peak detection circuit that maintains the output and the burst packet signal and the output of the first peak detection circuit are input and the difference is amplified to a value near the maximum value of the signal level with a high amplification factor and gain buffer for outputting a signal, a signal amplifying means including, inputs a signal from the gain buffer of the signal amplifying means, the peak value of the input signal A second peak detecting circuit for outputting an output at the falling edge of the input signal by decreasing the falling time determined by a connected capacitor and resistor, a predetermined threshold value, and the second peak. A burst signal receiving apparatus comprising: a comparator that inputs a detection circuit and outputs a comparison result of the input signal.
Thereby, when a burst packet signal is inputted, a signal detect output which is an output from the comparator can be obtained. Furthermore, even when 0 signal continues in one set of burst packet signals, the burst packet detection signal which is a signal detect signal can be kept standing within the range of one set of burst packet signals.

The burst signal receiving apparatus preferably further includes a current switch for extracting electric charge from the capacitor when a reset pulse is input.
As a result, when burst packet signals increase continuously, the decrease in output from the second peak detection circuit is forced to fall at the input timing triggered by the reset pulse in the no-signal portion between burst packet signals. Is possible.

The burst signal receiving apparatus preferably includes a plurality of the signal amplifying means , the signal amplifying means are connected in series, the burst packet signal is input to the first-stage signal amplifying means , and the last-stage signal The output of the gain buffer of the amplifying means is input to the second peak detection circuit.
As a result, when a desired high amplification factor is required, the amplification factor in each signal amplifying means can be lowered relative to the desired high amplification factor, resulting in a detection error in the first peak detection circuit. Error amplification can be suppressed.

Further, the burst signal receiver, gain buffer of the signal amplifying means of the final stage, the amplification factor is less than the gain buffers other signal amplifying means.
Thereby, it is possible to increase the cancellation efficiency for the error amplification in the signal amplifying means in the stage before the final stage signal amplifying means.

The burst signal receiving apparatus preferably further includes an input buffer for adjusting a signal level, and the burst packet signal is input to the signal amplifying unit via the input buffer.
Thereby, the burst packet signal adjusted to a voltage suitable for the gain buffer can be given to the gain buffer of the signal amplifying means. If a plurality of signal amplifying means are connected in series, the output from the gain buffer is input to the first stage signal amplifying means.

The present invention also provides a process of receiving an optical burst signal by a photodiode , and a preamplifier that amplifies at a low amplification factor when the signal level is high and amplifies at a high amplification factor when the signal level is low. a step of outputting a burst packet signal by converting a current into a voltage signal of opposite phase from, and enter the burst packet signal to a first peak detecting circuit, the peak of the signal from the peak detection circuit of the first The process of outputting while maintaining the value and the output of the burst packet signal and the output of the first peak detection circuit are input to the gain buffer, and the difference is amplified to a value near the maximum value of the signal level with a higher amplification factor than the gain buffer. a step of outputting a positive phase signal, and inputs the signal from the gain buffer, a second peak which outputs a peak value of the input signal In the output circuit, the output from the second peak detection circuit at the falling edge of the input signal is reduced and output at a fall time determined by a capacitor and a resistor connected to the second peak detection circuit; A burst signal receiving method comprising: inputting a predetermined threshold value and the second peak detection circuit to a comparator, and outputting a comparison result of the input signal from the comparator.

  According to the present invention, a signal detect output can be obtained, and the input dynamic range of the burst signal equivalent amplification IC can be improved.

  Embodiments of the present invention will be described below with reference to the drawings. The following examples do not limit the present invention, and all combinations of features described in the examples are not necessarily essential to the solution of the invention. FIG. 1 shows an optical module 10 in an optical burst signal receiving apparatus according to this embodiment, and a burst packet detector of an ATC-IC.30 which is a burst signal equivalent amplification IC (integrated circuit) (hereinafter referred to as ATC-IC). It is a block diagram which shows the structure of these. The optical burst signal receiving apparatus has a reset pulse generating circuit (not shown). The reset pulse generation circuit resets at a predetermined interval and a predetermined time (for example, 10 nanoseconds before) when the optical signal is input, using the timing grasped in the signal regeneration of the optical burst signal receiver. A pulse is input to the input terminal 37.

When an optical signal is input to the optical module 10, it is converted into an electrical signal, amplified, and output from the output terminal 13. That is, a change in current that occurs when an optical signal is input to the photodiode 11 is converted into a signal having a large voltage by the preamplifier 12. In the preamplifier 12, the input signal is amplified by the clamp method, and an electric signal having a phase opposite to that of the optical input signal is output from the output terminal 13.
An OE converter (photoelectric converter) including a preamplifier 12 constituting the optical module 10 converts an optical signal into an electrical signal using a clamp method.

  Here, as shown in FIG. 7 and FIG. 8, the clamp method means that the amplification factor changes depending on the input power level, and when the input power level is low, the amplification factor is high, while the input power level is high. This is an amplification method in which the amplification factor is lowered. 7 and 8 show examples of input signals and output signals of the optical module 10. For example, in the above-described ATM-PON system, this bias component is input before and during signal input. When there is no bias component in the input signal or the extinction ratio of the input signal is large and the bias component has little influence, the output signal has a waveform obtained by inverting the input signal as shown in FIG. 7, but the extinction ratio is generally small. Is input with a bias component having a magnitude as shown in FIG. 8, for example. When amplification is performed by the clamp method using this as an input, the amplification factor changes when the input power exceeds a certain level as shown in FIG. 8, and therefore, the reverse phase signal in which the bias component of the input signal in FIG. Become.

When amplification is performed at a high magnification by the clamp method, for example, when a signal in the range of 0V to 1V is amplified three times, if the entire signal is amplified three times, the swing of the signal becomes too large. A method is often used in which a 300 mV region between 1 and 1 V is tripled, a 700 mV region between 0 and 700 mV is accommodated in the remaining region, and then the whole is tripled. That is, the higher the amplification factor, the greater the proportion of the bias component of the amplified signal.
Such an output signal is output from the output terminal 13 of the optical module 10 and input to the input terminal 31 of the ATC-IC 30.

  The burst packet detector of the ATC-IC 30 outputs a burst packet detection signal from the comparator 36 based on the electrical burst signal input to the input terminal 31 and the reset signal input to the input terminal 37. Further, one end of a capacitor 51 and a resistor 52 is connected to the terminal 41 as an external component in the burst packet detection unit. One end of a reference 53 is connected to the terminal 42. The other end of the capacitor 51 and the resistor 52 and the other end of the reference 53 are grounded. The capacitor 51 and the resistor 52 function as a fall time adjustment circuit for the peak detection circuit 35.

  This burst packet detector is configured as follows. An input signal from the input terminal 31 is adjusted to a voltage suitable for input to the gain buffer 34 in the input buffer 32 and output. This output is branched into two, and one is output to the peak detection circuit 33. The peak detection circuit 33 maintains and outputs the peak value of the signal level. The other of the output of the peak detection circuit 33 and the output of the input buffer 32 that is branched in two is input to the gain buffer 34, and the voltage difference between the two input signals is amplified and output to the peak detection circuit 35. The gain buffer 34 amplifies at a high gain, for example, 50 times. Here, the peak detection circuit 33 and the gain buffer 34 constitute a signal amplification circuit.

The peak detection circuit 35 outputs the peak value of the signal level to the comparator 36. The peak detection circuit 35 is connected to the current switch 39 and the terminal 41. As shown in FIG. 2, the capacitor 51 and the resistor 52 connected to the peak detection circuit 35 via the terminal 41 adjust the fall time of the peak value output from the peak detection circuit 35, and at this fall time, Gradually falls to a signal level indicating zero. Assuming that the voltage at point F is V (F), the falling voltage is ΔV, the capacitance of the capacitor 51 is C, and the resistance value of the resistor 52 is R, the current i at the point F is Equation 1 below, and the fall time ΔT is It is represented by the following formula 2.
i = V (F) / R Formula 1
ΔT = (C × R × ΔV) / V (F) Equation 2
At this time, the waveform of the point D input to the peak detection circuit 35 and the waveform of the point F output from the peak detection circuit 35 are as shown in FIG.

  The current switch 39 forcibly returns the output of the peak detection circuit 35 to the signal level indicating 0 by extracting the charge accumulated in the capacitor 51 by the input of the reset pulse. That is, when a reset pulse output from a reset signal generation circuit (not shown) is input from the input terminal 37 to the current switch 39 via the input buffer 38, the charge is drawn out at that timing, so that the peak detection circuit 35 The falling output is forcibly returned to the signal level indicating 0.

  A reference 53 is connected to the comparator 36 via a peak detection circuit 35 and a terminal 42, and the output is inverted between a high level and a low level according to the output of the peak detection circuit 35 with the voltage of the reference 53 as a threshold value. . As described above, the capacitor 51 and the resistor 52 are connected to the peak detection circuit 35 in order to adjust the fall time of the waveform output from the peak detection circuit 35. The fall time increases or decreases the voltage of the reference 53. Thus, the falling of the waveform output from the comparator 36 can be adjusted.

  Next, the waveform of the signal of each part in FIG. 1 will be described with reference to FIG. As described with reference to FIG. 8, one burst packet as shown in FIG. 4A is output from the output terminal 13 of the optical module 10, and is generated by a reset pulse generation circuit (not shown). It is assumed that a reset pulse like that is input to the input terminal 37. At this time, the waveform at point C, which is the output of the peak detection circuit 33, and the waveform at point B, which is the output of the input buffer 32, are as shown in FIG. When the waveform at point B and point C is input and amplified in the gain buffer 34 at a high amplification factor, the region corresponding to the bias component is greatly amplified in the same manner as described with reference to FIG. Since the region to be amplified is small and sticks near the maximum value of the signal level, the waveform at the point D is as shown by the solid line in FIG.

The waveform at point F shown in FIG. 4D is as described with reference to FIG. The waveform at point E shown in FIG. 4 (e) indicates the voltage of the reference 53 in FIG. 1, and is a constant value. The output waveform of the comparator 36 that receives the waveform signals at the points E and F is as shown in FIG. This is used as a burst packet detection signal.
The reason for delaying the end of the burst packet detection signal in this way is as follows. The interval between burst packets is defined as the shortest by the standard as 8 bits, but there is no definition in the longest case. Next, a reset pulse is input before the start of the burst packet. Therefore, it is a problem to determine the end of a burst packet when 0 continues. In other words, if the burst packet detection signal is lowered when it is determined that the process is terminated when 0 continues, the burst signal is not reproduced. Therefore, based on the fact that the continuation of 0 is 72 bits at the maximum, it is necessary to keep the burst packet detection signal standing for 72 bits as a guide. The length of the signal for which the burst packet detection signal is kept standing is determined by adjusting the fall time ΔT in consideration of the transmission rate of the signal and the maximum number of bits in which 0 continues.

  In FIG. 5, a continuous burst packet is input as shown in FIG. 5A, and a reset pulse as shown in FIG. 5B is input to an input terminal 37 from a reset pulse generation circuit (not shown) before each burst packet is input. The waveform of each part is shown. FIG. 5 shows two burst packets for the sake of space, but the same applies when two or more burst packets are input. Since the second burst packet shown in (a) has a low signal level and the bias component is so small that it can be ignored, the waveform signals at points C and B shown in (c) are input to the gain buffer 34 and amplified. Compared with the waveform output from the gain buffer 34 for the first burst packet shown in (d), the signal portion of the second burst packet is greatly amplified by the gain buffer 34. The reset pulse is input to the input terminal 37 while the waveform at the point F gently falls, and the current is extracted from the capacitor 51 by the current switch 39 in FIG. 1, so that the waveform as shown by the dotted line in FIG. Has fallen sharply. Since the signals shown in FIGS. 5E and 5F are the same as the signals shown in FIGS.

  FIG. 6 shows a burst packet detection unit of the ATC-IC 40 in the second embodiment of the present invention. If the gain buffer 34 of FIG. 1 takes a large gain, for example, a gain of 50 times, an error in the peak value detected by the peak detection circuit 35 and an offset parasitic in the gain buffer 34 increase. In order to solve this, there is one signal amplifying circuit provided with the peak detection circuit 33 and the gain buffer 34 in FIG. 1, and one gain buffer 34, for example, a gain of 50 times is distributed to two. It is what you do. For example, as shown in FIG. 6, two signal amplifying circuits composed of a peak detection circuit and a gain buffer are provided, these signal amplifying circuits are connected in series, and the gain buffer 34a takes a gain of, for example, 25 times, For example, the gain buffer 34b takes a double gain.

  In this example, for example, if the error of one peak detection is 10 mV, an error of 10 mV is generated in the peak detection circuit 33 in FIG. 1, and this error is amplified 50 times in the gain buffer 34 to 500 mV. . On the other hand, when peak detection and amplification are performed in two steps as shown in FIG. 6, the 10 mV error generated in the peak detection circuit 33a is amplified 25 times in the gain buffer 34a to 250 mV in the above example. When the peak detection circuit 33b detects the peak and inputs it to the gain buffer 34b, the amplified error is canceled and the error of 10 mV is amplified twice by the gain buffer 34b. Therefore, it is possible to obtain a detection signal with less error than the burst packet detection unit of FIG.

In the second embodiment, an example in which the signal amplifier circuits are connected in series in two stages has been described. However, three or more signal amplifier circuits may be connected in series. In this case, the gain of the gain buffer in the signal amplification circuit in the final stage of the signal amplification circuit connected in series, that is, the signal amplification circuit that provides the input signal to the peak detection circuit 35 is amplified by the gain buffer of the other signal amplification circuit. It is preferable that the ratio is lower than the rate in terms of suppressing error amplification. For example, the amplification factor of the signal amplification circuit at the final stage is preferably doubled in the range of 1 to 5 times.
In the present embodiment, the burst signal receiving apparatus has been described as processing an optical burst packet signal, but the present invention is not limited to this. For example, the signal input to the burst signal receiving apparatus may be an electrical burst packet signal instead of an optical burst packet signal.

  The present invention is used in an optical burst signal receiving apparatus.

It is a block diagram which shows the structure of the optical burst signal receiver by the 1st Embodiment of this invention. It is a figure which shows the circuit which adjusts the fall of the waveform which the peak detection circuit 35 outputs. It is a figure which shows the fall of the waveform which the peak detection circuit 35 outputs. It is a figure which shows the waveform of each part when one burst packet is input in 1st Embodiment. It is a figure which shows the waveform of each part when two burst packets are input in 1st Embodiment. It is a block diagram which shows the structure of the optical burst signal receiver by the 2nd Embodiment of this invention. It is an example of an optical module output signal when there is no bias component in the optical module input signal. It is an example of an optical module output signal when there is a bias component in the optical module input signal.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Optical module 11 ... Photodiode 12 ... Preamplifier 13 ... Output terminal 30, 130 ... ATC-IC
31, 37 ... Input terminals 32, 38 ... Input buffers 33, 33a, 33b, 35 ... Peak detection circuits 34, 34a, 34b ... Gain buffers 36 ... Comparators 39 ... Current switches 41, 42 ... Terminals 51 ... Capacitors 52 ... Resistors 53 …reference

Claims (6)

A photodiode that receives an optical burst signal, and amplifies at a low amplification factor when the signal level is high and amplifies at a high amplification factor when the signal level is low, thereby converting the current from the photodiode into a voltage signal of opposite phase And an optical module including a preamplifier that outputs a burst packet signal,
Enter the burst packet signals, high and the first peak detection circuit configured to maintain the peak value of the signal, the input difference and output of said burst packet signal and the first peak detecting circuit amplification A gain buffer that outputs a positive-phase signal amplified to near the maximum value of the signal level at a rate , and a signal amplifying means including :
A circuit for inputting a signal from a gain buffer of the signal amplifying means and outputting a peak value of the input signal, wherein the output at the falling edge of the input signal is reduced at a falling time determined by a connected capacitor and resistor. And outputting a second peak detection circuit,
A comparator that inputs a predetermined threshold and the second peak detection circuit and outputs a comparison result of the input signal;
A burst signal receiving apparatus comprising:   The burst signal receiving apparatus according to claim 1, further comprising a current switch for extracting charge from the capacitor when a reset pulse is input. A plurality of the signal amplifying means ;
The signal amplification means are connected in series;
The burst packet signal is input to the first stage signal amplification means ,
The burst signal receiving apparatus according to claim 1, wherein the output of the gain buffer of the signal amplification means at the final stage is input to the second peak detection circuit. The gain buffer of the signal amplifying means at the last stage, the burst signal receiver according to claim 3, wherein the amplification factor is less than the gain buffers other signal amplifying means. An input buffer for adjusting the signal level;
The burst signal receiving device according to any one of claims 1 to 4, wherein the burst packet signal is input to the signal amplifying unit via the input buffer. The process of receiving an optical burst signal by a photodiode;
A preamplifier converts the current from the photodiode into a voltage signal of opposite phase as a burst packet signal by amplifying with a low amplification factor when the signal level is high and amplifying with a high amplification factor when the signal level is low. Output process,
A step of inputting the burst packet signal to a first peak detection circuit and maintaining and outputting the peak value of the signal from the first peak detection circuit;
A step of inputting the burst packet signal and the output of the first peak detection circuit to a gain buffer, and outputting a positive phase signal obtained by amplifying the difference to a value near the maximum value of the signal level with a higher gain than the gain buffer;
In the second peak detection circuit that inputs the signal from the gain buffer and outputs the peak value of the input signal, the output from the second peak detection circuit at the falling edge of the input signal is the second peak. The process of decreasing and outputting at the fall time determined from the capacitor and resistor connected to the detection circuit,
A step of inputting a predetermined threshold and the second peak detection circuit into a comparator, and outputting a comparison result of the input signal from the comparator;
A burst signal receiving method comprising:

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