JP4487373B2 - Integrated circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an integrated circuit, and more particularly to an integrated circuit incorporating a field effect transistor (FET).
[0002]
[Prior art]
In recent years, integrated circuits have various parasitic elements due to their structures. For example, in the case of an n-channel FET formed on an N-type semiconductor substrate, there is an NPN transistor as a parasitic element.
[0003]
FIG. 6 is a circuit configuration diagram of an example of a conventional integrated circuit.
[0004]
In FIG. 6, an integrated circuit (IC) 10 includes an audio processing circuit 7, a switching circuit 5, a switch 3, and power supplies 1 and 2. The integrated circuit 10 receives an audio signal from the audio input terminal 6, and an audio signal is amplified by the audio processing circuit 7. The audio signal subjected to the audio processing is supplied from the audio signal terminal 8 to the audio output terminal 9 according to the switching terminal 4.
[0005]
In the switching circuit 5, switching processing is performed by switching the switch 3. The switch 3 is switched to either the power source 1 or the power source 2 to switch on / off the sound output. The switching circuit 5 performs switching processing based on switching of the switch 3 using an FET, and a parasitic element transistor exists in the FET.
[0006]
FIG. 7 is a diagram showing a circuit configuration of a switching circuit as an example of the prior art.
[0007]
In FIG. 7, the switching circuit 5 is connected to the switch 3 and the switching terminal 4. In the switching circuit 5, switching processing is performed by connecting the power source 1 or the power source 2 of the switch 3, and the switching signal generated by the switching processing is sent to the switching terminal 4.
[0008]
The switching circuit 5 includes resistors R1 and R2, FETa, and a power source 24. The parasitic transistor Tr1 is parasitic on the FETa due to its structure.
[0009]
The resistor R1 is connected to the switch 3 and the FETa. The resistor R2 is connected to the resistor R1 and the base of the parasitic transistor Tr1. In FETa, the gate a-1 is connected to the resistors R1 and R2, the drain a-2 is connected to the switching terminal 4, and the source a-3 is connected to GND. In the parasitic transistor Tr1, the base is connected to the FETa, the collector is connected to the power supply 24, and the emitter is connected to GND.
[0010]
When the drain voltage Vdd of the power supply 24 is applied to the entire integrated circuit and a voltage is applied to the gate a-1 of the FETa in accordance with the switching of the switch 3, the FETa is turned on / off. When the FETa is turned on, a current flows from the drain a-2 to the source a-3.
[0011]
At the same time, the back gate a-4 is controlled by the power source connected to the switch 3. When power is supplied to the back gate a-4, a current flows to the base of the parasitic transistor Tr1, and the parasitic transistor Tr1 is turned on, whereby a current flows from the substrate 34 (FIG. 8).
[0012]
FIG. 8 shows a cross-sectional view of an FET of a switching circuit as an example of the prior art.
[0013]
The FETa shown in FIG. 8 is formed in the p-type diffusion layer 33 formed on the n-type semiconductor substrate 34. The FETa includes an electrode 31 made of a metal such as aluminum, an insulating film 30, and an n-type diffusion layer 32. This FETa is an n-channel FET, and a voltage Vdd is applied to the n-type semiconductor substrate 34 from the power supply 24.
[0014]
The FETa is turned on when the gate a-1 becomes high level and turned off when the gate a-1 becomes low level. In FETa, an n-type semiconductor substrate 34 functions as a collector, a P-type diffusion layer 33 serves as a base, an n-type diffusion layer 32 serves as an emitter, and an NPN transistor Tr1 exists structurally. Therefore, when a voltage is applied to the back gate a-4, a voltage is applied to the base of the parasitic transistor Tr1, and when the parasitic transistor Tr1 is turned on, the collector current is changed from the n-type semiconductor substrate 34 to the p-type diffusion layer 33 and the n-type. It flows to the diffusion layer 32.
[0015]
FIG. 9 is a diagram showing a timing chart of each element of the switching circuit as an example of the prior art.
[0016]
In FIG. 9, the switch 3 of the switching circuit 5 switches the audio output of the integrated circuit by switching the power source 1 or the power source 2. Audio is output when the switch 3 is connected to the power source 2 and is not output when the switch 3 is connected to the power source 1. When the switch 3 is connected to the power source 2, no voltage is applied to the gate a-1 of the FETa, and it becomes a low level. The FETa is turned off when no voltage is applied to the gate a-1. At this time, since the back gate a-4 of the parasitic transistor Tr1 is at a low level, the base voltage is at a low level and is turned off. Therefore, when the switch 3 is connected to the power supply 2, the parasitic transistor Tr1 is turned off.
[0017]
On the other hand, when the switch 3 is connected to the power source 1, a voltage is applied to the gate a-1 and becomes a high level. Since a voltage is applied to the gate a-1 of the FETa, a current flows from the drain a-2 to the source a-3, and the FETa is turned on. At this time, in the parasitic transistor Tr1, a current flows through the back gate a-4, and a voltage is applied to the base. Therefore, when the switch 3 is connected to the power supply 1, the parasitic transistor Tr1 is turned on, and a parasitic current flows to the ground through the source of the FETa.
[0018]
[Problems to be solved by the invention]
As described above, the FETa has a parasitic transistor due to its structure, and when a voltage is applied to the back gate of the FETa, a current flows through the parasitic transistor and the current is unnecessarily consumed.
[0019]
Accordingly, an object of the present invention is to solve the above-described conventional problems, and to provide an integrated circuit capable of preventing current flowing in a parasitic element and reducing power consumption.
[0020]
[Means for Solving the Problems]
The present invention relates to an integrated circuit having an audio processing circuit (14) and a switching circuit (18) connected between the audio output (15) of the audio processing circuit (14) and the ground, and for muting the audio signal . ,
The switching circuit (18)
One n-channel field effect transistor (b) having a drain connected to the audio output (15) and a source connected to the ground ;
The n-channel field effect transistor (b) is connected between the back gate and the ground, and is turned on when the gate of the n-channel field effect transistor (b) is turned on and turned off when the gate is turned off. and one switch means (22), characterized by having a.
[0021]
According to the present invention, by including the switch means (22) for turning off the base (b-4) of the parasitic transistor (Tr2) of the switching circuit (18) having the field effect transistor (b), the parasitic transistor ( The parasitic current flowing through Tr2) can be prevented, and the power consumption of the integrated circuit can be reduced.
[0023]
According to the present invention, the switching means (22) is connected to the back gate of the field effect transistor (b) of the switching circuit (18) and the ground, thereby preventing the parasitic current flowing in the parasitic transistor (Tr2). And power consumption of the integrated circuit can be reduced.
[0024]
In addition, the code | symbol in said parenthesis is attached | subjected in order to make an understanding of this invention easy, is only an example, and is not limited to these.
[0025]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a diagram showing an integrated circuit provided with a switching circuit according to an embodiment of the present invention.
[0026]
In FIG. 1, an integrated circuit (IC) 12 includes an audio processing circuit 14, a switching circuit 18, a switch 19, and power supplies 20 and 21. The integrated circuit 12 receives an audio signal from A which is an audio input terminal 13, and the audio processing circuit 14 amplifies the audio signal. The audio signal subjected to the audio processing is supplied from B of the audio signal terminal 15 to C of the audio output terminal 16 according to the signal of the switching terminal 17.
[0027]
In the switching circuit 18, switching processing is performed by switching the switch 19. The switch 19 is switched to either the power source 20 or the power source 21 to switch on / off the sound output. The switching circuit 18 uses a FET to perform a switching process in accordance with the switching of the switch 19, but a parasitic transistor exists in the FET. When this FET is turned on, the transistor is turned on and a parasitic current flows.
[0028]
FIG. 2 is a diagram showing waveforms relating to an integrated circuit which is an embodiment of the present invention.
[0029]
A waveform in FIG. 2A is a voice waveform at the voice input terminal 13 shown in FIG. A waveform B in FIG. 2 is an output waveform of the audio processing circuit 14. A waveform C in FIG. 2 is a waveform indicating the state of the switching circuit 18.
[0030]
The audio waveform A is amplified by the audio processing circuit 14 and output to the audio signal terminal 15. In the output waveforms of B and C, the output of the audio processing circuit 14 is output from the audio output terminal 16 while the switching circuit 18 is off. When the switching circuit 18 is turned on at time t, the output of the audio processing circuit 14 flows to the ground via the switching circuit 18, so that no audio is output from the audio output terminal 16.
[0031]
Next, the switching circuit 18 will be described in detail.
[0032]
FIG. 3 is a diagram showing a circuit configuration of a switching circuit according to an embodiment of the present invention.
[0033]
In FIG. 3, the switching circuit 18 is connected between the audio output terminal 16 and the ground. In the switching circuit 18, the switch 19 is turned on / off in accordance with switching between the power source 20 and the power source 21.
[0034]
The switching circuit 18 includes a resistor R3, an FETb, and a switch 22. The resistor R3 is connected between the switch 19 and the FETb. The FET b has a gate b-1 connected to the resistor R3, a drain b-2 connected to the switching terminal 17, and a source b-3 connected to GND. The switch 22 is connected between the base of the parasitic transistor Tr2, the back gate of the FETb, and GND.
[0035]
The switch 22 is turned on when the gate voltage of the FETb is high level and turned off when the gate voltage is low level.
[0036]
When the gate b-1 of the FETb becomes high level according to the switching of the switch 19, the FETb is turned on. When the FETb is turned on, a current flows between the drain b-2 and the source b-3.
[0037]
At this time, when the back gate of the FETb is also set to the high level, the switch 22 is turned on. When the switch 22 is turned on, the current does not flow through the back gate b-4, but flows through the GND serving as the off-voltage power source. Therefore, no current flows through the base of the parasitic transistor Tr2, and the transistor is turned off. By controlling the current flowing through the back gate b-4 by switching the switch 22, it is possible to prevent the current from flowing through the base of the parasitic transistor Tr2. Therefore, no current flows through the parasitic transistor Tr2, and the power consumption of the switching circuit 18 can be suppressed.
[0038]
FIG. 4 is a diagram showing a sectional view of the FET of the switching circuit according to the embodiment of the present invention.
[0039]
The FETb shown in FIG. 4 is formed in a p-type diffusion layer 38 formed on the n-type semiconductor substrate 39. The FETb is composed of an electrode 35 made of a metal such as aluminum, an insulating film 36, and an n-type diffusion layer 37. This FETb is an n-channel FET, and a voltage Vdd is applied to the n-type semiconductor substrate 39 from the power supply 23.
[0040]
The FETb is turned on when the gate b-1 becomes high level and turned off when the gate b-1 becomes low level.
[0041]
When the gate b-1 becomes high level, the back gate b-4 also becomes high level. When the back gate b-4 is set to the high level, the switch 22 is turned on. When the switch 22 is turned on, the base of the parasitic transistor Tr2 is connected to GND. Therefore, the parasitic transistor Tr2 is turned off.
[0042]
FIG. 5 is a timing chart of each element of the switching circuit according to the embodiment of the present invention.
[0043]
In FIG. 5, the switch 19 of the switching circuit 18 mutes the audio output of the integrated circuit by switching the power source 20 or the power source 21. Audio is output when the switch 19 is connected to the power source 21 and is not output when the switch 19 is connected to the power source 20.
[0044]
When the switch 19 is connected to the power source 20, the gate b-1 of the FETb is at a low level. The FETb is turned off when the gate b-1 is at a low level. At this time, the switch 22 is turned off. Further, since the base of the parasitic transistor Tr2 is at a low level, the parasitic transistor Tr2 is turned off.
[0045]
On the other hand, when the switch 19 is connected to the power source 21, the gate b-1 becomes high level. The FETb is turned on when the gate b-1 becomes high level, and a current flows from the drain b-2 to the source b-3.
[0046]
At this time, the switch 22 is turned on. When the switch 22 is turned on, the base of the parasitic transistor Tr2 is grounded and turned off. Therefore, no current flows through the parasitic transistor Tr2.
[0047]
Accordingly, by turning on / off the switch 22 as described above, it is possible to prevent the parasitic transistor Tr2 from being turned on when the FETb is turned on. Thereby, the parasitic current flowing through the parasitic transistor Tr2 can be prevented, and the power consumption can be suppressed.
[0048]
The present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention.
[0049]
【The invention's effect】
According to the integrated circuit of the present invention, by having the switch means for turning off the base of the parasitic transistor of the switching circuit which is a field effect transistor, the parasitic current flowing through the parasitic transistor can be prevented, and the power consumption of the integrated circuit Can be reduced.
[0050]
Further, according to the integrated circuit of the present invention, by connecting the switch means to the back gate and the ground of the field effect transistor of the switching circuit, it is possible to prevent the parasitic current flowing in the parasitic transistor and reduce the power consumption of the integrated circuit. Can be made.
[Brief description of the drawings]
FIG. 1 is a diagram showing an integrated circuit provided with a switching circuit according to an embodiment of the present invention.
FIG. 2 is a diagram showing waveforms related to an integrated circuit according to an embodiment of the present invention.
FIG. 3 is a diagram showing a circuit configuration of a switching circuit according to an embodiment of the present invention.
FIG. 4 is a diagram showing a cross-sectional view of an FET of a switching circuit according to an embodiment of the present invention.
FIG. 5 is a timing chart of each element of the switching circuit according to the embodiment of the present invention.
FIG. 6 is a circuit configuration diagram of an example of a conventional integrated circuit.
FIG. 7 is a diagram showing a circuit configuration of a switching circuit as an example of the prior art.
FIG. 8 shows a cross-sectional view of an FET of a switching circuit as an example of the prior art.
FIG. 9 is a diagram illustrating a timing chart of each element of a switching circuit as an example of the prior art.
[Explanation of symbols]
1, 2, 20, 21 Power source 3, 19, 22 Switch 4, 17 Switching terminal 5, 18 Switching circuit 10, 12 Integrated circuit (IC)
7, 14 Audio processing circuit a, b FET
Tr1, Tr2 Parasitic transistor

Claims (1)

In an integrated circuit having a switching circuit that is connected between an audio processing circuit and an audio output of the audio processing circuit and a ground and performs mute of the audio signal ,
The switching circuit is
One n-channel field effect transistor having a drain connected to the audio output and a source connected to the ground ;
A switch means connected between the back gate of the n-channel field effect transistor and the ground, and turned on when the gate of the n-channel field effect transistor is turned on and turned off when the gate is turned off ; An integrated circuit comprising:

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