JP4493140B2 - Multilayer circuit board - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a structure of an end face terminal electrode of a multilayer circuit board using a glass-ceramic substrate material as an insulating layer and a conductive material such as silver as an internal wiring pattern.
[0002]
[Prior art]
Conventionally, a multilayer circuit board using a material that can be fired at a relatively low firing temperature of 800 to 1050 ° C. has been proposed.
[0003]
A typical structure of such a multilayer circuit board has an internal wiring pattern between each layer of a multilayer substrate composed of a plurality of insulating layers, and at the same time, a via-hole conductor that connects a predetermined internal wiring pattern in the thickness direction of the multilayer substrate. Furthermore, a surface wiring pattern for mounting an IC chip and various chip-shaped electronic components was formed on the surface of the multilayer substrate.
[0004]
In such a multilayer circuit board, a low resistance material such as silver can be used as the material of the wiring pattern, so that the conductivity of the predetermined circuit network can be increased. This makes it relatively easy to increase the circuit operation speed and handle high-frequency operations.
[0005]
Usually, the multilayer circuit board is connected to a predetermined wiring (external circuit) mounted on the printed wiring board. Specifically, an input / output terminal electrode is formed on the bottom surface of the multilayer circuit board, or a planar terminal electrode is formed on the end surface of the multilayer circuit board, and is connected via solder or the like. Furthermore, after forming input / output terminal electrodes on the surface of the multilayer circuit board and mechanically bonding (mounting) to the printed wiring board, bonding between the input / output terminal electrodes on the surface side and the predetermined wiring on the printed wiring board is performed. It was connected via a wire.
[0006]
In recent years, the demand for miniaturization of multilayer circuit boards has increased, and as a result, a semicircular recess extending in the thickness direction is formed on the end surface of the multilayer circuit board to form a junction structure with an external printed wiring board. An inner wall conductor film that is electrically connected to the land electrode connected to the internal wiring pattern is formed on the inner wall surface of the shape recess. Hereinafter, such a structure is simply referred to as a semicircular terminal electrode.
[0007]
Then, the multilayer circuit board and the printed wiring board are joined to each other in a mechanical and electrical manner by soldering the semicircular terminal electrodes (Japanese Patent Laid-Open No. 9-330991). As a result, when the multilayer circuit board and the printed wiring board are joined via solder, the solder rising portion (meniscus) is formed in the semicircular terminal electrode recessed from the end surface of the multilayer circuit board to the inside. As a result, a multilayer circuit board having a small mounting area on the printed wiring board is achieved.
[0008]
FIG. 4 is a perspective view of a circular terminal electrode portion of a conventional multilayer circuit board.
[0009]
In FIG. 4, 1 is a multilayer circuit board, 1a to 1e are insulating layers, 61 is a semicircular terminal electrode, 71a to 71f are land electrodes, and 81a to 81f are connected to a predetermined wiring pattern. It is a connection part.
[0010]
[Problems to be solved by the invention]
However, although the semicircular terminal electrode 61 of the multilayer circuit board 1 has the conductor film 61b formed on the inner surface of the recess 61a, at the same time, the land electrodes 71a to 71f are formed on the end surface portions of the multilayer circuit board 1. Both ends were exposed.
[0011]
When a plurality of semicircular terminal electrodes 61 are arranged on the end face of the multilayer circuit board 1, the exposed portions at both ends of the land electrodes 71 a to 71 f are close to each other at the adjacent terminal electrodes 61. As a result, there is a problem in that migration occurs between the exposed portions when soldered onto the printed wiring board.
[0012]
Further, the connection pattern connecting the land electrode and the internal wiring pattern is opposed to each other through the insulating layer, and a stray capacitance component is generated between them, particularly in a circuit operating at high frequency, which adversely affects the high frequency characteristics. There was a thing.
[0013]
The present invention has been devised in view of the above-described problems, and an object of the present invention is to provide a circuit board having a terminal electrode structure that can prevent migration between semicircular terminal electrodes and has little deterioration in high-frequency characteristics due to stray capacitance. Is to provide.
[0014]
[Means for Solving the Problems]
The present invention forms an Ag-based internal wiring pattern and a land electrode between each insulating layer of a multilayer circuit board formed by laminating insulating layers made of a glass-ceramic material that can be fired at 800 ° C. to 1050 ° C. In the multilayer circuit board formed by forming a semicircular recess on the end face of the multilayer circuit board and exposing a part of the land electrode on the inner wall of the recess, the land electrode and the internal wiring pattern are provided between the insulating layers. In the multilayer circuit board, the connection patterns to be connected are formed and alternately formed between the insulating layers adjacent to each other in the stacking thickness direction when the connection patterns are viewed in plan.
[0015]
Preferably, the land electrode is a multilayer circuit board in which both end portions of the land electrode are disposed on the inner side at least 100 μm or more from the end face of the multilayer circuit board.
[Action]
In the multilayer circuit board according to the present invention, the formation positions of the connection patterns between the land electrodes and the internal wiring patterns are alternated between adjacent insulating layers in the stacking thickness direction. For this reason, the stray capacitance component generated between the connection patterns adjacent to each other in the stacking thickness direction can be suppressed.
[0016]
As a result, in a circuit that performs high-frequency operation, fluctuations in high-frequency characteristics can be prevented, and stable circuit operation becomes possible.
[0017]
Further, both end portions of the land electrode constituting the semicircular terminal electrode are arranged so as to be located inside from the end face of the substrate. That is, the land electrode is exposed in the semicircular recess, but its both end portions are not exposed from the end face of the laminated substrate.
[0018]
Therefore, migration does not occur between the semicircular terminal electrodes adjacent to each other on the multilayer circuit board. In order to completely prevent this migration, it is important that both end portions escape from the end face of the laminated substrate to the inner side by 100 μm or more in consideration of the misalignment of the laminated position.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a multilayer circuit board of the present invention will be described with reference to the drawings.
[0020]
FIG. 1 is a cross-sectional view of a multilayer circuit board according to the present invention, and FIG. 2 is a perspective view of a semicircular terminal electrode portion.
[0021]
In FIG. 1, 1 is a multilayer circuit board, 10 is a laminated board, 1a to 1f are insulating layers, 6 is a semicircular terminal electrode, 7a to 7f are land electrodes, and 8a to 8f. Is a connection pattern (connection part) connected to a predetermined wiring pattern. 2 is an internal wiring pattern, 3 is a via-hole conductor, 4 is a surface wiring pattern formed on the surface of the laminated substrate 10, and 5 is an electronic component element.
[0022]
The multilayer substrate 10 constituting the multilayer circuit board 1 is used to achieve a predetermined circuit network or generate a capacitance component between the insulating layers 1a to 1e made of glass-ceramic material and the insulating layers 1a to 1e. An internal wiring pattern 2 is arranged. The insulating layers 1a to 1e are formed with via-hole conductors 3 that penetrate the thickness direction of the layers.
[0023]
The insulating layers 1a to 1e are made of a glass-ceramic material that can be fired at a relatively low temperature of about 850 to 1050 ° C., for example. Specific examples of the ceramic material include cristobalite, quartz, corundum (α alumina), mullite, and cordierite. Further, by firing a glass frit containing a plurality of metal oxides as a glass material, at least one kind of crystals of cordierite, mullite, anorthite, serdian, spinel, garnite, willemite, dolomite, petalite and substituted derivatives thereof are used. Is precipitated. The insulating layers 1a to 1e have a thickness of about 100 to 300 μm, for example.
[0024]
The internal wiring pattern 2 and the via-hole conductor 3 are made of a conductor film (conductor) whose main component is a silver-based material (silver alone or a silver alloy such as Ag—Pd). For example, the internal wiring pattern 2 has a thickness of about 8 to 15 μm, and the via-hole conductor 3 can have an arbitrary diameter, for example, 80 to 250 μm.
[0025]
A surface wiring pattern 4 is formed on the surface of the multilayer substrate 10. The surface wiring pattern 4 is made of, for example, a conductor material whose main component is a silver-based material. The surface wiring pattern 4 forms a predetermined circuit network and is a connection pad for joining an electronic component element 5 joined via solder, or a terminal electrode of a thick film resistive film or a thick film capacitor element. Or connecting with the via-hole conductor 3. Further, it may be a connection pad connected to the electronic component element 5 such as an IC chip mounted on the surface of the multilayer substrate 10 by a bonding fine wire.
[0026]
On the surface of the multilayer substrate 10, the IC component and the electronic component element 5 of each chip component are arranged.
[0027]
A semicircular terminal electrode 6 is formed on the end face of the multilayer substrate 10. The semicircular terminal electrode 6 is composed of a recess 6a on a semi-cylinder formed on the end face of the laminated substrate 10 and a conductor film 6b formed on the inner wall surface of the recess 6a.
[0028]
As shown in FIG. 2, the conductor film 6b of the semicircular terminal electrode 6 and the wiring patterns 2 and 4 are connected to the land electrodes 7a to 7f formed around the recess 6a and the wiring patterns 2 and 4, respectively. Are formed of connection patterns 8a to 8f.
[0029]
Here, both end portions of the land electrodes 7 a to 7 f are arranged so as to enter 100 μm or more from the end surface of the multilayer substrate 10, and are not exposed at all from the end surface of the multilayer substrate 10.
[0030]
The semi-cylindrical recess 6a constituting the semicircular terminal electrode 6 has an opening width of 100 μm or more.
[0031]
Here, the land electrode 7 a constituting the semicircular terminal electrode 6 is a land electrode formed on the surface of the multilayer substrate 10, and the connection pattern 8 a is connected to the surface wiring pattern 4.
[0032]
The land electrode 7b is a land electrode formed between the insulating layers 1a and 1b constituting the multilayer substrate 10, and the connection pattern 8b is connected to the internal wiring pattern 2 formed between the layers. Is.
[0033]
Further, the land electrode 7c is a land electrode formed between the insulating layers 1b and 1c constituting the laminated substrate 10, and the connection pattern 8c is connected to the internal wiring pattern 2 formed between the layers. Is.
[0034]
Similarly, the land electrodes 7d and 7e are land electrodes formed between the insulating layers 1c and 1d and the insulating layers 1d and 1e constituting the multilayer substrate 10, respectively, and the connection patterns 8d and 8e. Is connected to the internal wiring pattern 2 formed between the layers.
[0035]
Such land electrodes 7a and 7f and connection patterns 8a and 8f have substantially the same structure as the surface wiring pattern 4 and are formed in the same process.
The land electrodes 7b to 7e and the connection patterns 8b to 8e are formed in the same process with the same structure as the internal wiring pattern 2 arranged between the insulating layers 1a to 1f.
[0036]
Here, in the multilayer circuit board of the present invention, the connection patterns 8b to 8e (substantially the internal wiring pattern 2 of the internal wiring pattern 2) for connecting the land electrodes 7b to 7e and the internal wiring pattern 2 disposed between the corresponding insulating layers. Are formed alternately between adjacent insulating layers 1a and 1b, 1b and 1c, 1c and 1d,.
[0037]
Preferably, the adjacent connection patterns 8b to 8e are ideally not opposed at all as shown in FIG. 2 in the thickness direction of the insulating layer.
[0038]
Further, as described above, both ends of the land electrodes 7 a to 7 f formed in and on the surface of the multilayer substrate 10 are arranged so as to enter 100 μm or more from the end surface of the multilayer substrate 10 to the inner side.
[0039]
First, since the connection patterns 8b to 8e arranged in the thickness direction are displaced from each other, the generation of stray capacitance that occurs in the thickness direction of the adjacent connection patterns 8b to 8e can be reduced.
[0040]
In particular, in a wiring pattern constituting a circuit that operates at a high frequency, the tip portion is connected to the same potential. However, if the capacitance is separated from the same potential portion, the characteristics of the high frequency operation greatly vary as the distance increases.
[0041]
In the above description, the connection patterns 8a and 8f formed on the surface of the multilayer substrate 10 are not described in detail. However, when it is necessary to form the connection patterns 8a and 8f on the surface, the example shown in FIG. Thus, it is important to alternately form the connection patterns 8a and 8b and the connection patterns 8e and 8f.
[0042]
As described above, the portions of the land electrodes 7a to 7f that are exposed to the recess 6a are covered with the conductor film 6b. Therefore, even if the land electrodes 7a to 7f face each other in the stacking thickness direction, the stray capacitance generated in this portion. The component has no significant effect on the high frequency characteristics.
[0043]
Note that it is important that the electrode width (the distance entering the inside from the recess 6a) of the land electrodes 7a to 7f is substantially 100 μm or less in order to reduce the influence of unnecessary capacitance. If the electrode width is greater than this value, the electrode is separated from the connection portion, and the stray capacitance component cannot be ignored in the high-frequency circuit.
[0044]
A method for manufacturing such a multilayer circuit board will be described.
[0045]
First, green sheets to be the insulating layers 1a to 1e made of glass-ceramic material are formed. Specifically, a slurry in which ceramic powder, a low melting glass component frit, an organic binder, and an organic solvent are homogeneously kneaded is taped to a predetermined thickness by a doctor blade method and cut into a predetermined size to produce a sheet. .
[0046]
The ceramic powder is an insulating ceramic material such as cristobalite, quartz, corundum (α alumina), mullite, cordierite, etc., dielectric ceramic material such as BaTiO ₃ , Pb ₄ Fe ₂ NbO ₁₂ , TiO ₂ , Ni—Zn ferrite, Mn— Examples thereof include magnetic ceramic materials such as Zn ferrite (referred to as ceramic in a broad sense), and those having a mean particle size of 1.0 to 6.0 μm, preferably 1.5 to 4.0 μm are used. Two or more ceramic materials may be mixed and used. In particular, use of corundum is advantageous in terms of cost.
[0047]
The frit of a low melting glass component is one that deposits crystals of cordierite, mullite, anorthite, serdian, spinel, garnite, willemite, dolomite, petalite and their substituted derivatives and spinel structure by firing. For example, a glass frit containing B ₂ O ₃ , SiO ₂ , Al ₂ O ₃ , ZnO, or an alkaline earth oxide can be given.
[0048]
Such a glass frit has a wide vitrification range and has a yield point in the vicinity of 600 to 800 ° C., so that it is suitable for low-temperature firing at about 850 to 1050 ° C., and an Ag-based internal wiring pattern 2 and an Ag-based surface wiring pattern 4 The sintering behavior with the conductor film is similar. In addition, the average particle diameter of this glass frit is 1.0-6.0 micrometers and 1.5-3.5 micrometers.
[0049]
Since the ceramic material and the glass material are fired at a relatively low temperature of 850 to 1050 ° C., the ceramic material is 10 to 60 wt%, preferably 30 to 50 wt%, and the glass material is 90 to 40 wt%. %, Preferably 70 to 50 wt%.
[0050]
Organic binders must also have good wettability with solids (ceramic powder, low melting point glass frit), and have excellent thermal decomposability so that they can be burned off at a relatively low temperature and in a short firing process An ethylenically unsaturated compound having a carboxyl group and an alcoholic hydroxyl group such as an acrylic acid or methacrylic acid polymer is preferable.
[0051]
As the solvent, an organic solvent or an aqueous solvent can be used. For example, in the case of an organic solvent, 2.2.4-trimethyl-1.3-pentanediol monoisoventate or the like is used, and in the case of an aqueous solvent, it needs to be water-soluble. A hydrophilic functional group, for example, a carboxyl group is added to.
The addition amount is 2 to 300 in terms of acid value, and preferably 5 to 100. If the added amount is small, the solubility in water and the dispersibility of the fixed component powder will be poor, and if it is large, the thermal decomposability will be poor. Is added as appropriate within the above-mentioned range.
[0052]
Next, in the green sheets to be the insulating layers 1a to 1e, through holes having a predetermined diameter are formed by punching corresponding to the positions where the via-hole conductors 3 of the respective layers are formed. At the same time, a through hole for forming the terminal electrode 6 recess 6 a is formed in a portion located on the end face of the multilayer substrate 10.
[0053]
Next, a conductor to be the via-hole conductor 3 is formed by printing and filling an Ag-based conductive paste inside the through hole to be the via-hole conductor 3 of the green sheet to be the insulating layers 1a to 1e. Further, a conductor to be the internal wiring pattern 2 and a conductor film to be the surface wiring pattern 4 are formed on the surfaces of the insulating layers 1a to 1e by printing with an Ag-based conductive paste. In forming the conductor film to be the internal wiring pattern 2 and the surface wiring pattern 4, the conductor film to be the land electrodes 7 a to 7 f and the land electrodes 7 a to 7 e to be in contact with the through hole to be the recess 6 a of the terminal electrode 6 Conductive films to be the connection patterns 8a to 8e for connecting to the wiring patterns 2 and 4 are formed by printing an Ag-based conductive paste. When forming the conductor films to be the land electrodes 7a to 7e, the printing plate making is controlled so that the conductive paste is also applied to a part of the inner wall surface of the through hole.
[0054]
Here, the Ag-based conductive paste for forming the conductor film to be the via-hole conductor 3, the internal wiring pattern 2, the land electrodes 7a to 7e, and the connection patterns 8a to 8e is Ag-based (Ag simple substance, Ag alloy such as Ag-Pd). ) A powder, a borosilicate low-melting glass frit, an organic binder such as ethyl cellulose, and a solvent mixed in a homogeneous manner are used.
[0055]
Further, the Ag-based conductive paste for forming the conductor film to be the surface wiring pattern 4 is a mixture in which Ag powder is the main component and Pt powder, low melting point glass frit, organic binder, and solvent are homogeneously mixed. In addition, when V ₂ O ₅ powder is added in an amount of 0.2 to 1.0 wt% with respect to each metal component, the adhesive strength with the laminated substrate 10 is preferably improved.
Next, the green sheets to be the insulating layers 1 a to 1 e are stacked and integrated according to the stacking order of the stacked substrates 10.
[0056]
Next, as necessary, a conductive film, land electrode 7f, and connection pattern 8f to be the surface wiring pattern 4 are formed on the lower surface of the unfired multilayer substrate 10 by printing the conductive paste as described above. To do.
[0057]
Next, a conductor film to be the conductor film 6b is printed and applied to the inner wall surface of the through hole to be the terminal electrode 6 with a conductive paste whose main component is an Ag-based material.
[0058]
Next, a division groove is formed in this unfired laminated body so as to straddle the through-hole that becomes the terminal electrode 6.
[0059]
Next, the unfired laminate is fired in an oxidizing atmosphere or an air atmosphere. The firing process consists of a binder removal process and a sintering process.
[0060]
The binder removal process includes a green sheet to be the insulating layers 1a to 1e, a conductor film to be the internal wiring pattern 2, a conductor to be the via-hole conductor 3, a conductor film to be the surface wiring pattern 4, a conductor film to be the land electrodes 7a to 7f, This is intended to burn off the organic components contained in the conductor film to be the connection patterns 8a to 8f and the conductor film to be the conductor film 6b, and is performed in a temperature region of 600 ° C. or less, for example.
[0061]
In addition, the sintering process crystallizes the glass component of the glass-ceramic green sheet, and at the same time, uniformly disperses it at the grain boundaries of the ceramic powder to give the laminate a certain strength, and a conductor film that becomes the internal wiring pattern 2; Conductor to be via-hole conductor 3, conductor film to be surface wiring pattern 4, conductor film to be land electrodes 7a to 7f, conductor film to be connection patterns 8a to 8f, metal powder of conductor film to be conductor film 6b, Ag-based powder By making the grains grow, the resistance of each conductor is reduced and integrated with the insulating layers 1a to 1e. This is done until the peak temperature reaches 850-1050 ° C.
[0062]
In this step, the laminated substrate 10 in which the internal wiring pattern 2 and the via-hole conductor 3 are formed inside and the surface wiring pattern 4 is formed on the surface is achieved.
[0063]
Thereafter, if necessary, a thick film resistance film connected to the surface wiring pattern 4 or an insulating protective film having a predetermined shape is formed, and various electronic component elements 5 are joined and mounted. The joining structure differs depending on the various electronic component elements 5. For example, in a chip-shaped electronic component, the surface wiring pattern 4 is joined with solder. Further, in the IC chip, wire bonding is performed using a bonding fine wire of Al or Au with the surface wiring pattern 4.
[0064]
Thereafter, a dividing / cutting process is performed along the dividing grooves formed in each laminated substrate 10. Thereby, the multilayer circuit board shown in FIG. 1 is achieved. In addition, you may perform joining using the bonding fine wire of an IC chip and the surface wiring pattern 4 after a division | segmentation process.
[0065]
Moreover, the through hole that becomes the semicircular terminal electrode 6 is formed in each green sheet on which the conductor film that becomes the internal wiring pattern 2, the conductor film that becomes the land electrodes 7a to 7f, and the conductor film that becomes the connection patterns 8a to 8f are formed. Then, each lamination process may be performed.
[0066]
Note that other examples of the shapes of the land electrodes 7a to 7f (generally simply given the reference numeral 7) and the connection patterns 8a to 8f (generally simply given the numeral 8) are shown in the figure.
[0067]
In each of FIGS. 3A to 3E, the center circle is a through hole that becomes the recess 6a of the semicircular terminal electrode 6 by the division process, and the center line passing through the through hole is divided. Indicates a line.
[0068]
A dotted line indicates the shape of the land electrode 7 and the connection pattern 8 adjacent to each other in the stacking thickness direction.
[0069]
The shape of the land electrode 7 is a shape based on a generally C shape as shown in FIG. 3 (a), a shape based on a generally triangular shape as shown in FIGS. 3 (b) to 3 (c), and FIG. Examples such as d) to (e) are shapes based on a generally square shape. In this case, each land electrode 7 is in contact with the inner wall surface of the through hole, but has not reached the dividing line shown by the solid line. This interval has an interval of at least 100 μm in a state where no positional deviation occurs in consideration of Ag migration and printing deviation.
[0070]
Further, the connection pattern 8 does not face the connection pattern 8 adjacent in the stacking direction. As a result, unnecessary stray capacitance on the side close to the internal wiring pattern 2 can be reduced.
[0071]
In the above-described manufacturing method, it is described that the surface wiring pattern and the terminal electrode conductor film by the green sheet multilayer are integrally fired with the laminated substrate, but the surface wiring pattern and the terminal electrode conductor film are A separate baking process may be performed on the fired laminated substrate.
[0072]
【The invention's effect】
As described above, according to the present invention, an Ag-based conductor film serving as a surface layer wiring pattern and an internal wiring pattern is integrated with a laminated substrate in which an insulating layer made of a glass-ceramic material that can be fired at 800 ° C. to 1050 ° C. is laminated. The multilayer circuit board is formed by providing a terminal electrode on the end face of the multilayer substrate.
[0073]
And the connection pattern which connects a land electrode and an internal wiring pattern is alternately the connection pattern which adjoins in the lamination | stacking thickness direction. That is, the connection patterns between the adjacent layers do not face each other. For this reason, stray capacitance generated between the connection patterns can be effectively suppressed, and even if the high-frequency circuit is formed on the multilayer substrate, the multilayer circuit substrate has a small variation in high-frequency characteristics.
[0074]
Further, both end portions of Lula command electrodes make up the terminal electrode is positioned inside from the end surface of the laminated substrate. For this reason, since the land electrode is not exposed on the end face of the substrate, it is possible to effectively prevent a short circuit due to Ag migration between the adjacent terminal electrodes. A multilayer circuit board can be achieved.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a multilayer circuit board according to the present invention.
FIG. 2 is a perspective view of an end surface portion of the multilayer circuit board according to the present invention.
FIGS. 3A to 3E are partial plan views showing a relationship between a land electrode, a shape of a connection pattern, and a connection pattern adjacent in the stacking direction.
FIG. 4 is a perspective view of an end face portion of a conventional multilayer circuit board.
[Explanation of symbols]
10... Laminated substrates 1 a to 1 e... Insulating layer 2... Internal wiring pattern 3... Via hole conductor 4. Element 6... Semicircular terminal electrodes 7 and 7 a to 7 f. Land electrode 8 and 8 a to 8 f Connection pattern

Claims (2)

An Ag-based internal wiring pattern and land electrodes are formed between the insulating layers of the multilayer circuit board formed by laminating insulating layers made of a glass-ceramic material that can be fired at 800 ° C. to 1050 ° C. A connection pattern for connecting a land electrode and an internal wiring pattern between the respective insulating layers in a multilayer circuit board in which a semicircular recess is formed on an end face and a part of the land electrode is exposed on an inner wall of the recess And a multi-layer circuit board, wherein the connection patterns are alternately formed between adjacent insulating layers in the stacking thickness direction when the connection patterns are viewed in plan. 2. The multilayer circuit board according to claim 1, wherein both end portions of the land electrode are disposed at an inner side of 100 μm or more from the end surface of the substrate.

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