JP4493391B2 - Pattern forming method and apparatus, and design data correction method and apparatus - Google Patents

Description

  The present invention relates to a pattern forming method and apparatus for forming a wiring pattern on a substrate surface by an etching process, and a design data correcting method and apparatus for use in forming a wiring pattern on a substrate surface by an etching process. .

  The wiring pattern of a wiring board is generally obtained by exposing a substrate provided with a resist layer based on design data relating to the wiring pattern, developing the resist pattern onto the substrate, and etching the substrate. It is formed. This wiring pattern includes a portion (generally referred to as “line”) serving as a conductor and a region between the conductors (generally referred to as “space”).

  Usually, in the exposure process, physical and chemical parameters are deeply affected, so that it is not always possible to obtain an exposure pattern according to design data. For example, due to the ambient temperature of the substrate or mechanical stress on the substrate, deformation such as expansion and contraction occurs in the substrate itself, so in anticipation of such deformation of the substrate, re-create a photomask with a different layout several times, It is necessary to adjust experimentally so that a desired exposure pattern can be obtained. However, exposure processing using a photomask requires a photomask not only for mass production of substrates, but also in the prototype stage where many experiments are repeated. is there.

  Therefore, in recent years, a method by direct exposure (maskless exposure) that does not use a photomask has been proposed. According to the direct exposure method, it is easy to correct drawing data in accordance with a distorted substrate, and improvements are brought about in improving manufacturing accuracy, improving yield, shortening delivery time, and reducing manufacturing cost.

  As an example of the direct exposure method, when exposing a resist formed on a substrate, pattern data corresponding to a pattern to be exposed is created, and the pattern data is input to a digital micromirror device (DMD), and the plurality of the pattern data is input. There is a technique in which each micromirror is tilted in accordance with pattern data, light is projected onto the DMD, and the resist is irradiated with reflected light from each micromirror to expose the shape corresponding to the pattern data (for example, a patent) Reference 1).

JP-A-10-112579

  In a series of wiring formation processes, in addition to the above-described exposure process, the etching process is greatly influenced by physical or chemical parameters as in the exposure process. Even with the same pattern, depending on the etching environment, an etching result that is faithful to the design data is not always obtained, such as an etching shift or an etching that is too thick or too thin.

  Since the etching rate is affected by the temperature and flow rate of the etching solution, the result of the etching process varies depending on the state of the etching tank and the position of the substrate accommodated in the etching tank. FIG. 10 is a schematic view showing the position of the substrate accommodated in the etching tank, and FIG. 11 is a diagram illustrating the etching characteristics depending on the position in the etching tank accommodating the substrate. As shown in FIG. 10, the etching process is usually performed by mounting the substrates 50-1 to 50-8 to be etched on the cassette 51 and immersing them in the etching tank 52. As shown by the solid line in FIG. 11, the etching performance S is lower in the vicinity of the end A than in the vicinity of the center C in the etching tank. When the etching process is simply performed on the same pattern using such an etching tank, the substrate located near the end A of the etching tank becomes insufficiently etched, and the substrate located near the center C becomes excessively etched. As a result, even if the same pattern is used, the wiring pattern varies from board to board, such as being thick or thin.

  Conventionally, in order to prevent this, an obstacle (a so-called rectifying plate) is placed in an etching tank so that the etching characteristics are adjusted to be as uniform as possible regardless of the position of the substrate, as indicated by a one-dot chain line in FIG. Although FIG. 11 shows only one-dimensional etching characteristics, since the inside of the etching tank is three-dimensional, the etching characteristics are actually three-dimensional. In that sense, the method of adjusting the etching characteristics to the optimum state using the obstacle is very laborious and time consuming. There are still variations that cannot be adjusted.

  On the other hand, a method in which the vicinity of the end of the etching tank is not used for the etching process can be considered, but it is not preferable because the production efficiency is lowered.

  Accordingly, in view of the above problems, an object of the present invention is to provide a pattern forming method that does not require adjustment of etching characteristics by placing an obstacle in an etching tank, and that improves the accuracy and production efficiency of a wiring pattern to be formed. It is an object of the present invention to provide a device, a design data correction method used therefor, and a device therefor.

  In order to achieve the above object, in the present invention, first, pattern data is generated by correcting design data in advance so that an optimum wiring pattern can be obtained under an etching characteristic related to an etching process to be applied to a substrate to be exposed. To do. In the present specification, this correction is referred to as “static correction”. This etching characteristic depends on the position in the etching tank in which the exposure target substrate is accommodated. In the present invention, pattern data is set for each position in the etching tank in which each exposure target substrate is accommodated. .

  Then, the pattern data is sequentially corrected according to the deformation amount of the substrate caused by temperature or the like on-line in the pattern formation process, and this corrected pattern data is used in the direct exposure processing of the substrate. In the present specification, this correction is referred to as “dynamic correction”.

  FIG. 1 is a principle block diagram of a pattern forming apparatus according to a first aspect of the present invention. Hereinafter, components having the same reference numerals in different drawings are components having the same functions.

  The pattern forming apparatus 1 according to the first aspect of the present invention relates to a measuring unit 11 that measures reference coordinates on a substrate surface of an exposure target substrate, the measured reference coordinates, and an etching process to be applied to the exposure target substrate. Correction parameter generation means 12 for generating correction parameters for correcting the pattern data so that the reference coordinates in the pattern data obtained by correcting the design data in advance so that an optimum wiring pattern can be obtained under the etching characteristics are matched. A correction unit 13 that further corrects the pattern data using the correction parameter; and an exposure unit 14 that directly exposes the exposure target substrate using the corrected pattern data generated by the correction unit 13 to generate an exposure substrate. Etching means 15 for forming a wiring pattern on the substrate surface by etching the exposed substrate; Obtain.

  That is, in the first aspect of the present invention, as described above, the measurement means 11 and the correction parameter generation means are used as the design data correction device used for forming the wiring pattern on the substrate surface by the exposure and etching processes. 12 and correction means 13 are provided.

  Note that when inspecting a substrate on which a wiring pattern is formed as described above, pattern data that takes into account each of the above-described corrections is used. FIG. 2 is a principle block diagram of the pattern forming apparatus according to the second aspect of the present invention.

  In this case, the pattern forming apparatus 1 according to the second aspect of the present invention includes, in addition to the above-described units 11 to 15, an acquisition unit 16 that acquires image data of the substrate surface on which the wiring pattern is formed as performance data. The data set generating means 17 for generating a data set including the actual data, the pattern data corresponding to the actual data and the correction parameter, and the verification for verifying whether the desired wiring pattern is obtained using the data set And means 18.

  According to the present invention, first, pattern data obtained by correcting design data in advance so as to obtain an optimum wiring pattern under the etching characteristics related to the etching process to be applied to the exposure target substrate is used as static correction. The troublesome adjustment work such as putting an obstacle in the etching tank as in the prior art becomes unnecessary, and the start-up time of the entire pattern forming apparatus can be shortened. In addition, since the pattern data is set for each position in the etching tank in which each exposure target substrate is accommodated, variations in the finish of the finished substrate that are easily affected by etching characteristics can be suppressed, and the accuracy of the wiring pattern can be reduced. improves. Moreover, since it can be used effectively up to the vicinity of the end in the etching tank that has not been used conventionally, the production efficiency is also improved.

  And as dynamic correction, pattern data is corrected to cope with deformation such as expansion and contraction and distortion of the substrate due to ambient temperature of the substrate and mechanical stress applied to the substrate, so that the accuracy of the wiring pattern is further improved. .

  First, static correction in the present invention will be described.

  In the present invention, before executing the actual exposure process, the design data is corrected in advance so as to obtain an optimum wiring pattern under the etching characteristics related to the etching process to be applied to the exposure target substrate as the static correction process. Generate pattern data. FIG. 3 is a diagram illustrating an example of etching characteristics depending on the position in the etching tank in which the substrate is accommodated. FIG. 4 is a schematic diagram for explaining static correction in the present invention.

  As described above, since the etching rate is affected by the temperature and flow rate of the etching solution, the result of the etching process varies depending on the state of the etching tank and the position of the substrate accommodated in the etching tank. As an example, as illustrated in FIG. 3, the etching performance S in the second region A near the end is lower in the etching tank than in the first region C near the center. The etching performance S of the first region C is more stable than that of the third region B between the first region C and the second region A.

  In the present invention, paying attention to the fact that the etching performance S varies depending on the position of the substrate in the etching tank, the etching process of the substrate under the etching characteristics depending on the position in the etching tank in which the exposure target substrate is accommodated. Later, pattern data is created for each position in the etching tank so that an optimal wiring pattern can be obtained, that is, a wiring pattern faithful to the design data can be obtained. This pattern data is created in advance before the mass production stage. Specifically, what kind of wiring pattern can be obtained when the substrate is located in the etching tank by performing exposure processing and etching processing based on design data in the prototype stage before the mass production stage The causal relationship is experimentally grasped, the design data is corrected based on the experimental result, and pattern data for each position in the etching bath is generated. Thereby, the etching nonuniformity for every board | substrate can be removed. In addition, since it can be used effectively up to the vicinity of the end in the etching tank that has not been used conventionally, the production efficiency is improved.

  When the position of the substrate in the etching tank is divided into regions A, B and C as shown in FIG. 3, the substrates 50-1 and 50-8 located in the second region A are as shown in FIG. The pattern data a for the end portion is the standard pattern data b for the substrates 50-2, 50-3, 50-6 and 50-7 located in the third region B, and the substrate 50 located in the first region C. As for -4 and 50-5, pattern data c for the central portion is generated.

  In this example, the position of the substrate in the etching tank is divided into three regions, but the present invention is not limited to this, and the size of the etching tank, the contents of the design data, and the required wiring What is necessary is just to consider and consider various factors, such as the precision of a pattern, the time and cost which can be spent. In particular, since the etching performance S fluctuates rapidly in the vicinity of the end portion of the etching tank, it is preferable to set a large number of types of pattern data for the substrate group disposed in the vicinity. As the pattern data is prepared more finely for each position of the substrate in the etching tank, the accuracy of the wiring pattern is improved, but on the other hand, more manufacturing cost and time are consumed. Although generation of pattern data under one-dimensional etching characteristics has been described here, since the etching characteristics are actually three-dimensional, every three-dimensional position of the substrate in the etching tank is described. Pattern data may be generated.

  Next, dynamic correction in the present invention will be described.

  FIG. 5 is a diagram showing a pattern forming apparatus according to the first embodiment of the present invention. FIG. 6 is a flowchart showing an operation flow of the pattern forming apparatus according to the first embodiment of the present invention.

  The pattern forming apparatus 1 according to the first embodiment of the present invention includes a measurement unit 11, a correction parameter generation unit 12, a correction unit 13, an exposure unit 14, an etching unit 15, a loader 31, an unloader 32, Is provided. That is, in the present embodiment, a measurement unit 11, a correction parameter generation unit 12, and a correction unit 13 are provided as a design data correction device used for forming a wiring pattern on a substrate surface.

  First, in step S101 of FIG. 6, the measurement unit 11 of FIG. 5 measures the reference coordinates on the substrate surface of the exposure target substrate. In general, in the manufacturing process of a wiring board, at least three reference coordinates are provided on the substrate as reference positions for various processes on the substrate in each process, but three or more reference coordinates may be provided. The measuring means 11 may be constituted by a known imaging device, for example, and in this case, the reference coordinates are optically measured. Further, an electrical position probe may be used as the measuring means 11. The exposure target substrate that has been subjected to the measurement processing is taken out of the accommodated cassette by the loader 31 and provided to the exposure means at the next stage.

  Next, in step S102 of FIG. 6, the correction parameter generation unit 12 of FIG. 5 optimizes the wiring pattern under the reference coordinates measured by the measurement unit 11 and the etching characteristics related to the etching process to be applied to the exposure target substrate. For comparing the reference coordinates in the pattern data obtained by correcting the design data in advance so that the measured reference coordinates and the reference coordinates in the pattern data match. Create correction parameters. 7A and 7B are diagrams illustrating reference coordinates on the substrate. FIG. 7A illustrates a substrate in an ideal state without distortion on the pattern data, and FIG. 7B illustrates an actual substrate in a distorted state. FIG. In addition, the dotted line in the figure is an auxiliary line provided for convenience in this specification in order to clearly show the positional deviation of the reference coordinates.

Generally, deformation such as expansion and contraction occurs in the substrate itself due to ambient temperature of the substrate and mechanical stress applied to the substrate. If processing is performed on an actually distorted substrate using pattern data generated assuming an ideal substrate without such deformation, an error occurs. Therefore, in this embodiment, the above pattern data is sequentially corrected according to the deformation amount of the substrate caused by temperature or the like on-line of the pattern formation process, so that an optimum wiring pattern can be obtained on the completed substrate. That is, a wiring pattern faithful to the design data is obtained. As shown in FIG. 7A, the actual substrate is distorted as shown in FIG. 7B, for example, with respect to the substrate in an ideal state without distortion on the pattern data. In the above-described step S101, the reference coordinates on the substrate surface of the exposure target substrate are measured by the measuring unit 11, and the measured reference coordinates on the substrate in FIG. 7B are the patterns as shown in FIG. It will deviate from the ideal reference coordinates in the data. In this embodiment, a correction parameter for correcting the pattern data is created so that the measured reference coordinates coincide with the reference coordinates in the pattern data. Here, the reference coordinates in the pattern data as shown in FIG. 7A are (x, y), and the reference coordinates of the actual substrate actually measured by the measuring means 11 as shown in FIG. 7B are (x ′, y ′) When the correction parameter is f ₀ , the following relational expression (1) is obtained.

The correction parameter generation means 12 calculates the correction parameter f ₀ based on the relational expression (1). The correction parameter generation unit 12 may be realized by an arithmetic processing device such as a computer and a storage device.

Next, in step S103 of FIG. 6, the correction unit 13 of FIG. 5 corrects the pattern data using the correction parameter, and generates corrected pattern data. That is, by using the correction parameter f ₀ and the relational expression (1), it is possible to generate corrected pattern data having reference coordinates on the virtual plane that match the coordinate reference on the actual substrate. Since the pattern data is generated for each position of the substrate in the etching tank as described above, the corrected pattern data also corresponds to each substrate. Note that. The correction means 13 may be realized by an arithmetic processing device such as a computer and a storage device.

  Next, in step S104 of FIG. 6, the exposure unit 14 of FIG. 5 directly exposes the exposure target substrate using the corrected pattern data generated by the correction unit 13 to generate an exposure substrate. Since the exposure unit 14 directly exposes the substrate without using a mask, online processing corresponding to each corrected pattern data can be realized. In addition, even when the pattern data is suddenly changed, it can be easily handled. As the exposure means 14, there is a maskless exposure apparatus such as a DMD (Digital Micromirror Device) exposure apparatus or an electron beam exposure apparatus.

  Next, in step S105 of FIG. 6, the etching means 15 of FIG. 5 forms a wiring pattern on the substrate surface by etching the exposed substrate. In this etching process, the exposed substrate is accommodated at a position in the etching tank corresponding to the pattern data. Then, the completed substrate after the etching process is accommodated in the cassette by the unloader 32 again.

  As described above, in the pattern forming apparatus according to the first embodiment of the present invention, by combining static correction and dynamic correction, there is no influence of etching unevenness for each substrate depending on the etching tank, and distortion for each substrate. An optimum wiring pattern faithful to the design data can be formed on the substrate. In addition, what is necessary is just to perform above-mentioned step S101-S105 regarding both surfaces of a board | substrate, when forming a wiring pattern on both surfaces of a board | substrate.

  Next, a second embodiment of the present invention will be described. The second embodiment of the present invention corresponds to the second embodiment of the present invention described with reference to FIG. 2, and a desired wiring pattern can be obtained with respect to the completed substrate formed as described above. A means for verifying whether or not FIG. 8 is a diagram showing a pattern forming apparatus according to a second embodiment of the present invention.

  The pattern forming apparatus 1 according to the second embodiment of the present invention includes an acquisition unit in addition to the measurement unit 11, the correction parameter generation unit 12, the correction unit 13, the exposure unit 14, the etching unit 15, the loader 31, and the unloader 32. 16, a data set generation unit 17, and a verification unit 18.

  The acquisition unit 16 acquires image data of the substrate surface on which the wiring pattern is formed as performance data. The acquisition unit 16 may be configured by a known imaging device, for example, and optically captures an image of the substrate surface. When wiring patterns are formed on both sides of the substrate, both sides are imaged.

  The data set generation means 17 generates a data set including actual data, pattern data corresponding to the actual data, and correction parameters. The data set generation unit 17 generates a data set by associating the pattern data and correction parameters transferred from the correction parameter generation unit 12 with the actual measurement data of the completed substrate corresponding to the pattern data. The data set generation means 17 may be realized by an arithmetic processing device such as a computer and a storage device.

  The verifying means 18 verifies whether or not a desired wiring pattern is obtained on the completed substrate using the data set. The data set includes performance data, pattern data, and correction parameters corresponding to a verification-completed substrate whose image data has been acquired by the acquisition means 16. Accordingly, the verification unit 18 can generate the corrected pattern data by correcting the pattern data using the correction parameters in accordance with the relational expression (1). Therefore, the verification of the completed substrate based on the corrected pattern data is possible. Is possible. The verification means 18 may be realized by an arithmetic processing device such as a computer and a storage device. By feeding back the verification result to design data correction, static correction, dynamic correction, etc., it is possible to manufacture a higher quality wiring board in a short time and at low cost.

  Note that the acquisition unit 16, the data set generation unit 17, and the verification unit 18 described above may be realized as a device separate from the pattern forming device 1, or a device combining them.

  Next, a third embodiment of the present invention will be described. The third embodiment of the present invention, as a modification of the pattern forming apparatus according to the first embodiment or the second embodiment described above, ensures the safety of specific know-how in the calculation processing of pattern data correction. It is what I did. FIG. 9 is a diagram showing a pattern forming apparatus according to a third embodiment of the present invention. In addition, although the case where the said modification is added to 2nd Example is demonstrated here, the case where it applies to 1st Example is also the same.

  As in the case of the second embodiment, the pattern forming apparatus 1 according to the third embodiment of the present invention includes a measurement unit 11, a correction parameter generation unit 12, a correction unit 13, an exposure unit 14, and an etching unit. 15, an acquisition unit 16, a data set generation unit 17, a verification unit 18, a loader 31, and an unloader 32.

  In the present embodiment, the correction parameter generation unit 12 includes an encryption unit 21 that encrypts the correction parameter and generates an encrypted correction parameter. The correction unit 13 includes a decryption unit 22 that decrypts the encrypted correction parameter, and corrects the pattern data using the decrypted correction parameter. Here, the encryption process by the encryption means 21 and the decryption process by the decryption means 22 correspond. If the data compression processing is executed in combination with the encryption processing by the encryption means 21 and the data decompression processing is executed in combination with the decryption processing by the decryption means 22, the correction parameter generation means 12 to the correction means 13 It is also possible to reduce the amount of data transferred to the network.

  In the present embodiment, the data set generation unit 17 associates the pattern data and the encryption correction parameter transferred from the correction parameter generation unit 12 with the actually measured data of the completed substrate corresponding to the pattern data. Generate a data set. The verification unit 18 includes a decryption unit 23 that decrypts the encryption correction parameter. Then, the verification unit 18 verifies whether a desired wiring pattern is obtained by using a data set including the decoded correction parameter. Here, the encryption process by the encryption means 21 and the decryption process by the decryption means 23 correspond. If the data compression processing is executed in combination with the encryption processing by the encryption means 21 and the data decompression processing is executed in combination with the decryption processing by the decryption means 23, the correction parameter generation means 12 to the verification means 18 It is also possible to reduce the amount of data transferred to the network. Further, instead of encrypting only the correction parameter, the entire data set may be encrypted. In this case, the encryption unit 21 encrypts the data set, and the decryption unit 23 decrypts the encrypted data set.

  As described above, according to the third embodiment of the present invention, the correction parameter used for the correction of the pattern data or the entire data set is encrypted to conceal its specific contents. If the main body of the pattern forming apparatus is configured so that only the interface is disclosed to the user, the safety of the correction know-how can be ensured. In the case where the third embodiment of the present invention is a modification of the first embodiment described above, an encryption unit 21 is provided in the correction parameter generation unit 12 and a decryption unit 22 is provided in the correction unit 13. Good.

  As described above, the encryption process by the encryption unit 21 and the decryption process by the decryption units 22 and 23 correspond to each other. However, the encryption unit 21 and the decryption units 22 and 23 are provided with, for example, PKI ( If a Public Key Infrastructure system is introduced, security will be further improved.

  Further, if the pattern data generated in the static correction process is encrypted and a decryption unit for decrypting the encrypted pattern data is provided in the correction unit 13, the know-how can be obtained for the pattern data depending on the etching characteristics of the etching tank. Safety can be ensured.

  The present invention can be applied to a pattern forming apparatus that forms a wiring pattern on a substrate surface using a photoengraving technique. Such a pattern forming apparatus has an exposure process and an etching process, but in the present invention, since correction processing combining static correction and dynamic correction is performed, etching unevenness for each substrate depending on the etching tank, and An optimal wiring pattern that is faithful to design data and that is not affected by distortion for each substrate can be formed on the substrate.

  The static correction in the present invention eliminates the troublesome adjustment work of putting an obstacle in the etching tank as in the prior art, and shortens the startup time of the pattern forming apparatus. In addition, variations in the finish of the finished substrate that are easily affected by etching characteristics can be suppressed, and the accuracy of the wiring pattern is improved. Furthermore, since it can be used effectively up to the vicinity of the end in the etching tank which has not been used conventionally, the production efficiency is improved.

  Furthermore, by providing means for verifying a completed substrate on which a wiring pattern is formed as in the present invention, the result of this verification is fed back to design data correction, static correction, dynamic correction, etc. It is also possible to manufacture a high-quality wiring board at a low cost in a short time.

It is a principle block diagram of the pattern formation apparatus by the 1st aspect of this invention. It is a principle block diagram of the pattern formation apparatus by the 2nd aspect of this invention. It is a figure which illustrates an example of the etching characteristic depending on a position in the etching tank in which a board | substrate is accommodated. It is a schematic diagram explaining the static correction in this invention. It is a figure which shows the pattern formation apparatus by the 1st Example of this invention. It is a flowchart which shows the operation | movement flow of the pattern formation apparatus by 1st Example of this invention. 4A and 4B are diagrams illustrating reference coordinates on a substrate, where FIG. 5A illustrates a substrate in an ideal state without distortion on the pattern data, and FIG. 5B illustrates an actual substrate in a distorted state. It is. It is a figure which shows the pattern formation apparatus by the 2nd Example of this invention. It is a figure which shows the pattern formation apparatus by the 3rd Example of this invention. It is a schematic diagram which shows the position of the board | substrate accommodated in an etching tank. It is a figure which illustrates the etching characteristic depending on a position in the etching tank in which a board | substrate is accommodated.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Pattern formation apparatus 11 ... Measuring means 12 ... Correction parameter generation means 13 ... Correction means 14 ... Exposure means 15 ... Etching means 16 ... Acquisition means 17 ... Data set generation means 18 ... Verification means 21 ... Encryption means 22, 23 ... Decoding means 31 ... loader 32 ... unloader

Claims (24)

A pattern forming method for forming a wiring pattern on a substrate surface by exposure and etching,
A measurement step for measuring reference coordinates on the substrate surface of the exposure target substrate;
The measured reference coordinates coincide with the reference coordinates in the pattern data obtained by correcting the design data in advance so that an optimum wiring pattern can be obtained under the etching characteristics related to the etching process to be applied to the exposure target substrate. A correction parameter generating step for generating a correction parameter for correcting the pattern data,
A correction step of further correcting the pattern data using the correction parameter;
An exposure step of generating an exposure substrate by directly exposing the exposure target substrate using the corrected pattern data generated in the correction step;
An etching step of forming a wiring pattern on the substrate surface by etching the exposed substrate;
Equipped with a,
The etching characteristic is a characteristic depending on a position in an etching tank in which the exposure target substrate is accommodated,
The pattern data is a pattern forming method is set for each position in an etching bath which each said exposure target substrate is accommodated, characterized in Rukoto.   The pattern forming method according to claim 1, wherein the correction parameter generation step includes an encryption step of encrypting the correction parameter. The correction step includes
A decryption step of decrypting the encryption correction parameter,
The pattern forming method according to claim 2 , wherein the pattern data is corrected using the decoded correction parameter. An acquisition step of acquiring image data of the substrate surface on which the wiring pattern is formed as performance data;
A data set generating step for generating a data set including the actual data, the pattern data corresponding to the actual data, and the correction parameter;
The pattern forming method according to claim 1, further comprising: The pattern formation method according to claim 4 , further comprising a verification step of verifying whether the desired wiring pattern is obtained using the data set. The correction parameter generation step includes an encryption step for encrypting the correction parameter;
The data set generation step generates the data set including the actual data, the pattern data corresponding to the actual data, and the encryption correction parameter,
The verification step, which has a decoding step of decoding the encrypted correction parameter to claim 5 verified using the data set including the correction parameter desired of the wiring pattern or obtained, decoded The pattern formation method as described. A design data correction method used for forming a wiring pattern on a substrate surface by exposure and etching processes,
A measurement step for measuring reference coordinates on the substrate surface of the exposure target substrate;
The measured reference coordinates coincide with the reference coordinates in the pattern data obtained by correcting the design data in advance so that an optimum wiring pattern can be obtained under the etching characteristics related to the etching process to be applied to the exposure target substrate. A correction parameter generating step for generating a correction parameter for correcting the pattern data,
A correction step of further correcting the pattern data using the correction parameter to generate corrected pattern data used for direct exposure of the exposure target substrate;
Equipped with a,
The etching characteristic is a characteristic depending on a position in an etching tank in which the exposure target substrate is accommodated,
The pattern data is set for each position in an etching bath which each said exposure target substrate is accommodated method of correcting design data and said Rukoto. The design data correction method according to claim 7 , wherein the correction parameter generation step includes an encryption step of encrypting the correction parameter. The correction step includes
A decryption step of decrypting the encryption correction parameter,
The design data correction method according to claim 8 , wherein the pattern data is corrected using the decoded correction parameter to generate the corrected pattern data. An acquisition step of acquiring image data of the substrate surface on which the wiring pattern is formed as performance data;
A data set including the actual data, the pattern data corresponding to the actual data, and the correction parameter, and a data set used for verifying whether the desired wiring pattern is obtained is generated. A data set generation step;
The design data correction method according to claim 7 , further comprising: The correction parameter generation step includes an encryption step for encrypting the correction parameter;
11. The design data correction method according to claim 10 , wherein the data set generation step generates the data set including the actual data, the pattern data corresponding to the actual data, and the encryption correction parameter. The design data correction method according to claim 11 , further comprising a decryption step of decrypting the encryption correction parameter so as to be used for verifying whether the desired wiring pattern has been obtained. A pattern forming apparatus for forming a wiring pattern on a substrate surface by exposure and etching processes,
Measuring means for measuring reference coordinates on the substrate surface of the substrate to be exposed;
The measured reference coordinates coincide with the reference coordinates in the pattern data obtained by correcting the design data in advance so that an optimum wiring pattern can be obtained under the etching characteristics related to the etching process to be applied to the exposure target substrate. Correction parameter generation means for generating a correction parameter for correcting the pattern data,
Correction means for further correcting the pattern data using the correction parameter;
Exposure means for directly exposing the exposure target substrate using the corrected pattern data generated by the correction means to generate an exposure substrate;
Etching means for forming a wiring pattern on the substrate surface by etching the exposed substrate;
Equipped with a,
The etching characteristic is a characteristic depending on a position in an etching tank in which the exposure target substrate is accommodated,
The pattern data is set for each position in an etching bath which each said exposure target substrate is accommodated patterning device according to claim Rukoto. The pattern forming apparatus according to claim 13 , wherein the correction parameter generation unit includes an encryption unit that encrypts the correction parameter. The correction means includes
Decryption means for decrypting the encryption correction parameter,
The pattern forming apparatus according to claim 14 , wherein the pattern data is corrected using the decoded correction parameter. Acquisition means for acquiring image data of the substrate surface on which the wiring pattern is formed, as performance data;
Data set generating means for generating a data set including the actual data, the pattern data corresponding to the actual data, and the correction parameter;
The pattern forming apparatus according to claim 13 , further comprising: The pattern forming apparatus according to claim 16 , further comprising verification means for verifying whether the desired wiring pattern is obtained using the data set. The correction parameter generation unit includes an encryption unit that encrypts the correction parameter;
The data set generation means generates the data set including the actual data, the pattern data corresponding to the actual data, and the encryption correction parameter,
The verification means, which has a decoding means for decoding the encrypted correction parameter, whether desired the wiring pattern is obtained, in claim 17 for verifying by using the data set including the correction parameters decoded The pattern forming apparatus as described. A design data correction device used for forming a wiring pattern on a substrate surface by exposure and etching processes,
Measuring means for measuring reference coordinates on the substrate surface of the substrate to be exposed;
The measured reference coordinates coincide with the reference coordinates in the pattern data obtained by correcting the design data in advance so that an optimum wiring pattern can be obtained under the etching characteristics related to the etching process to be applied to the exposure target substrate. Correction parameter generation means for generating a correction parameter for correcting the pattern data,
Correction means for further correcting the pattern data using the correction parameter to generate corrected pattern data used for direct exposure of the exposure target substrate;
Equipped with a,
The etching characteristic is a characteristic depending on a position in an etching tank in which the exposure target substrate is accommodated,
The pattern data correction apparatus of the design data and said Rukoto is set for each position in an etching bath which each said exposure target substrate is accommodated. 20. The design data correction apparatus according to claim 19 , wherein the correction parameter generation means includes encryption means for encrypting the correction parameter. The correction means includes
Decryption means for decrypting the encryption correction parameter,
21. The design data correction apparatus according to claim 20 , wherein the pattern data is corrected using the decoded correction parameter to generate the corrected pattern data. Acquisition means for acquiring image data of the substrate surface on which the wiring pattern is formed, as performance data;
A data set including the actual data, the pattern data corresponding to the actual data, and the correction parameter, and a data set used for verifying whether the desired wiring pattern is obtained is generated. Data set generation means;
The design data correction device according to claim 19 , further comprising: The correction parameter generation unit includes an encryption unit that encrypts the correction parameter;
23. The design data correction apparatus according to claim 22 , wherein the data set generation unit generates the data set including the actual data, the pattern data corresponding to the actual data, and the encryption correction parameter. The design data correction apparatus according to claim 23 , further comprising decryption means for decrypting the encryption correction parameter so that the encryption correction parameter can be used to verify whether the desired wiring pattern has been obtained.

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