JP4498804B2 - Image display device drive device, image display device, television receiver, image display device drive method, image display method, program thereof, and recording medium - Google Patents

Description

  The present invention relates to a drive device for an image display device, an image display device, a television receiver, a drive method for the image display device, an image display method, a program therefor, and a recording medium.

  Liquid crystal display devices that can be driven with relatively little power are widely used not only as portable devices but also as image display devices for stationary devices. In these liquid crystal display devices, a digital signal indicating the gradation of each pixel is supplied to the data signal line driving circuit, and the data signal line driving circuit applies a voltage corresponding to the value of the digital signal to the data signal line. Thus, there is a liquid crystal display device that controls the display gradation of the pixel.

  In these liquid crystal display devices, data for determining the voltage to be applied to each pixel of the display panel is transmitted as a digital signal. Therefore, in order to display a finer gradation, a bit of gradation data indicating gradation is displayed. If the width is increased, the circuit scale or calculation amount of a circuit for processing a digital signal increases. On the other hand, if the bit width is narrowed by discarding the lower bits in order to reduce the circuit scale or the calculation amount, a pseudo contour is generated in the video displayed on the display panel, and the display quality is greatly deteriorated.

  Here, in Patent Document 1 described later, in order to realize an image display device capable of improving display quality without generating a pseudo contour with a simple circuit, after adding noise to a digital signal, lower bits A technique for truncating the number is disclosed. Specifically, when an n-bit (n is a natural number) digital signal is input as a video signal, the first signal processing unit 516 illustrated in FIG. 26 performs γ correction on the n-bit digital signal, and m The digital signal is converted into bits (m> n: m is a natural number). Further, the second signal processing unit 517 adds a noise signal to the m-bit digital signal from the first signal processing unit 516 and then truncates the lower (m−Q) bits (Q ≦ n: Q is a natural number). Then, the remaining Q-bit digital signal is output to the data signal line driver circuit 514 of the display panel. Further, the data signal line driver circuit 514 outputs a voltage corresponding to the Q-bit digital signal from the second signal processing unit 517 from the data signal line, and controls the display gradation of the pixel.

  In this configuration, the bit width (Q bit) of the digital signal output from the second signal processing unit 517 is set shorter than the bit width (m bit) of the digital signal output from the first signal processing unit 516. The circuit configuration is simplified compared to the configuration of the data signal line driving circuit 514 so that the digital signal output from the first signal processing unit 516 can be processed.

  Further, since the second signal processing unit 517 truncates the low-order bits after adding the noise signal, unlike the case where the second signal processing unit 517 simply truncates, there is no significant difference in display gradation between adjacent pixels. . As a result, an image display device capable of improving display quality without generating a pseudo contour can be realized with a simple circuit.

  On the other hand, the liquid crystal display device has a slower response speed than CRT (Cathode-Ray Tube) and the like, and the response is completed in the rewrite time (16.7 msec) corresponding to the normal frame frequency (60 Hz) due to the transition gradation. For this reason, a method of driving by modulating the drive signal so as to emphasize the gradation transition from the previous time to the current time is also employed (see, for example, Patent Document 2 described later).

  For example, when the gradation transition from the previous frame FR (k-1) to the current frame FR (k) is Rise, specifically, the current frame FR ( A voltage having a level higher than the voltage level indicated by the video data D (i, j, k) of k) is applied to the pixel.

  As a result, when the gradation changes, the luminance level of the pixel is compared with the luminance level when the voltage level indicated by the video data D (i, j, k) of the current frame FR (k) is applied from the beginning. Thus, it increases more steeply and reaches the vicinity of the luminance level corresponding to the video data D (i, j, k) of the current frame FR (k) in a shorter period of time. Thereby, even when the response speed of the liquid crystal is slow, the response speed of the liquid crystal display device can be improved.

  In Patent Document 3 described later, a transmittance curve is created or predicted from at least continuous three-field signal data applied to an arbitrary pixel, and the transmittance curve deviates by a predetermined value or more from a desired transmittance curve. In addition, a display device for correcting the signal data of the continuous field is disclosed.

Specifically, as shown in FIG. 27, in the display device 501a, the data input means 521 causes the field memory 522 to store video data for each pixel. Further, the data correction unit 523 refers to the field memory 522 and corrects the video data in the field memory 522 when the difference between the ideal transmittance and the predicted actual transmittance is larger than a predetermined threshold. . Further, the data output means 524 sequentially reads the video data in the corrected field memory 522 and drives pixels not shown.
JP 2001-337667 A (publication date: December 7, 2001) JP 2002-116743 A (publication date: April 19, 2002) Japanese Patent No. 2650479 (issue date: September 3, 1997)

  By the way, the second signal processing unit in the configuration of Patent Document 1 grasps how many gradations the display element can display and rounds it down to the number of bits, and the size corresponding to the rounding width. It is necessary to add noise. Therefore, it is desirable that the second signal processing unit be arranged near the display panel so that the displayable gradation of the display element of the display panel can be specified and the cut-off width can be specified. On the other hand, in Patent Document 2, a processing unit that emphasizes gradation transition needs to emphasize gradation transition so that the display gradation of the pixels of the display panel can reach a desired gradation. Therefore, it is better to arrange the processing unit near the display panel so that it is specified how much the gradation transition is emphasized and the desired gradation can be reached, and an appropriate degree of gradation transition enhancement can be determined. desirable.

  Further, in the conventional configuration, when the target gradation is the minimum gradation or the maximum gradation, there is a problem that the gradation transition cannot be sufficiently emphasized.

  For example, when the gradation transition from the previous frame to the current frame is the transition from the maximum gradation to the minimum gradation, in the above driving method, the processing unit that emphasizes the gradation transition will emphasize the gradation transition. However, since the gradation transition is from the maximum gradation to the minimum gradation, the gradation transition cannot be emphasized beyond that, and the response speed of the pixel cannot be sufficiently enhanced.

  The present invention is researched to realize an image display device drive device capable of suppressing the apparent display quality deterioration with a small circuit scale or calculation amount and driving the display element at high speed by the above two processing units. The process of adding noise and adding noise was found to be preferable to processing prior to tone transition emphasis processing, and the purpose was to display video displayed on each pixel. An object of the present invention is to realize a drive device for an image display device that can improve the response speed of pixels without apparently degrading the quality and that has a simple configuration.

  Another object of the present invention is to realize a driving device for an image display device capable of improving the response speed of pixels even when gradation transition to the minimum gradation is required. .

  In order to solve the above-described problem, a driving device for an image display device according to the present invention includes an input terminal to which first gradation data indicating the current gradation of each pixel is input, and each of the first gradation data. The noise adding means for adding noise data and rounding the lower bits of a predetermined bit width to generate second gradation data, and the first gradation data for pixels adjacent to each other in the same color The noise data is generated so that the noise data to be added to each other has a random size, and the noise generating means to be given to the noise adding means, and the current second gradation data of each pixel are stored until the next time. And a first correcting the second gradation data so as to emphasize the gradation transition from the previous second gradation data read from the storage means to the current second gradation data. Correction means It is characterized in.

  In order to solve the above-described problem, the image display device driving apparatus according to the present invention includes a noise generation unit that generates noise data, and the generated noise data in the first gradation data to the received pixel. Are added, and at least one lower-order bit is rounded to generate second gradation data, noise adding means, storage means for storing the second gradation data, and the previous reading read from the storage means A first correction for correcting the current second gradation data of the pixel so as to emphasize the gradation transition from the previous second gradation data to the current second gradation data according to the second gradation data. And a means.

  In these configurations, when the first gradation data indicating the current gradation of each pixel is input, the noise adding means adds the noise data to the input first gradation data, The second gradation data is generated by rounding the bits. The current second gradation data of each pixel generated by the noise adding means is stored in the storage means until the next time, and the first correction means includes the previous second gradation data read from the storage means and the noise. Based on the current second gradation data input from the adding means, the current second gradation data is corrected so as to emphasize the gradation transition from the previous time to the current time.

  In this configuration, the second gradation data stored in the storage means is set to have a bit width shorter than that of the first gradation data by rounding the lower bits. Therefore, the storage capacity required for the storage means can be reduced. Further, since the bit width of the gradation data processed by the circuits after the noise adding means (such as the storage means and the first correction means) is reduced, the circuit scale and the amount of calculation of these circuits can be reduced, and these It is possible to reduce the number of wires for connecting circuits and the occupied area of the wires. Further, since the noise adding means adds the noise data to the first gradation data, the following configuration, that is, the result of generating the second gradation data by simply truncating the lower bits of the first gradation data Unlike the configuration in which a pseudo contour is generated in an image displayed on each pixel, no pseudo contour is generated. As a result, even though the bit width of the second gradation data is shorter than that of the first gradation data, the display quality of the video displayed on each pixel is the same as when the first gradation data is displayed. It can be kept to the extent that it does not differ in appearance.

  Moreover, since the gradation transition from the previous time to the current time is emphasized by the first correction means, the response speed of the pixels can be improved. Here, when the noise adding means is provided at the subsequent stage of the first correcting means, noise is added to the data after the gradation transition emphasis, so that the gradation transition is overemphasized and the luminance of the pixel is undesirably increased. However, the image display device may be visually recognized as white light, or the gradation transition may not be sufficiently emphasized, and the luminance of the pixel may be lowered undesirably and may be visually recognized as a black sun. However, in the above configuration, since the first correction unit is arranged after the noise addition unit, the first correction unit is different from the case where the first correction unit is arranged in front of the noise addition unit. The response speed of the pixels can be improved without causing sinking.

  As a result, there is provided a driving device for an image display device capable of improving the response speed of the pixels without apparently degrading the display quality of the video displayed on each pixel, and reducing the circuit scale and the amount of calculation. realizable.

Furthermore, in addition to the above-described configuration , the driving device of the image display device according to the present invention may be configured such that the noise generation unit randomly adds noise data to be added to the first gradation data to pixels adjacent to each other in the same color. so that a size is characterized by generating the noise data.

In addition to the above configuration , the drive device of the image display device according to the present invention may be configured such that the noise generation unit adds noise data of the same magnitude to the first gradation data for the same pixel each time. It is characterized by generating noise data.

  Further, in addition to the above configuration, the first gradation data is represented by 8 bits, and the maximum absolute value of each noise data is set to a value in the range of 1 to 32 gradations. In addition, the noise adding unit, the noise generating unit, the storage unit, and the first correcting unit may be provided for each color of RGB.

  In addition to the above configuration, the first gradation data is represented by 8 bits, and the maximum absolute value of each noise data is set to a value in the range of 1 to 32 gradations. In addition, the second gradation data may be represented by 6 bits.

  Further, in addition to the above configuration, the first gradation data may be expressed by 10 bits, and the second gradation data may be expressed by 8 bits.

  In addition to the above configuration, the noise generation unit may generate noise data such that noise data added to the first gradation data for the same pixel has a random size.

  Further, in addition to the above-described configuration, the first correction unit may determine that the difference between the previous second gradation data and the current second gradation data is a difference that can be generated only by addition of noise data. The correction of the second gradation data may be stopped.

  In addition to the above configuration, the first gradation data is expressed by 8 bits, and the maximum absolute value of each noise data is set to a value in the range of 1 to 8 gradations. In addition, the second gradation data may be represented by 6 bits.

  Furthermore, in addition to the above configuration, the noise adding unit, the noise generating unit, the storage unit, and the first correcting unit may be provided for each of RGB colors.

  In addition to the above configuration, the first gradation data is expressed by 8 bits, and the maximum absolute value of each noise data is set to a value in the range of 1 to 8 gradations. In addition, the noise adding unit, the noise generating unit, the storage unit, and the first correcting unit may be provided for each color of RGB.

  Further, in addition to the above-described configuration, each of the grayscales obtained by averaging the second grayscale data for the same pixel is a grayscale before the lower bits are rounded by the noise adding unit. The least significant bit control means for changing the least significant bit of the second gradation data may be provided.

  In addition to the above configuration, the first correction means may be configured such that the difference between the previous second gradation data and the current second gradation data is the addition of noise data and the least significant bit by the least significant bit control means. If the difference is a difference that can be caused only by the change in the second gradation data, the correction of the second gradation data may be stopped.

  Further, in addition to the above configuration, the pixel is divided into a plurality of regions, and the first gradation data for the plurality of pixels included in each region is averaged. When the average value is low, the pixel is high In addition, noise amount control means for controlling the noise generation means may be provided so that the maximum absolute value of the noise data becomes smaller.

  In addition to the above configuration, the video signal including the first gradation data is a video signal obtained by dividing the video into a plurality of blocks and encoded in units of each block, and the region is identical to the block. You may do it.

  Further, in addition to the above-described configuration, the received video signal including the first gradation data may be a video signal obtained by dividing the video into a plurality of blocks and encoding each block.

  In addition to the above configuration, the storage means stores the second gradation data of the previous time until the next time in addition to the second gradation data of the current time, and the previous second time and the second time of the previous time stored by the storage means. In the case where the combination of the gradation data is a predetermined combination, second correction means for correcting the previous second gradation data referred to by the first correction means so as to approach the second gradation data of the previous time is included. You may go out.

  Further, in addition to the above configuration, the storage means stores the previous second gradation data and the current second gradation data, and the driving device of the image display device performs the previous operation stored by the storage means. And, when the combination of the second gradation data of the previous time is a predetermined combination, the second correction for correcting the previous second gradation data of the first correction means so as to approach the second gradation data of the previous time. Means may be provided.

  Further, in addition to the above-described configuration, the second gradation data of both the second gradation data are set so that the sum of the bit widths of the current second gradation data and the previous second gradation data becomes a predetermined set value. Bit width adjusting means for limiting the total bit width may be provided.

  Further, in addition to the above-described configuration, the bit width adjusting unit may include at least one of the second gradation data before the storage unit stores the current second gradation data and the previous second gradation data. The total bit width may be limited by rounding the lower bits of.

  In addition to the above configuration, before the storage unit stores the second gradation data of the current time and the second gradation data of the previous time, at least one lower bit of the second gradation data is rounded, There may be provided a bit width adjusting means for limiting the sum of the bit widths of the second gradation data to a predetermined set value.

  Further, in addition to the above configuration, the bit width adjusting unit changes the ratio of the bit width of the previous second gradation data in the set value according to at least one of the type of video and the temperature. Also good.

  In addition to the above configuration, the bit width adjusting means may round the lower bits by truncating the lower bits.

  Further, in addition to the above configuration, the noise adding means may round the lower bits by truncating the lower bits.

  In addition to the above-described configuration, conversion means for converting the first gradation data into gradation data having a γ characteristic larger than the γ characteristic is provided before the noise adding means. Also good.

  Further, in addition to the above configuration, the first correction unit may correct the current second gradation data of the pixel in accordance with the contents of the lower bits to be rounded.

  In addition to the above configuration, the lower limit value of the gradation data after γ conversion that can be obtained by the conversion of the first gradation data is larger than the lower limit value of the numerical range that can be expressed by the gradation data. It may be set.

  Further, in addition to the above configuration, a gradation converting means for converting the first gradation data into gradation data having a γ characteristic larger than the γ characteristic between the input terminal and the noise adding means. The lower limit value of the gradation data after γ conversion that can be obtained by the conversion of the first gradation data is set to a value larger than the lower limit value of the numerical range that can be expressed by the gradation data. It may be.

  In addition to the above configuration, the bit width of the first gradation data is 8 bits, the bit width of the gradation data after γ conversion is 10 bits, and the bit width of the lower bits is It may be 2 bits.

  Further, in addition to the above configuration, the bit width of the first gradation data is 8 bits, the bit width of the gradation data after the γ conversion is 10 bits, and the bit width of the lower bits is In addition to 2 bits, the first correction means may correct the current second gradation data of the pixel in accordance with the contents of the lower 2 bits.

  By the way, the driving device of the image display device may be realized by hardware, or may be realized by causing a computer to execute a program. Specifically, in order to solve the above problem, the program according to the present invention provides each first gradation data input to an input terminal to which first gradation data indicating the current gradation of each pixel is input. Noise addition means for adding noise data and rounding lower bits of a predetermined bit width to generate second gradation data, first gradation data to pixels adjacent to each other in the same color The noise data is generated so that the noise data to be added to each other has a random size, and the noise generating means to be given to the noise adding means, and the current second gradation data of each pixel are stored until the next time. A first correcting unit that corrects the second gradation data of the current time so as to emphasize the gradation transition from the second gradation data of the previous time read from the storage unit to the second gradation data of the current time. As a correction means, It is characterized in that to operate the computer. Further, in addition to the above configuration, the noise adding means may round the lower bits by truncating the lower bits. The recording medium according to the present invention is characterized in that the program is recorded.

  When the program is executed by a computer, the computer operates as a drive device for the image display device. Therefore, similar to the driving device of the image display device, the response speed of the pixel can be improved without apparently reducing the display quality of the video displayed on each pixel, and the circuit scale and the calculation amount can be reduced. A drive device for a possible image display device can be realized.

On the other hand, the driving device of the image display apparatus according to the reference of the present invention, in order to solve the above problems, the first tone data indicative of the current tone of each pixel with a large γ characteristic than the γ characteristic From the gradation conversion means for converting to the second gradation data, the storage means for storing the current second gradation data of each pixel until the next time, and the previous second gradation data read from the storage means, Correction means for correcting the current second gradation data so as to emphasize the gradation transition to the second gradation data, and the second gradation data that can be obtained by the conversion of the first gradation data. The lower limit value is characterized in that it is set to a value larger than the lower limit value of the numerical range that can represent the second gradation data.

  In the above configuration, since the second gradation data of this time is corrected so that the correction means emphasizes the gradation transition from the previous time to the current time, the response speed of the pixels can be improved. In addition, in the above configuration, the first gradation data is converted into second gradation data having a larger γ characteristic by the gradation converting means. The lower limit value of the second gradation data that can be obtained by the conversion of the first gradation data is set to a value that is larger than the lower limit value of the numerical range that can be expressed by the second gradation data.

  As a result, when the pixel displaying the second gradation data displays the gradation indicated by the second gradation data, the gradation that is crushed in black increases as compared with a configuration that does not perform γ conversion. Of the second gradation data, the second gradation data that is not the minimum corresponds to the lower limit (black level) of the first gradation data. Therefore, the correction means can use the second gradation data having a lower gradation than the second gradation data for gradation transition enhancement, and can improve the response speed of the pixel.

  In addition to the above configuration, the bit width of the second gradation data may be set wider than the bit width of the first gradation data.

  Further, in addition to the above configuration, the bit width of the first gradation data may be 8 bits, and the bit width of the second gradation data may be 10 bits.

  In addition to the above configuration, noise adding means for adding noise data before rounding the second gradation data to the storage means and the correction means, and further rounding lower bits of a predetermined bit width; Noise generating means for generating the noise data and supplying the noise adding means to the noise adding means so that the noise data to be added to the second gradation data to the pixels adjacent to each other in the same color are at random sizes; May be provided.

  Further, in addition to the above configuration, the bit width of the first gradation data is 8 bits, the bit width of the second gradation data is 10 bits, and the bit width of the lower bits is 2 bits. It may be.

  In addition to the above configuration, the noise adding means may round the lower bits by truncating the lower bits.

  Further, in addition to the above configuration, before inputting the second gradation data to the storage means and the correction means, a noise addition means for adding noise data, and a second gradation for pixels adjacent to each other in the same color. Noise generating means for generating the noise data and giving the noise data to the noise adding means so that the noise data added to the data has a random size, and the storage means includes the current first of each pixel. The two-gradation data may be compressed and stored until the next time, and the correction means may round lower bits of a predetermined bit width before outputting the corrected second gradation data.

  In order to solve the above-described problem, the program according to the present invention converts the first gradation data indicating the current gradation of each pixel into second gradation data having a γ characteristic larger than the γ characteristic. Tone conversion means for conversion, storage means for storing the current second gradation data of each pixel until the next time, and the previous second gradation data read from the storage means to the current second gradation data A program that causes a computer to operate as correction means for correcting the second gradation data this time so as to emphasize the gradation transition of the second gradation data, and is a lower limit of the second gradation data that can be obtained by the conversion of the first gradation data. The value is characterized in that it is set to a value larger than the lower limit value of the numerical range that can be expressed by the second gradation data. The recording medium according to the present invention is characterized in that the program is recorded.

  When the program is executed by a computer, the computer operates as a drive device for the above-described image display device. Therefore, similarly to the drive device for the image display device, a drive device for the image display device that can improve the response speed of the pixels can be realized.

  On the other hand, in order to solve the above problems, the drive device for an image display device according to the present invention includes an input terminal to which first gradation data indicating the current gradation of each pixel is input, and each of the first gradations. The noise adding means for adding the noise data to the data to generate the second gradation data and the noise data added to the first gradation data to the pixels adjacent to each other in the same color have a random size. As described above, the noise generation unit that generates the noise data and supplies the noise addition unit, the storage unit that compresses the current second gradation data of each pixel and stores it until the next time, and reads from the storage unit The second gradation data of this time is corrected so that the gradation transition from the second gradation data of the previous time to the second gradation data of this time is emphasized. First correction to be output after rounding It is characterized in that it comprises a stage.

  In order to solve the above-described problem, the image display device driving apparatus according to the present invention includes a noise generation unit that generates noise data, and the generated noise data in the first gradation data to the received pixel. In accordance with the previous second gradation data read from the storage means, the noise adding means for generating the second gradation data, the storage means for storing the second gradation data, Correcting the current second gradation data of the pixel and rounding at least one lower-order bit so as to emphasize the gradation transition from the second gradation data to the current second gradation data, And a first correction unit that outputs the corrected second gradation data.

  In these configurations, the second gradation data after being rounded by the first correction unit is output. Therefore, compared with a configuration in which rounding processing is not performed, bits of grayscale data that need to be processed by a circuit after the first correction unit (for example, a data signal line driving circuit or a scanning signal line driving circuit of the image display device). The width can be reduced. As a result, the circuit scale and the calculation amount of these circuits can be reduced, and the number of wirings for connecting these circuits and the occupied area of the wirings can be reduced.

  Further, in the driving device for the image display device, the addition of the noise data and the rounding processing are performed in the same manner as the driving device for the image display device (the configuration in which the noise adding unit performs addition and rounding processing of the noise data). This is different from the following configuration, that is, a configuration in which a pseudo contour is generated in an image displayed on each pixel as a result of generating the second gradation data by simply truncating the lower bits of the first gradation data. No pseudo contour is generated. As a result, even though the bit width of the second gradation data is shorter than that of the first gradation data, the display quality of the video displayed on each pixel is the same as when the first gradation data is displayed. It can be kept to the extent that it does not differ in appearance.

  Moreover, since the gradation transition from the previous time to the current time is emphasized by the first correction means, the response speed of the pixels can be improved. Here, when the noise adding means is provided at the subsequent stage of the first correcting means, noise is added to the data after the gradation transition emphasis, so that the gradation transition is overemphasized and the luminance of the pixel is undesirably increased. However, the image display device may be visually recognized as white light, or the gradation transition may not be sufficiently emphasized, and the luminance of the pixel may be lowered undesirably and may be visually recognized as a black sun. However, in the above configuration, since the first correction unit is arranged after the noise addition unit, the first correction unit is different from the case where the first correction unit is arranged in front of the noise addition unit. The response speed of the pixels can be improved without causing sinking.

  As a result, there is provided a driving device for an image display device capable of improving the response speed of the pixels without apparently degrading the display quality of the video displayed on each pixel, and reducing the circuit scale and the amount of calculation. realizable.

  Furthermore, an image display device according to the present invention includes the above-described driving devices. In addition, a television receiver according to the present invention includes the image display device.

  According to another aspect of the present invention, there is provided a driving method for an image display device, in order to solve the above problems, a noise generation step of generating noise data, and the generated noise data in the first gradation data to the received pixel. And adding the noise data and the first gradation data, rounding off at least one lower bit to generate second gradation data, and adding the second gradation data In accordance with the storing step of storing and the stored previous second gradation data, the current pixel of the pixel is emphasized so as to emphasize the gradation transition from the previous second gradation data to the current second gradation data. And a first correction step for correcting the second gradation data.

  In this configuration, the second gradation data stored in the storing step is set to have a bit width shorter than that of the first gradation data by rounding the lower bits. Therefore, it is possible to reduce the storage capacity necessary for the storage device that stores the second gradation data. In addition, since the bit width of the gradation data processed by the circuits that perform the steps after the noise addition step is reduced, the circuit scale and the amount of calculation of these circuits can be reduced, and these circuits can be connected. The number of wires and the area occupied by the wires can be reduced. Further, since the noise data is added to the first gradation data in the noise addition step, no pseudo contour is generated. As a result, even though the bit width of the second gradation data is shorter than that of the first gradation data, the display quality of the video displayed on each pixel is the same as when the first gradation data is displayed. It can be kept to the extent that it does not differ in appearance.

  In addition, since the gradation transition from the previous time to the current time is emphasized by the first correction process, the response speed of the pixels can be improved. Further, in the above configuration, the first correction step is performed after the noise addition step, and therefore, unlike the case where the first correction step is performed before the noise addition step, whitening and darkening due to noise addition are eliminated. The response speed of the pixel can be improved without generating it.

  As a result, there is provided a driving device for an image display device capable of improving the response speed of the pixels without apparently degrading the display quality of the video displayed on each pixel, and reducing the circuit scale and the amount of calculation. realizable.

Furthermore, in addition to the above-described configuration , the driving device of the image display device according to the present invention may be configured such that the noise generation unit randomly adds noise data to be added to the first gradation data to pixels adjacent to each other in the same color. so that a size is characterized by generating the noise data.

In addition to the above configuration , the drive device of the image display device according to the present invention may be configured such that the noise generation unit adds noise data of the same magnitude to the first gradation data for the same pixel each time. It is characterized by generating noise data.

  Further, in addition to the above-described configuration, the received video signal including the first gradation data may be a video signal obtained by dividing the video into a plurality of blocks and encoding each block.

  In addition to the above configuration, the first gradation data is represented by 8 bits, and the maximum absolute value of each noise data is set to a value in the range of 1 to 32 gradations. In addition, the second gradation data may be represented by 6 bits.

  Further, in addition to the above configuration, the first gradation data may be expressed by 10 bits, and the second gradation data may be expressed by 8 bits.

  In addition to the above configuration, the noise adding step, the noise generating step, the storing step, and the first correcting step may be performed for each RGB color.

  Further, in addition to the above configuration, the noise generation step may generate noise data so that noise data added to the first gradation data for the same pixel has a random size.

  In addition to the above configuration, when the difference between the previous second gradation data and the current second gradation data is a difference that can be generated only by addition of noise data, the current second gradation data. The correction may be stopped.

  Further, in addition to the above configuration, the first gradation data is expressed by 8 bits, and the maximum absolute value of each noise data is set to a value in the range of 1 gradation to 8 gradations. In addition, the second gradation data may be represented by 6 bits.

  In addition to the above configuration, the noise adding step, the noise generating step, the storing step, and the first correcting step may be performed for each RGB color.

  Further, in addition to the above configuration, the first gradation data is expressed by 8 bits, and the maximum absolute value of each noise data is set to a value in the range of 1 gradation to 8 gradations. In addition, the noise adding step, the noise generating step, the storing step, and the first correcting step may be performed for each RGB color.

  Further, in addition to the above-described configuration, each of the grayscales obtained by averaging the second grayscale data for the same pixel is a grayscale before the lower bits are rounded by the noise adding step, and each pattern is set in advance. A least significant bit control step of changing the least significant bit of the second gradation data may be included.

  Further, in addition to the above configuration, the difference between the previous second gradation data and the current second gradation data is generated only by the addition of noise data and the change of the least significant bit in the least significant bit control step. If the difference is obtained, the correction of the current second gradation data may be stopped.

  In addition to the above-described configuration, the pixel is divided into a plurality of regions, and the first gradation data for the plurality of pixels included in each region is averaged. A noise amount control step for controlling the noise generation may be included so that the maximum absolute value of the noise data becomes smaller.

  Further, in addition to the above configuration, the received video signal including the first gradation data is a video signal obtained by dividing the video into a plurality of blocks and encoded in units of each block, It may match the block.

  In addition to the above configuration, the storing step stores the second gradation data of the previous time and the second gradation data of the current time, and the driving method of the image display device is the previous and last time stored. When the combination of the second gradation data is a predetermined combination, the second correction for correcting the previous second gradation data so as to approach the second gradation data of the previous time before the first correction step. A process may be included.

  Further, in addition to the above-described configuration, both the second gradation data are set so that the sum of the bit widths of the current second gradation data and the previous second gradation data becomes a predetermined setting value. A bit width adjusting step for limiting the total bit width may be included.

  In addition to the above-described configuration, the bit width adjusting step may store at least one lower bit of both the second gradation data before storing the current second gradation data and the previous second gradation data. The total bit width may be limited by rounding.

  Further, in addition to the above configuration, the ratio of the bit width of the previous second gradation data in the set value may be changed in accordance with at least one of the type of video and the temperature.

  In addition to the above-described configuration, a conversion step for converting the first gradation data into gradation data having a γ characteristic larger than the γ characteristic is provided before the noise adding step. Also good.

  Further, in addition to the above configuration, the first correction step may correct the current second gradation data of the pixel in accordance with the contents of the lower bits to be rounded.

  In addition to the above configuration, the lower limit value of the gradation data after γ conversion that can be obtained by the conversion of the first gradation data is larger than the lower limit value of the numerical range that can be expressed by the gradation data. It may be set.

  Further, in addition to the above configuration, the bit width of the first gradation data is 8 bits, the bit width of the gradation data after the γ conversion is 10 bits, and the bit width of the lower bits is It may be 2 bits.

  In addition to the above configuration, the first correction step may correct the current second gradation data of the pixel according to the contents of the lower 2 bits.

  On the other hand, in order to solve the above-described problem, the image display device driving method according to the present invention includes a noise generation step of generating noise data, and the generated noise data in the first gradation data to the received pixel. Are added to generate the second gradation data, a storage process to store the second gradation data, and the previous second floor according to the stored second gradation data. The current second gradation data of the pixel is corrected so as to emphasize the gradation transition from the tone data to the current second gradation data, and at least one lower bit is rounded to correct the corrected second gradation data. And a first correction step for outputting two-gradation data.

  In addition, an image display method according to the present invention includes a driving method of the image display device in order to solve the above-described problem. Further, in addition to the above configuration, the image display device may be a television receiver.

  A program according to the present invention causes a computer to execute each step of the driving method of the image display device. Further, the recording medium according to the present invention is strongly characterized in that the program is recorded.

  According to the present invention, it is possible to improve the response speed of a pixel without apparently degrading the display quality of an image displayed on each pixel, and the drive device of an image display device having a simple configuration, or the smallest Even when gradation transition to gradation is required, it is possible to realize an image display apparatus driving apparatus capable of improving the response speed of pixels. It can be suitably used as a drive device for an image display device.

[First Embodiment]
An embodiment of the present invention will be described with reference to FIGS. 1 to 9 as follows. That is, the image display device 1 according to the present embodiment can improve the response speed of the pixels without apparently reducing the display quality of the video displayed on each pixel, and can reduce the circuit scale and the calculation amount. A possible image display device, for example, can be suitably used as an image display device of a television receiver. Examples of television broadcasts received by the television receiver include broadcasting using artificial satellites such as terrestrial television broadcasting, BS (Broadcasting Satellite) digital broadcasting and CS (Communication Satellite) digital broadcasting, or Cable TV and television broadcasting.

  The panel 11 of the image display device 1 is, for example, a panel capable of color display by configuring one pixel from sub-pixels capable of displaying each color of R, G, and B and controlling the luminance of each sub-pixel. For example, as shown in FIG. 2, a pixel array 2 having subpixels SPIX (1,1) to SPIX (n, m) arranged in a matrix and data signal lines SL1 to SLn of the pixel array 2 And a scanning signal line drive circuit 4 for driving the scanning signal lines GL1 to GLm of the pixel array 2. In addition, the image display device 1 includes a control circuit 12 that supplies control signals to both the drive circuits 3 and 4, and the control circuit 12 that emphasizes the gradation transition based on the input video signal. A modulation drive processing unit (drive device) 21 for modulating a video signal to be supplied is provided. These circuits are operated by supplying power from the power supply circuit 13. In the present embodiment, one pixel PIX is composed of three subpixels SPIX adjacent in the direction along the scanning signal lines GL1 to GLm. Further, the subpixels SPIX (1,1)... According to the present embodiment correspond to the pixels described in the claims.

  Hereinafter, before describing the detailed configuration of the modulation drive processing unit 21, the schematic configuration and operation of the entire image display device 1 will be described. For convenience of description, for example, only when the position needs to be specified as in the i-th data signal line SLi, it is not necessary to specify the position by referring to the position with a numeral or alphabetic character. When referring to the case or generically, the characters indicating the position are omitted for reference.

  The pixel array 2 includes a plurality (in this case, n) of data signal lines SL1 to SLn and a plurality (in this case, m) of scanning signal lines GL1 that intersect the data signal lines SL1 to SLn, respectively. GLm, where an arbitrary integer from 1 to n is i, and an arbitrary integer from 1 to m is j, a subpixel SPIX is provided for each combination of the data signal line SLi and the scanning signal line GLj. (i, j) is provided.

  In the present embodiment, each sub-pixel SPIX (i, j) includes two adjacent data signal lines SL (i−1), SLi, and two adjacent scanning signal lines GL (j−1), It is arranged in a portion surrounded by GLj.

  As an example, the case where the image display device 1 is a liquid crystal display device will be described. For example, as shown in FIG. 3, the subpixel SPIX (i, j) has a gate as a switching element and a drain to the scanning signal line GLj. Is connected to the data signal line SLi, and a pixel capacitor Cp (i, j) having one electrode connected to the source of the field effect transistor SW (i, j). I have. The other end of the pixel capacitor Cp (i, j) is connected to a common electrode line common to all the subpixels SPIX. The pixel capacitor Cp (i, j) includes a liquid crystal capacitor CL (i, j) and an auxiliary capacitor Cs (i, j) that is added as necessary.

  In the subpixel SPIX (i, j), when the scanning signal line GLj is selected, the field effect transistor SW (i, j) is turned on, and the voltage applied to the data signal line SLi is changed to the pixel capacitance Cp (i, j). applied to j). On the other hand, while the selection period of the scanning signal line GLj ends and the field effect transistor SW (i, j) is cut off, the pixel capacitor Cp (i, j) continues to hold the voltage at the cut-off. Here, the transmittance or reflectance of the liquid crystal varies depending on the voltage applied to the liquid crystal capacitance CL (i, j). Therefore, if the scanning signal line GLj is selected and a voltage corresponding to the video data D (i, j, k) to the subpixel SPIX (i, j) is applied to the data signal line SLi, the subpixel SPIX ( The display state of i, j) can be changed in accordance with the video data D (i, j, k).

  The liquid crystal display device according to the present embodiment is a vertical alignment mode liquid crystal cell as a liquid crystal cell, that is, when no voltage is applied, liquid crystal molecules are aligned substantially perpendicular to the substrate, and the subpixel SPIX (i, j) A liquid crystal cell in which the liquid crystal molecules are tilted from the vertical alignment state in accordance with the voltage applied to the liquid crystal capacitance CL (i, j) of the liquid crystal is used in a normally black mode (when no voltage is applied, black display Mode).

  In the above configuration, the scanning signal line drive circuit 4 shown in FIG. 2 outputs a signal indicating whether or not the selected period, such as a voltage signal, to each of the scanning signal lines GL1 to GLm. Further, the scanning signal line drive circuit 4 changes the scanning signal line GLj that outputs a signal indicating the selection period based on a timing signal such as a clock signal GCK or a start pulse signal GSP given from the control circuit 12, for example. Yes. Thus, the scanning signal lines GL1 to GLm are sequentially selected at a predetermined timing.

  Further, the data signal line driving circuit 3 extracts, as a video signal, the video data D to the subpixels SPIX input in a time division manner by sampling at a predetermined timing. Further, the data signal line driving circuit 3 supplies the data signal lines SL1 to the subpixels SPIX (1, j) to SPIX (n, j) corresponding to the scanning signal line GLj selected by the scanning signal line driving circuit 4. The output signal according to the video data to each is output via .about.SLn.

  The data signal line driving circuit 3 determines the sampling timing and the output timing of the output signal based on timing signals such as the clock signal SCK and the start pulse signal SSP input from the control circuit 12.

  On the other hand, each of the subpixels SPIX (1, j) to SPIX (n, j) is given to the data signal lines SL1 to SLn corresponding to itself while the scanning signal line GLj corresponding to the subpixel SPIIX (1, j) to SPIX (n, j) is selected. In accordance with the output signal, the brightness and transmittance at the time of light emission are adjusted to determine its own brightness.

  Here, the scanning signal line driving circuit 4 sequentially selects the scanning signal lines GL1 to GLm. Therefore, the sub-pixels SPIX (1,1) to SPIX (n, m) constituting all the pixels of the pixel array 2 can be set to the brightness (gradation) indicated by the video data to be displayed on the pixel array 2. Can update the image.

  Note that the video data D may be the gradation level itself or a parameter for calculating the gradation level as long as the gradation level of the subpixel SPIX can be specified. The case where the video data D is the gradation level itself of the sub-pixel SPIX will be described.

  In the image display device 1, the video signal DAT supplied from the video signal source VS to the modulation drive processing unit 21 may be transmitted in units of frames (entire screen unit), or one frame in a plurality of fields. Although the data may be divided and transmitted in the field unit, the case where the data is transmitted in the field unit will be described below as an example.

  That is, in the present embodiment, the video signal DAT supplied from the video signal source VS to the modulation drive processing unit 21 divides one frame into a plurality of fields (for example, two fields) and is transmitted in units of the field. .

  More specifically, when the video signal source VS transmits the video signal DAT to the modulation drive processing unit 21 of the image display device 1 via the video signal line VL, after transmitting all the video data for a certain field, The video data for each field is transmitted in a time-sharing manner, for example, by transmitting video data for the next field.

  The field is composed of a plurality of horizontal lines. For example, in the video signal line VL, after all video data for a certain horizontal line is transmitted in a certain field, the horizontal line is transmitted next. For example, the video data for each horizontal line is transmitted in a time division manner.

  In this embodiment, one frame is composed of two fields, and in the even field, the video data of the horizontal line of the even-numbered row among the horizontal lines constituting one frame is transmitted. In the odd field, the video data of the horizontal line of the odd row is transmitted. Further, the video signal source VS drives the video signal line VL in a time-sharing manner when transmitting video data for one horizontal line, and the video data is sequentially transmitted in a predetermined order.

  On the other hand, in the modulation drive processing unit 21, a receiving circuit (not shown) samples video data transmitted through the video signal line VL, and outputs video data D (i, j, k) to each sub-pixel SPIX (i, j). ) When the video data D (i, j, k) is transmitted to the subpixels SPIX (i, j) through the video signal line VL, the receiving circuit performs sampling at a predetermined timing. The video data D (i, j, k) itself is acquired. On the other hand, when video data to each pixel is transmitted through the video signal line VL, the receiving circuit obtains video data to each pixel by sampling at a predetermined timing, and the video data The video data D (i, j, k) to each subpixel SPIX (i, j) is acquired by decomposing the indicated color into color components of each subpixel of the pixel.

  In the image display device 1 according to the present embodiment, one pixel is composed of three subpixels SPIX corresponding to R, G, and B, respectively, and the modulation drive processing unit 21 shown in FIG. In other words, not only a circuit for processing the video data D to the sub-pixel SPIX corresponding to R, but also a circuit for G and B, each circuit is provided with input video data D (i, Since the configuration is the same except for j, k), only the R circuit will be described below with reference to FIG.

  That is, as shown in FIG. 1, the modulation drive processing unit 21 according to the present embodiment stores, as an R circuit, a frame memory that stores one frame of video data to the R subpixel SPIX up to the next frame. 31 and the video data of the current frame FR (k) are written to the frame memory 31, and the video data D0 (i, j, k-1) of the previous frame FR (k-1) is read from the frame memory 31, and the previous frame The memory control circuit 32 that outputs the video signal DAT0 and the video data of the current frame FR (k) are corrected so as to emphasize the gradation transition from the current frame to the previous frame, and the corrected video data D2 (i , j, k) is output as a corrected video signal DAT2, and a modulation processing unit (first correction means) 33 is provided. In the present embodiment, for convenience of explanation, among the video data output from the frame memory 31, the video data of the previous frame FR (k-1) is indicated by D0 (i, j, k-1), The video data (described later) of the frame FR (k-2) is referred to as D00 (i, j, k-2). Also, based on both video data D00 (i, j, k-2) and D0 (i, j, k-1), the video data generated by the previous frame gradation correction circuit 37 described later is converted to D0a (i, j , k-1). In this embodiment, since the subpixels SPIX (1, j), (4, j)... Display R, the video data D (1, j, k), D (4, j, k) ... is entered.

  Furthermore, the modulation drive processing unit 21 according to the present embodiment has the video data D (i, j,) stored in the frame memory 31 without apparently reducing the display quality of the video displayed on the pixel array 2. k) in order to reduce the amount of data, noise is generated between the input terminal T1 and the memory control circuit 32 and the modulation processing unit 33 to the video data D (i, j, k) input to the input terminal T1. A noise addition circuit 34 that adds and outputs the noise generated by the circuit (noise generation means) 35, and a truncation circuit that reduces the bit width of the video data by truncating the lower bits of each video data output by the noise addition circuit 34 BDE (Bit-Depth Extension) circuit including the video data D1 (i, j, k) output from the truncation circuit 36 is used as the video data of the current frame FR (k). 33 and Is input to the memory control circuit 32. The noise generation circuit 35 and the truncation circuit 36 correspond to the noise adding means described in the claims.

  The noise generation circuit 35 has an average value of 0, and outputs random noise to the extent that no pseudo contour is generated in the video displayed on the pixel array 2. In addition, if the maximum value of the noise data is too large, the noise pattern may be recognized by the user of the image display device 1, and therefore the maximum value of the noise is set to such an extent that the noise pattern is not recognized. In the present embodiment, the video data D (i, j, k) to each subpixel SPIX (i, j) input to the input terminal T1 is expressed by 8 bits, and the size of the noise data is It is set within ± 5 bits. The truncation circuit 36 truncates the lower 2 bits from the 8-bit video data output from the noise generation circuit 35 and outputs the result as 6-bit video data D1 (i, j, k). Accordingly, in the frame memory 31, the storage area for storing the video data D1 (i, j, k) of the current frame FR (k) is one video data D1 (i, j, k). The number is limited to 6 bits.

  As a result, no noise pattern or pseudo contour is generated in the video displayed on the pixel array 2, and the circuit after the truncation circuit 36 is not different from the case where the video data D before truncation is displayed. The number of bits of video data processed by can be reduced.

  Here, how much the added noise is different from the surrounding pixel (variation rate) and the target luminance by the user of the image display device 1 (variation rate) ( Error). In general, in the field of making pictures on the basis of 100 ppi as in the image display apparatus 1, the allowable limit of the error is about 5% of the white luminance, and the allowable limit of the variation rate is 5 of the display gradation. It is known that it is about%. Here, in FIG. 4, when the display gradation of the pixel is increased by x gradation, the transmittance of the pixel increases by what percentage based on the surrounding luminance (transmittance before increasing the gradation). It shows. Further, FIG. 5 shows how much percentage increases with reference to the original transmittance (transmittance before increasing the gradation) when the display gradation of the pixel is increased by x gradation. As a result, in the case of noise of 8 to 12 gradations, it is possible to make the user feel that the display quality is not deteriorated apparently below the allowable limit in almost all gradations. The above figures are values when a video signal of γ = 2.2 is input as a general video signal DAT.

Therefore, when it is assumed that one pixel is viewed at a distance where it cannot be seen independently, the above-described variation rate and error are set to be less than 5% between 2 to 3 pixels (6 to 9 subpixels). That's fine. Here, assuming that the noise data has a substantially normal distribution, 8 to 12 [gradation] × 6 ^{(1/2) to} 9 ^(1/2) = 20 to 36 [gradation]. Therefore, even if a fixed noise is added in a time-series manner with a bit width of about 5 bits, that is, about 3 bits less than the video data D, there is no possibility that the noise pattern is visually recognized by the user of the image display apparatus.

  In general, even if the pixel size increases, the observation distance does not increase in proportion to the pixel distance. Therefore, the allowable level of noise data decreases as the pixel size increases. Accordingly, among the numerical range of 1 to 32 gradations (within 5 bits), the numerical range preferably used in many image display devices 1 as the maximum absolute value of the noise data is 12 to 20 gradations. It is desirable that the gradation is set to 15 gradations (4 bits).

  The noise generation circuit 35 may be various arithmetic circuits such as an arithmetic circuit including a linear feedback shift register (M series, Gold series, etc.), but the noise generation circuit 35 according to the present embodiment is 16 Generates a memory 51 storing noise data for a predetermined block such as × 16 or 32 × 32, an address counter 52 for sequentially reading noise data from the memory 51, and a reset signal for resetting the address counter 52 And a control circuit 53.

  The control circuit 53 addresses the video data D (i, j, *) to the same subpixel SPIX (i, j) so that noise data having the same value is applied to all the frames. The counter 52 is reset. For example, in the present embodiment, the control circuit 53 resets the address counter 52 in synchronization with at least one of a horizontal synchronization signal and a vertical synchronization signal transmitted together with video data from the video signal source VS shown in FIG. As a result, the noise adding circuit 34 can add noise data having the same value to the video data D (i, j, *) to the same subpixel SPIX (i, j) over the entire frame. Therefore, when the image display device 1 displays a still image on the pixel array 2, the corrected video data D2 (i, j, *) for each sub-pixel SPIX (i, j) does not change and the corrected video is displayed. A stable still image free from flicker and noise caused by changes in the data D2 (i, j, *) can be displayed. Here, * indicates an arbitrary value.

  Since random noise data is stored in the memory 51, random noise data is added to the video data to the sub-pixel SPIX located in the same block in each frame, and the pixel array 2 There is no pseudo contour in the video displayed on the screen.

  Further, in the present embodiment, the frame memory 31 stores the video data of the previous frame up to the next frame, and the control circuit 32 receives the video of the previous frame FR (k−2) from the frame memory 31. Data D00 (i, j, k-2) can be read out and output as a frame video signal DAT00 before.

  Further, in the modulation drive processing unit 21 according to the present embodiment, for each subpixel SPIX (i, j), the subpixel SPIX (i, j) is imaged from the video data D00 (i, j, k-2). The gray level reached by the gray level transition to the data D0 (i, j, k-1) is predicted, and the video data D0 (i, j, k-1) of the previous frame FR (k-1) is predicted. A previous frame gradation correction circuit (second correction means) 37 for correcting and outputting to a value D0a (i, j, k-1) is provided, and the modulation processing unit 33 receives the corrected previous frame video signal. Based on DAT0a and the current frame video signal DAT, the video data D1 () of the current frame FR (k) is emphasized so as to emphasize the gradation transition from the previous frame to the current frame of each subpixel SPIX (i, j). i, j, k) can be corrected.

  In the above configuration, the video data D1 (i, j,) of the current frame FR (k) is emphasized so that the modulation processing unit 33 emphasizes the gradation transition from the previous frame FR (k-1) to the current frame FR (k). Since k) is corrected, the response speed of the sub-pixel SPIX can be improved, and an image can be displayed with a sufficient response speed even when the sub-pixel SPIX that originally has a slow response speed is used.

  In addition, since the BDE circuit including the noise adding circuit 34 and the truncation circuit 36 is provided in the previous stage of the frame memory 31, the frame memory can be displayed without apparently degrading the display quality of the video displayed on the pixel array 2. The data amount of the video data D (i, j, k) stored in 31 can be reduced. In the present embodiment, the video data D1 (i, j, k) stored in the frame memory 31 is used even though the bit width of the video data D (i, j, k) input to the input terminal T1 is 8 bits. The bit width of k) is reduced to 6 bits. Thereby, the memory capacity required for the frame memory 31 can be reduced. In the circuits after the truncation circuit 36, that is, the memory control circuit 32, the previous frame gradation correction circuit 37, the modulation processing unit 33, the control circuit 12 shown in FIG. Is reduced from 8 bits to 6 bits, the number of wirings for connecting them and the occupied area can also be reduced to 3/4, and the amount of calculation in these circuits can be reduced.

  Since video data needs to be transmitted at a relatively high speed, in order to transmit the video data with a relatively slow circuit, it is necessary to provide a plurality of circuits in parallel and operate them alternately. As the number of bits increases, the area occupied by the circuit increases. However, in the above configuration, since the bit width is reduced to 3/4, the increase in the occupied area of the circuit is suppressed even when a circuit that operates in parallel is provided, compared to the case of 8 bits. be able to.

  In the above configuration, the BDE circuit including the noise adding circuit 34 and the truncation circuit 36 is provided in the preceding stage of the frame memory 31 and the modulation processing unit 33. Therefore, unlike the case where the BDE circuit is provided in the subsequent stage of the modulation processing unit 33, the following problems, that is, after the gradation transition is emphasized as much as possible within the range where the modulation processing unit 33 does not generate white light, As a result of adding noise to the circuit, there is no problem that white light is visible. As a result, although the addition of noise and enhancement of gradation transition are used in combination, the occurrence of whitening can be prevented.

  By the way, if the response speed of the sub-pixel SPIX (i, j) is very slow, in the previous frame FR (k−1), the tone transition from the previous frame to the previous frame is emphasized. The sub-pixel SPIX (i, j) may not reach the gradation indicated by the video data D1 (i, j, k-1) of the previous frame FR (k-1). In this case, in the current frame FR (k), if it is assumed that the gradation transition has been sufficiently performed from the previous time to the previous time and the gradation transition is emphasized, the gradation transition cannot be enhanced appropriately, and there is a possibility that whitening or darkening may occur. is there.

  For example, as shown by the solid line in FIG. 6, when the gradation transition from the previous time to the current time is from decay to rise, as shown by the broken line in the figure, the gradation transition from the previous time to the previous time is not sufficient, and the current Despite the fact that the luminance level at the start of the frame FR (k) is not sufficiently lowered, the pixel is changed in the same manner as in the case where a sufficient gradation transition is made in the current frame FR (k) (the one-dot chain line in the figure). When driven, the gradation transition is overemphasized and whitening occurs.

  In addition, as shown by the solid line in FIG. 7, when the gradation transition from the previous time to the current time is rise → decay, the gradation transition from the previous time to the previous time is not sufficient as shown by the broken line in the figure, and the current Despite the fact that the brightness level at the start of the frame FR (k) has not risen sufficiently, the pixel is changed in the same manner as in the case of sufficient gradation transition in the current frame FR (k) (the dashed line in the figure). When it is driven, the gradation transition is overemphasized and black sink occurs.

  When the above-mentioned brightening or darkening occurs, these gradations are out of the range from the previous gradation to the current gradation, so that it is easy for the user to see and the display quality of the image display device is greatly reduced. Let In particular, when whitening occurs, even if the generation period is a moment, the user's eyes are easily noticed, and the display quality is particularly deteriorated.

  On the other hand, the previous frame gradation correction circuit 37 according to the present embodiment is based on both the video data D00 (i, j, k-2) and D00 (i, j, k-1) before correction. The gray level reached by the sub-pixel SPIX (i, j) due to the gray level transition from the previous frame to the previous frame is predicted, and the video data D1 (i, j, k-1) of the previous frame FR (k-1) is predicted. ) Is changed to the predicted value D0a (i, j, k-1). As a result, it is possible to prevent the occurrence of whitening and darkening, and the display quality of the image display device 1 can be improved.

  In addition, since the frame memory 31 stores video data D1 (i, j, k) before correction, unlike the display device 501a shown in FIG. 27, even if an error occurs during correction, the error is not detected. It does not accumulate over time. Therefore, even if the accuracy of the prediction calculation is reduced to such an extent that whitening and darkening can be prevented, unlike the image display device 501a, gradation control of each subpixel SPIX diverges or vibrates. There is nothing to do. As a result, it is possible to realize the image display device 1 that can prevent the occurrence of whitening and darkening with a circuit scale smaller than that of the image display device 501a.

  More specifically, as shown in FIG. 1, the previous frame gradation correction circuit 37 according to the present embodiment performs combinations of the previous gradation and the current gradation, and the video data of the combination is subjected to modulation processing. An LUT (Look Up Table) 71 that records the gradation (arrival gradation) reached when the subpixel SPIX (i, j) is driven by the next video data when input to the unit 33. I have. Furthermore, in this embodiment, in order to reduce the storage capacity required for the LUT 71, the reached gradation stored in the LUT 71 is not a reached gradation of a combination of all the gradations, but a predetermined combination. The previous frame gradation correction circuit 37 interpolates the reached gradations corresponding to each combination stored in the LUT 71 to obtain both the video data D00 (i, j, k-2) and the video. An arithmetic circuit 72 is provided that calculates the reached gradation corresponding to the combination of the data D0 (i, j, k-1) and outputs the calculation result as the predicted value D0a (i, j, k-1). .

  In this embodiment, in order to reduce the storage capacity required for the frame memory 31, the control circuit 32 reduces the data depth of the video data D1 (i, j, k) of the current frame FR (k). Then, it is stored in the frame memory 31 and output as video data D0 (i, j, k) of the previous frame FR (k) in the next frame FR (k + 1). Further, the control circuit 32 further reduces the data depth of the video data D0 (i, j, k-1) of the previous frame FR (k-1) and then stores it in the frame memory 31 to store the next frame FR ( k + 1) is output as video data D00 (i, j, k-1) of the frame FR (k-1) in advance.

As an example, in the present embodiment, the data depth of the video data D00 (i, j, k-2) of the previous frame FR (k-2) and the video data D0 (i) of the previous frame FR (k-1). , j, k-1) is set to 4 bits and 6 bits. In this case, even if each of R, G, and B is stored, 30 bits are sufficient. Therefore, when a general-purpose memory (memory whose data bit width is set to 2 ⁿ ) is used, the video data D00 (i, j, k-2) of the frame FR (k-2) is also stored in advance. Nevertheless, the memory having the same storage capacity as that for storing the video data D0 (i, j, k-1) of the previous frame FR (k-1) can be used.

  Further, in the present embodiment, as shown in FIG. 8, the area expressed by the combination of the above gradations is divided into 8 × 8 calculation areas, and the LUT 71 has each calculation area as shown in FIG. The reached gradation is stored for the four corner points (9 × 9 points). 8 and 9, the vertical axis indicates the start gradation (the gradation of the previous frame), and the horizontal axis indicates the end gradation (the gradation of the previous frame). The gradation is large. 8 and 9 and FIG. 12 to be described later, for convenience of explanation, the gradation before truncation, that is, a value obtained by expanding 6-bit video data D1 (i, j, k) to 8 bits ( 4 times the value).

  Here, FIG. 9 shows a numerical example in the case of adopting a vertical alignment mode and normally black mode liquid crystal element as the sub-pixel SPIX (i, j). This liquid crystal element has a slower response speed with respect to the decay gradation transition than the rise, and even if it is driven by modulation so as to emphasize the gradation transition, in the decay gradation transition from the previous time to the previous time, A difference is likely to occur between an actual gradation transition and a desired gradation transition. Therefore, the region α1 in which the actual arrival value is significantly larger than the gradation (E) to be reached is wider than the region α2 in which the arrival value is significantly smaller than the gradation to be reached. It has become. Note that the areas α1 and α2 are not corrected by the previous frame gradation correction circuit 37, and the modulation processing unit 33 is based on the video data D1 (i, j, k-1) of the previous frame FR (k-1). This is an area where the video data D1 (i, j, k) and the actual gradation are so different that the user can visually recognize the video data D1 (i, j, k) of the current frame FR (k). .

  Further, when the combination (S, E) of both the video data D00 (i, j, k-2) and the video data D0 (i, j, k-1) is input, the arithmetic circuit 72 determines the combination. Identify which of the above calculation areas it belongs to.

Further, the arithmetic circuit 72 sets the arrival gradations at the four corners of the calculation area to A, B, C, and D in the order of the upper left corner, the upper right corner, the lower right corner, and the lower left corner, respectively. Y × X, the value obtained by normalizing the difference between the combination (S0, E0) in the upper left corner and the above combination (S, E) to (1, 1) is (Δy, Δx) = ((S−S0) / Y, (E−E0) / X), when Δx> = Δy, the arithmetic circuit 72 reads out each of the reached gradations A, B, and C from the LUT 71 and obtains the following equation (1). As shown
D0a (i, j, k-1) = A + .DELTA.x. (BA) +. DELTA.y. (CB) (1)
D0a (i, j, k-1) is calculated.

Further, when Δx <Δy, the arithmetic circuit 72 reads each of the reached gradations A, C, and D from the LUT 71, and as shown in the following equation (2),
D0a (i, j, k-1) = C + .DELTA.x. (C-D) + (1-.DELTA.y). (DA) (2)
D0a (i, j, k-1) is calculated.

  For example, in the example of FIGS. 8 and 9, when (S, E) is (144, 48), it is surrounded by (128, 32), (128, 64), (160, 64) and (160, 32). The calculated calculation area is specified, and the corrected video data D0a (i, j, k-1) of the previous frame FR (k-1) becomes 60. Therefore, based on the video data D1 (i, j, k-1) = 48 of the previous frame FR (k-1), the modulation processing unit 33 uses the video data D1 (i, j, k) of the current frame FR (k). ) Is corrected, the video data D1 (i, j, k) is corrected on the basis of the corrected video data D0a (i, j, k-1) = 60, thereby preventing the occurrence of white light it can.

  In the above description, the case where the data depth (bit width) of the reached gradation stored in the LUT 71 is the same value (6 bits) as the video data D1 (i, j, k) has been described as an example. When the storage capacity of the LUT 71 is strongly required to be reduced, the data depth (bit width) of each reached gradation stored in the LUT 71 is set to the video data D00 (i, j) of the frame FR (k-2) before the previous frame FR (k-2). , k-2) and the data depth of the video data D0 (i, j, k-1) of the previous frame FR (k-1) may be set to coincide with the smaller one. desired.

  Even in this configuration, the bit width is the same as the significant figure of the calculation using the previous and previous video data, that is, the shorter bit width. Therefore, the storage capacity required for the LUT 71 can be reduced most within a range that does not reduce the calculation accuracy.

[Second Embodiment]
As shown in FIG. 10, the modulation drive processing unit 21a according to the present embodiment includes an FRC (Frame Rate Control) circuit (least significant bit control means) between the truncation circuit 36, the frame memory 31, and the modulation processing unit 33. 38) is arranged.

  The FRC circuit 38 changes the least significant bit of the video data output from the truncation circuit 36 in a predetermined pattern according to the video data D (i, j, k), and then the video data D1 ( i, j, k). The pattern is set so that the bit value truncated by the truncation circuit 36 matches the average value of the pattern. For example, if the rounded down value (2 bits) is “01”, the size is ¼ of the least significant bit of the video data output from the rounding down circuit 36. Therefore, as a pattern corresponding to the above value, for example, (0, 0, 0, 1) is set. Similarly, (0, 0, 0, 0), (1, 0, 1, 0) and (1, 1, 1, 0) corresponding to “00”, “10”, and “11”, respectively. A pattern is set.

  In the above configuration, the FRC circuit 38 changes the least significant bit of the video data D1 (i, j, k) in a pattern in which the value of the bits discarded by the truncation circuit 36 matches the average value of the pattern. Therefore, the average value of the luminance values of the sub-pixels SPIX (i, j) can be matched with the luminance value indicated by the video data before being cut off by the rounding circuit 36.

  If the response speed of the sub-pixel SPIX (i, j) is slow and the sub-pixel SPIX (i, j) cannot change the luminance following the variation of the corrected video data D2 (i, j, k), the sub-pixel The average value of the brightness of SPIX (i, j) does not become the desired value, but in the modulation drive processing unit 21a according to the present embodiment, the bit changed by the FRC circuit 38 is the video data D1 (i, j, k) is the least significant bit, and the modulation processing unit 33 emphasizes the gradation transition from the previous frame FR (k-1) to the current frame FR (k). Therefore, the modulation drive processing unit 21a can set the average luminance value of the sub-pixels SPIX (i, j) to the desired value without any trouble.

  Here, in the case of the pixel array 2 in which the area occupied by each sub-pixel SPIX (i, j) is extremely small, and the spatial resolution and luminance resolution are set to a range close to or higher than the limit of human vision. That is, in the case of the pixel array 2 in which it is assumed that each pixel is viewed at a distance where it cannot be visually recognized, the noise addition circuit 34 adds fixed noise in a time series with a size of about 5 bits. However, there is no possibility that the noise pattern is visually recognized by the user of the image display apparatus. An example of such an image display device is a 15-inch XGA (eXtended Graphic Arrauy) display. In this case, the interval (definition) of the sub-pixels SPIX (i, j) is set to about 300 μm. ing.

  However, when the spatial resolution and luminance resolution of the pixel array 2 are below the above ranges, in the configuration in which fixed noise is added in time series, the image displayed by the pixel array 2 is in a specific situation (for example, a specific brightness). There is a possibility that the noise pattern is visually recognized by the user of the image display device 1 when the user is in a specific movement. Examples of such an image display device include a 15-inch VGA display.

  In contrast, in the modulation drive processing unit 21a according to this embodiment, the FRC circuit 38 changes the least significant bit of the video data D1 (i, j, k). Therefore, even when it is applied to such an image display device, the visual recognition of the noise pattern by the user can be disturbed, and the appearance of the image display device 1a is compared with the case of adding fixed noise in time series. The display quality can be improved.

[Third Embodiment]
In the first and second embodiments, the noise added to the video data D (i, j, *) by the noise adding circuit 34 is fixed in time series, and a certain subpixel SPIX (i, j In the above description, the same value of noise is always added to the video data D (i, j, *). On the other hand, in the present embodiment, a configuration in which the noise added to the video data D (i, j, *) by the noise adding circuit 34 changes in time series will be described. Although the configuration can be applied to both the first and second embodiments, a case where the configuration is applied to the first embodiment will be described below with reference to FIG.

  That is, in the modulation drive processing unit 21b according to the present embodiment, a noise generation circuit 35b that generates noise that changes in time series is provided instead of the noise generation circuit 35. In the noise generation circuit 35b according to the present embodiment, the control circuit 53b provided in place of the control circuit 53 includes the reset timing of the address counter 52 and the first video data D (1,1, k) of the frame FR (k). The phase difference with) is changed for each frame.

  For example, in the first frame FR (k), the control circuit 53b resets the address counter 52 when the first video data D (1,1, k) is applied, and stores it at the first address of the memory 51. The noise data thus added is added to the first video data D (1,1, k). On the other hand, in the next frame FR (k + 1), the control circuit 53b sets the reset timing of the address counter 52 earlier by one video data, and the noise data stored in the second address of the memory 51 is the first one. It is added to the video data D (1,1, k + 1).

  Thus, in this embodiment, the noise added to the video data D (i, j, *) by the noise adding circuit 34 is changed in time series. Here, as described above, when the spatial resolution and luminance resolution of the pixel array 2 are set to a range close to or higher than the limit of human vision, fixed noise is added in time series. However, there is no possibility that the noise pattern is visually recognized by the user of the image display apparatus 1. However, when the spatial resolution and the luminance resolution of the pixel array 2 are significantly lower than the limits of human vision, each subpixel SPIX (i, j) is visually recognized by the user of the image display device as described above. If a fixed noise is added in time series, the noise pattern is recognized by the user of the image display apparatus. Examples of such an image display device include a 20-inch VGA display and a 40-inch XGA display.

  On the other hand, in the modulation drive processing unit 21b according to the present embodiment, the noise added to the video data D (i, j, *) by the noise adding circuit 34 is changed in time series. Therefore, even when it is applied to such an image display device, the visual recognition of the noise pattern by the user can be hindered, and the appearance of the image display device 1b is compared with the case of adding fixed noise in time series. The display quality can be improved.

  By the way, the modulation processing unit 33 according to each of the above embodiments displays the video data D0a (i, j, k-1) of the previous frame FR (k-1) in order to display a stable still image without flicker and noise. ) And the video data D1 (i, j, k) of the current frame FR (k) is smaller than a predetermined threshold value, the gradation transition is not emphasized and the current frame FR (k) The video data D1 (i, j, k) is output as it is.

In this case, the threshold value is set in accordance with the fluctuation range of the time series change of noise. More specifically, the threshold value is the same as or larger than the fluctuation range of the time series change of noise, and the subpixels SPIX (i, j) can be obtained without enhancing the gradation transition. Is set to a small value so that the user cannot visually recognize the lack of gradation transition due to the lack of response speed. As an example, when the above-described numerical value, that is, the video data D (i, j, k) is 8 bits, the noise magnitude is ± 5 bits, and the truncation circuit 36 truncates 2 bits, the threshold value is Eight gradations (= 2 ^(5-2) ) are set.

  As described above, the threshold value is set to be the same as or larger than the fluctuation range of the time series change of noise. Therefore, when a still image is displayed, even if the video data D1 (i, j, k) fluctuates due to noise and a gradation transition occurs, the modulation processing unit 33 does not emphasize the gradation transition. The video data D1 (i, j, k) of the current frame FR (k) is output as it is. As described above, the modulation processing unit 33 according to the third embodiment does not emphasize the gradation transition when the gradation transition can be generated only by addition of noise data. The modulation processing unit 33 in the configuration in which the FRC circuit 38 is added to the FRC circuit 38 does not emphasize the gradation transition when the gradation transition can occur only by the addition of noise data and the change of the least significant bit by the FRC circuit 38. Therefore, the gradation transition caused by noise is not emphasized, and the following troubles, that is, the trouble that the noise pattern is visually recognized by the user as a result of enhancing the gradation transition caused by noise, is prevented. it can.

  Further, as in the present embodiment, when the noise addition circuit 34 changes the noise added to the video data D (i, j, *) in time series, that is, a shorter distance ( When it is assumed that each of the sub-pixels SPIX (i, j) is viewed from a distance (visible to the user of the image display device), the maximum absolute value of the noise data generated by the noise generation circuit 35 is Therefore, it is desirable to set to 8 gradations or less.

[Fourth Embodiment]
In the above description, the case where the maximum value of the noise generated by the noise generation circuit is constant has been described as an example. However, in the present embodiment, the level indicated by the video data D (i, j, k) input to the input terminal T1. A configuration for changing the maximum noise value according to the key will be described. Although the configuration can be applied to any of the first to third embodiments, a case where the configuration is applied to the first embodiment will be described below with reference to FIG.

  That is, in the modulation drive processing unit 21c according to the present embodiment, a noise generation circuit 35c capable of changing the size of noise data to be output is provided instead of the noise generation circuit 35 shown in FIG. A gradation determination unit (noise amount control means for instructing the noise generation circuit 35c to detect the display gradation level of the data D (i, j, k) and output noise having a magnitude corresponding to the detection result. ) 39 is provided.

  The gradation determination unit 39 averages the video data D to the sub-pixels SPIX included in a block having a predetermined size such as an MPEG (Moving Picture Expert Group) block, and is proportional to the average value, for example. When the average value, such as a value, is high, it is instructed to output noise having a larger maximum value than when the average value is low.

  On the other hand, the noise generation circuit 35c is provided with, for example, a multiplication circuit 54 that multiplies the output instructed by the gradation determination unit 39 by the output of the memory 51 and outputs the result. The output of the noise generation circuit 35c is provided. Change the maximum noise data to the indicated value.

  In the above configuration, when the average value of the video data D in the block is high, that is, when the average value is low, the relative magnitude of the noise is small, so even if the noise magnitude is increased, When it is difficult for the user to recognize the noise pattern, the maximum noise value is set large. On the other hand, when the average value of the video data D is low, that is, compared with the case where the average value is high, the relative magnitude of the noise is large. If there is a risk of recognition, the maximum noise value is set small. As a result, regardless of the average value of the block brightness, the maximum noise value can be set to a value suitable for that value, and image display with higher display quality than when the maximum noise value is fixed. The device 1c can be realized.

  In the above description, the case where the block for calculating the average value coincides with the MPEG block has been described as an example. However, the present invention is not limited to this, and an average value of an arbitrary size block may be set. Good. However, when displaying an image encoded in units of blocks, such as an MPEG image, it is desirable to set the encoding block size and the block size for detecting the average value substantially the same.

  In the above description, the case where the video data D of all the subpixels SPIX included in the block is averaged has been described as an example. However, the present invention is not limited to this. For example, if the video data D is averaged to a certain number of sub-pixels SPIX in the block, such as a sub-pixel SPIX (i, j) corresponding to a certain scanning signal line GL in the block, the following problem, that is, , When there is a subpixel SPIX (i, j) for which a gradation significantly different from the surroundings is present in the block, the video data D (i, j, k) to the subpixel SPIX (i, j) ), It is possible to prevent the occurrence of a problem that the maximum noise value is set to an inappropriate value.

[Fifth Embodiment]
In the above description, the case where the previous frame gradation correction circuit 37 constantly corrects the previous frame video signal DAT0 has been described as an example. On the other hand, in the modulation drive processing unit 21d according to the present embodiment, the video data D0 of the predicted value D0a (i, j, k-1) and the previous frame FR (k-1) by the previous frame gradation correction circuit 37. If the difference (absolute value) from (i, j, k-1) is greater than or equal to a predetermined threshold, the previous frame gradation correction circuit 37d outputs the predicted value D0a (i, j, k-1), In other cases, the previous frame gradation correction circuit 37d outputs the previous frame video signal DAT0 as it is. Although this configuration can also be applied to each of the above-described embodiments, a case where it is applied to the first embodiment will be described below with reference to FIG.

  That is, in the present embodiment, the threshold value is set to about 2 gradations as an example when the gradation of each video data D1 (i, j, k) is 6 bits. Note that there are various factors, such as quantization noise, as factors that lower the prediction accuracy. Therefore, the threshold value may be set to about 2 to 4 gradations according to these influences.

  Here, when the difference between the predicted value and the target value (D0 (i, j, k-1)) is small, in the previous frame FR (k-1), compared to the case where the difference between the two is large, The gradation of the pixel SPIX (i, j) is sufficiently close to the gradation indicated by the video data D0 (i, j, k-1) of the previous frame FR (k-1). Therefore, the previous frame gradation correction circuit 37d does not correct, and the modulation processing unit 33 performs the video data D1 (i, j) of the current frame FR (k) based on the video data D0 (i, j, k-1). , k) is less likely to cause whitening or blackening, and even if it occurs, the degree of whitening or blackening is small. In addition, when the difference between the predicted value and the target value is small, the relative magnitude of the error during prediction is larger than when the difference between the two is large. Therefore, when gradation transition is emphasized by the modulation processing unit 33, a change in gradation due to an error in prediction is easily visible to the user.

  On the other hand, when the difference between the predicted value and the target value (D0 (i, j, k-1)) is large, brightening or darkening tends to occur unless the previous frame video signal DAT0 is corrected. In addition, since the relative error at the time of prediction is small, even if the previous frame video signal DAT0 is corrected, a change in gradation due to the error at the time of prediction is not easily seen by the user.

  In the present embodiment, when the difference between the predicted value and the target value (D0 (i, j, k-1)) is smaller than the threshold value, that is, even if the previous frame video signal DAT0 is not corrected, whitening or darkening If the previous frame video signal DAT0 is corrected, and the display quality is likely to deteriorate when an error occurs during prediction, the previous frame gradation correction circuit 37d corrects the previous frame video signal DAT0. If the previous frame video signal DAT0 is not corrected, the previous frame video signal DAT0 is corrected only when whitening or darkening occurs. As a result, it is possible to prevent the occurrence of whitening or darkening while suppressing a decrease in display quality due to an error in prediction.

[Sixth Embodiment]
In the fifth embodiment, the configuration in which the previous frame tone correction circuit 37d determines whether or not correction is necessary based on the difference between the predicted value and the target value has been described. However, in this embodiment, the LUT is corrected in advance. A description will be given of a configuration in which information indicating whether or not correction is necessary is written and the previous frame gradation correction circuit refers to the information and determines whether or not correction is necessary. Although this configuration can also be applied to each of the above-described embodiments, a case where it is applied to the first embodiment will be described below with reference to FIG.

  That is, in the LUT 71e according to the present embodiment, as shown in FIG. 12, each region α1, α2, that is, the previous frame gradation correction circuit 37 does not correct, and the modulation processing unit 33 does not correct the previous frame FR (k−1). If the video data D1 (i, j, k) of the current frame FR (k) is corrected based on the video data D1 (i, j, k-1) of the video data D1 (i, j, k-1) In a region where j, k) differs from the actual gradation, values similar to those in FIG. 9 are stored, but the target value (E) itself is stored in the remaining region α3.

  On the other hand, the arithmetic circuit 72e according to the present embodiment receives the combination (S, E) of both the video data D00 (i, j, k-2) and the video data D0 (i, j, k-1), When it is specified which of the calculation areas the combination (S, E) belongs to, the predetermined arrival gradation among the arrival gradations A to D at the four corners of the calculation area is read out, It is determined whether or not the reached gradation matches the gradation of the boundary of the calculation area, and it is determined whether or not the target value is recorded as the reached gradation, that is, whether or not the region α3. Further, when it is determined that it belongs to the region α3, the arithmetic circuit 72e does not correct the previous frame video signal DAT0, and only when it is determined that it belongs to the regions α1 and α2, the arithmetic circuit 72e The frame video signal DAT0 is corrected.

  Therefore, similarly to the fifth embodiment, when the display quality is expected to deteriorate due to the prediction error without whitening or darkening, the previous frame video signal DAT0 is not corrected, Only when the black sun occurs, the previous frame video signal DAT0 can be corrected.

[Seventh Embodiment]
In the present embodiment, a configuration in which the correction process by the previous frame gradation correction circuit is changed according to the temperature will be described. Although the present invention can be applied to any of the first to sixth embodiments, a case where it is applied to the sixth embodiment will be described below.

  That is, as shown in FIG. 13, the modulation drive processing unit 21f according to the present embodiment is provided with a temperature sensor 40 that detects the temperature of the sub-pixel SPIX in addition to the configuration of the sixth embodiment. The previous frame gradation correction circuit 37f determines whether or not the video data D0 should be corrected and the corrected video data D0a when a combination of the video data D00 of the previous frame and the video data D0 of the previous frame is input. The temperature is changed depending on the temperature detected by the temperature sensor 40.

  Specifically, the previous frame gradation correction circuit 37f according to the present embodiment is provided with a plurality of LUTs 71f respectively corresponding to predetermined temperature ranges. In each LUT 71 f, the reached value in the temperature range corresponding to each LUT 71 f is stored in the same manner as the LUT 71.

  On the other hand, the calculation circuit 72f of the previous frame gradation correction circuit 37f selects the LUT 71f to be referred to during the interpolation calculation from the respective LUTs 71f according to the temperature information from the temperature sensor 40.

  Here, for example, when a liquid crystal element is employed as the sub-pixel SPIX, the response speed of the liquid crystal element varies depending on the temperature. As described above, when the sub-pixel SPIX whose response speed varies depending on the temperature is adopted, when the previous frame gradation correction circuit 37f does not correct, the modulation processing unit 33 corrects the video data D1 of the current frame so that the brightness or blackness is increased. Whether or not sinking occurs depends on the temperature.

  However, in the above configuration, even if the response speed of the sub-pixel SPIX changes depending on the temperature and the correction processing necessary to prevent whitening or darkening changes, the previous frame gradation correction circuit 37f does not change the current sub-pixel correction circuit 37f. Since the previous frame video signal DAT0 can be corrected according to the temperature of the pixel SPIX, it is possible to prevent the occurrence of whitening or darkening regardless of the temperature.

  Further, the previous frame gradation correction circuit 37f according to the present embodiment stops the correction of the previous frame video signal DAT0 when the temperature rises and falls within a predetermined temperature range. Therefore, when the temperature rises and the sub-pixel SPIX (i, j) can respond at a sufficient speed, and no brightening or darkening due to insufficient response occurs, the modulation processing unit 33 performs the correction before correction. Based on the previous frame video signal DAT0 and the current frame video signal DAT, the current frame video signal DAT is corrected so as to emphasize gradation transition from the previous frame to the current frame.

  As a result, the following phenomenon, that is, a phenomenon in which gradation transition is suppressed by the previous frame gradation correction circuit 37f does not occur in spite of the temperature at which whitening or darkening due to insufficient response does not occur. The response speed of the image display device 1 can be prevented from being lowered.

  In the above description, the case where the LUT 71f is switched has been described as an example. However, since the reached value changes monotonously even when the temperature direction changes, the arithmetic circuit 72f has two LUTs 71f closest to the current temperature. Then, the reaching value at each temperature may be read out, and the reaching value at the current temperature may be calculated by interpolating between both reaching values. With this configuration, even if the number of LUTs 71f is small, it is possible to prevent the occurrence of whitening and black sun with higher accuracy.

[Eighth Embodiment]
In the present embodiment, the bit width of the video data D00 (i, j, k-2) of the previous frame stored in the frame memory 31 and the video data D0 (i, j, k-1) of the previous frame stored in the frame memory 31 according to the temperature. The configuration for changing the bit width of) will be described. In addition, although it can apply to any of the said 1st thru | or 7th embodiment, below, the case where it applies to 7th Embodiment is demonstrated.

  That is, in the modulation drive processing unit 21g according to the present embodiment, as shown in FIG. 13, the control circuit 32g stores video data D00 (i of the previous frame stored in the frame memory 31 according to the detection result of the temperature sensor 40. , j, k-2) and the bit width of the video data D0 (i, j, k-1) of the previous frame are changed, and the video data D00 (i of the previous frame is changed as the temperature range becomes lower. , j, k-2) is expanded, and the bit width of the video data D0 (i, j, k-1) of the previous frame is reduced by the increase of the bit width. The control circuit 32g and the control circuit 32i described later correspond to the bit width control means described in the claims.

  Here, in order to reduce the storage capacity of the frame memory 31, the bits of both the video data D00 (i, j, k-2) and D0 (i, j, k-1) stored in the frame memory 31 are used. The total width is limited to a predetermined bit width (for example, 10 bits), and the bit width of each video data D00 (i, j, k-2) and D0 (i, j, k-1) Is set so that the video data D0 (i, j, k-1) of the previous frame can be corrected most accurately. On the other hand, as the response speed of the sub-pixel SPIX (i, j) becomes slower, the gradation reached by the sub-pixel SPIX (i, j) by the gradation transition from the previous frame to the previous frame is Since it is easily affected by video data, when the temperature changes, the optimum bit width allocation of each video data D00 (i, j, k-2) and D0 (i, j, k-1) also changes. End up.

  When the response speed of the sub-pixel SPIX changes depending on the temperature and the optimal bit allocation changes, the previous frame gradation correction circuit 37g according to the present embodiment changes both video data D00 according to the current temperature of the sub-pixel SPIX. The bit width allocation of (i, j, k-2) and D0 (i, j, k-1) is changed, and the video data D00 (i, j, k) of the previous frame is changed as the temperature range becomes lower. -2) Increase the bit width. As a result, regardless of the temperature change, it is possible to keep the respective bit width assignments in an appropriate state and to correct the video data D0 (i, j, k-1) with higher accuracy. Therefore, it is possible to prevent the occurrence of whitening and black sun more accurately.

  For example, assuming that the total bit width of the video data of the previous frame and the previous frame is 10 bits as in the above numerical example, the video data D00 (i, j, k− When the bit width of 2) is set to 4 bits and the temperature becomes lower than that, it is changed to 5 bits.

[Ninth Embodiment]
By the way, in each said embodiment, although the case where the arrival value was memorize | stored in LUT71 (71e * 71f) was demonstrated as an example, it does not restrict to this. As described above, since the occurrence of white light is most likely to deteriorate the display quality, the gray level larger than the reached value is described in the LUT 71 so that the occurrence of white light can be surely prevented. The correction circuit 37 (37 to 37f) may correct the gradation to be larger than the reached value when the previous frame video signal DAT0 needs to be corrected.

  With this configuration, it is possible to suppress gradation transition emphasis from the previous frame to the current frame as compared with the case where the arrival value is described, and thus it is possible to reliably prevent the occurrence of white light.

  Furthermore, the correction processing by the previous frame gradation correction circuit may be changed according to the type of video. Although the present invention can be applied to any of the first to eighth embodiments, a case where it is applied to the sixth embodiment will be described below.

  Specifically, as shown in FIG. 14, the modulation drive processing unit 21h according to the present embodiment is provided with a determination circuit 41 that determines the type of video in addition to the configuration of the sixth embodiment. The previous frame gradation correction circuit 37h determines whether or not the video data D0 should be corrected when a combination of the video data D00 of the previous frame and the video data D0 of the previous frame is input, and the corrected video data D0a. Is changed according to the determination result by the determination circuit 41.

  Specifically, the previous frame gradation correction circuit 37h according to the present embodiment is provided with a plurality of LUTs 71h respectively corresponding to predetermined temperature ranges. In each LUT 71h, the arrival value when the corresponding type of video is input is stored in the same manner as the LUT 71. On the other hand, the calculation circuit 72h of the previous frame gradation correction circuit 37h selects the LUT 71h to be referred to during the interpolation calculation from the respective LUTs 71h according to the information from the determination circuit 41.

  Here, as described above, when the previous frame video signal correction circuit 37h needs to correct the previous frame video signal DAT0 to a gradation larger than the arrival value, the correction value is larger than the arrival value. If it is too much, the occurrence of white light can be reliably prevented, while the response speed is lowered. Therefore, the difference between the correction value and the arrival value is set so that the occurrence of white light can be suppressed within a range where the response speed decrease is not noticeable. However, since the appropriate value of the difference between the two differs depending on the type of video, when the difference between the two is fixed, when many types of video are input, it is appropriate for all types of video. Difficult to set to value.

  On the other hand, in the modulation drive processing unit 21h according to the present embodiment, the difference between the correction value and the arrival value is changed according to the type of video. Therefore, for example, even when any type of video, such as a fast moving video or a slow moving video, is input, the occurrence of white light can be suppressed within a range where the response speed decrease is not noticeable.

  Further, the previous frame gradation correction circuit 37h according to the present embodiment indicates that the image type is a slow moving image, and the previous frame gradation correction circuit 37h does not correct the previous frame image signal DAT0. On the other hand, when it is expected that no brightening or darkening due to insufficient response will occur, the correction of the previous frame video signal DAT0 is stopped. As a result, although the following phenomenon, that is, an image that is slow in movement and does not cause whitening or darkening due to insufficient response, gradation transition is caused by the previous frame gradation correction circuit 37h. The phenomenon of being suppressed does not occur, and a reduction in response speed of the image display device 1 can be prevented.

[Tenth embodiment]
In the present embodiment, the bit width of the previous frame video data D00 (i, j, k-2) stored in the frame memory 31 and the previous frame video data D0 (i, j, k) according to the type of video. The configuration for changing the bit width of -1) will be described. Although the present invention can be applied to any of the first to ninth embodiments, a case where it is applied to the seventh embodiment will be described below.

  That is, in the modulation drive processing unit 21i according to the present embodiment, as shown in FIG. 14, the video data D00 (i of the previous frame stored in the frame memory 31 by the control circuit 32i according to the detection result of the determination circuit 41. , j, k-2) and the bit width of video data D0 (i, j, k-1) of the previous frame are changed. The bit width of the video data D00 (i, j, k-2) is further expanded, and the bit width of the video data D0 (i, j, k-1) of the previous frame is reduced by the increase of the bit width. Yes.

  Here, in order to reduce the storage capacity of the frame memory 31, the bits of both the video data D00 (i, j, k-2) and D0 (i, j, k-1) stored in the frame memory 31 are used. The total width is limited to a predetermined bit width (for example, 10 bits), and the bit width of each video data D00 (i, j, k-2) and D0 (i, j, k-1) Is set so that the video data D0 (i, j, k-1) of the previous frame can be corrected most accurately. On the other hand, the gradation reached by the sub-pixel SPIX (i, j) due to the gradation transition from the previous frame to the previous frame indicates that the image data of the previous frame is better when a fast moving image is input. easily influenced. Therefore, when the type of video changes and the expected speed of motion changes, the optimal bit width of each video data D00 (i, j, k-2) and D0 (i, j, k-1) Changes will also change.

  When the video type changes and the optimum bit allocation changes, the previous frame tone correction circuit 37i according to the present embodiment changes both video data D00 (i, j, k−) according to the current video type. 2) If the bit width assignment of D0 (i, j, k-1) is changed and the video type is a fast moving video, the video data D00 (i, j, k-2) of the previous frame ) To increase the bit width. As a result, regardless of the type of video, each bit width assignment can be kept in an appropriate state, and the video data D0 (i, j, k-1) can be corrected with higher accuracy. Therefore, it is possible to prevent the occurrence of whitening and black sun more accurately.

[Eleventh embodiment]
In the following embodiments, a configuration that can improve the response speed of a pixel even in the case of gradation transition to the minimum gradation will be described.

  More specifically, as shown in FIG. 15, the modulation drive processing unit 21j according to the present embodiment stores, as an R circuit, one frame of video data to the R subpixel SPIX until the next frame. The frame memory (storage means) 131 and the video data of the current frame FR (k) are written into the frame memory 131 and the video data D0 (i, j, k− of the previous frame FR (k−1) is written from the frame memory 131. 1) is read out and output as the previous frame video signal DAT0, and the video data of the current frame FR (k) is corrected and corrected so as to emphasize the gradation transition from the current frame to the previous frame. And a modulation processing unit (correction unit) 133 that outputs the subsequent video data D2 (i, j, k) as the corrected video signal DAT2.

  Further, the pixel array 2j (see FIG. 2) according to the present embodiment is set to have a γ characteristic larger than γ of the video data D to each subpixel SPIX input to the input terminal T1, The modulation drive processing unit 21j γ-converts the video data D to each sub-pixel SPIX input to the input terminal T1 and converts it to video data Da for display on a display device having a larger γ characteristic. The numerical value range that can be taken by the γ conversion circuit 141 and the video data Da is compressed to have the same bit width as the video data Da and a value lower than the black level of the video data Da, and the white of the video data Da A gradation conversion circuit 142 that generates video data Db that can express a value higher than the level, and noise generated by a noise generation circuit (noise generation means) 144 is added to the video data Db. BDE (Bit-Depth Extension) circuit including a noise adding circuit 143 that calculates and outputs, and a truncation circuit 145 that truncates the lower bits of each video data output from the noise adding circuit 143 to reduce the bit width of the video data The video data D1 (i, j, k) output from the truncation circuit 145 is input to the modulation processing unit 133 and the memory control circuit 132 as video data of the current frame FR (k). The γ conversion circuit 141 and the gradation conversion circuit 142 correspond to the gradation conversion means described in the claims, and the noise addition circuit 143 and the truncation circuit 145 correspond to the noise addition means. In the present embodiment, since the subpixels SPIX (1, j), (4, j)... Display R, the video data D (1, j, k), D (4, j, k) ... is entered.

  In the present embodiment, video data D to be displayed on a display device having a characteristic of γ = 2.2 is input to the input terminal T1 as a general video signal, and the pixel array 2j The γ characteristic is set to γ = 2.8. The γ conversion circuit 141 generates video data Da having the same characteristics as the γ characteristics of the pixel array 2j, that is, video data Da for display on a display device having the characteristics of γ = 2.8. Further, the γ conversion circuit 141 according to the present embodiment converts the video data D into video data Da having a wider bit width in order to suppress the occurrence of errors due to γ conversion. For example, an 8-bit video signal for each color is input to the input terminal T1 as a general video signal, and the γ conversion circuit 141 converts the 8-bit video data D into 10-bit video data Da. Convert to

  Further, as shown in FIG. 16, the gradation conversion circuit 142 compresses a numerical range A1 that the video data Da can take and converts it into a numerical range A2 that is narrower than the numerical range. Further, the numerical value range A2, that is, the range from the gradations L11 to L12 is set so that L10 <L11 and L12 <L13 when the video data Db can express the gradations L10 to L13. ing. In this embodiment, both the video data Da and Db are 10 bits, L1 = L10 = 0, L2 = L13 = 1023, and the values L11 and L12 are set to 79 and 1013, for example. In the video data Da, the minimum gradation (L1) indicates black and the maximum gradation (L2) indicates white.

  On the other hand, the noise generation circuit 144 outputs random noise that has an average value of 0 and does not generate pseudo contours in the video displayed on the pixel array 2j. Further, if the maximum value of the noise data is too large, the noise pattern may be recognized by the user of the image display device 1j. Therefore, the maximum value of the noise is set to such a level that the noise pattern is not recognized.

  In the present embodiment, the video data Db (i, j, k) for each subpixel SPIX (i, j) input to the noise adding circuit 143 is expressed by 10 bits, and the size of the noise data is , Is set within ± 7 bits. Since the noise generation circuit 144 has the same configuration as the noise generation circuit 35 according to the first embodiment except for the magnitude of noise to be generated, description thereof will be omitted.

  The truncation circuit 145 truncates the lower 2 bits from the 10-bit video data output from the noise generation circuit 144 and outputs the result as 8-bit video data D1 (i, j, k). Accordingly, in the frame memory 131, the storage area for storing each video data D1 (i, j, k) of the current frame FR (k) is one video data D1 (i, j, k). Is set to 8 bits.

  As a result, no noise pattern or pseudo contour is generated in the image displayed on the pixel array 2j, and the circuit after the truncation circuit 145 is not different from the case where the image data D before truncation is displayed. The number of bits of video data processed by can be reduced.

  Here, how much the added noise is different from the surrounding pixel (variation rate) and the target luminance by the user of the image display device 1j (the variation rate) ( Error). In general, in the field of making pictures on the basis of 100 ppi as in the image display apparatus 1, the allowable limit of the error is about 5% of the white luminance, and the allowable limit of the variation rate is 5 of the display gradation. It is known that it is about%.

  When the gradation of the sub-pixel SPIX is increased by x gradations, the percentage of the pixel transmittance calculated based on the surrounding luminance (transmittance before increasing the gradation) is calculated. When the γ characteristic of the pixel array 2j is γ = 2.8 and the video data Db is expressed by 10 bits, if x is 32 to 48 gradations, the above variation rate is acceptable for most gradations. It was confirmed that it was within the limits. Similarly, when the pixel display gradation is increased by x gradations, the percentage of increase based on the original transmittance (transmittance before increasing gradation) is calculated. When the γ characteristic of γ is 2.8 and the video data Db is expressed by 10 bits, the variation rate falls within the allowable limit at most gradations if x is 32 to 48 gradations. Was confirmed. As a result, in the case of noise of 32 to 48 gradations, it is possible to make the user feel that the display quality is not deteriorated apparently below the allowable limit in most gradations.

Therefore, when it is assumed that one pixel is viewed at a distance where it cannot be seen independently, the above-described variation rate and error are set to be less than 5% between 2 to 3 pixels (6 to 9 subpixels). That's fine. Here, assuming that the noise data has a substantially normal distribution, 32 to 48 [gradation] × 6 ^{(1/2) to} 9 ^(1/2) = 80 to 144 [gradation]. Therefore, even if a fixed noise is added in time series with a bit width of about 7 bits, that is, about 3 bits less than the video data Db, there is no possibility that the noise pattern is visually recognized by the user of the image display apparatus.

  Here, in general, even if the pixel size is increased, the observation distance is often not increased in proportion to the pixel distance. Therefore, as the pixel size increases, the allowable level of noise data decreases. Accordingly, among the numerical range of 1 to 144 gradations (within 7 bits), the numerical range preferably used in many image display apparatuses 1 as the maximum absolute value of the noise data is 48 to 80 gradations. It is desirable to set the range to 63 gradations (6 bits).

  In the above configuration, the video data D1 (i, j,) of the current frame FR (k) is emphasized so that the modulation processing unit 133 emphasizes the gradation transition from the previous frame FR (k-1) to the current frame FR (k). Since k) is corrected, the response speed of the subpixel SPIX can be improved.

  In addition, in the above configuration, the pixel array 2j is set to have a larger γ characteristic than the video data D input to the input terminal T1, and the video data D input to the input terminal T1 is converted to γ conversion. After being converted into video data Da having a larger γ characteristic by the circuit 141, and further subjected to gradation conversion into video data Db capable of expressing a value lower than the black level of the video data Da by the gradation conversion circuit 142, The modulation processing unit 133 emphasizes gradation transition from the previous frame to the current frame.

  In this configuration, as shown in FIG. 17, the γ conversion increases the number of gradations that are subtracted black when the sub-pixel SPIX displays the gradations. Are assigned to gradations lower than the black level of the video data D. The predetermined gradations (gradations L10 to L11 shown in FIG.

  In other words, in this embodiment, the γ characteristic at least in the display gradation region is set to be larger than the γ characteristic of the input video data. Further, preferably, in the present embodiment, the γ characteristic is set to be larger, including a region for emphasizing low-tone gradation transitions.

  Therefore, the modulation processing unit 133 can use these gradations L10 to L11, that is, gradations L10 to L11 lower than the black level when gradation transition enhancement is not performed, for gradation transition enhancement. As a result, the corrected video data D2 indicating the black level when the gradation transition is not emphasized and the corrected video data D2 when the gradation transition is most emphasized in the direction of decreasing the gradation are compared with the configuration. Thus, the gradation transition can be emphasized more strongly in the direction of decreasing the gradation, and the response speed of the subpixel SPIX can be improved.

  Here, when the vertical alignment mode liquid crystal cell is used in the normally black mode as in the present embodiment, the liquid crystal molecules are used when the gradation transitions in the direction in which the gradation increases (rise gradation transition). Is inclined in a direction inclined from a direction parallel to the substrate of the liquid crystal cell by a gradient electric field formed by a voltage applied to the pixel electrode. On the other hand, in the case of gradation transition in the direction of decreasing gradation (decay gradation transition), the liquid crystal molecules are returned to the vertical direction by the regulating force in the vertical direction by the vertical alignment film formed on the substrate. ing. Therefore, when the liquid crystal cell is used, the decay gradation transition tends to be delayed with respect to the gradation transition in the rise direction.

  However, the modulation drive processing unit 21j having the above configuration can further emphasize the decay gradation transition, and therefore can further reduce the decay response speed. As a result, even when such a liquid crystal cell is used, the image display device 1j having a sufficient response speed can be realized.

  In particular, since the response speed of the liquid crystal becomes slow at low temperatures, the delay of the decay gradation transition becomes more conspicuous, but the modulation drive processing unit 21j having the above configuration can shorten the response speed at the decay gradation transition. Therefore, it can be used particularly suitably in applications where use at low temperatures is also envisaged.

  In the present embodiment, since the BDE circuit including the noise addition circuit 143 and the truncation circuit 145 is provided in the previous stage of the frame memory 131, the display quality of the video displayed on the pixel array 2j is apparently lowered. Without this, the data amount of the video data D1 (i, j, k) stored in the frame memory 131 can be reduced.

  In the present embodiment, although the bit width of the video data Db input to the noise adding circuit 143 is 10 bits, the bit width of the video data D1 (i, j, k) stored in the frame memory 131 is the same. It is reduced to 8 bits. Thereby, the memory capacity required for the frame memory 131 can be reduced. In the circuits after the truncation circuit 145, that is, the memory control circuit 132, the previous frame gradation correction circuit 137, the modulation processing unit 133, the control circuit 12 shown in FIG. Is reduced from 10 bits to 8 bits, the number of wirings for connecting them and the occupied area can also be reduced to 4/5, and the amount of calculation in these circuits can be reduced.

  Since video data needs to be transmitted at a relatively high speed, in order to transmit the video data with a relatively slow circuit, it is necessary to provide a plurality of circuits in parallel and operate them alternately. As the number of bits increases, the area occupied by the circuit increases. However, in the above configuration, since the bit width is reduced to 4/5, the increase in the occupied area of the circuit is suppressed even when a circuit that operates in parallel is provided, compared to the case of 10 bits. be able to.

  In the above configuration, the BDE circuit including the noise addition circuit 143 and the truncation circuit 145 is provided in the preceding stage of the frame memory 131 and the modulation processing unit 133. Therefore, unlike the case where the BDE circuit is provided at the subsequent stage of the modulation processing unit 133, the following problems, that is, after the gradation transition is emphasized as much as possible in the range where the modulation processing unit 133 does not generate white light, As a result of adding noise to the circuit, there is no problem that white light is visible. As a result, although the addition of noise and enhancement of gradation transition are used in combination, the occurrence of whitening can be prevented.

  Below, with reference to FIG. 28 and FIG. 29, the said effect is demonstrated in detail, comparing with some comparative examples.

  First, as a first comparative example, in the configuration in which each of the members 141 to 145 is omitted and the pixel array 2 having the same γ characteristic as that of the input video data is used, DATA1 in FIG. As shown, the 8-bit video data D (first gradation data) input to the input terminal T1 is input to the memory control circuit 132 and the modulation processing unit 133 as it is.

  In this case, since DATA1 is not provided with a margin for enhancing a large gradation transition (for example, gradation transition between white and black) close to a full gradation, the modulation processing unit 133 Large gradation transitions close to full gradation cannot be sufficiently emphasized. As a result, in the gradations displayed on the pixel array 2, the gradation transition is not sufficiently emphasized, and regions Rb1 and Rc1 in which the response speed of the subpixel cannot be sufficiently shortened are generated.

  Next, as a second comparative example, as shown by DATA2 in the figure, only the gradation conversion circuit 142 is provided, and the input video data D is assigned to an area Ra2 narrower than the video data D and output. In the configuration, the following problems may occur.

  More specifically, the converted region Ra2 is subtracted as follows, that is, within the region Ra2, the entire range of the input video data D is subtracted by gradation transition emphasis by the modulation processing unit 133. By setting the pixel response speed in an area where the response speed can be improved, the sub-pixel SPIX can be made to respond at a sufficient response speed when any video data D is input.

  In other words, the converted area Ra2 is more limited than the area that can be expressed by the bit width (8 bits in this example) assigned to DATA2, and the remaining areas Rb2 and Rc2 are provided. Therefore, when emphasizing the gradation transition from the gradation in the area Ra2 to the gradation in the area Ra2, the modulation processing unit 133 can emphasize the gradation transition using the areas Rb2 and Rc2. As a result, even if the gradation transition is close to full gradation (for example, gradation transition between the upper limit and the lower limit of the region Ra2), the gradation transition can be emphasized using the regions Rb2 and Rc2. The pixel SPIX can be made to respond at a sufficient response speed.

  However, in this configuration, the gradation output from the gradation conversion circuit 142 (the gradation in the region Ra2) is larger than the number of gradations that can be expressed by the bit width (8 bits in this example) of the video data D. Since the number is reduced, the display quality (the number of gradations and the number of colors) is lowered.

  Next, as a third comparative example, as shown by DATA3 in the figure, a bit width changing circuit (not shown) is provided in the preceding stage of the gradation conversion circuit 142, and the bit width changing circuit receives an image inputted thereto. In the configuration in which the bit width of the data D is widened (for example, widened from 8 bits to 10 bits) and output, the following problems may occur.

  More specifically, in this configuration, the gradation area Ra3 output by converting the video data D input by the gradation conversion circuit 142 is an area that can be expressed by data after the bit width is expanded. Therefore, although the remaining regions Rb3 and R3c are excluded, the number of gradations that can be expressed by the region Ra3 is the number of gradations that the input video data D can take (in this example, 256 gradations). Therefore, unlike the second comparative example, it is possible to suppress a decrease in display quality.

  However, even with this configuration, if a sufficient number of gradations cannot be secured on the low gradation side, a serious display error may occur. More specifically, since human vision has a logarithmic sensitivity scale for light energy (luminance), darker information is more sensitive to conversion. In other words, in a relatively dark area, even if there is a slight error, it is detected as an abnormal image for humans. Therefore, a display error occurs if sufficient gradation cannot be secured on the low gradation side. As a result, it is difficult to secure a sufficiently large size (Rb3 size) that can be secured for gradation transition emphasis of the modulation processing unit 133, and it is possible to improve response speed and suppress deterioration in display quality. It is difficult to achieve both. In particular, in the configuration in which the noise addition circuit 143 to the truncation circuit 145 are provided as in the present embodiment, it is inevitable that a certain amount of error will occur due to noise addition. Therefore, in the relatively bright region (high gradation side), even if the error is overlooked, if the sufficient gradation is not ensured on the low gradation side, the display error may significantly reduce the display quality. There is.

  On the other hand, as a fourth comparative example, as shown by DATA4 in the drawing, the γ characteristic of the pixel array 2j is set to a larger value (for example, 2.8), and a γ conversion circuit is provided in the previous stage of the gradation conversion circuit 142. In the configuration provided with 141, the response speed of the subpixel SPIX can be improved without degrading the display quality, while the following problem, that is, the video data that needs to be processed by the circuit subsequent to the gradation conversion circuit 142, can be obtained. There is a risk that the bit width becomes large.

  More specifically, in the configuration described above, a larger number of gradations can be assigned to the lower gradation side by γ conversion than in the third comparative example. For example, as shown in FIGS. 17 and 29, the low gradation side is enlarged in the case of γ = 2.8 compared to the case of γ = 2.2. Here, in order to ensure a contrast ratio of 500, assuming that the gradation at which the transmittance is 0.002 is a black level, as shown in FIG. 29, the vicinity of black (transmittance is 0.002 to 0.006) is obtained. The number of gradations that can be expressed is 40 when γ = 2.2 and 52 when γ = 2.8. Therefore, by performing gradation conversion so that γ becomes large, the modulation drive processing unit 21j can select a gradation of luminance that represents an input more accurately at a low gradation.

  Also, assuming that the gray level at which the transmittance = 0.002 is the black level, as shown in FIG. 29, the number of gray levels below the black level is 62 when γ = 2.2, γ In the case of = 2.8, the number is 112. Therefore, by performing gradation conversion so that γ increases, the modulation drive processing unit 21j can emphasize gradation transition more reliably at low gradations, and can improve the response speed of the sub-pixel SPIX more reliably.

  In the above description, the case where the gradation at which the transmittance = 0.002 is set to the black level has been described as an example. However, when importance is attached to the still image display, the gradation having the lower transmittance is set to the black level. And the number of gradations in the vicinity of black may be increased. On the other hand, when importance is attached to moving image display, it is only necessary to set a gradation with a higher transmittance to the black level and increase the number of gradations below the black level. In any case, by performing gradation conversion so that γ becomes large, the size of the area (the size of Rb4) that can be secured for gradation transition enhancement of the modulation processing unit 133 is sufficiently wide. It can be secured. Therefore, the occurrence of the display error can be suppressed, and the improvement of the response speed and the suppression of the deterioration of display quality can be achieved at the same time. In the figure, Rc4 is a gradation transition enhancement region provided on the high gradation side.

  However, in the configuration of the fourth comparative example, unlike the present embodiment, since the noise adding circuit 143 to the truncation circuit 145 are not provided, the circuits subsequent to the gradation conversion circuit 142 are expanded bit width data. (For example, 10 bits wide) needs to be processed. Therefore, the frame memory 131 needs more storage capacity. Further, since it is necessary to configure the pixel array 2j so that video data having a wider bit width (for example, 10 bits) can be displayed, the cost of the driver IC and the like increases.

  On the other hand, since the noise adding circuit 143 to the truncation circuit 145 are provided in the subsequent stage of the gradation conversion circuit 142 in the modulation drive processing unit 21j according to the present embodiment, compared with the fourth comparative example. Thus, the bit width of the video signal to be processed by the circuits after the gradation conversion circuit 142 can be reduced. Also, as described above, after adding noise, the lower bits are rounded to generate the video data D1. Therefore, unlike the configuration in which the lower bits are simply discarded without adding noise in spite of the reduced bit width, the generation of pseudo contour can be suppressed, and data with an extended bit width (for example, 10 The display quality can be maintained to such an extent that it is not apparently different from the case of displaying (bit width). In the figure, Rb5 and Rc5 are gradation transition emphasis areas provided on the low gradation side and the high gradation side.

  In the following, the improvement in response speed will be described in more detail, taking as an example the case where a vertically aligned mode liquid crystal cell is used in a normally black mode. That is, a typical liquid crystal cell has voltage-transmittance characteristics as shown in FIG. 18, for example, and a voltage (white voltage) applied when displaying a white level is, for example, 7.5. It is set to about [V].

  Here, when the black voltage is set to 0 [V], a contrast of 1000 or more can be secured, while the design of the resistor network used for generating the voltage corresponding to each gradation becomes troublesome. Therefore, the black voltage is set to about 0.6 [V] to 1.1 [V] in an application that only needs to ensure a contrast of about 500, such as a general television application.

  As a comparative example, the pixel array set to γ = 2.2 does not perform conversion by the γ conversion circuit 141 and the gradation conversion circuit 142, and the video data D with γ = 2.2 is displayed as it is. The gradation-voltage characteristics in the data signal line driving circuit of the pixel array are set as shown in FIG. As described above, if the black level is lowered, the resistance network design becomes troublesome. Therefore, when γ = 2.2, the black voltage is set to 1.1 [V] as shown in FIG. Has been.

  On the other hand, the pixel array 2j according to the present embodiment is set to γ = 2.8, and the gradation-voltage characteristics in the data signal line driving circuit 3 are set as shown in FIG. Here, since γ = 2.8 in the pixel array 2j, the black voltage can be set low without taking much trouble in designing as compared with the case of γ = 2.2. Therefore, in the example of FIG. 20, the lowest voltage that can be applied by the data signal line driving circuit 3 is set to 0.8 [V], for example. In this case, a contrast of about 900 can be secured.

  Further, as shown in FIG. 21, the γ conversion circuit 141 and the gradation conversion circuit 142 according to the present embodiment convert the video data D into the video data Db, and the data signal line drive circuit 3 The voltage shown in FIG. 21 is applied corresponding to the data Db.

  As described above, in this embodiment, when the modulation processing unit 133 outputs the video data D1 (i, j, k) of the current frame FR (k) as it is, as in the case where a still image is displayed. When the video data D (i, j, k) indicates the black level, the video data Db (i, j, k) output from the gradation conversion circuit 142 has 79 gradations, and the data signal line The voltage applied to the subpixel SPIX (i, j) by the drive circuit 3 is 1.09 [V]. On the other hand, when the modulation processing unit 133 outputs the 0-gradation corrected video data D2 (i, j, k) in an attempt to emphasize the gradation transition most during the decay gradation transition, the data signal line driving circuit 3 A voltage of 0.8 [V] is applied to the subpixel SPIX (i, j). In this way, since the voltage lower than the black voltage in the case where gradation transition is not emphasized can be applied at the time of gradation transition enhancement, the response speed of the subpixel SPIX (i, j) can be improved.

  Similarly, in this embodiment, when the modulation processing unit 133 outputs the video data D1 (i, j, k) of the current frame FR (k) as it is, the video data D (i, j, k) is white. When the level is indicated, the video data Db (i, j, k) output from the gradation conversion circuit 142 has 1013 gradations, and the data signal line driving circuit 3 moves to the subpixel SPIX (i, j). The applied voltage is 6.5 [V]. On the other hand, when the modulation processing unit 133 outputs the corrected video data D2 (i, j, k) of the maximum gradation in order to emphasize the gradation transition most at the rise gradation transition, the data signal line driving circuit 3 A voltage of 7.5 [V] is applied to the subpixel SPIX (i, j). In this way, since the voltage higher than the white voltage in the case where gradation transition is not emphasized can be applied at the time of gradation transition emphasis, the response speed of the subpixel SPIX (i, j) can be improved.

  As an example, when the video data D changes from 0 gradation to 255 gradation in the previous frame FR (k−1) to the current frame FR (k), as shown in FIG. Since the transition from the gradation to the 255 gradation is a full gradation and the gradation transition cannot be emphasized any more, the corrected video data D2 (i, j, k-1) D2 ( i, j, k) becomes 0 gradation and 255 gradation, respectively, and the voltage applied to the subpixel SPIX (i, j) changes from 1.1 [V] to 7.5 [V]. To do. Therefore, as shown by the broken line in FIG. 22, it takes about 3 frames (about 0.03 sec) due to the step response characteristics until the luminance of the sub-pixel SPIX (i, j) reaches the luminance of the white level. Become. The step response is a phenomenon in which the displacement of the potential applied to the liquid crystal is reduced due to the change in the capacitance of the liquid crystal layer with the response of the liquid crystal, resulting in a slow response. Since this phenomenon is purely an electric phenomenon, it is observed even when the temperature is high.

  On the other hand, in this embodiment, as shown in FIG. 21, the video data Db (i, j, k-1) .Db (i, j, k) output from the gradation conversion circuit 142 is respectively There are 79 gradations and 1013 gradations. Therefore, for example, the modulation processing unit 133 changes the gradation of the corrected video data D2 (i, j, k) of the current frame FR (k) to a gradation corresponding to 1023 gradation without any trouble. Can highlight transitions. Thereby, as indicated by a solid line in FIG. 22, the luminance of the sub-pixel SPIX (i, j) can reach the white level within one frame (16.7 msec).

  By the way, in the case of a liquid crystal display device, if the wavelength is different, the transmittance will be different even if the same voltage is applied to the pixel electrode of the liquid crystal cell. Therefore, the voltages to be applied to the sub-pixels SPIX are different from each other in order to make the R, G, and B sub-pixels SPIX have the same luminance. Here, in the pixel array 2j, the correspondence between the corrected video data D2 (i, j, *) and the voltage applied to each subpixel SPIX (i, j) is different for each of R, G, and B. If the data signal line driving circuit 3 is configured, the circuit configuration of the data signal line driving circuit 3 becomes complicated.

  However, in the present embodiment, the gradation conversion by the γ conversion circuit 141 and the gradation conversion circuit 142 is set to a different conversion. Accordingly, in the data signal line driving circuit 3 of the pixel array 2j, the correspondence between the corrected video data D2 (i, j, *) and the voltage applied to each subpixel SPIX (i, j) is set in common between the colors. In spite of this, the γ conversion circuit 141 and the gradation conversion circuit 142 appropriately convert the gradations into R, G, and B, respectively, thereby reducing the luminance of the subpixels SPIX of the respective colors. Can be set correctly.

  As described above, in this embodiment, the γ conversion circuit 141 γ-converts video data to each sub-pixel input to the input terminal T1, and displays the video for display on a display device having a larger γ characteristic. Convert to data Da (i, j, k). Further, the gradation conversion circuit 142 compresses a numerical range that the video data Da (i, j, k) can take, has the same bit width as that of the video data Da (i, j, k), and further displays video. Video data Db (i, j, k) capable of expressing a value lower than the black level of data Da (i, j, k) is generated. The video data Db (i, j, k) is subjected to noise and then the lower bits are discarded to become video data D1 (i, j, k). Further, the modulation processing unit 133 corrects the video data D1 (i, j, k) so as to emphasize the gradation transition from the previous time to the current time. As a result, it is possible to realize a drive device for an image display device capable of improving the response speed of the pixels even when the gradation transition to the minimum gradation is required.

[Twelfth embodiment]
In addition to the configuration of the eleventh embodiment, the modulation drive processing unit 21k according to the present embodiment includes a second circuit between the truncation circuit 145, the frame memory 131, and the modulation processing unit 133, as shown in FIG. An FRC circuit 146 similar to the FRC circuit 38 of the embodiment is disposed.

  Similar to the second embodiment, the FRC circuit 146 converts the least significant bit of the video data output from the truncation circuit 145 in a predetermined pattern according to the video data D (i, j, k). After the change, it is output as video data D1 (i, j, k). The pattern is set so that the bit value truncated by the truncation circuit 146 matches the average value of the pattern.

  In the configuration described above, as in the second embodiment, the video data D1 (i, j, k) has a pattern in which the bit value discarded by the truncation circuit 145 matches the average value of the pattern by the FRC circuit 146. ) Changes the least significant bit. Therefore, the average luminance value of the sub-pixels SPIX (i, j) can be matched with the luminance indicated by the video data before being truncated by the truncation circuit 145.

  If the response speed of the sub-pixel SPIX (i, j) is slow and the sub-pixel SPIX (i, j) cannot change the luminance following the variation of the corrected video data D2 (i, j, k), the sub-pixel The average value of the brightness of SPIX (i, j) does not become the desired value, but in the modulation drive processing unit 21k according to the present embodiment, the bit changed by the FRC circuit 146 is the video data D1 (i, j, k) is the least significant bit, and the modulation processing unit 133 emphasizes the gradation transition from the previous frame FR (k-1) to the current frame FR (k). Therefore, the modulation drive processing unit 21k can set the average value of the luminance values of the sub-pixels SPIX (i, j) to the desired value without any trouble.

  Here, in the case of the pixel array 2j in which the area occupied by each sub-pixel SPIX (i, j) is extremely small, and the spatial resolution and luminance resolution are set to a range close to or higher than the limit of human vision. That is, in the case of the pixel array 2j where it is assumed that each pixel is viewed at an invisible distance, the noise addition circuit 143 causes the bit to be narrower by about 3 bits than the video data D (i, j, k). Even if the fixed noise is added in time series in width, there is no possibility that the noise pattern is visually recognized by the user of the image display apparatus. An example of such an image display device is a 15-inch XGA (eXtended Graphic Arrauy) display. In this case, the interval (definition) of the sub-pixels SPIX (i, j) is set to about 300 μm. ing.

  However, when the spatial resolution and luminance resolution of the pixel array 2j are below the above ranges, in the configuration in which fixed noise is added in time series, the image displayed by the pixel array 2j is in a specific situation (for example, a specific brightness). There is a possibility that the noise pattern is visually recognized by the user of the image display device 1k when the arm is in a specific movement. Examples of such an image display device include a 15-inch VGA display.

  On the other hand, in the modulation drive processing unit 21k according to this embodiment, the FRC circuit 146 changes the least significant bit of the video data D1 (i, j, k). Therefore, even when it is applied to such an image display device, the visual recognition of the noise pattern by the user can be hindered, and the appearance of the image display device 1k is compared with the case where fixed noise is added in time series. The display quality can be improved.

[Thirteenth embodiment]
Incidentally, in the eleventh and twelfth embodiments, the noise added by the noise adding circuit 143 to the video data D (i, j, *) is fixed in time series, and a certain subpixel SPIX (i, j In the above description, the same value of noise is always added to the video data D (i, j, *). In contrast, in the present embodiment, as in the third embodiment, a configuration in which the noise added to the video data D (i, j, *) by the noise adding circuit 143 changes in time series will be described. Although the configuration can be applied to both the eleventh and twelfth embodiments, a case where the configuration is applied to the eleventh embodiment will be described below with reference to FIG.

  That is, in the modulation drive processing unit 21m according to the present embodiment, a noise generation circuit 144m substantially similar to the noise generation circuit 35b according to the third embodiment is provided instead of the noise generation circuit 144, and the noise generation circuit The circuit 144m generates noise that changes in time series.

  In the modulation drive processing unit 21m according to the present embodiment, the noise added to the video data D (i, j, *) by the noise adding circuit 143 is changed in time series. Accordingly, as in the third embodiment, the following image display device, that is, the spatial resolution and luminance resolution of the pixel array 2j are significantly below the limit of human vision, and each subpixel SPIX (i , j) is applied to an image display device (for example, a 20-inch VGA display or a 40-inch XGA display) that can be visually recognized by the user of the image display device. The visual display can be disturbed, and the apparent display quality of the image display device 1m can be improved as compared with the case of adding fixed noise in time series.

  By the way, the modulation processing unit 133 according to each of the above embodiments displays the video data D0a (i, j, k-1) of the previous frame FR (k-1) in order to display a stable still image without flicker and noise. ) And the video data D1 (i, j, k) of the current frame FR (k) is smaller than a predetermined threshold value, the gradation transition is not emphasized and the current frame FR (k) The video data D1 (i, j, k) is output as it is.

In this case, the threshold value is set in accordance with the fluctuation range of the time series change of noise. More specifically, the threshold value is the same as or larger than the fluctuation range of the time series change of noise, and the subpixels SPIX (i, j) can be obtained without enhancing the gradation transition. Is set to a small value so that the user cannot visually recognize the lack of gradation transition due to the lack of response speed. As an example, when the above-described numerical value, that is, the video data Db (i, j, k) is 10 bits, the noise magnitude is ± 7 bits, and the truncation circuit 145 truncates 2 bits, the threshold value is It is set to 32 gradations (= 2 ^(7-2) ).

  As described above, the threshold value is set to be the same as or larger than the fluctuation range of the time series change of noise. Therefore, when a still image is displayed, even if the video data D1 (i, j, k) fluctuates due to noise and a gradation transition occurs, the modulation processing unit 133 does not emphasize the gradation transition. The video data D1 (i, j, k) of the current frame FR (k) is output as it is. As described above, the modulation processing unit 133 according to the thirteenth embodiment performs gradation transition when the gradation transition can be generated only by addition of noise data, as in the third embodiment. The modulation processing unit 133 in the configuration in which the FRC circuit 146 is added to the thirteenth embodiment without emphasis is a gradation transition that can be generated only by adding noise data and changing the least significant bit by the FRC circuit 146. In this case, gradation transition is not emphasized. Therefore, the gradation transition caused by noise is not emphasized, and the following troubles, that is, the trouble that the noise pattern is visually recognized by the user as a result of enhancing the gradation transition caused by noise, is prevented. it can.

  Further, as in this embodiment, when the noise added to the video data D (i, j, *) by the noise adding circuit 143 is changed in time series, that is, a shorter distance than the eleventh embodiment ( When it is assumed that each of the sub-pixels SPIX (i, j) is viewed from a distance (visible to the user of the image display device), the maximum absolute value of the noise data generated by the noise generation circuit 144 is It is desirable to set the gradation to 32 or less.

[Fourteenth embodiment]
In the above description, the case where the maximum value of the noise generated by the noise generation circuit is constant has been described as an example. However, in the present embodiment, the level indicated by the video data D (i, j, k) input to the input terminal T1. A configuration for changing the maximum noise value according to the key will be described. Although the configuration can be applied to any of the eleventh to thirteenth embodiments, a case where the configuration is applied to the eleventh embodiment will be described below with reference to FIG.

  That is, in the modulation drive processing unit 21n according to the present embodiment, a noise generation circuit 144n similar to the noise generation circuit 35c according to the fourth embodiment is provided instead of the noise generation circuit 144 illustrated in FIG. The noise generation circuit 144n can change the size of noise data to be output. Further, as in the fourth embodiment, the noise generation circuit 144n detects the display gradation level of the video data D (i, j, k) and outputs noise having a magnitude corresponding to the detection result. A gradation determination unit 39 for instructing is provided.

  In the above configuration, as in the fourth embodiment, since the relative magnitude of the noise is smaller than when the average value of the video data D in the block is high, that is, when the average value is low, the noise If the noise pattern is difficult for the user to recognize even if the size of is increased, the maximum value of the noise is set large. On the other hand, when the average value of the video data D is low, that is, compared with the case where the average value is high, the relative magnitude of the noise is large. If there is a risk of recognition, the maximum noise value is set small. As a result, as in the fourth embodiment, regardless of the average value of the luminance of the block, the maximum noise value can be set to a value suitable for that value, and the maximum noise value is fixed. An image display device 1n with higher display quality than the case can be realized.

  In the 11th to 14th embodiments, unlike the first to 10th embodiments, the video data of the previous frame FR (k−1) stored in the frame memory 131 by the modulation processing unit 133 is stored. With reference to D0 (i, j, k-1), the video data of the current frame FR (k) is corrected so as to emphasize the gradation transition from the current frame to the previous frame, and the corrected video data Although the configuration for outputting D2 (i, j, k) as the corrected video signal DAT2 has been described, the configuration includes the γ conversion circuit 141 and the gradation conversion circuit 142 as in the 11th to 14th embodiments. 25, similarly to the first to tenth embodiments, the previous frame gradation correction circuit (37 to 37i) is provided, and the modulation processing unit 133 outputs the output of the previous frame gradation correction circuit. The corrected previous frame video signal DAT0a and the current With reference to the frame video signal DAT, it may generate a corrected video signal DAT2. 25 illustrates, as an example, a configuration in which the first embodiment is combined with the eleventh embodiment, and the modulation drive processing unit 21p illustrated in FIG. 25 includes the configuration illustrated in FIG. A previous frame gradation correction circuit 137p similar to the previous frame gradation correction circuit 37 is provided. Further, in the modulation drive processing unit 21p, a frame memory 131p and a control circuit 132p similar to the frame memory 31 and the control circuit 32 are provided in place of the frame memory 131 and the control circuit 132, and the control circuit 132p includes the control circuit 132p. 32, the video data D00 (i, j, k-2) of the previous frame FR (k-2) can be read from the frame memory 131p and output as the previous frame video signal DAT00.

  In this configuration, similarly to the eleventh embodiment, the pixel response speed can be improved by the gradation correction by the γ conversion circuit 141 and the gradation conversion circuit 142. As in the first embodiment, the modulation processing unit 133 emphasizes the gradation transition based on the previous frame video signal DAT0a corrected by the previous frame gradation correction circuit 137p. Can be prevented, and the display quality of the image display apparatus 1 can be improved.

  In each of the above embodiments, the case where the liquid crystal cell of the vertical alignment mode and the normally black mode is used as a display element has been described as an example. However, the present invention is not limited to this. Even if the response speed is slow and the drive is modulated and emphasized so as to emphasize the gradation transition, the difference between the actual gradation transition and the desired gradation transition occurs in the gradation transition from the previous time to the previous time. If it is an element, the substantially same effect is acquired.

  However, the liquid crystal cell in the vertical alignment mode and normally black mode has a slower response speed with respect to the decay gradation transition than in the case of the rise, and even if it is driven by modulation so as to emphasize the gradation transition, In the gradation transition of the decay to the previous time, a difference between the actual gradation transition and the desired gradation transition is likely to occur, and whitening is likely to occur. Therefore, it is particularly preferable to prevent the occurrence of white light by the configuration of the above embodiment.

  Further, in each of the above embodiments, the case where each member constituting the modulation drive processing unit is realized only by hardware has been described as an example, but the present invention is not limited to this. You may implement | achieve all or one part of each member with the combination of the program for implement | achieving the function mentioned above, and the hardware (computer) which performs the program. As an example, a computer connected to the image display device 1 may realize the modulation drive processing unit (21 to 21p) as a device driver used when driving the image display device 1. Further, when a modulation drive processing unit is realized as a conversion board built in or externally attached to the image display device 1, and the operation of a circuit that realizes the modulation drive processing unit can be changed by rewriting a program such as firmware. By distributing a recording medium in which the software is recorded or transmitting the software via a communication path, the software is distributed, and the hardware is executed by causing the hardware to execute the software. May be operated as the modulation drive processing unit of each of the above embodiments.

  In these cases, if hardware capable of executing the above-described functions is prepared, the modulation drive processing unit according to each of the above embodiments can be realized only by causing the hardware to execute the program.

  More specifically, when implemented using software, a calculation means comprising a CPU or hardware capable of executing the above-described functions executes program code stored in a storage device such as a ROM or RAM. The modulation drive processing units 21 to 21p according to the above embodiments can be realized by controlling peripheral circuits such as an input / output circuit (not shown).

  In this case, it can also be realized by combining hardware that performs a part of the processing and the arithmetic means that executes the program code for controlling the hardware and the remaining processing. Further, even among the members described above as hardware, the hardware for performing a part of the processing and the arithmetic means for executing the program code for performing the control of the hardware and the remaining processing It can also be realized by combining them. The arithmetic means may be a single unit, or a plurality of arithmetic means connected via a bus inside the apparatus or various communication paths may execute the program code jointly.

  The program code itself that can be directly executed by the computing means, or a program as data that can be generated by a process such as decompression described later, stores the program (program code or the data) in a recording medium, A recording medium is distributed, or the program is distributed by being transmitted by a communication means for transmitting via a wired or wireless communication path, and is executed by the arithmetic means.

  In addition, when transmitting via a communication path, each transmission medium which comprises a communication path propagates the signal sequence which shows a program, and the said program is transmitted via the said communication path. Further, when transmitting the signal sequence, the transmission device may superimpose the signal sequence on the carrier by modulating the carrier with the signal sequence indicating the program. In this case, the signal sequence is restored by the receiving apparatus demodulating the carrier wave. On the other hand, when transmitting the signal sequence, the transmission device may divide and transmit the signal sequence as a digital data sequence. In this case, the receiving apparatus concatenates the received packet groups and restores the signal sequence. Further, when transmitting a signal sequence, the transmission device may multiplex and transmit the signal sequence with another signal sequence by a method such as time division / frequency division / code division. In this case, the receiving apparatus extracts and restores individual signal sequences from the multiplexed signal sequence. In any case, the same effect can be obtained if the program can be transmitted via the communication path.

  Here, it is preferable that the recording medium for distributing the program is removable, but it does not matter whether the recording medium after distributing the program is removable. In addition, the recording medium may be rewritten (writeable), volatile, or the recording method and shape as long as a program is stored. Examples of recording media include tapes such as magnetic tapes and cassette tapes, magnetic disks such as floppy (registered trademark) disks and hard disks, CD-ROMs, magneto-optical disks (MO), mini-discs (MD) and digital A disk such as a video disk (DVD) may be mentioned. The recording medium may be a card such as an IC card or an optical card, or a semiconductor memory such as a mask ROM, EPROM, EEPROM, or flash ROM. Or the memory formed in calculating means, such as CPU, may be sufficient.

  The program code may be a code for instructing the arithmetic means of all the procedures of the processes, or a basic program capable of executing a part or all of the processes by calling according to a predetermined procedure. If (for example, an operating system or a library) already exists, a part or all of the entire procedure may be replaced with a code or a pointer that instructs the arithmetic means to call the basic program.

  The format for storing the program in the recording medium may be a storage format that can be accessed and executed by the arithmetic means, for example, as in a state where the program is stored in the real memory, or is stored in the real memory. Installed in the local recording medium from the storage format after being installed in a local recording medium (for example, real memory or hard disk) that is always accessible by the computing means, or from a network or a transportable recording medium The previous storage format may be used. Further, the program is not limited to the compiled object code, but may be stored as source code or intermediate code generated during interpretation or compilation. In any case, the above calculation is performed by a process such as decompression of compressed information, decoding of encoded information, interpretation, compilation, linking, allocation to real memory, or a combination of processes. If the means can be converted into an executable format, the same effect can be obtained regardless of the format in which the program is stored in the recording medium.

  As described above, the driving devices (21 to 21i) of the image display device (1) according to the present invention have the first gradation data indicating the current gradation of each pixel (subpixel SPIX (1,1)...). Noise data is added to the first gradation data input to the input terminal (T1) and the input terminal, and the lower bits of a predetermined bit width are rounded to obtain the second floor. The noise data is generated so that the noise adding means (34, 36) for generating tone data and the noise data added to the first gradation data for pixels adjacent to each other in the same color have random sizes. Is generated and applied to the noise adding means, storage means (frame memory 31) for storing the current second gradation data of each pixel until the next time, and reading from the storage means Last 2nd gradation day From so as to emphasize the grayscale transition to this second tone data, and a first correcting means for correcting the current second tone data (modulation processing section 33). The rounding process by the noise adding unit may be a rounding process or a rounding process. In addition, it is a process for selecting whether to round up or round up depending on whether or not a predetermined threshold value is exceeded, such as a rounding process in the case of a decimal number (a zero rounding process in the case of a binary number). Also good.

  However, of these rounding processes, if the rounding process is performed, it is not necessary to change the upper digit. Therefore, when simplification of processing is required, it is preferable that the noise adding means generates the second gradation data by truncation.

  In the above configuration, when the first gradation data indicating the current gradation of each pixel is input to the input terminal, the noise adding means adds the noise data to the first gradation data input to the input terminal. Further, the second bit data is generated by rounding the lower bits. The current second gradation data of each pixel generated by the noise adding means is stored in the storage means until the next time, and the first correction means includes the previous second gradation data read from the storage means and the noise. Based on the current second gradation data input from the adding means, the current second gradation data is corrected so as to emphasize the gradation transition from the previous time to the current time.

  In this configuration, the second gradation data stored in the storage means is set to have a bit width shorter than that of the first gradation data by rounding the lower bits. Therefore, the storage capacity required for the storage means can be reduced. Further, since the bit width of the gradation data processed by the circuits after the noise adding means (such as the storage means and the first correction means) is reduced, the circuit scale and the amount of calculation of these circuits can be reduced, and these It is possible to reduce the number of wires for connecting circuits and the occupied area of the wires. Furthermore, the noise generation means generates noise data such that the noise data added to the first gradation data for the pixels adjacent to each other in the same color has a random size. Unlike the configuration where the second gradation data is generated by simply truncating the lower bits of the first gradation data, the pseudo contour is not generated unlike the configuration in which the pseudo contour is generated in the image displayed on each pixel. As a result, even though the bit width of the second gradation data is shorter than that of the first gradation data, the display quality of the video displayed on each pixel is the same as when the first gradation data is displayed. It can be kept to the extent that it does not differ in appearance.

  Moreover, since the gradation transition from the previous time to the current time is emphasized by the first correction means, the response speed of the pixels can be improved. Here, when the noise adding means is provided at the subsequent stage of the first correcting means, noise is added to the data after the gradation transition emphasis, so that the gradation transition is overemphasized and the luminance of the pixel is undesirably increased. However, the image display device may be visually recognized as white light, or the gradation transition may not be sufficiently emphasized, and the luminance of the pixel may be lowered undesirably and may be visually recognized as a black sun. However, in the above configuration, since the first correction unit is arranged after the noise addition unit, the first correction unit is different from the case where the first correction unit is arranged in front of the noise addition unit. The response speed of the pixels can be improved without causing sinking.

  As a result, there is provided a driving device for an image display device capable of improving the response speed of the pixels without apparently degrading the display quality of the video displayed on each pixel, and reducing the circuit scale and the amount of calculation. realizable.

  In addition to the above configuration, the noise generation unit may generate noise data so that noise data of the same magnitude is added to the first gradation data for the same pixel each time.

  According to the above configuration, since the size of the first gradation data for the same pixel is fixed in time series, when displaying a still image, the noise data is included in the first gradation data for each pixel. In spite of being added, the output of the first correction means to each pixel has the same value every time. As a result, the image display apparatus can display a stable still image free from flicker and noise caused by the addition of noise data.

  In addition to the above configuration, the first gradation data is represented by 8 bits, and the maximum absolute value of each noise data is set to a value in the range of 1 to 32 gradations. In addition, the noise adding unit, the noise generating unit, the storage unit, and the first correcting unit may be provided for each color of RGB.

  In this configuration, when the image display device driven by the driving device is viewed from a distance where one pixel cannot be seen independently, the noise data is added between a certain pixel and a pixel adjacent thereto. The difference in luminance can be suppressed within 5% of the luminance of each pixel. Further, the difference between the luminance of the pixel instructed by the first gradation data and the luminance of the pixel controlled by the output of the correcting means can be suppressed to within 5% of each luminance. Therefore, it is possible to realize an image display device capable of color display and having particularly high display quality.

  Further, in place of the configuration in which the size of the first gradation data for the same pixel is fixed in time series, the noise generation unit may randomly add noise data to be added to the first gradation data to the same pixel. Noise data may be generated so as to have a large size.

  In this configuration, the noise data added to the first gradation data for the same pixel changes in time series. Therefore, it is assumed that each pixel is viewed from a sufficiently distinguishable distance, and if the noise is fixed in time series, even in an image display device that is recognized as a noise pattern, The series change can prevent the user from recognizing the noise pattern. As a result, a driving device suitable for driving such an image display device can be realized.

  In addition to the above-described configuration, the first correction unit may determine that the difference between the previous second gradation data and the current second gradation data is a difference that can be generated only by adding noise data. The correction of the second gradation data may be stopped.

  In this configuration, the first correction means may determine that the second floor of the current time is the difference between the previous second gradation data and the current second gradation data that can be generated only by adding noise data. Stops adjustment of key data. Therefore, it is possible to prevent the occurrence of a problem that the noise pattern becomes easy to be visually recognized as a result of the first correction means enhancing the gradation transition generated by the noise data.

  Further, in addition to the above configuration, the first gradation data is expressed by 8 bits, and the maximum absolute value of each noise data is set to a value in the range of 1 gradation to 8 gradations. In addition, the noise adding unit, the noise generating unit, the storage unit, and the first correcting unit may be provided for each color of RGB.

  In this configuration, since the maximum absolute value of the noise data is set in the above range, when the image display device driven by the driving device is viewed from a distance where one pixel can be viewed independently, the noise data Due to the addition, the difference in luminance generated between a certain pixel and the adjacent pixel, the luminance of the pixel designated by the first gradation data, and the luminance of the pixel controlled by the output of the correction means Both of the differences can be suppressed to within 5% of the luminance of each pixel. Therefore, it is possible to realize an image display device capable of color display and having particularly high display quality.

  Regardless of whether the noise data changes in time series, in addition to the above configuration, the lower-order bits are rounded by the noise adding means in the gradation obtained by averaging the second gradation data for the same pixel. You may have the least significant bit control means (frame rate control circuit 38) which changes the least significant bit of each 2nd gradation data by a preset pattern so that it may become a previous gradation.

  In this configuration, even when a still image is displayed, the second gradation data changes in time series. Accordingly, it is assumed that the pixel is viewed from a distance that changes whether or not one pixel can be viewed independently depending on the brightness and movement of the displayed image, and the second gradation data is displayed in time series when displaying a still image. In an image display apparatus in which there is a possibility that a noise pattern may be recognized depending on an image if it is fixed to, the user can be prevented from recognizing the noise pattern. Further, the change in the second gradation data is limited to the least significant bit, and the gradation obtained by averaging the second gradation data for the same pixel is before the lower bits are rounded by the noise adding means. Since the gradation is controlled so as to be a gradation, it is possible to prevent an apparent deterioration of the display quality of the video displayed on each pixel even though the second gradation data changes in time series. As a result, a driving device suitable for driving the image display device can be realized.

  Further, in addition to the above configuration, the first correction means may be configured such that the difference between the previous second gradation data and the current second gradation data is the addition of noise data and the least significant bit by the least significant bit control means. If the difference is a difference that can be caused only by the change in the second gradation data, the correction of the second gradation data may be stopped.

  In the above-described configuration, the first correction means is that the difference between the previous second gradation data and the current second gradation data is only the addition of noise data and the change of the least significant bit by the least significant bit control means. If the difference is a difference that can occur, the correction of the current second gradation data is stopped. Therefore, it is possible to prevent the occurrence of a problem that the noise pattern is easily visually recognized as a result of the first correction unit enhancing the gradation transition generated by the noise adding unit and the least significant bit control unit.

  In addition to the above-described configuration, the pixel is divided into a plurality of regions, and the first gradation data for the plurality of pixels included in each region is averaged. When the average value is high, the pixel is low In addition, noise amount control means (gradation determination unit 39) for controlling the noise generation means may be provided so that the maximum value of the absolute value of noise becomes larger.

  Here, if the noise data added to the first gradation data is too large, the noise pattern becomes easy to be visually recognized by the user of the image display device. If the noise data is too small, a pseudo contour is generated in each pixel. The display quality of the displayed video is degraded. In addition, the visibility of the noise pattern varies depending on the brightness of the image. If the maximum absolute value of the noise data is constant, the lower brightness is indicated when the gradation is low. In this case, since the relative size of the noise data is larger than when the gradation is high, the noise pattern is easily visually recognized. As a result, when the maximum value is fixed, the maximum value must be set so that there is no problem both when the video is bright and dark. Can not do it.

  On the other hand, in the above configuration, the maximum absolute value of the noise data generated by the noise generating unit is changed by the average value of the first gradation data. Therefore, as compared with the case where the maximum value is fixed, the maximum value can be set to a more suitable value for the currently displayed video, and an image display apparatus with high display quality can be realized.

  In the above description, the first gradation data for a plurality of pixels included in each region is averaged, and the maximum value is set based on the average value. Therefore, even though the gradation specified for a pixel is significantly different from the gradation of surrounding pixels, the noise pattern is visually recognized as a result of setting the above maximum value based on the gradation for the pixel. It is possible to prevent the occurrence of a problem that it becomes easy.

  Furthermore, in addition to the above configuration, the video signal composed of the first gradation data input to the input terminal is a video signal that is obtained by dividing the video into a plurality of small blocks and encoded in units of each small block. The region is characterized by being coincident with the small block.

  In this configuration, the area corresponds to a unit for encoding a video signal (a size that is handled as an integral video, or a size in which noise is conspicuous because it is an encoding unit). Therefore, even when the video signal is scaled and displayed (for example, when the original signal is enlarged and displayed on a high-definition liquid crystal display device), the occurrence of the above-described problem can be prevented.

  In addition to the above configuration, the storage means stores the second gradation data of the previous time until the next time in addition to the second gradation data of the current time, and the previous second time and the second time of the previous time stored by the storage means. When the combination of the gradation data is a predetermined combination, the second correction means for correcting the previous second gradation data referred to by the first correction means so as to approach the second gradation data of the previous time (previous Frame gradation correction circuits 37 to 37i) may be included.

  In the above configuration, when the combination of the second gradation data and the previous second gradation data is a predetermined combination, the previous second gradation data referred to by the first correction unit approaches the previous second gradation data. It is corrected as follows. Therefore, when the gradation transition from the previous time to the previous time is a predetermined gradation transition, the correction amount by the first correction unit can be suppressed as compared with the case where there is no correction by the second correction unit.

  As a result, for example, when the gradation correction from the previous time to the current time is performed in the first correction means as in the case of decay → rise or in the case of rise → decay, the following phenomenon, That is, due to the synergistic effect of the lack of response of the pixels in the gradation transition from the previous time to the previous time and the gradation transition emphasis in the first correction means, the gradation of the current pixel is the level indicated by the current second gradation data. Even when a phenomenon of whitening or darkening occurs, which is greatly different from the tone, by suppressing the correction amount of the first correction means, the occurrence of the phenomenon can be suppressed, and the display quality of the image display device can be reduced. It can be improved. Further, since the storage means stores the second gradation data before being corrected by the first correction means, unlike the configuration for storing the corrected second gradation data, the first correction means Errors due to correction are not superimposed or accumulated. Therefore, even if the first and second correction means are implemented by a circuit having a relatively small circuit scale and low calculation accuracy for correction, pixel gradation control diverges or vibrates. There is nothing. As a result, an image display device having a relatively small circuit scale and good display quality can be realized.

  The previous second gradation data stored in the storage means until the next time may have the same bit width as the current second gradation data. However, when the circuit scale is particularly required to be reduced, In addition to the configuration, before the storage means stores the current second gradation data and the previous second gradation data, at least one lower bit of both the second gradation data is rounded to obtain both the second gradation data. Bit width adjusting means (control circuits 32g and 32i) for limiting the total bit width of the gradation data to a predetermined set value may be provided. In this configuration, since the total value of the second gradation data stored in the storage unit is limited, the circuit scale can be reduced as compared with the case where all the data are stored. As described above, various rounding processes are conceivable as the rounding process. However, when simplification of the process is required, the bit width adjusting unit sums the bit widths of the second gradation data by truncation. It is better to limit

  Further, in addition to the above configuration, the bit width adjusting means occupies the bit width of the previous second gradation data stored until the next time among the set values in accordance with at least one of the type of video and the temperature. The ratio may be changed.

  Here, when the set value is limited to a value smaller than twice the bit width of the current second gradation data, the ratio of the bit width of the second gradation data in the previous setting to the set value If it is increased too much, the influence of the second gradation data of the previous time can be more accurately reflected on the corrected second gradation data, while the influence of the previous second gradation data is accurately reflected. It can no longer be made. Accordingly, it is desirable to set the ratio of the bit width of the second gradation data in the previous setting to an appropriate value according to the influence of the second gradation data in the set value. On the other hand, when a fast-moving video is input, it is more susceptible to the previous video data, so if the type of video changes and the expected speed of motion changes, the above ratio will be appropriate. The value will change. Similarly, when the temperature changes, the response speed of the pixel changes, so that an appropriate value of the above ratio changes.

  On the other hand, in the above configuration, the proportion of the bit width of the second gradation data read out as the second gradation data of the previous time is changed among the set values according to at least one of the type of video and the temperature. Therefore, the above ratio can be kept at an appropriate value regardless of the type and temperature of the image. As a result, the display quality of the image display device can be maintained at a high level.

  By the way, the driving device of the image display device may be realized by hardware, or may be realized by causing a computer to execute a program. That is, the program according to the present invention is a program that causes a computer to operate as each of the above means. Further, the program may be a program that causes a computer to execute the same process (each process of the driving method of the image display device) as the process executed by each of the above means. Furthermore, the program is recorded on a recording medium according to the present invention. When these programs are executed by the computer, the computer operates as a drive device for the image display device. Note that the program can be stored and distributed by being stored in a recording medium.

  The program can also be expressed by a computer data signal. For example, if a computer receives a signal in which a computer data signal is embedded (for example, a carrier wave, a synchronization signal, or another signal) and executes a program represented by the computer data signal, the computer can execute each image described above. It can operate as a driving device for a display device.

  Therefore, similar to the driving device of the image display device, the response speed of the pixel can be improved without apparently reducing the display quality of the video displayed on each pixel, and the circuit scale and the calculation amount can be reduced. A drive device for a possible image display device can be realized.

  An image display apparatus according to the present invention includes the above-described driving devices. Furthermore, a television receiver according to the present invention is characterized by including the image display device.

  Since the image display device and the television receiver having such a configuration include the above-described driving device, the response speed of the pixels can be improved without apparently reducing the display quality of the video displayed on each pixel. The circuit scale and the calculation amount can be reduced.

  On the other hand, as described above, the driving devices (21j to 21p) of the image display device (1) according to the present invention have the first floor indicating the current gradation of each pixel (sub-pixel SPIX (1,1)...). Gradation conversion means (142) for converting the tone data into second gradation data having a γ characteristic larger than the γ characteristic, and storage means for storing the current second gradation data of each pixel until the next time ( Correction for correcting the second gradation data of this time so as to emphasize the gradation transition from the second gradation data of the previous time read out from the frame memory 131) to the current second gradation data. Means (modulation processing unit 133), and the lower limit value of the second gradation data that can be obtained by the conversion of the first gradation data is larger than the lower limit value of the numerical range that can be expressed by the second gradation data Is set to

  In the above configuration, since the second gradation data of this time is corrected so that the correction means emphasizes the gradation transition from the previous time to the current time, the response speed of the pixels can be improved. In addition, in the above configuration, the first gradation data is converted into second gradation data having a larger γ characteristic by the gradation converting means. The lower limit value of the second gradation data that can be obtained by the conversion of the first gradation data is set to a value that is larger than the lower limit value of the numerical range that can be expressed by the second gradation data.

  As a result, when the pixel displaying the second gradation data displays the gradation indicated by the second gradation data, the gradation that is crushed in black increases as compared with a configuration that does not perform γ conversion. Of the second gradation data, the second gradation data that is not the minimum corresponds to the lower limit (black level) of the first gradation data. Therefore, the correction means can use the second gradation data having a lower gradation than the second gradation data for gradation transition enhancement, and can improve the response speed of the pixel.

  Further, in addition to the above configuration, the bit width of the second gradation data may be set wider than the bit width of the first gradation data. In addition to the above configuration, the bit width of the first gradation data may be 8 bits, and the bit width of the second gradation data may be 10 bits. In these configurations, since the bit width of the second gradation data is set wider than the bit width of the first gradation data, the gradation conversion means can perform γ conversion with higher accuracy.

  In addition to the above configuration, noise adding means for adding noise data before rounding the second gradation data to the storage means and the correction means, and further rounding lower bits of a predetermined bit width; Noise generating means for generating the noise data and supplying the noise adding means to the noise adding means so that the noise data to be added to the second gradation data to the pixels adjacent to each other in the same color are at random sizes; May be provided. Further, in addition to the above configuration, the bit width of the first gradation data is 8 bits, the bit width of the second gradation data is 10 bits, and the bit width of the lower bits is 2 bits. It may be. As described above, various rounding processes can be considered as the rounding process by the noise adding unit. However, when simplification of processing is required, the noise adding unit cuts the second gradation data by truncation. It is preferable to generate.

  In these configurations, the second gradation data stored in the storage means is set to have a bit width shorter than the second gradation data generated by the gradation conversion means by the lower-order bit rounding process. Therefore, the storage capacity required for the storage means can be reduced. In addition, since the bit width of the gradation data processed by the circuits after the noise adding means (storage means, correction means, etc.) is reduced, the circuit scale and calculation amount of these circuits can be reduced, and these circuits are It is possible to reduce the number of wirings to be connected and the occupied area of the wirings. Furthermore, the noise generation means generates noise data such that the noise data added to the second gradation data for pixels adjacent to each other in the same color has a random size. Unlike the configuration, that is, the configuration in which a pseudo contour is generated in an image displayed on each pixel as a result of simply truncating the lower bits of the second gradation data, no pseudo contour is generated. As a result, the video displayed on each pixel even though the bit width of the second gradation data stored in the storage means is shorter than the second gradation data generated by the gradation conversion means. The display quality can be maintained at a level that is not apparently different from the case of no rounding.

  If the noise adding means is provided after the correcting means, noise is added to the data after the gradation transition emphasis, so that the gradation transition is overemphasized, and the luminance of the pixel is increased undesirably. There is a possibility that the user of the image display apparatus may recognize the light as light, or the gradation transition may not be sufficiently emphasized, and the luminance of the pixel may be undesirably lowered and visually recognized as a black sun. However, in the above configuration, since the correction unit is arranged at the subsequent stage of the noise addition unit, unlike the case where the correction unit is arranged at the front stage of the noise addition unit, whitening or darkening due to noise addition is generated. Therefore, the response speed of the pixel can be improved.

  As a result, it is possible to reduce the circuit scale and the amount of calculation without apparently degrading the display quality of the video displayed on each pixel.

  By the way, the driving device of the image display device may be realized by hardware, or may be realized by causing a computer to execute a program. That is, the program according to the present invention is a program that causes a computer to operate as each of the above means. Further, the program may be a program that causes a computer to execute the same process (each process of the driving method of the image display device) as the process executed by each of the above means. Furthermore, the program is recorded on a recording medium according to the present invention. When these programs are executed by the computer, the computer operates as a drive device for the image display device. Note that the program can be stored and distributed by being stored in a recording medium.

  The program can also be expressed by a computer data signal. For example, if a computer receives a signal in which a computer data signal is embedded (for example, a carrier wave, a synchronization signal, or another signal) and executes a program represented by the computer data signal, the computer can execute each image described above. It can operate as a driving device for a display device.

  Therefore, similarly to the drive device for the image display device, a drive device for the image display device that can improve the response speed of the pixels can be realized.

  An image display apparatus according to the present invention includes the above-described driving devices. Furthermore, a television receiver according to the present invention is characterized by including the image display device.

  Since the image display device and the television receiver having such a configuration include the driving device, the response speed of the pixels can be improved.

  In the above description, the configuration for performing the rounding process before storing in the storage unit has been described. Instead of performing the rounding process before storing, the storage unit uses a known compression technique to store the data to be stored. The compressed and stored data may be rounded before the first correction means or the correction means outputs the corrected video data.

  For example, in the configuration of FIG. 1 or FIG. 15, the truncation circuit (36/145) is deleted, and the memory control circuit (32/132) compresses the input data to the frame memory (31/131). In addition to storing, the data from the frame memory is decompressed and output. The modulation processing unit (33/133) rounds the corrected video data and outputs the corrected video data as D2 (i, j, k).

  Even in this configuration, since the noise is added before the correction processing by the first correction unit or the correction unit, it is possible to improve the response speed of the pixel without causing whitening or darkening due to the addition of noise.

  In addition, since the data stored in the storage unit is compressed by the compression process, the storage capacity required for the storage unit can be reduced. Further, since the rounding process is performed by the first correction unit or the correction unit, a circuit subsequent to the first correction unit or the correction unit (for example, the data signal line drive circuit 3 of the panel 11 of the image display device 1). Can reduce the bit width of video data that needs to be processed. Further, since the rounding process is performed after the noise is added, the generation of the pseudo contour can be suppressed unlike the configuration of simply discarding.

  As a result, there is provided a driving device for an image display device capable of improving the response speed of the pixels without apparently degrading the display quality of the video displayed on each pixel, and reducing the circuit scale and the amount of calculation. realizable.

  However, as in the above embodiments, the circuit scale can be further reduced by rounding with earlier means (noise adding means or the like).

  According to the present invention, it is possible to improve the response speed of a pixel without apparently degrading the display quality of an image displayed on each pixel, and the drive device of an image display device having a simple configuration, or the smallest Even when gradation transition to gradation is required, it is possible to realize an image display apparatus driving apparatus capable of improving the response speed of pixels. It can be suitably used as a drive device for an image display device.

1, showing an embodiment of the present invention, is a block diagram illustrating a main configuration of a modulation drive processing unit of an image display device. FIG. It is a block diagram which shows the principal part structure of the said image display apparatus. It is a circuit diagram which shows the structural example of the pixel provided in the said image display apparatus. It is a drawing showing how much the transmittance of a pixel is increased by a percentage based on the surrounding luminance when the display gradation of the pixel is increased by x gradation. It is a diagram showing how much the pixel display gradation is increased by an x gradation and how much it is increased based on the original transmittance. FIG. 9 is a timing chart showing the operation of the modulation drive processing unit and showing the actual luminance level when the gradation transition from the previous time to the current time is from decay to rise. FIG. 10 is a timing chart showing the operation of the modulation drive processing unit and showing the actual luminance level when the gradation transition from the previous time to the current time is rise → decay. 6 is a diagram illustrating a relationship between a calculation area and a region expressed by a combination of video data of the previous frame and video data of the previous frame. It is drawing which shows the content of the look-up table provided in the said modulation | alteration drive process part. FIG. 32 is a block diagram illustrating a main configuration of a modulation drive processing unit according to still another embodiment of the present invention. FIG. 10, showing another embodiment of the present invention, is a block diagram illustrating a main configuration of a modulation drive processing unit. FIG. 10 is a view showing another embodiment of the present invention and showing contents of a lookup table provided in the modulation drive processing unit. FIG. 28 is a block diagram illustrating a main configuration of a modulation drive processing unit according to still another embodiment of the present invention. FIG. 32 is a block diagram illustrating a main configuration of a modulation drive processing unit according to still another embodiment of the present invention. FIG. 10, showing another embodiment of the present invention, is a block diagram illustrating a main configuration of a modulation drive processing unit. FIG. 10 illustrates an operation of a gradation conversion circuit provided in the modulation drive processing unit, and is a diagram illustrating a relationship between a numerical range before gradation conversion and a numerical range after conversion. FIG. 9 is a diagram illustrating an operation of a γ conversion circuit provided in the modulation drive processing unit, and illustrating γ characteristics before and after conversion. It is a graph which shows the voltage-transmittance characteristic of the liquid crystal cell used for the pixel array of the said image display apparatus. 12 is a graph showing a comparative example and showing a relationship between a gradation received by a data signal line driving circuit of an image display device and a voltage applied to a pixel. It is a graph which shows the relationship between the gradation which the data signal line drive circuit of the image display apparatus which concerns on the said embodiment receives, and the voltage applied to a pixel. This shows the operation of the gradation conversion circuit and data signal line drive circuit provided in the modulation drive processing section, and the relationship between the numerical range before gradation conversion, the numerical range after conversion, and the voltage applied to the pixel FIG. 5 is a graph showing the luminance response characteristics of pixels normalized by white luminance when video data input to the image display device changes from a black level to a white level. FIG. 29, showing another embodiment of the present invention, is a block diagram illustrating a main configuration of a modulation drive processing unit. FIG. 32 is a block diagram illustrating a main configuration of a modulation drive processing unit according to still another embodiment of the present invention. FIG. 28 is a block diagram illustrating a main configuration of a modulation drive processing unit according to still another embodiment of the present invention. It is a block diagram which shows a prior art and shows the principal part structure of an image display apparatus. It is a block diagram which shows another prior art and shows the principal part structure of an image display apparatus. It is drawing which shows the said FIG. 16 in detail. It is drawing which shows the said FIG. 17 in detail.

Explanation of symbols

1 Image Display Device 21-21p Modulation Drive Processing Unit (Drive Device)
31, 131, 131p frame memory (storage means)
32g / 32i control circuit (bit width adjustment means)
33 Modulation processing unit (first correction means)
34.143 Noise adding circuit (noise adding means)
35.144 Noise generation circuit (noise generation means)
36.145 Truncation circuit (noise adding means)
37-37i Previous frame gradation correction circuit (second correction means)
38.146 Frame rate control circuit (least significant bit control means)
39 Gradation determination unit (noise amount control means)
133 Modulation processing unit (correction means)
141 γ conversion circuit (gradation conversion means)
142 gradation conversion circuit (gradation conversion means)
SPIX (1,1) ... Sub-pixel (pixel)
T1 input terminal

Claims (39)

An input terminal to which first gradation data indicating the current gradation of each pixel is input;
Noise adding means for adding noise data to each of the first gradation data and further truncating lower bits of a predetermined bit width to generate second gradation data;
Mutually noise data with each other is added to the first tone data to adjacent pixels from each other in the same color is Ri Do random size and the first tone data to the same pixel, over the entire frame to so that is subject to noise data for each time the same size, and generates the noise data, and noise generation means for applying to the noise adding means,
Storage means for storing the current second gradation data of each pixel until the next time;
First correction means for correcting the current second gradation data so as to emphasize the gradation transition from the previous second gradation data read from the storage means to the current second gradation data. A drive device for an image display device. The noise data added to the first gradation data for pixels adjacent to each other in the same color has a random size, and the first gradation data for the same pixel is included in the first gradation data every time over the entire frame. Noise generating means for generating noise data so that noise data of the same magnitude is added ;
Noise adding means for adding the generated noise data to the first gradation data to the received pixel and truncating at least one lower bit to generate second gradation data;
Storage means for storing the second gradation data;
According to the previous second gradation data read from the storage means, the current second gradation data of the pixel is emphasized so as to emphasize the gradation transition from the previous second gradation data to the current second gradation data. A drive device for an image display device, comprising: first correction means for correcting two-gradation data. The first gradation data is expressed by 8 bits, and the maximum absolute value of each noise data is set to a value ranging from 1 gradation to 32 gradations,
3. The image display device drive device according to claim 1, wherein the noise adding unit, the noise generating unit, the storage unit, and the first correcting unit are provided for each of RGB colors.   The first gradation data is expressed by 8 bits, and the maximum absolute value of each noise data is set to a value ranging from 1 gradation to 32 gradations, and the second floor 3. The image display device driving apparatus according to claim 2, wherein the tone data is expressed by 6 bits.   3. The image display device driving apparatus according to claim 2, wherein the first gradation data is expressed by 10 bits, and the second gradation data is expressed by 8 bits. 5. The image display apparatus drive device according to claim 4 , wherein the noise adding means, noise generating means, storage means, and first correcting means are provided for each of RGB colors. The lowest gradation of each second gradation data in a preset pattern so that the gradation obtained by averaging the second gradation data for the same pixel is the gradation before the lower bits are discarded by the noise adding means. 3. The image display device drive device according to claim 1, further comprising a least significant bit control means for changing a bit. In the first correction means, the difference between the previous second gradation data and the current second gradation data can be generated only by adding noise data and changing the least significant bit by the least significant bit control means. 8. The image display device driving device according to claim 7 , wherein when the difference is the difference, the correction of the current second gradation data is stopped. The pixel is divided into a plurality of regions,
The first tone data for a plurality of pixels included in each region is averaged, and when the average value is low, the noise generation means is configured so that the maximum absolute value of the noise data is smaller than when the average value is high. 9. The drive device for an image display device according to claim 8, further comprising noise amount control means for controlling. The video signal including the first gradation data is a video signal obtained by dividing a video into a plurality of blocks and encoding each block.
The image display device driving device according to claim 9 , wherein the area coincides with the block. Video signal including the upper Symbol first tone data is to divide the image into a plurality of blocks, of the image display apparatus according to claim 1 or 2, wherein it is a coded video signal in units of blocks Drive device. In addition to the current second gradation data, the storage means stores the previous second gradation data until the next time,
When the combination of the previous second gradation data and the previous second gradation data stored by the storage means is a predetermined combination, the previous second gradation data referred to by the first correction means is changed to the second previous gradation data. The image display apparatus drive device according to claim 1, further comprising: a second correction unit configured to correct the distance so as to approach the distance. Before storing the current second gradation data and the previous second gradation data in the storage means, the sum of the bit widths of the current second gradation data and the previous second gradation data is determined in advance. 13. The image display device driving device according to claim 12, further comprising a bit width adjusting means for limiting a sum of bit widths of the second gradation data so as to obtain a set value. The bit width adjusting means, before the storage means stores the second tone data of the second tone data and the previous time, by truncating Rukoto at least one of the lower bits of both the second tone data 14. The driving device for an image display device according to claim 13 , wherein the total bit width is limited. The bit width adjusting means, in response to at least the image type and temperature, among the setting value, according to claim 13 or, characterized in that to change the ratio of the bit width of the second tone data of the previous 14. A drive device for an image display device according to 14 .   The conversion means for converting the first gradation data into gradation data having a γ characteristic larger than the γ characteristic is provided in front of the noise adding means. Or the drive device of the image display apparatus of 2. 17. The driving device for an image display device according to claim 16 , wherein the first correction means corrects the current second gradation data of the pixel in accordance with the contents of the lower bits to be discarded . The lower limit value of the gradation data after γ conversion that can be obtained by the conversion of the first gradation data is set to be larger than the lower limit value of the numerical range that can be expressed by the second gradation data. 17. The drive device for an image display device according to claim 16 , wherein the drive device is an image display device. The bit width of the first gradation data is 8 bits,
The bit width of the gradation data after the γ conversion is 10 bits,
19. The driving device for an image display device according to claim 18 , wherein the bit width of the lower bits is 2 bits. Noise data is added to each first gradation data input to an input terminal to which the first gradation data indicating the current gradation of each pixel is input, and lower bits having a predetermined bit width are further added. A noise adding means for generating second gradation data by rounding down ;
Mutually noise data with each other is added to the first tone data to adjacent pixels from each other in the same color is Ri Do random size and the first tone data to the same pixel, over the entire frame to so that is subject to noise data for each time the same size, and generates the noise data, noise generating means for applying to the noise adding means,
Storage means for storing the second gradation data of each pixel until the next time;
As a first correction means for correcting the second gradation data of this time so as to emphasize the gradation transition from the second gradation data of the previous time read from the storage means to the second gradation data of the present time, a computer The program characterized by operating. A recording medium on which the program according to claim 20 is recorded. An input terminal to which first gradation data indicating the current gradation of each pixel is input;
Noise adding means for adding the noise data to each of the first gradation data to generate second gradation data;
Mutually noise data with each other is added to the first tone data to adjacent pixels from each other in the same color is Ri Do random size and the first tone data to the same pixel, over the entire frame to so that is subject to noise data for each time the same size, and generates the noise data, and noise generation means for applying to the noise adding means,
Storage means for compressing the current second gradation data of each pixel and storing it until the next time;
The current second gradation data is corrected so as to emphasize the gradation transition from the previous second gradation data read from the storage means to the current second gradation data, and a predetermined bit is set. An image display device drive device comprising: first correction means for truncating lower-order bits of the width and outputting the result. The noise data added to the first gradation data for pixels adjacent to each other in the same color has a random size, and the first gradation data for the same pixel is included in the first gradation data every time over the entire frame. Noise generating means for generating noise data so that noise data of the same magnitude is added ;
Noise adding means for generating the second gradation data by adding the generated noise data to the first gradation data to the received pixel;
Storage means for storing the second gradation data;
According to the previous second gradation data read from the storage means, the current second gradation data of the pixel is emphasized so as to emphasize the gradation transition from the previous second gradation data to the current second gradation data. A drive device for an image display device, comprising: first correction means for correcting two gradation data and truncating at least one lower-order bit and outputting corrected second gradation data . An image display device comprising the drive device according to any one of claims 1 to 19 , 22 and 23 . 25. The image display device according to claim 24 , wherein the image display device is a television receiver. The noise data added to the first gradation data for pixels adjacent to each other in the same color has a random size, and the first gradation data for the same pixel is included in the first gradation data every time over the entire frame. A noise generation step for generating noise data so that noise data of the same size is added ;
The generated noise data is added to the first gradation data for the received pixel, and at least one lower-order bit is rounded down with respect to the addition result of the noise data and the first gradation data. A noise adding step for generating gradation data;
A storage step of storing the second gradation data;
According to the stored second gradation data, the current second gradation data of the pixel is emphasized so as to emphasize the gradation transition from the previous second gradation data to the current second gradation data. And a first correction step for correcting the image display device. The first gradation data is expressed by 8 bits, and the maximum absolute value of each noise data is set to a value ranging from 1 gradation to 32 gradations, and the second floor 27. The method of driving an image display device according to claim 26 , wherein the tone data is expressed by 6 bits. When the difference between the previous second gradation data and the current second gradation data is a difference that can be generated only by addition of noise data, the correction of the current second gradation data is stopped. The method for driving an image display device according to claim 27 . The lowest gradation of each second gradation data in a preset pattern so that the gradation obtained by averaging the second gradation data for the same pixel is the gradation before the lower bits are discarded by the noise addition step. 27. The method of driving an image display device according to claim 26 , further comprising a least significant bit control step of changing a bit. When the difference between the previous second gradation data and the current second gradation data is a difference that can be generated only by adding noise data and changing the least significant bit in the least significant bit control step, 30. The method of driving an image display device according to claim 29 , wherein the correction of the second gradation data is stopped. Video signal including the upper Symbol first tone data is to divide the image into a plurality of blocks, a coded image signal in units of blocks,
31. The method of driving an image display device according to claim 30, wherein the pixel area coincides with the block. The storing step stores the previous second gradation data and the current second gradation data,
In the driving method of the image display device, when the combination of the stored second previous gradation data and the previous second gradation data is a predetermined combination, the second gradation data before the first correction step is converted into the second gradation data before the first correction process. 27. The method of driving an image display device according to claim 26 , further comprising a second correction step of correcting the previous second gradation data so as to approach. Before the noise addition step claim, characterized in that said first tone data, the conversion step of converting the gradation data having a larger γ characteristic than the γ characteristics are provided 26 A driving method of the image display device. 34. The method of driving an image display device according to claim 33 , wherein the first correction step corrects the current second gradation data of the pixel in accordance with the contents of the lower bits to be discarded . The noise data added to the first gradation data for pixels adjacent to each other in the same color has a random size, and the first gradation data for the same pixel is included in the first gradation data every time over the entire frame. A noise generation step for generating noise data so that noise data of the same size is added ;
A noise adding step of adding the generated noise data to the first gradation data to the received pixel to generate second gradation data;
A storage step of storing the second gradation data;
According to the stored second gradation data, the current second gradation data of the pixel is emphasized so as to emphasize the gradation transition from the previous second gradation data to the current second gradation data. And a first correction step of truncating at least one lower-order bit and outputting the corrected second gradation data. The method for driving an image display apparatus, comprising: 36. An image display method comprising the method of driving an image display device according to any one of claims 26 to 35 . The image display method according to claim 36 , wherein the image display device is a television receiver. 36. A program for causing a computer to execute each step according to any one of claims 26 to 35 . A recording medium on which the program according to claim 38 is recorded.

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