JP4527004B2 - Method for manufacturing thin film transistor mounted panel - Google Patents

Description

  The present invention relates to a method for manufacturing a thin film transistor mounting panel, and more particularly to a method for manufacturing a thin film transistor mounting panel for making it difficult for a thin film transistor formed on a plastic substrate to be peeled off from the plastic substrate.

  In an active matrix drive type display device, a polysilicon thin film transistor (hereinafter referred to as TFT) is used as a switching element provided in each pixel, a circuit element constituting a peripheral circuit on a display substrate, or the like. A liquid crystal display panel, which is one of active matrix drive type display devices, is often used for mobile display applications such as mobile phones and PDAs, and a panel with a TFT mounted with further weight reduction and impact resistance is desired. Yes. In recent years, a TFT mounting panel using a plastic substrate instead of a glass substrate has been proposed.

As manufacturing methods of a TFT mounting panel using a plastic substrate, two types of manufacturing methods are mainly known. One is a method in which a TFT is manufactured on a glass substrate by a conventional technique, and then the TFT is peeled off from the glass substrate, and the peeled TFT is bonded to a plastic substrate. The other is a method in which a plastic substrate is used and a TFT is directly formed on the plastic substrate (see, for example, Patent Document 1).
JP 2000-68518 A

  The former method can use a conventional technique of manufacturing a TFT on a glass substrate, so that a TFT having high performance can be manufactured. However, since a complicated process of peeling and bonding is added, an increase in manufacturing cost is inevitable. There is a difficulty.

  Since the latter method uses a plastic substrate, material costs and man-hours can be reduced compared to using a glass substrate, but the plastic substrate has a glass transition temperature (depending on the substrate, about 100 to 250 ° C.) or higher heat. When added, there is a problem that the TFT manufactured on the plastic substrate is easily peeled off. For example, when amorphous silicon formed on a plastic substrate is made into polysilicon by laser annealing, it is necessary to instantaneously apply heat of about 1700 ° C. to the amorphous silicon. At this time, if heat above the glass transition temperature is applied to the plastic substrate, there arises a problem that the amorphous silicon thin film is peeled off from the plastic substrate.

  In addition, when thermal activation is performed by adding impurity ions to a polysilicon thin film formed on a plastic substrate and performing laser annealing, if the heating necessary for activation (about 400 ° C.) is performed, the plastic substrate has a glass transition temperature or higher. This causes the problem that the polysilicon thin film produced on the plastic substrate is peeled off from the plastic substrate.

  The present invention has been made in order to solve the above-described problems. The purpose of the present invention is to remove a thin film transistor formed on a plastic substrate from the plastic substrate even by the heat of laser annealing applied during the TFT manufacturing process. It is an object of the present invention to provide a method for manufacturing a thin film transistor mounting panel that is difficult to perform.

  In the process of studying to solve the above problems, the present inventor found that TFTs fabricated on a plastic substrate after heat treatment are difficult to peel off from the plastic substrate even when laser annealed. The present invention has been completed.

  That is, the method for manufacturing a thin film transistor mounting panel according to the first aspect of the present invention includes a step of heat-treating a plastic substrate, a step of forming an amorphous silicon thin film on the heat-treated plastic substrate, and laser annealing the amorphous silicon thin film. And a process for forming an impurity diffusion region by laser annealing after adding impurity ions to a predetermined region of the polysilicon thin film and forming an impurity diffusion region. And the said heat processing is performed on the conditions for 10 minutes or more within the range of 90 degreeC or more and 200 degrees C or less.

  According to the present invention, the TFT substrate manufactured on the plastic substrate after the heat treatment is manufactured by the method including the step of heat-treating the plastic substrate under the above-described conditions, so that it is difficult to peel off from the plastic substrate even if laser annealing is performed. Obtained. The direct effect of heat treatment is not clear, but the gas component or moisture contained in the plastic substrate is probably removed by the heat treatment process, so even if heat is applied during laser annealing, the gas contained in the plastic substrate This is probably because peeling due to the influence of components and moisture does not occur between the TFTs. As a result, it is possible to prevent interfacial peeling that occurs during the manufacturing process, and to improve the manufacturing yield.

A method of manufacturing a thin film transistor mounting panel according to a second embodiment of the present invention includes a step of vacuum processing a plastic substrate, a step of forming an amorphous silicon thin film on the vacuum processed plastic substrate, and laser annealing the amorphous silicon thin film. Manufacturing a thin film transistor mounting panel comprising: a step of forming a polysilicon thin film; and a step of adding a impurity ion to a predetermined region of the polysilicon thin film and then thermally activating to form an impurity diffusion region by laser annealing. It is a method, Comprising: The said vacuum process is performed on the conditions for 60 minutes or more within the range of 1 * 10 < ^-3 > Pa or less and 1 * 10 < ^-5 > Pa or more.

  In the present invention, as in the case of the first embodiment, the TFT manufactured on the plastic substrate after the vacuum processing is manufactured by the method having the step of vacuum processing the plastic substrate under the above conditions. The result that it was hard to peel from a board | substrate was obtained. Although the direct action of vacuum processing is not clear, it is probably included in the plastic substrate even if heat is applied during the laser annealing afterwards because the gas components and moisture contained in the plastic substrate are removed in the vacuum processing process. It is thought that this is because peeling based on the influence of the gas component and moisture generated does not occur with the TFT. As a result, it is possible to prevent interfacial peeling that occurs during the manufacturing process, and to improve the manufacturing yield.

  In the method for manufacturing a thin film transistor-equipped panel according to the first and second aspects of the present invention, the plastic substrate is polyethersulfone (PES) or polyethylene naphthalate (PEN). .

  According to the present invention, the problem of peeling during the manufacturing process can be solved for the plastic substrate that preferably constitutes the TFT mounting panel.

  In the method for manufacturing a thin film transistor mounting panel according to the first and second aspects of the present invention, the amorphous silicon thin film is formed by a sputtering method.

  Since an amorphous silicon thin film formed by sputtering is easy to contain gas, it is important to ensure adhesion with a plastic substrate. According to the present invention, the plastic substrate and the TFT are separated by heat treatment or vacuum treatment. Thus, even with an amorphous silicon thin film formed by a sputtering method, adhesion with a plastic substrate can be ensured.

  According to the method for manufacturing a thin film transistor-mounted panel of the present invention, it was found that TFTs produced on a plastic substrate after heat treatment or vacuum treatment were difficult to peel from the plastic substrate even when laser annealed. Since heat treatment or vacuum treatment is considered to act to remove gas components and moisture contained in the plastic substrate, even if heat is applied during the laser annealing, the influence of the gas components and moisture contained in the plastic substrate is affected. It is considered that no peeling based on the TFT occurs. As a result, it is possible to prevent interfacial peeling that occurs during the manufacturing process, and to improve the manufacturing yield.

  Since the thin film transistor mounting panel thus obtained has TFTs formed on a flexible plastic substrate with good adhesion, a flexible display can be designed by combining it with an organic EL element, for example.

  Hereinafter, the manufacturing method of the thin-film transistor mounting panel of this invention is demonstrated in detail. FIG. 1 is a schematic cross-sectional view showing an example of a TFT element portion of a thin film transistor mounting panel obtained by the manufacturing method of the present invention, and FIGS. 2 and 3 are explanatory views showing the manufacturing method of the thin film transistor mounting panel of the present invention. is there. In addition, this invention is not limited to the form of drawing or the following embodiment.

  The thin film transistor mounting panel manufacturing method of the present invention includes a step of heat-treating or vacuum-treating a plastic substrate, a step of forming an amorphous silicon thin film on the heat-treated or vacuum-treated plastic substrate, A step of forming a silicon thin film, and a step of adding impurity ions to a predetermined region of the polysilicon thin film and then thermally activating by laser annealing to form an impurity diffusion region.

  The thin film transistor mounting panel obtained by the manufacturing method of the present invention is formed by forming a polysilicon thin film on a plastic substrate, and can be used, for example, as a display panel constituting an active matrix drive type display device. is there. More specifically, the TFT element portion 10 of the thin film transistor mounting panel obtained by the manufacturing method of the present invention includes a plastic substrate 11 and a polysilicon semiconductor thin film 13 (source side) formed on the plastic substrate 11 as shown in FIG. A diffusion film 13s, a semiconductor channel film 13c and a drain side diffusion film 13d), a gate insulating film 14 formed on the polysilicon semiconductor thin film 13, and on the gate insulating film 14 or via a contact hole of the gate insulating film. Electrode 15 (source electrode 15s, gate electrode 15g, and drain electrode 15d).

  In the following, the manufacturing method according to the present invention will be described in the order of steps based on FIG. 2 and FIG. 3 by taking the structure form of the TFT element portion shown in FIG. 1 as an example. However, the present invention is not limited to the structural form shown in the drawing, as long as it has at least a process of heat-treating or vacuum-treating the plastic substrate.

  First, as shown in FIG. 2A, the prepared plastic substrate 11 is subjected to heat treatment or vacuum treatment. The plastic substrate 11 forms a circuit board of a thin film transistor. For example, polyether sulfone (PES), polyether naphthalate (PEN), polyamide, polyacetal, polybutylene terephthalate, polyethylene terephthalate, polyphenylene sulfide, polyether ether The organic base material which consists of a ketone, a liquid crystal polymer, a fluororesin, a polycarbonate, a polynorbornene-type resin, a polysulfone, a polyarylate, a polyamide imide, a polyether imide, a thermoplastic polyimide, etc., or those composite base materials can be mentioned. Among these, polyethersulfone (PES) and polyethylene naphthalate (PEN) can be preferably exemplified. As the plastic substrate 11, a thin flexible film having a thickness of about 5 μm to 300 μm can be used, and a panel on which a thin film transistor is formed can be made flexible.

  The heat treatment is performed in a range of 90 ° C. to 200 ° C. for 10 minutes or more. By heat-treating the plastic substrate under these conditions, it is possible to prevent the TFT from peeling from the plastic substrate during the subsequent laser annealing. Note that the TFT may be peeled off from the plastic substrate outside the range of the above conditions. The reason why peeling is prevented under these conditions is not clear, but probably the gas components and moisture contained in the plastic substrate are removed by heat treatment, so even if heat is applied during laser annealing, the plastic substrate This is probably because peeling due to the influence of the contained gas components and moisture does not occur between the TFTs. If the heat treatment time is 10 minutes or more, the effect does not change so much, so the upper limit is not particularly limited, but if it is strongly mentioned, it can be about 120 minutes.

  A preferable heat treatment condition is a condition of not less than 120 ° C. and not more than 160 ° C. for 20 minutes or more. Under this condition, it is possible to remarkably prevent the TFT from peeling from the plastic substrate during laser annealing.

  Such heat treatment can be performed by leaving the plastic substrate in an oven where the temperature can be controlled.

The vacuum treatment is performed under conditions of 60 minutes or more within a range of 1 × 10 ⁻³ Pa or less and 1 × 10 ⁻⁵ Pa or more. By vacuum-treating the plastic substrate under these conditions, it is possible to prevent the TFT from peeling from the plastic substrate during the subsequent laser annealing. Note that the TFT may be peeled off from the plastic substrate outside the range of the above conditions. As in the case of heat treatment, the reason why peeling is prevented under these conditions is not clear, but the gas components and moisture contained in the plastic substrate are probably removed by high vacuum treatment, so that the heat during laser annealing is subsequently increased. Even if added, it is considered that peeling due to the influence of gas components and moisture contained in the plastic substrate does not occur with the TFT. If the vacuum treatment time is 60 minutes or more, the effect does not change so much, so the upper limit is not particularly limited, but forcibly, it can be about 48 hours.

In addition, preferable vacuum processing conditions are the conditions of 240 minutes or more within the range of 1 × 10 ⁻⁴ Pa or less and 1 × 10 ⁻⁵ Pa or more. Under these conditions, the TFT is peeled off from the plastic substrate during laser annealing. Can be remarkably prevented.

  Such vacuum treatment can be performed by always evacuating the plastic substrate with a pump and leaving it in a vacuum desiccator whose pressure is controlled.

Next, as shown in FIG. 2B, a non-doped amorphous silicon thin film 21a is formed on the heat-treated or vacuum-treated plastic substrate 11. The amorphous silicon thin film 21a can be formed by various methods such as an RF magnetron sputtering method and a CVD method. For example, when an amorphous silicon thin film is formed by RF magnetron sputtering, for example, the film thickness is 50 nm under the film formation conditions of film formation temperature: room temperature, film formation pressure: 1.0 Pa, and gas: argon. A film can be formed. In addition, when an amorphous silicon thin film is formed by the CVD method, the film can be formed at a film forming temperature of about 25 ° C. However, since SiH ₄ is used as a source gas, dehydrogenation at about 400 ° C. is performed after the film formation. Processing (about 1 hour in vacuum) is required. The above heat treatment or vacuum treatment for the plastic substrate is also effective against heat generated during the dehydrogenation treatment, and can prevent the plastic substrate 11 from being separated from the TFT.

Next, as shown in FIG. 2C, laser annealing 22 is performed to crystallize the amorphous silicon thin film 21a to change it to a low resistance polysilicon thin film 21p. The laser annealing 22 is a crystallization means for crystallizing the amorphous silicon thin film 21a into a polysilicon thin film 21p (polycrystalline silicon thin film), and is performed by various lasers such as an XeCl excimer laser, a CW (Continuous Wave) laser, or the like. Can do. For example, when crystallization is performed using a XeCl excimer laser, as an example, it can be performed under conditions of a pulse width: 30 nsec, an energy density: 400 mJ / cm ² , and room temperature. The above heat treatment or vacuum treatment for the plastic substrate is remarkably effective against the heat of laser annealing applied in this step, and the plastic substrate 11 and the TFT can be prevented from being peeled off.

Next, as shown in FIG. 2D, a resist film 23 is formed on the polysilicon thin film 21p, and then the resist film 23 is patterned. For the resist film 23, for example, a positive photoresist is preferably used. The resist film 23 is formed by applying and curing a resist on the entire surface by means of a spinner or the like. After patterning the resist film, ion implantation 24 is performed as shown in FIG. In the ion implantation 24, for example, phosphorus (P) is implanted at an implantation voltage of 10 keV and a room temperature at a doping level of 2 × 10 ¹⁵ / cm ² . By such ion implantation, a source-side diffusion film 13s and a drain-side diffusion film 13d are formed in the polysilicon thin film, and a semiconductor channel film 13c is formed between the films 13s and 13d.

Next, as shown in FIG. 2E, the formed source-side diffusion film 13s and drain-side diffusion film 13d are irradiated with an energy beam 25 to activate both films 13s and 13d. As the energy beam 25, the same XeCl excimer laser as described above can be used. For example, the energy beam 25 can be obtained under conditions of a pulse width: 30 nsec, an energy density: 250 mJ / cm ² , and room temperature. The above heat treatment or vacuum treatment for the plastic substrate is remarkably effective against the heat of the energy beam applied in this step, and can prevent the plastic substrate 11 from being separated from the TFT.

  In addition, after the above activation treatment, an oxygen plasma treatment for reducing the defects of the polysilicon thin film is usually performed. For example, the oxygen plasma treatment is performed under the conditions of RF 100 W, 1 Torr, and 150 ° C., and thereafter, the drying treatment is performed under the condition of 120 ° C.

Next, as shown in FIG. 3F, dry etching is performed to form islands. As the etching gas, SF ₆ or the like can be used.

Next, as shown in FIG. 3G, a gate insulating film 14 is formed on the entire surface including the source side diffusion film 13s, the semiconductor channel film 13c, and the drain side diffusion film 13d. The gate insulating film 14 is formed by using, for example, an RF magnetron sputtering apparatus and applying power to an 8-inch SiO ₂ target: 1.0 kW (= 3 W / cm ² ), pressure: 1.0 Pa, gas: argon + O ₂ ( 50%), a silicon oxide film having a thickness of about 100 nm was formed.

  Next, as shown in FIG. 3H, contact holes 26 and 26 are formed by selectively etching the gate insulating film 14 on the source side diffusion film 13s and the drain side diffusion film 13d using a mask. To do. As the etching at this time, for example, wet etching using a 2% HF solution can be applied.

  Next, as shown in FIG. 3I, an aluminum (Al) film having a thickness of, for example, 200 nm is deposited on the entire surface, and then patterned by wet etching to form a source electrode 15s, a drain electrode 15d, and a gate electrode 15g. To do. The electrode material may be Cu or other conductive material, and may be formed by other film forming processes such as sputtering.

  Finally, as shown in FIG. 3 (J), treatment with hydrogen plasma 27 is performed to terminate silicon defects in the polycrystalline polysilicon thin film. For example, a hydrogen plasma treatment can be used to eliminate the tangling bond on the silicon surface and eliminate the leak path at the interface between the polysilicon and the gate insulating film. Thus, the thin film transistor of one embodiment illustrated in FIG. 3J is manufactured.

  As described above, the heat treatment or vacuum treatment performed in the production process of the present invention is considered to act so as to remove gas components and moisture contained in the plastic substrate. However, it is considered that peeling based on the influence of gas components and moisture contained in the plastic substrate does not occur with the TFT. As a result, it is possible to prevent interfacial peeling that occurs during the manufacturing process, and to improve the manufacturing yield. The thin film transistor mounting panel manufactured in this way has a form in which TFTs are formed on a flexible plastic substrate. Therefore, a flexible display can be designed by combining with an organic EL element, for example.

  Hereinafter, the present invention will be described in more detail with reference to Examples and Comparative Examples. In addition, this invention is not limited to a following example.

Example 1
Polyether sulfone (PES) having a thickness of 0.2 mm and 50 mm × 50 mm was used as a plastic substrate, and the plastic substrate was put in an oven maintained in an air atmosphere and heat-treated at 120 ° C. for 20 minutes. Thereafter, amorphous silicon was formed to a thickness of 50 nm by RF magnetron sputtering (film formation temperature: room temperature, film formation pressure: 1.0 Pa (argon)).

After that, a TFT-mounted panel was manufactured based on the conditions exemplified in the description column of the steps in FIGS. 2C to 3J described above. In particular, in the crystallization process of FIG. 2C, laser annealing using a XeCl excimer laser was performed under the conditions of an energy density of 400 mJ / cm ² , a pulse width of 30 nsec, room temperature, and the number of irradiations of 20 times. In the ion implantation step of FIG. 2D, phosphorus was ion-implanted at an implantation voltage of 10 keV and a room temperature at a doping level of 2 × 10 ¹⁵ / cm ² . In the activation step of FIG. 2E, activation treatment was performed using a XeCl excimer laser under conditions of a pulse width of 30 nsec, an energy density of 250 mJ / cm ² , and room temperature. After the activation treatment, oxygen plasma treatment was performed under conditions of RF 100 W, 1 Torr, and 150 ° C. Subsequently, a TFT mounting panel was manufactured through an island formation process, a contact hole formation process, a wet etching process, and a hydrogen plasma treatment process.

( Reference Example 1 and Examples 2 and 3 )
A thin film transistor mounting panel was manufactured in the same manner as in Example 1 except that the plastic substrate or the heat treatment conditions were changed as shown in Table 1.

( Reference Example 2 )
Polyether sulfone (PES) with a thickness of 0.2 mm and a thickness of 0.2 mm is used as the plastic substrate. The plastic substrate is placed in a vacuum desiccator maintained in a vacuum atmosphere under the conditions of 1 × 10 ⁻⁴ Pa · 240 minutes. Vacuum processed. Thereafter, amorphous silicon was formed to a thickness of 50 nm by RF magnetron sputtering (film formation temperature: room temperature, film formation pressure: 1.0 Pa (argon)). Further, after that, a TFT-mounted panel was produced under the same conditions as in Example 1 based on the conditions exemplified in the description column of the steps of FIGS. 2C to 3J described above.

( Reference Examples 3-5 )
A thin film transistor mounting panel was manufactured in the same manner as in Reference Example 2 except that the plastic substrate or the vacuum processing conditions were changed as shown in Table 1.

(Comparative Examples 1-4)
A thin film transistor mounting panel was manufactured in the same manner as in Example 1 or Reference Example 2 except that the heat treatment conditions or vacuum treatment conditions were changed as shown in Table 1.

(Adhesion evaluation)
The effect of heat treatment conditions or vacuum treatment conditions was judged by evaluating the adhesion between the plastic substrate and polysilicon. Adhesion (peeling resistance) was determined by using a scotch mending tape (manufactured by Sumitomo 3M, length 30 m x width 12 mm) and attaching a part of the tape (length 30 mm) onto the fabricated TFT. It evaluated by the tape peeling test method which peels and evaluates the presence or absence of peeling. The adhesion results are shown in Table 1. In the evaluation of adhesion, ◎ indicates that no peeling or cracking has occurred, and ◯ indicates that there is little discoloration at the edge portion, etc. but there is no practical problem, and repeats the peeling test several times. Although the peeling occurred, the practically usable one was marked as Δ, and the element portion was peeled and difficult to use was marked as x. As can be seen from the results in Table 1, a preferable result is obtained for the heat treatment in a range of 90 ° C. or more and 200 ° C. or less for 10 minutes or more, and for the vacuum treatment, 1 × 10 ⁻³ Pa or less 1 × In the range of 10 ⁻⁵ Pa or higher, preferable results were obtained under conditions of 60 minutes or longer.

It is a schematic cross section which shows an example of the TFT element part of the thin film transistor mounting panel obtained with the manufacturing method of this invention. It is process explanatory drawing which shows the manufacturing method of the thin film transistor mounting panel of this invention. It is process explanatory drawing which shows the manufacturing method of the thin film transistor mounting panel of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 TFT element part 11 Plastic substrate 13 Polysilicon semiconductor thin film 13s Source side diffused film 13c Semiconductor channel film 13d Drain side diffused film 14 Gate insulating film 15s Source electrode 15g Gate electrode 15d Drain electrode 21a Amorphous silicon thin film 21p Polysilicon thin film 22 Laser annealing 23 Resist film 24 Ion implantation 25 Energy beam 26 Contact hole 27 Hydrogen plasma

Claims (1)

A step of heat-treating a plastic substrate made of polyethersulfone or polyethylene naphthalate , a step of forming an amorphous silicon thin film on the heat-treated plastic substrate by a sputtering method, and laser annealing the amorphous silicon thin film to form a polysilicon thin film Forming a gate insulating film on the entire surface, forming a gate insulating film on the entire surface, adding a impurity ion to a predetermined region of the polysilicon thin film and then thermally activating it by laser annealing A step of forming an electrode, a source electrode, and a drain electrode ;
The method for manufacturing a thin film transistor mounting panel, wherein the heat treatment is performed in an air atmosphere in a range of 110 ° C. to 150 ° C. for 10 minutes to 30 minutes .

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