JP4548892B2 - Method for manufacturing printed wiring board - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a printed wiring board in which front and back are electrically connected through a through-hole, upper and lower conductor circuits are insulated by an interlayer insulating layer, and both are connected by a via hole.
[0002]
[Prior art]
Conventionally, build-up multilayer printed wiring boards are disclosed in, for example, JP-A-9-130050, JP-A-9-153683, JP-A-9-172261, JP-A-9-246724, JP-A-10-135638, and the like. It is manufactured by the method.
That is, a through hole is drilled in the core substrate to form a through hole in the core substrate. Thereafter, an interlayer resin insulation layer is laminated on the substrate, and a via hole is formed in the interlayer resin insulation layer by exposure and development processing or by laser to form a circuit pattern. By repeating this, a build-up multilayer printed wiring board is obtained.
Here, the through holes and the via holes are aligned based on positioning marks formed on the core substrate, and are opened by different devices.
[0003]
[Problems to be solved by the invention]
However, since the formation of the through hole and the formation of the via hole are performed by different apparatuses and methods, an error occurs with respect to the positioning mark every time alignment is performed, and a positional deviation occurs between the through hole and the via hole. ing.
Furthermore, there is a problem that the positioning mark itself is displaced. This will be described with reference to FIG. As shown in FIG. 9A, a conductor circuit 343 and a positioning mark 345 are provided on the core substrate 330, and an interlayer resin insulating layer 340 is formed on the conductor circuit 343. First, the positioning mark 345 is photographed by the camera 80, aligned, and a through hole 346 for a through hole is drilled with a drill (not shown) (FIG. 9B). And after removing the resin residue which remained in the through-hole 346 by a desmear process, the annealing process is performed and the interlayer resin insulation layer 340 is hardened. At this time, as shown in FIG. 9C, the entire substrate 430 contracts due to thermal contraction, and the positioning mark 345 is shifted. Thereafter, even if the misaligned positioning mark 345 is imaged by the camera 80 and the via hole opening 348 is formed by the laser, the misalignment occurs with respect to the through hole for the through hole 346 and the conductor circuit 343 (FIG. 9). (C)). As a result, there is a problem that the via hole 360 is poorly connected to the conductor circuit 343 as shown in FIG. 9 (F2) or poorly connected as shown in FIG. 9 (F2). Here, FIG. 9F1 shows a state in which the via hole 360 can be properly connected to the conductor circuit 343. FIG.
[0004]
The present invention has been made in order to solve the above-described problems, and an object of the present invention is to propose a method of manufacturing a printed wiring board that does not cause misalignment between a through hole and a via hole. is there.
[0007]
[Means for Solving the Problems]
The method for producing a printed wiring board according to claim 1 is technically characterized by including at least the following steps (a) to (d):
(A) a step of forming an interlayer resin insulation layer on a core substrate on which a conductor circuit is formed avoiding a through hole for a through hole ;
(B) placing the core substrate on a processing table of a laser processing apparatus, and irradiating the interlayer resin insulating layer with a laser through a via hole forming mask to provide an opening for forming a via hole;
(C) Before and after the step (b), the through hole for the through hole is formed on the substrate through the through hole forming mask in a state of being placed on the processing table of the laser processing apparatus used in the step (b). Forming a step;
(D) A step of forming a conductive film in the through hole and the opening and applying a through hole and a via hole.
[0008]
According to the first aspect , an interlayer resin insulating layer is laminated on a core substrate made of an insulating resin on which a conductor circuit is formed, and then a via hole opening is formed by a laser. Further, the through hole for the through hole is formed by the same laser processing apparatus before and after the via hole opening forming step. In other words, since there is no need to perform alignment by using a separate apparatus and method in the through hole forming process and the via hole forming process, there is a positional error due to the apparatus and method in the through hole forming process and the via hole forming process. Does not occur. Further, since heat is not applied to the substrate between the through hole forming process and the via hole forming process, the positioning mark is not displaced due to the contraction or warping of the substrate, and the through hole and the via hole are formed in the substrate. Can be formed. Therefore, there is no positional shift between the through hole and the via hole, and it is possible to prevent the wiring from being disconnected or short-circuited.
[0009]
The method for manufacturing a printed wiring board according to claim 2 has at least the following steps (a) to (d) as technical features:
(A) forming an interlayer resin insulation layer on the core substrate on which the conductor circuit is formed;
(B) The core substrate is mounted on a processing table of a laser processing apparatus, and the interlayer resin insulating layer is irradiated with a laser through a via hole and a through hole forming mask to form a via hole forming opening and a through hole. Providing a forming opening;
(C) a step of irradiating the through-hole forming opening with a laser in a state of being placed on the processing table of the laser processing apparatus used in the step (b) to form a through-hole for the through-hole in the substrate;
(D) A step of forming a conductive film in the through hole and the opening and applying a through hole and a via hole.
[0010]
According to a second aspect of the present invention , an interlayer resin insulating layer is laminated on a core substrate made of an insulating resin on which a conductor circuit is formed, and then a via hole opening and a through hole forming opening are formed in the interlayer resin insulating layer with a laser. The through-hole through-hole is formed by irradiating the through-hole forming opening with a laser using the same laser processing apparatus. In other words, since there is no need to perform alignment by using a separate apparatus and method in the through hole forming process and the via hole forming process, there is a positional error due to the apparatus and method in the through hole forming process and the via hole forming process. Does not occur. Further, since heat is not applied to the substrate between the through hole forming process and the via hole forming process, the positioning mark is not displaced due to the contraction or warping of the substrate, and the through hole and the via hole are formed in the substrate. Can be formed. Further, since the via hole forming opening and the through hole forming opening are formed at the same time, when the through hole is subsequently formed in the through hole forming opening with a laser, the via hole opening and the through hole are formed. The positional deviation with respect to the through hole for use can be reduced. Therefore, it is possible to prevent unconnected wiring or short circuit.
[0011]
According to a third aspect of the present invention , the through hole has an opening diameter of 80 to 250 μm. If the thickness is less than 80 μm, it is difficult to form a conductor layer, and if it exceeds 250 μm, it is difficult to increase the density, and the superiority of laser processing over drilling is lost. A desirable range is 100 to 200 μm. This is because the laser aperture is stable.
[0012]
According to a fourth aspect of the present invention , the opening diameter of the via hole is set to 25 to 125 μm. If it is less than 25 μm, it becomes difficult to connect to the upper wiring, and if it exceeds 125 μm, it is difficult to increase the density. A desirable range is 50 to 100 μm. This is because the laser aperture is stable.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
First, the configuration of the printed wiring board according to the first embodiment of the present invention will be described with reference to FIG. 5 showing a sectional view.
[0014]
In the printed wiring board 10, build-up wiring layers 80 </ b> A and 80 </ b> B are formed on the front surface and the back surface of the core substrate 30. Build-up wiring layers 80A and 80B are composed of an interlayer resin insulation layer 40 in which conductor circuits 58 and via holes 60 are formed, and an interlayer resin insulation layer 140 in which conductor circuits 158 and via holes 160 are formed. The buildup wiring layer 80 </ b> A and the buildup wiring layer 80 </ b> B are connected through a through hole 62 formed in the core substrate 30. A solder resist layer 70 is formed on the interlayer resin insulating layer 140, and solder bumps 76U and 76D are formed in the conductor circuit 158 and the via hole 160 through the openings 71U and 71D of the solder resist 70, respectively. .
[0015]
Next, a laser processing apparatus for processing the through hole 62 and the via hole 60 of the printed wiring board will be described with reference to FIG.
The light emitted from the laser oscillator 181 enters the galvano head 170 through a transfer mask 182 for sharpening the focal point on the substrate. The galvano head 170 is composed of a pair of galvano mirrors, a galvano mirror 174X that scans laser light in the X direction and a galvano mirror 174Y that scans in the Y direction. It is driven by motors 172X and 172Y. The motors 172X and 172Y are configured to adjust the angles of the mirrors 174X and 174Y according to a control command from a control device (not shown) and to send a detection signal from a built-in encoder to the control device side. .
[0016]
The laser light is scanned in the XY direction via the galvanometer mirrors 174X and 174Y, passes through the f- 閘 lens 176, and passes through the mask 44 to the multi-core substrate 30 to open via holes and through holes. A through hole is formed. The multi-piece substrate 30 is placed on an XY table 90 that moves in the XY direction. The laser processing apparatus is provided with a camera 180 and images a positioning mark on the substrate 30 to perform alignment.
[0017]
Next, A.C. used in the method for manufacturing a printed wiring board according to the first embodiment of the present invention. A resin film for an interlayer resin insulation layer; The resin filler will be described.
[0018]
A. Preparation of resin film for interlayer resin insulation layer 30 parts by weight of bisphenol A type epoxy resin (epoxy equivalent 469, Epicoat 1001 manufactured by Yuka Shell Epoxy), cresol novolac type epoxy resin (epoxy equivalent 215, manufactured by Dainippon Ink and Chemicals, Inc.) N-673) 40 parts by weight, triazine structure-containing phenol novolac resin (phenolic hydroxyl group equivalent 120, Phenolite KA-7052 made by Dainippon Ink & Chemicals, Inc.), ethyl diglycol acetate 20 parts by weight, solvent naphtha 20 parts by weight The solution was dissolved by heating with stirring to 15 parts by weight, and 15 parts by weight of terminal epoxidized polybutadiene rubber (Danalex R-45EPT manufactured by Nagase Kasei Kogyo Co., Ltd.) and pulverized 2-phenyl-4,5-bis (hydroxymethyl) imidazole 1.5 Part by weight, fine Crushed silica, 2 parts by weight, was added 0.5 part by weight of silicon antifoaming agent to prepare an epoxy resin composition.
The obtained epoxy resin composition was applied on a PET film having a thickness of 38 μm using a roll coater so that the thickness after drying was 50 μm, and then dried at 80 to 120 ° C. for 10 minutes, whereby an interlayer resin was obtained. A resin film for an insulating layer is prepared.
[0019]
B. Preparation of resin filler 100 parts by weight of bisphenol F type epoxy monomer (manufactured by Yuka Shell Co., Ltd., molecular weight: 310, YL983U), average particle diameter coated with silane coupling agent on the surface is 1.6 μm, maximum particle diameter Is 15 μm or less of SiO ₂ spherical particles (manufactured by Adtech Co., CRS 1101-CE) 170 parts by weight and leveling agent (San Nopco Perenol S4) 1.5 parts by weight in a container, and the viscosity is 23 by mixing with stirring. A resin filler of 45 to 49 Pa · s is prepared at ± 1 ° C. As a curing agent, 6.5 parts by weight of an imidazole curing agent (manufactured by Shikoku Kasei Co., Ltd., 2E4MZ-CN) is used.
[0020]
Next, a method for manufacturing the printed wiring board described above with reference to FIG. 5 will be described with reference to FIGS.
[0021]
(1) The starting material is a copper clad laminate 30A in which 18 μm copper foil 32 is laminated on both surfaces of a substrate 30 made of glass epoxy resin or BT (bismaleimide triazine) resin having a thickness of 0.8 mm (FIG. 1). (See (A)). In addition, as the core board | substrate 30, what impregnated resin to core materials, such as a glass cloth, can be used, BT, FR-4, FR-5, a double-sided copper foil board, RCC, etc. can be used suitably. .
Next, this copper-clad laminate 30A is etched into a pattern to form lower layer conductor circuits 34 on both surfaces of the substrate 30 (see FIG. 1B).
[0022]
(2) The substrate 30 on which the lower conductor circuit 34 is formed is washed with water and dried, and then a roughened surface 34α is formed on the entire surface of the lower conductor circuit 34 with an etchant composed of a cupric complex and organic hydrochloric acid (FIG. 1). (See (C)). Instead, blackening treatment using an aqueous solution containing NaOH (10 g / l), NaClO ₂ (40 g / l), Na ₃ PO ₄ (6 g / l) as a blackening bath (oxidation bath), and NaOH (10 g / L), a roughening surface can be formed by performing a reduction treatment using an aqueous solution containing NaBH ₄ (6 g / l) as a reduction bath. Furthermore, a roughened surface can be formed by forming an electroless plating film made of an alloy of Cu—Ni—P.
[0023]
(3) A resin film for an interlayer resin insulation layer that is slightly larger than the substrate 30 produced in A above is placed on both sides of the substrate 30 on the substrate 30, and the pressure is 4 kgf / cm ² , the temperature is 80 ° C., and the pressure bonding time is 10 seconds. After the temporary pressure bonding under the above conditions and cutting, the interlayer resin insulating layer 40 is further formed by sticking using a vacuum laminator apparatus by the following method (see FIG. 1D). That is, the resin film for the interlayer resin insulation layer is subjected to main pressure bonding on the substrate 30 under the conditions of a vacuum degree of 0.5 Torr, a pressure of 4 kgf / cm ² , a temperature of 80 ° C., and a pressure bonding time of 60 seconds, and then heated at 170 ° C. for 30 minutes. Harden.
The interlayer resin insulation layer is formed by coating or film pressure bonding. The film is a thermosetting resin, a thermoplastic resin, or a composite thereof. Specific examples include an epoxy resin film, an olefin film, and an epoxy resin-phenoxy resin composite film. . Moreover, resin particles, inorganic particles, and the like may be blended in the aforementioned resin. Alternatively, a portion that is sparingly soluble in an acid or an oxidant and a portion that is soluble may be interspersed with each other (in this case, sparingly soluble and soluble are differences in dissolution rate by the same solution, Slow ones are sparingly soluble and conversely fast ones are called chemical solubility).
However, since the melting point of the interlayer resin insulating layer is 300 ° C. or lower, if the temperature exceeds 350 ° C., it melts and carbonizes.
[0024]
(4) Next, the core substrate 30 is placed on the XY table 90 of the laser processing apparatus described above with reference to FIG. 6, and a positioning mark (not shown) of the core substrate is imaged by the camera 180 to perform positioning. Then, a mask 44 having a thickness of 1.2 mm in which a through hole (diameter 1.0 mm) 44a is formed is placed on the interlayer resin insulating layer 40 of the core substrate 30 with the positioning mark as a reference. Thereafter, the laser beam is irradiated to the interlayer resin insulating layer 40 from a laser transmitter (CO ₂ gas laser with a wavelength of 10.4 μm) 181 under the conditions of a beam diameter of 4.0 mm, a single mode, a pulse width of 8.0 μsec, and one shot. A via hole opening 42 having a diameter of 80 μm is formed (see FIG. 2A). The opening diameter of the via hole opening 42 is preferably 50 to 100 μm. This is because if it is 50 μm or less, it is difficult to connect to the upper layer wiring, and if it is 100 μm or more, it is difficult to increase the density.
[0025]
(5) Next, with the core substrate 30 placed on the XY table 90 of the laser processing apparatus described above, the thickness in which the through hole (diameter 1.2 mm) 48a is formed with reference to the positioning mark of the core substrate. A mask 48 having a thickness of 1.2 mm is placed. Laser light is irradiated to the interlayer resin insulating layer 40 from a laser transmitter (CO ₂ gas laser with a wavelength of 10.4 μm) 181 under the conditions of a beam diameter of 4.0 mm, a single mode, a pulse width of 60.0 μsec, and 12 shots. A through hole for through hole 46 having a thickness of 120 μm is formed (see FIG. 2B). In addition, the opening diameter of the through hole 46 for through holes is desirably 100 to 200 μm. When the thickness is 100 μm or less, it is difficult to form a conductor layer, and when the thickness is 200 μm or more, it is difficult to increase the density, and the superiority of laser processing over drill processing is lost.
[0026]
In the manufacturing method of the present embodiment, the through-hole through hole 46 and the via hole are not aligned in the through-hole through-hole 46 forming step and the via-hole opening 42 forming step by separate apparatuses and methods. No positional error occurs with the opening 42 for use.
Further, since no heat is applied to the substrate between the step of forming the through hole for through hole 46 and the step of forming the opening for via hole 42, the positioning mark does not shift due to contraction or warpage of the substrate. A through hole for a through hole 46 and an opening for a via hole 42 can be formed. Accordingly, there is no positional deviation between the through hole and the via hole, and it becomes possible to prevent the wiring from being disconnected, poorly connected, or short-circuited.
[0027]
(6) Substrate 30 on which via hole opening 42 and through hole through hole 46 are formed is immersed in an 80 ° C. solution containing 60 g / l of permanganic acid for 10 minutes to be present on the surface of interlayer resin insulation layer 40. By dissolving and removing the epoxy resin particles to be formed, a roughened surface 40α is formed in the surface of the interlayer resin insulating layer 40 including the inner wall of the via hole opening 42 and in the through hole 46 for the through hole (FIG. 2C). reference).
[0028]
(7) Next, the substrate 30 after the above treatment is immersed in a neutralization solution (manufactured by Shipley Co., Ltd.) and then washed with water. Furthermore, by applying a palladium catalyst to the surface of the substrate 30 that has been roughened (roughening depth: 3 μm), the surface of the interlayer resin insulation layer 40, the inner wall surface of the via hole opening 42, and the through hole penetration Catalyst nuclei are deposited in the holes 46.
[0029]
(8) Next, the substrate 30 is immersed in an electroless copper plating aqueous solution having the following composition to form an electroless copper plating film 50 having a thickness of 0.6 to 3.0 μm over the entire roughened surface 40α ( (See FIG. 2D).
[Electroless plating aqueous solution]
NiSO ₄ 0.003 mol / l
Tartaric acid 0.200 mol / l
Copper sulfate 0.030 mol / l
HCHO 0.050 mol / l
NaOH 0.100 mol / l
α, α'-bipyridyl 40 mg / l
Polyethylene glycol (PEG) 0.10 g / l
[Electroless plating conditions]
40 minutes at a liquid temperature of 35 ° C
(9) A commercially available photosensitive dry film is affixed to the electroless copper plating film 50, a mask is placed, exposed at 100 mJ / cm ² , and developed with a 0.8% sodium carbonate aqueous solution, thereby increasing the thickness. A plating resist 52 having a thickness of 30 μm is provided (see FIG. 3A).
[0031]
(10) Next, the substrate 30 is washed and degreased with 50 ° C. water, washed with 25 ° C. water and further washed with sulfuric acid, and then subjected to electrolytic copper plating under the following conditions to obtain an electrolysis having a thickness of 20 μm. A copper plating film 54 is formed (see FIG. 3B).
(Electrolytic plating aqueous solution)
Sulfuric acid 2.24 mol / l
Copper sulfate 0.26 mol / l
Additive 19.5 ml / l
(Manufactured by Atotech Japan, Kaparaside HL)
[Electrolytic plating conditions]
Current density 1 A / dm ²
Time 65 minutes Temperature 22 ± 2 ℃
[0032]
(11) After stripping and removing the plating resist 52 with 5% NaOH, the electroless plating film 50 under the plating resist 52 is etched and removed with a mixed solution of sulfuric acid and hydrogen peroxide to remove the electroless copper plating film. The conductor circuit 58 (including the via hole 60) and the through hole 62 having a thickness of 18 μm are formed of the electrode 50 and the electrolytic copper plating film 54. Thereafter, the substrate 30 is washed with water, acid degreased, soft-etched, and then sprayed on both surfaces of the substrate 30 by spraying to etch the surface of the conductor circuit 58 and the surface of the land 62a of the through hole 62. Thus, the roughened surface 64β is formed on the entire surface of the conductor circuit 58 and the through hole 62 (see FIG. 3C).
As an etching solution, an etching solution (MEC Etch Bond, manufactured by MEC) comprising 10 parts by weight of imidazole copper (II) complex, 7 parts by weight of glycolic acid, and 5 parts by weight of potassium chloride is used.
[0033]
(12) After preparing the resin filler described in B above, a layer of the resin filler 66 is formed in the through hole 62 within 24 hours after preparation by the following method. That is, first, the resin filler 66 is pushed into the through hole 62 using a squeegee, and then dried under the condition of 100 ° C. for 20 minutes (see FIG. 3D).
[0034]
(13) After the steps (3) to (4) are repeated, the steps (6) to (11) are further repeated, so that the interlayer resin insulation layer 140 and the conductor circuit 158 (vias) are formed on the upper layer of the substrate. (Including the hole 160) is formed (see FIG. 4A).
[0035]
(14) Next, a photosensitizing agent obtained by acrylated 50% of an epoxy group of a cresol novolac type epoxy resin (manufactured by Nippon Kayaku Co., Ltd.) dissolved in diethylene glycol dimethyl ether (DMDG) to a concentration of 60% by weight. 46.67 parts by weight of oligomer (molecular weight: 4000), 15.0 parts by weight of 80% by weight of bisphenol A type epoxy resin (trade name: Epicoat 1001 manufactured by Yuka Shell Co., Ltd.) dissolved in methyl ethyl ketone, imidazole curing agent (Shikoku Kasei Co., Ltd., trade name: 2E4MZ-CN) 1.6 parts by weight, photofunctional monomer bifunctional acrylic monomer (Nippon Kayaku Co., Ltd., trade name: R604) 4.5 parts by weight, also polyvalent acrylic monomer ( Kyoei Chemical Co., Ltd., trade name: DPE6A) 1.5 parts by weight, dispersion antifoaming agent (San Nopco, S-65) Take 1 part by weight in a container, stir and mix to prepare a mixed composition. 2.0 parts by weight of benzophenone (manufactured by Kanto Chemical Co., Inc.) as a photopolymerization initiator for this mixed composition, as a photosensitizer By adding 0.2 part by weight of Michler's ketone (manufactured by Kanto Chemical Co., Inc.), a solder resist composition having a viscosity adjusted to 2.0 Pa · s at 25 ° C. is obtained.
Viscosity measurement was performed using a B-type viscometer (DVL-B type, manufactured by Tokyo Keiki Co., Ltd.). In the case of 4 or 6 rpm, the rotor No. 3 according.
[0036]
(15) Next, the solder resist composition is applied to both surfaces of the multilayer wiring board in a thickness of 20 μm, and after drying at 70 ° C. for 20 minutes and 70 ° C. for 30 minutes, the solder resist is applied. A photomask having a thickness of 5 mm on which the pattern of the opening is drawn is brought into close contact with the solder resist layer 70, exposed to 1000 mJ / cm ² of ultraviolet light, developed with a DMTG solution, and the openings 71U and 71D having a diameter of 200 μm are formed. Form. Further, the solder resist layer is cured by heat treatment under the conditions of 80 ° C. for 1 hour, 100 ° C. for 1 hour, 120 ° C. for 1 hour, and 150 ° C. for 3 hours, and the openings 71U and 71D are provided. Then, a solder resist layer 70 having a thickness of 20 μm is formed (see FIG. 4B). A commercially available solder resist composition can also be used as the solder resist composition.
[0037]
(16) Next, the substrate on which the solder resist layer 70 is formed is made of nickel chloride (2.3 × 10 ⁻¹ mol / l), sodium hypophosphite (2.8 × 10 ⁻¹ mol / l), A nickel plating layer 72 having a thickness of 5 μm is formed in the openings 71U and 71D by dipping in an electroless nickel plating solution containing sodium acid (1.6 × 10 ⁻¹ mol / l) at pH = 4.5 for 20 minutes. To do. Furthermore, the substrate gold potassium cyanide ^{(7.6 × 10 -3 mol / l} ), ammonium chloride ^{(1.9 × 10 -1 mol / l} ), sodium citrate (1.2 × 10 ^-1 mol / l) Immersion in an electroless gold plating solution containing sodium hypophosphite (1.7 × 10 ⁻¹ mol / l) at 80 ° C. for 7.5 minutes to form a thickness on the nickel plating layer 72 A 0.03 μm gold plating layer 74 is formed (see FIG. 4C).
[0038]
(17) After that, a solder paste containing tin-lead is printed on the opening 71U of the solder resist 70 on the surface on which the IC chip of the substrate is placed, and tin-antimony is further formed on the opening 71D on the other surface. A solder paste containing is printed. Thereafter, the solder bumps 76U and 76D are formed by reflowing at 200 ° C. to complete the printed wiring board 10 (see FIG. 5).
[0039]
(Second Embodiment)
The printed wiring board of the second embodiment is substantially the same as that of the first embodiment. However, in the second embodiment, when the via hole opening 42 is formed in the interlayer resin insulating layer 40, the through hole forming opening 45 is also formed at the same time. By forming an opening 45 for forming a through hole in the interlayer resin insulating layer 40 in advance, the through hole 46 for through hole is formed by directly irradiating the core substrate 30 with a laser.
In the manufacturing process of the second embodiment, the processes from (1) to (3) are the same as those of the first embodiment. (4) The process and subsequent steps will be described with reference to FIG.
[0040]
(4) As in the first embodiment, the core substrate 30 is placed on the XY table 90 of the laser processing apparatus, and a positioning mark (not shown) of the core substrate is imaged by the camera 180 and positioned. Then, a mask 44 having a thickness of 1.2 mm in which a through hole (diameter 1.0 mm) 44a is formed is placed on the interlayer resin insulating layer 40 of the core substrate 30 with the positioning mark as a reference. Thereafter, a via hole having a diameter of 80 μm is formed in the interlayer resin insulating layer 40 from a laser transmitter (CO ₂ gas laser having a wavelength of 10.4 μm) 181 under the conditions of a beam diameter of 4.0 mm, a single mode, a pulse width of 8.0 μsec, and one shot. The opening 42 for use and the opening 45 for forming a through hole are formed (see FIG. 7A).
[0041]
(5) Next, with the core substrate 30 placed on the XY table 90 of the laser processing apparatus described above, the mask 44 described above is removed and a beam is emitted from the laser transmitter (CO ₂ gas laser with a wavelength of 10.4 μm) 181. Laser light is applied to the through-hole forming opening 45 of the interlayer resin insulating layer 40 under conditions of a diameter of 4.0 mm, a single mode, a pulse width of 60.0 μsec, and 12 shots. It is formed (see FIG. 7B). Since the subsequent manufacturing steps are the same as (6) to (17) of the first embodiment, description thereof will be omitted.
[0042]
In the second embodiment, the via hole forming opening 42 and the through hole forming opening 45 are simultaneously formed using the mask 44. Therefore, after that, when the through hole 46 is formed in the through hole forming opening 45 with a laser, the positional deviation between the via hole opening 42 and the through hole through hole 45 is made smaller than that in the first embodiment. be able to.
[0043]
(Third embodiment)
The printed wiring board of the third embodiment is substantially the same as that of the first embodiment. However, in the third embodiment, an olefin resin film is used for the interlayer resin insulation layer 40 instead of the epoxy resin film. In order to use the olefin film, in the third embodiment, the condition of the CO ₂ gas laser when providing the via hole opening is set to a pulse width of 15.0 μsec and 5 shots.
[0044]
(Fourth embodiment)
The printed wiring board of the fourth embodiment is substantially the same as that of the second embodiment. However, in 4th Embodiment, the olefin resin film was used for the interlayer resin insulation layer instead of the epoxy resin film. In order to use the olefin film, in the fourth embodiment, the condition of the CO ₂ gas laser when providing the opening for the via hole is set to a pulse width of 15.0 μsec and 5 shots.
[0045]
(Fifth embodiment)
The printed wiring board of the fifth embodiment is substantially the same as that of the first embodiment. However, in 5th Embodiment, the resin composite film of the epoxy resin-phenoxy resin was used for the interlayer resin insulation layer instead of the epoxy resin film. In the fifth embodiment, an excimer laser is used as a laser, and 150 shots are irradiated at a frequency of 200 Hz and energy of 1.0 J, thereby forming a via hole having a very small diameter of 25 μm.
[0046]
(Sixth embodiment)
The printed wiring board of the sixth embodiment is almost the same as that of the second embodiment. In the sixth embodiment, however, an epoxy resin-phenoxy resin composite resin film is used for the interlayer resin insulation layer instead of the epoxy resin film. In the sixth embodiment, an excimer laser is used as a laser, and 150 shots are irradiated at a frequency of 200 Hz and an energy of 1.0 J, thereby forming a via hole having a very small diameter of 25 μm.
[0047]
(Seventh embodiment)
FIG. 8 is a cross-sectional view of a printed wiring board according to the seventh embodiment of the present invention. The printed wiring board of the seventh embodiment is almost the same as that of the first embodiment. However, in the seventh embodiment, the cover plating 161 is formed on the top of the through hole 62, and the via hole 160 is formed directly above the through hole 62 through the cover plating 161. Also in the seventh embodiment, similarly to the first embodiment, the laser processing of the via hole 60 of the interlayer resin insulating layer 40 and the laser processing of the through hole 62 are performed in the same process.
[0048]
【The invention's effect】
In the present invention, as described above, the through hole and the via hole are formed using the same laser processing apparatus. That is, since there is no need to perform alignment in the through-hole forming step and the via-hole forming step using different apparatuses and methods, no positional error occurs between the through-hole forming step and the via-hole forming step. Further, since heat is not applied to the substrate between the through hole forming process and the via hole forming process, the positioning mark is not displaced due to the contraction or warping of the substrate, and the through hole and the via hole are formed in the substrate. Can be formed. Accordingly, there is no positional deviation between the through hole and the via hole, and it is possible to prevent the wiring from being disconnected, poorly connected, or short-circuited. Further, damage and deterioration due to the laser to the interlayer resin insulating layer are reduced, and the adhesion of the wiring which is the upper conductive layer can be improved.
[Brief description of the drawings]
FIGS. 1A, 1B, 1C and 1D are manufacturing process diagrams of a printed wiring board according to a first embodiment of the present invention.
FIGS. 2A, 2B, 2C, and 2D are manufacturing process diagrams of the printed wiring board according to the first embodiment of the present invention. FIGS.
FIGS. 3A, 3B, 3C, and 3D are manufacturing process diagrams of the printed wiring board according to the first embodiment of the present invention. FIGS.
4A, 4B, and 4C are manufacturing process diagrams of the printed wiring board according to the first embodiment of the present invention.
FIG. 5 is a cross-sectional view of the printed wiring board according to the first embodiment of the present invention.
FIG. 6 is an explanatory diagram of a laser processing apparatus used for through-hole and via-hole processing.
7A and 7B are manufacturing process diagrams of a printed wiring board according to a second embodiment of the present invention.
FIG. 8 is a cross-sectional view of a printed wiring board according to a seventh embodiment of the present invention.
9 (A), (B), (C), and (D) are manufacturing process diagrams of a conventional printed wiring board, and (F1), (F2), and (F3) are via holes. It is explanatory drawing of the connection state of a conductor circuit.
[Explanation of symbols]
30 Core substrate 34 Lower layer conductor circuit 40 Interlayer resin insulation layer 42 Via hole opening 45 Through hole forming opening 46 Through hole through hole 50 Electroless plating film 54 Electrolytic plating film 58 Conductor circuit 60 Via hole 62 Through hole 66 Resin Filler 70 Solder resist layer 71U, 71D Opening 72 Nickel plating layer 74 Gold plating layer 76U, 76D Solder bump 80A, 80B Build-up wiring layer 144 Interlayer resin insulation layer 158 Conductor circuit 160 Via hole

Claims (5)

A method for producing a printed wiring board comprising at least the following steps (a) to (d):
(A) a step of forming an interlayer resin insulating layer on a core substrate on which a conductor circuit is formed avoiding a through hole for a through hole ;
(B) placing the core substrate on a processing table of a laser processing apparatus, and irradiating the interlayer resin insulating layer with a laser through a via hole forming mask to provide an opening for forming a via hole;
(C) Before and after the step (b), a through-hole for a through hole is formed on a substrate through a through-hole forming mask in a state of being placed on a processing table of a laser processing apparatus used in the step (b). Forming a step;
(D) A step of forming a conductive film in the through hole and the opening and providing a through hole and a via hole. A method for producing a printed wiring board comprising at least the following steps (a) to (d):
(A) forming an interlayer resin insulation layer on the core substrate on which the conductor circuit is formed;
(B) The core substrate is placed on a processing table of a laser processing apparatus, and the interlayer resin insulating layer is irradiated with a laser through a via hole and a through hole forming mask to form an opening and a through hole for forming the via hole. Providing a forming opening;
(C) a step of irradiating the through-hole forming opening with a laser in a state of being placed on the processing table of the laser processing apparatus used in the step (b) to form a through-hole for a through-hole in the substrate;
(D) A step of forming a conductive film in the through hole and the opening and providing a through hole and a via hole. The method for manufacturing a printed wiring board according to claim 1 or 2 , wherein an opening diameter of the through hole is 80 to 250 µm.   The method for manufacturing a printed wiring board according to any one of claims 1 to 3, wherein an opening diameter of the via hole is 25 to 125 µm. The interlayer resin insulation layer contains resin particles,
Before the conductive film is formed in the through hole and the opening, the method includes a step of dissolving the resin particles on the surface of the interlayer resin insulation layer to form a roughened surface on the surface of the interlayer resin insulation layer and the through hole. The manufacturing method of the printed wiring board of Claim 1 or Claim 2.

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