JP4560358B2 - Information signal transmission device - Google Patents

Description

The present invention relates to an information signal transmission apparatus for transmitting a signal from a transmitter to a receiver.

    Conventionally, an information signal transmission device that transmits an information signal from a transmitter to a receiver has been proposed (see, for example, Patent Document 1).

    FIG. 7 is a block diagram showing an example of the configuration of a conventional information signal transmission apparatus. Reference numeral 100 in the figure denotes a transmitter that transmits an information signal, and reference numeral 110 denotes a receiver that receives an information signal from the transmitter 100. Reference numeral 101 denotes an AD converter that is arranged on the transmitter 100 side and converts an information signal from an analog format to a digital format. Reference numeral 102 denotes an AD converter that is arranged on the transmitter 100 side. Reference numeral 101 denotes an oscillator that supplies a clock signal (hereinafter referred to as “transmitter-side oscillator”). Further, reference numeral 111 denotes a DA conversion unit arranged on the receiver 110 side for converting the transmitted information signal from a digital format to an analog format, and reference numeral 112 denotes an arrangement on the receiver 110 side. An oscillator that supplies a clock signal to the DA converter 111 (hereinafter referred to as “receiver-side oscillator”) is shown.

    In such an information signal transmission device, the oscillators 102 and 112 are arranged on the transmitter side and the receiver side as described above. However, the analog signal input to the transmitter 100 is transmitted to the receiver 110 side. Therefore, the sampling frequency of the AD conversion unit 101 and the sampling frequency of the DA conversion unit 111 need to be the same (necessary to exactly match without including an error). Therefore, the transmitter-side oscillator 102 and the receiver-side oscillator 112 are of the same standard.

JP 2002-171176 A

    However, as described above, even if the transmitter-side oscillator 102 and the receiver-side oscillator 112 try to generate clock signals of the same frequency using the same standard, there is an individual difference in the oscillator itself. There may be cases where the frequencies of the clock signals do not exactly match. For example, the frequency of the clock signal output from the transmitter-side oscillator 102 is 10.1 MHz, and the frequency of the clock signal output from the receiver-side oscillator 112 is 9.9 MHz. In such a case, the sampling frequency obtained from each clock signal also does not exactly match, and the digital signal transmitted to the receiver side cannot be synchronized with the DA converter 111, so that the analog signal is accurate. There was a problem that it could not be restored.

The present invention aims to provide an information signal transmission device capable of accurately restoring the transmitted signal.

The invention according to claim 1 is illustrated in FIG. 1 and is an information signal transmission device for transmitting a left audio signal (SLD) and a right audio signal (SRD) from a transmitter (2) to a receiver (3). In (1),
A clock signal generator (21) for generating a clock signal;
An analog left audio signal (SLA) and right audio signal (SRA) are arranged in the transmitter (2) based on the clock signal from the clock signal generator, and are converted into 16-bit digital signals (SLD, A / D conversion unit (20 ) that respectively converts to SRD) ,
A parallel connected to the AD converter (20) to convert the digital left audio signal (SLD) and right audio signal (SRD) converted by the AD converter (20) into a serial signal (SD). / Serial converter (23),
The serial signal (SD) arranged in the transmitter (2) and converted by the parallel / serial converter (23) is converted to a frequency of 1.4 MHz or more supplied from the clock signal generator (21). A modulation unit (22) that performs frequency modulation based on a clock signal (CP);
A clock signal reproduction unit (31) disposed in the receiver (3) for reproducing a clock signal (CPRB) from the signal (SDM) that has been frequency-modulated and transmitted;
A demodulator (32) disposed in the receiver (3) for demodulating the frequency-modulated signal (SDM) into a signal before being frequency-modulated;
A serial / parallel converter (33) disposed in the receiver (3) for converting the transmitted serial signal into a parallel signal;
The parallel signal arranged in the receiver (3) and converted by the serial / parallel converter (33) is analog based on the clock signal (CPRB) regenerated by the clock signal regenerator (31). And a DA converter (30) for re-converting the signal into the signal.

The invention according to claim 2 is the invention according to claim 1, wherein the clock signal generator (21) is arranged in the transmitter (2),
Between the transmitter (2) and the receiver (3), a cable (4) for transmitting a clock signal (CP) from the clock signal generator (21) to the DA converter (30) Is intervened,
The frequency of the clock signal (CP) when transmitted through the cable (4) is 10 MHz or less.

According to a third aspect of the present invention, in the first or second aspect of the present invention, the receiver (3) has a frequency for multiplying the frequency of the clock signal (CPRB) supplied to the DA converter (30). A multiplier is provided.

According to a fourth aspect of the present invention, in the second or third aspect of the present invention, as illustrated in FIGS. 1 and 4, the video signal (R, G) is transmitted from the transmitter (2) to the receiver (3). , B) are transmitted,
An attenuation level detector (356, 359) for detecting an attenuation level attenuated when the audio signal is transmitted from the transmitter (2) to the receiver (3);
Based on the degree of attenuation detected by the attenuation level detection unit (356, 359), a video signal restoration unit (R, G, B) that restores the video signal (R, G, B) that has been attenuated as a result of transmission is restored to the state before attenuation. 350, 351),

    The numbers in parentheses are for the sake of convenience indicating the corresponding elements in the drawings, and therefore the present description is not limited to the descriptions on the drawings.

According to the first aspect of the present invention, the clock signal is supplied to the AD converter and the DA converter from the same clock signal generator, not from different clock signal generators. Therefore, these AD converter and DA converter can convert the signal format at the same sampling frequency (that is, conversion from analog format to digital format, or vice versa), and as a result, transmission The analog signal input to the receiver side can be accurately restored on the receiver side. Further, the number of clock signal generators can be reduced by the amount that the clock signal generator can be shared, and the structure of the apparatus can be simplified.

According to the first aspect of the invention, the transmitter side performs frequency modulation based on the clock signal, and the receiver side is configured to regenerate the clock signal from the transmitted signal. For this reason, the audio signal and the clock signal can be transmitted through the same path, and the number of signal lines can be reduced.

According to the invention of claim 2 , since the frequency of the clock signal when transmitted through the cable is 10 MHz or less, the attenuation of the clock signal can be reduced.

According to the invention of claim 3 , since the frequency multiplier is provided on the receiver side, it is not necessary to transmit the clock signal to the receiver at a high frequency, and the clock signal at a low frequency is eliminated. Therefore, the attenuation of the clock signal can be reduced.

According to the fourth aspect of the present invention, even if the transmitter and the receiver are separated from each other, a high-quality video can be reproduced.

    Hereinafter, the best mode for carrying out the present invention will be described with reference to FIGS. 1 and 6.

    FIG. 1 is a block diagram showing an example of the structure of an information signal transmission apparatus according to the present invention, and FIG. 6 is a block diagram showing the structure of an attenuation compensation unit.

    The information signal transmission apparatus according to the present invention includes a transmitter 2 and a receiver 3 as indicated by reference numeral 1 in FIG. 1, and at least one information signal S is transmitted from the transmitter 2 to the receiver 3. To be transmitted. Here, the information signal is a concept excluding a clock signal and means a signal for transmitting information such as audio and video. In addition, since it is “at least one type”, for example, only an audio signal may be transmitted, or two or more information signals such as an audio signal and a video signal may be transmitted. May be.

By the way, the AD converter 20 is arranged in the transmitter 2, and the DA converter 30 is arranged in the receiver 3, and the AD converter 20 transmits the signal to the receiver 3. At least one type of information signal S is converted from analog formats S _LA and S _RA to digital formats S _LD and S _RD , and the DA converter 30 is converted into a digital format by the AD converter 20 and transmitted. The information signals S _LD and S _RD are reconverted into analog formats S _LA and S _RA . In this apparatus, “at least one type of information signal” needs to be AD-converted and DA-converted. Therefore, when there is only one type of information signal transmitted from the transmitter 2 to the receiver 3, the information signal must be AD-converted and DA-converted. When there are two or more types of information signals to be transmitted, it is sufficient that at least one type of information signal is AD-converted and DA-converted, and it is not necessary for all information signals to be AD-converted and DA-converted.

Furthermore, the information signal transmission device 1 according to the present invention includes a clock signal generation unit (see reference numeral 21 in FIG. 1) for generating the clock signal CP, and the clock signal generation unit includes the AD conversion unit 20. and both the clock signal CP of the DA conversion unit 30 is configured to supply the _{CP RB.} In the case of the conventional apparatus shown in FIG. 7, the clock signals are supplied to the AD converter 101 and the DA converter 111 from different oscillators 102 and 112 (corresponding to the clock signal generator of the present invention). Therefore, even if the same standard oscillator is used, the clock signal frequency does not exactly match due to the individual difference of the oscillator itself, and the analog signal input to the transmitter side is not accurately restored on the receiver side There was a case. On the other hand, according to the present invention, the clock signals CP and _CPRB are supplied to the AD converter 20 and the DA converter 30 from the same clock signal generator. The AD converter 20 and DA converter 30 can convert the signal format at the same sampling frequency (same matching sampling frequency) (that is, conversion from analog format to digital format, or vice versa). It becomes. As a result, the analog signal input to the transmitter side can be accurately restored on the receiver side. Further, the number of clock signal generators can be reduced by sharing the clock signal generator, and the structure of the apparatus can be simplified.

In the present invention,
Supplying a clock signal from a common clock signal generator to both the AD converter 20 and the DA converter 30;
as well as,
It is essential that the AD conversion unit 20 and the DA conversion unit 30 convert the signal format at the same sampling frequency, but the frequency of the clock signal at the time of input to the AD conversion unit 20, The frequency of the clock signal at the time of input to the DA converter 30 is not necessarily the same. This is because even if the frequencies are different, the sampling frequency can be made the same if appropriate frequency division is performed on either or both of the AD converter 20 and the DA converter 30.

By the way, in FIG. 1, the position where the clock signal generator is arranged is
(a) Inside the transmitter 2, but not limited to this,
(b) Even inside the receiver 3,
(c) It may be outside the transmitter 2 and the receiver 3. The transmission path of the clock signal naturally depends on the arrangement position of the clock signal generator,
In the case of (a), transmission from the transmitter 2 to the receiver 3 is sufficient.
In the case of (b), it is sufficient to transmit at least from the receiver 3 to the transmitter 2,
In the case of (c), the signal may be transmitted from the clock signal generator to both the transmitter 2 and the receiver 3. The method (a) is preferable to the methods (b) and (c) in that the number of clock signal transmission paths can be reduced and the circuit configuration is simplified.

    Note that the present invention can be applied regardless of whether the distance between the transmitter 2 and the receiver 3 is short or long. The transmitter 2 and the receiver 3 are preferably connected by a cable (see reference numeral 4) so that the transmission of the information signals S, R, G, B and the clock signal CP is performed via the cable. As this cable, a twisted pair cable used for wiring such as a LAN may be used. By the way, in the information signal transmission apparatus 1 shown in FIG. 1, the information signals S, R, G, and B are transmitted only in the direction from the transmitter 2 to the receiver 3, but in the opposite direction (that is, from the receiver 3). It may also be transmitted in the direction of the transmitter 2).

In the case of (a), it is necessary to transmit both the information signal such as the sound and the clock signal from the transmitter 2 to the receiver 3 as the method.
(a-1) a method of sending an information signal (for example, an audio signal S) and a clock signal CP through different transmission paths;
(a-2) A method of sending an information signal (for example, an audio signal S) and a clock signal CP through the same transmission path can be considered. In the case of the method (a-2), the number of transmission paths (signal lines) can be reduced compared to the case of the method (a-1).

by the way,
In the case of (a), it is necessary to transmit a clock signal from the transmitter 2 to the receiver 3.
In the case of (b), it is necessary to transmit a clock signal from the receiver 3 to the transmitter 2.
In the case of (c), it is necessary to transmit a clock signal from the clock signal generator to both the transmitter 2 and the receiver 3.
However, when such a clock signal is transmitted by a cable and the transmission distance of the clock signal is long, the frequency of the clock signal when transmitted through the cable is set to 10 MHz or less, It is preferable to reduce the degree of attenuation of the clock signal. In the apparatus shown in FIG. 1, a clock signal generator (see reference numeral 21) is disposed in the transmitter 2, and a cable 4 is interposed between the transmitter 2 and the receiver 3, and the clock signal generator The clock signal CP is transmitted from the unit 21 to the DA converter 30 via the cable 4 (whether or not the clock signal is transmitted through the same path as the information signal). The frequency of the clock signal CP when transmitted through the cable 4 is preferably 10 MHz or less.

Examples of the clock signal generator include those using a crystal oscillator and a VCO (Voltage Controlled Oscillator). Such a clock signal from the clock signal generator may be divided by the AD converter 20 or the DA converter 30. For example, when a crystal oscillator that generates a clock signal in the order of MHz is used for the clock signal generator, the AD converter 20 and the DA converter 30 divide the frequency by several tens of kHz (for example, 44.1 kHz). ) Sampling frequency. In order to prevent the clock signal from being attenuated, when a clock signal is transmitted to the transmitter 2 or the receiver 3 at a low frequency as described above, a frequency multiplier (not shown) configured by a PLL circuit or the like is used. It is preferable to arrange in the transmitter 2 or the receiver 3 so that the clock signal can be multiplied to generate a high-frequency clock signal. For example, when transmitting the clock signal CP from the transmitter 2 to the receiver 3, a frequency multiplier (not shown) is provided on the receiver 3 side and supplied to the DA converter 30. the frequency of the clock signal CP _RB good idea so as to be multiplied. The AD converter 20 and the DA converter 30 may be input with clock signals having the same frequency (eg, 11.3 MHz). In this way, if a frequency multiplier is provided at the destination of transmitting the clock signal, it is not necessary to transmit the clock signal at a high frequency, and the clock signal can be transmitted at a low frequency. The degree of attenuation can be reduced.

    Here, it supplements about the system (a-2) (that is, system which sends an information signal and a clock signal with the same transmission path).

In order to achieve the method (a-2), the transmitter 2 is provided with a modulation unit 22 that performs frequency modulation on the signal converted into a digital format by the AD conversion unit 20 based on the clock signal CP.
A clock signal reproduction unit 31 that reproduces the clock signal CP _RB from the signal S _DM that has been frequency-modulated and transmitted;
A demodulator 32 that demodulates the signal S _DM transmitted by frequency modulation into a signal before frequency modulation;
May be arranged in the receiver 3. In such a configuration, the DA converter 30 converts the signal demodulated by the demodulator 32 into an analog format. This clock signal DA conversion unit 30 is used for converting the signal supplied by said clock signal generating section 21, may be used a signal CP _RB reproduced by the clock recovery unit 31. In this case, frequency modulation based on the clock signal is performed on the transmitter side, and the clock signal _CPRB is reproduced from the transmitted signal on the receiver side, so that the information signal and the clock signal are transmitted on the same path. And the number of signal lines can be reduced.

By the way, a parallel / serial conversion unit 23 that converts a parallel signal into a serial signal is connected to the AD conversion unit 20, and a serial / parallel conversion unit 33 that converts a serial signal into a parallel signal is connected to the DA conversion unit 30. The signal transmission from the transmitter 2 to the receiver 3 is preferably performed in a serial signal state. For example, when stereo audio data is transmitted as an information signal, the analog left audio signal _SLA and the right audio signal _SRA are converted into digital signals S _LD and S _RD by the AD converter 20, respectively. The left audio signal S _LD and the right audio signal S _RD in the digital format are converted into a serial signal _SD by the parallel / serial converter 23, and the serial signal _SD is frequency-modulated by the modulator 22 as described above. Then, the frequency-modulated serial signal S _DM is transmitted, and the transmitted serial signal is preferably converted into parallel signals S _LD and S _RD by the serial / parallel converter 33.

When frequency modulation is performed based on the clock signal as described above, the frequency of the clock signal depends on the data amount of the information signal to be transmitted. For example, when stereo audio data is transmitted as an information signal as described above and the frequency modulation is performed based on the clock signal CP, the bits of the left audio signal S _LD and the right audio signal S _RD in the digital format are used. When the number is A (bit) and the sampling frequency in the AD converter 20 is B (kHz), the frequency of the clock signal used for frequency modulation is
(Formula 1)
2 * A * B (kHz)
It is good to make it. For example, when the left and right audio signals are each converted to a 16-bit digital signal and the sampling frequency in the AD converter 20 is set to 44.1 kHz, the frequency of the clock signal used for frequency modulation is 1.4 MHz based on the following equation: It is good to do it above. Thereby, the voice can be transmitted with high quality.
(Formula 2)
2 * 16 * 44.1kHz ≒ 1.4MHz

    As with the clock signal CP described above, the information signals S, R, G, and B are also attenuated in the process of transmission. However, the information signal is detected by detecting the degree of attenuation (the degree of attenuation, for example, the attenuation rate). Based on the detected degree of attenuation, it is preferable to restore the state before attenuation. Note that the degree of attenuation of the information signal varies depending on the material and thickness and length of the signal line through which the information signal is transmitted, and the frequency of the signal, but the type of the information signal (for example, whether it is an audio signal, It does not depend much on the difference in video signal). Therefore, when transmitting a plurality of types of information signals, the degree of attenuation is detected with respect to any one information signal (for example, an audio signal), and other types of information signals (for example, video signals) are detected based on the degree of attenuation. ) May be restored. When restoring such an information signal, not only the degree of attenuation but also the difference in the material, thickness, and length of the signal line (that is, the material, thickness, and length of the signal line on which the information signal for detecting the degree of attenuation is transmitted) However, it is necessary to consider the difference in the material, thickness, and length of the signal line on which the information signal to be restored is transmitted, which is the signal on which the information signal for detecting the degree of attenuation is transmitted. If the line material, thickness, and length are the same as the signal line material, thickness, and length of the signal to be restored, the degree of attenuation of the information signal depends only on the frequency, If the frequencies are the same, the degree of attenuation of one information signal is equal to the degree of attenuation of the other information signal, and the information signal can be accurately restored using such a relationship. The degree of attenuation may be detected for one or a plurality of frequencies, and the information signal may be restored for each frequency component.

    For example, when the information signal transmitted from the transmitter 2 to the receiver 3 is an audio signal S and video signals R, G, B, the audio signal S is frequency-modulated by the modulator 22 and the audio signal Attenuation degree detection units (for example, a low-frequency gain adjustment unit 356 and a high-frequency gain adjustment unit 359 shown in FIG. 6) are used to determine the degree of attenuation attenuated as the signal S is transmitted from the transmitter 2 to the receiver 3. And the image attenuated as a result of transmission based on the degree of attenuation detected by the attenuation level detection unit (for example, the low frequency gain adjustment unit 356 and the high frequency gain adjustment unit 359 shown in FIG. 6). The signals R, G, and B may be restored to the state before attenuation by the video signal restoration unit (for example, the low-frequency video compensation unit 350 and the high-frequency video compensation unit 351 shown in FIG. 6). In such a case, even if the transmitter 2 and the receiver 3 are separated from each other, a high-quality video can be reproduced. In this case, the audio signal need not be restored to the state before attenuation.

An information signal transmission method according to the present invention is a method of transmitting at least one type of information signal S from the transmitter 2 to the receiver 3,
At the transmitter 2 side, converting at least one information signal S from analog formats S _LA , S _RA to digital formats S _LD , S _RD ;
Transmitting the information signal converted into the digital format to the receiver 3;
Re-converting the information signals S _LD and S _RD converted to the digital format into the analog formats S _LA and S _RA on the receiver 3 side;
It has. The step of converting the information signal S into digital formats S _LD and S _RD and the step of converting the information signals S _LD and S _RD into analog formats S _LA and S _RA are the same clock signal generator. clock signal CP generated by (reference numeral 21 in FIG. 1), by utilizing the CP _RB, carried out at the same sampling frequency, which is way. According to the present invention, an analog signal input to the transmitter side can be accurately restored on the receiver side. Further, the number of clock signal generators can be reduced by sharing the clock signal generator, and the structure of the apparatus can be simplified.

In addition,
On the transmitter 2 side, the signals S _LD and S _RD converted into the digital format are frequency-modulated based on the clock signal CP and transmitted,
Regenerating the clock signal CP _RB from the signal S _DM which has been frequency modulated and transmitted to the receiver 3;
Demodulating the signal S _DM frequency-modulated and transmitted to the receiver into a signal _SD before frequency modulation;
The provided signal is reconverted into the analog form, said a demodulated signal S _D, a clock signal used for reconversion to the analog form, as is the recovered clock signal CP _RB Good.

    Next, an embodiment according to the present invention will be described with reference to FIGS. Here, FIG. 1 is a block diagram showing an example of the structure of the information signal transmission apparatus according to the present invention, and FIG. 2 is a block diagram showing an example of the usage state of the information signal transmission apparatus according to the present invention. 3A is a waveform diagram illustrating an example of an input signal to the modulation unit, and FIG. 3B is a waveform diagram illustrating an example of an output signal from the modulation unit. Further, FIG. 4A is a waveform diagram showing an example of an input signal to the clock signal reproducing unit, and FIG. 4B is a waveform diagram showing an example of an output signal from the clock signal reproducing unit. FIG. 5 (a) is a waveform diagram showing the shape of a rectangular wave pulse that is a part of the serial modulation signal, and FIG. 5 (b) is a waveform diagram showing the shape of the rectangular wave pulse after transmission. (C) is a waveform diagram showing the shape of the low-frequency component extracted from these rectangular wave pulses, and (d) is the high-frequency extracted from those rectangular wave pulses. It is a wave form diagram which shows the shape of a component. FIG. 6 is a block diagram showing the structure of the attenuation compensation unit.

    In this example, an information signal transmission device 1 having the configuration shown in FIG. 1 was produced. The information signal transmission apparatus 1 includes a transmitter 2 that transmits an audio signal (information signal) S and a video signal (information signal) R, G, B, etc., and a reception that receives those signals S, R, G, B. And a twisted pair cable 4 for transmitting the signals S, R, G, B from the transmitter 2 to the receiver 3.

    The transmitter 2 is provided with an AD conversion unit 20, a clock signal generation unit 21, a modulation unit 22, a parallel / serial conversion unit 23, and a synchronization signal addition unit 24, as shown, and the receiver 3 is In this manner, a DA conversion unit 30, a clock signal reproduction unit 31, a demodulation unit 32, a serial / parallel conversion unit 33, a binarization unit 34, an attenuation compensation unit 35, a synchronization signal separation unit 36, and a synchronization signal restoration unit 37 are arranged. . A twisted pair cable 4 having four signal lines 4A, 4B, 4C and 4D was used.

    In the present embodiment, the clock signal generator 21 having a crystal oscillator and outputting a clock signal CP having a frequency of 11.3 MHz is used.

Further, the AD converter 20 used is one that divides the clock signal CP by 1/2 to obtain a sampling frequency of 44.1 kHz and a quantization bit number of 8 bits. The audio signal S is converted by the AD converter 20 from the analog formats S _LA and S _RA into the digital formats S _LD and S _RD . For example, when the audio data sampled at a certain timing is “00101100”, the audio digital signal (S _LD or S _RD ) output from the AD converter 20 is as shown in FIG.
T1 to t3; V = 0
· T3~t4; _V = V ₀
T4 to t5; V = 0
· T5~t7; _V = V ₀
T7 to t9; V = 0
It becomes.

The parallel / serial converter 23 described above converts the left audio digital signal S _LD and the right audio digital signal S _RD output from the AD converter 20 into a serial signal _SD . This
・ Left digital audio signal S _LD sampled at a certain timing
・ Right-side audio digital signal _SRD sampled at that timing
・ Left audio digital signal S _LD sampled at the following timing
・ Right-side audio digital signal _SRD sampled at that timing
・ Left audio digital signal S _LD sampled at the following timing
・ Right-side audio digital signal _SRD sampled at that timing
Each signal is arranged in the order of..., And a serial signal _SD is formed (eventually, the signal shown in FIG. 3A forms part of the serial signal _SD ). Information PI regarding the polarity of the synchronization signals HD and VD (details will be described later), and a signal (hereinafter referred to as “separation signal”) that can be clearly distinguished from the audio digital signals S _LD and S _RD and the information PI. _Are arranged between the right audio digital signal _SRD and the left audio digital signal _SLD . Since the signals and information are arranged in this way, the positions of other signals S _LD and S _RD and information PI can be specified by detecting the positions of the delimiter signals.

The modulation unit 22 described above performs frequency modulation of the serial signal _SD output from the parallel / serial conversion unit 23 based on the clock signal CP from the clock signal generation unit 21. Specifically, the modulation unit 22, the voltage of the input come serial signal (see S _D in FIG. 3 (a)) is synchronized with the (clock signal for each V _0/2 or Low or High time than T Discriminate by timing)
When V = 0 (Low), only one pulse PL ₀ with a pulse width of T / 2 is output as shown in FIG.
When V = V ₀ (High), two pulses PL ₁ having a pulse width of T / 4 are output. Thus, frequency modulation is performed such that the frequency of the carrier wave when V = V ₀ (High) is twice the frequency of the carrier wave when V = 0 (Low), and the serial number shown in FIG. Based on the signal _SD , the serial modulation signal S _DM shown in FIG.

On the other hand, the synchronization signal adding unit 24 described above superimposes the synchronization signals HD and VD on the color signal B. Specifically, the synchronization signal adding unit 24 determines the polarity of the synchronization signals HD and VD, and inverts to the negative polarity in the case of the positive polarity and superimposes it on the color signal B. The color signal B is superimposed without being inverted as it is. Since the information PI regarding the polarity of the synchronization signals HD and VD is also required on the receiver side, it is sent to the parallel / serial converter 23 and incorporated in the serial signal _SD . Thus, the signal to be transmitted to the receiver 3 side is
・ Color signal R
・ Color signal G
・ Color signal B on which synchronization signals HD and VD are superimposed
・ Serial modulation signal S _DM described above
And can be transmitted to the receiver 3 through the four signal lines 4A, 4B, 4C, and 4D of the twisted pair cable 4.

    The binarization unit 34 on the receiver side includes a comparator, and is configured to binarize the analog signal and convert it into a digital signal.

Clock recovery unit 31, the serial modulated signal S _DM, as shown in FIG. 4 (a), and is configured to output a reproduced clock signal CP _RB as shown in FIG. (B). Hereinafter, the clock signal reproduction unit 31 will be described.

Clock recovery unit 31, have a one-shot multivibrator (monostable multivibrator), a pulse (trigger pulse) is input, outputs a pulse PL ₂ of constant width (the width of 3T / 4) Is configured to do. On the other hand, the signal (serial modulated signal) S _DM transmitted after frequency modulation is composed of two types of pulses PL ₀ and PL _{1 having} different widths as shown in FIG. At the time when T elapses (that is, at the start time t11, t12, t13, t14, t15, t16, t17, t18 of each bit time), either the pulse PL ₀ or PL ₁ is always output, so the clock signal beginning t21 of each bit time from the reproducing unit 31, t22, t23, t24, t25, t26, t27, always so that the pulse PL ₂ is output at t28 (see FIG. (b)). Incidentally, when the pulse PL ₁ is the bit time output, after a T / 2 (e.g., t13 'reference) the pulse PL ₁ again is outputted, a pulse PL ₁ of the second are output ( since the same reference numerals t23 'reference), the clock recovery section 34 in FIG. (b) is being output pulse PL _2, never pulse PL ₂ is output again. Therefore, regardless of the arrangement order of the pulses PL ₀ and PL ₁ in the serial modulation signal S _DM , the pulse PL ₂ is output at a constant interval, thereby reproducing the clock signal.

In this embodiment, the frequency of the clock signal CP generated by the clock signal generation unit 21 is 11.3 MHz, and the AD conversion unit 20 divides the frequency by 1/2 to obtain a sampling frequency of 44.1 kHz. The sampled left and right audio analog signals S _LA and S _RA are converted into 8-bit digital signals S _LD and S _RD . Therefore, the frequency of the clock signal (reproduced clock signal) reproduced by the clock signal reproducing unit 31 is approximately 700 kHz (≈44.1 kHz × 8 × 2), but in this embodiment, a PLL circuit (frequency not shown) is used. multiplying 16 times the multiplier), and to be able to reproduce the clock signal _{CP RB} of 11.3MHz.

The demodulator 32 performs a process reverse to that performed by the modulator 22, and from the serial modulated signal _SDM from the binarizer 34, the signal before frequency modulation (left and right audio digital signals S _LD , _SRD , polarity information PI, pattern information and the like are demodulated).

Serial / parallel conversion unit 33 is configured to identify the position of the polarity information PI and left audio digital signal _{S LD} and the right audio digital signal _{S RD} based on the pattern information in the serial signal _{S D,} the reproduction clock of 11.3MHz The signal CP _RB is _divided by 1/256, and the serial signal _SD is converted into parallel signals S _LD and S _RD at a sampling frequency of 44.1 kHz. The polarity information PI is output to the synchronization signal restoration unit 37.

Based on the input of the clock signal CP _RB and the parallel signals S _LD and S _RD described above, the DA conversion unit 30 converts the left audio digital signal S _LD and the right audio digital signal S _RD left and right at a sampling frequency of 44.1 kHz. Audio analog signals S _LA and S _RA . The clock signal CP _RB is generated by the clock signal generation unit 21 and reproduced by the clock signal reproduction unit 31, so that the clock signal CP inputted to the AD conversion unit 20 and the DA conversion unit 30 are inputted. The frequency of the clock signal CPRB completely coincides with that of the received clock signal _CPRB, and the analog signal input on the transmitter side can be accurately restored on the receiver side.

    By the way, the longer the separation distance between the transmitter 2 and the receiver 3, the more the video signals R, G, B and the audio signal S transmitted between them are attenuated. Even if the audio signal S is slightly attenuated, there is no particular inconvenience in audio reproduction. However, since the video signals R, G, and B are attenuated, the video quality deteriorates. Only the signals R, G, B are subjected to attenuation compensation by the attenuation compensator 35. Hereinafter, this point will be described in detail.

Attenuation compensation needs to be performed based on the degree of attenuation by detecting the degree of attenuation of the transmitted signal. The degree of attenuation generally differs depending on the material, thickness and length of the signal line, and the signal frequency, but does not depend on the type of signal (that is, the attenuation compensation of the video signal is detected by the video signal). It may be based on the degree of attenuation or based on the degree of attenuation detected by the audio signal). In the case of the present embodiment, it is easier to detect the degree of attenuation with the audio signal, so the attenuation compensation of the video signal is performed based on the degree of attenuation detected with the audio signal. In this embodiment, the signal line for transmitting the video signal and the signal line for transmitting the audio signal are made of the same material, thickness and length, so that attenuation compensation is performed only for the frequency. You may consider it. In this embodiment, the transmitted audio signal (the above-described serial modulation signal) is composed of a rectangular wave pulse as indicated by the symbol PL ₀ in FIG. In theory, frequency components up to an infinite frequency are included, but it is not necessary to detect the degree of attenuation for all frequency components, and it is only necessary to detect only one or two frequency components. In this embodiment, as will be described later, the low-frequency gain adjustment unit 356 and the high-frequency gain adjustment unit 359 detect the degree of attenuation for two frequency components. Furthermore, with respect to the video signal, attenuation compensation is not performed only for the frequency component for which the degree of attenuation is detected, but attenuation compensation is also performed for other frequency components.

    By the way, as shown in detail in FIG. 6, the attenuation compensation unit 35 includes a low-frequency video compensation unit (video signal restoration unit) 350, a high-frequency video compensation unit (video signal restoration unit) 351, and a low-frequency rectangular wave compensation unit 352. , A high-frequency rectangular wave compensation unit 353, a low-pass filter 354, a low-frequency peak detection unit 355, a low-frequency gain adjustment unit (attenuation degree detection unit) 356, a high-pass filter 357, a high-frequency peak detection unit 358, and a high-frequency gain adjustment unit ( Attenuation level detection unit) 359 and the like.

The audio signal (the above-described serial modulation signal) S _DM is attenuated in the process of transmission (the attenuated audio signal is referred to as an “attenuated audio signal” as necessary, and is represented by a symbol S _DM ^* ). Since the audio signal S _DM is composed of rectangular wave pulses as indicated by reference symbol PL ₀ in FIG. 5A, the rectangular wave pulse PL ₀ is indicated by a solid line PL ₀ ^* in FIG. It is attenuated to such a shape (referred to as “attenuating rectangular wave pulse” as necessary). This attenuated sound signal S _DM ^* is input to the attenuation compensator 35 on the receiver 3 side (see FIG. 6), and the low-pass rectangular wave compensator 352 and the high-pass rectangular wave compensator 353 remain as they are (that is, as described later). And is input to the low pass filter 354. Then, the low-band frequency component is extracted by the low-pass filter 354 (see the symbol PL ₀₁ ^{* in} FIG. 5 (c)), and the peak voltage V ₀₁ ^* is detected by the low-band peak detecting unit 355. The gain adjusting unit 356 calculates a differential voltage ΔV ₀₁ between the voltage (peak voltage when not attenuated) V ₀ and the voltage (peak voltage when attenuated) V ₀₁ ^* (see FIG. 5C). The low-frequency gain adjustment voltage Vc ₀₁ corresponding to the differential voltage ΔV ₀₁ is fed back to the low-frequency image compensation unit 350 and the low-frequency rectangular wave compensation unit 352 (see FIG. 6). The low-frequency image compensation unit 350 and the low-frequency rectangular wave compensation unit 352 have a variable gain amplifier (not shown), and the gain (low-frequency gain G _L ) is adjusted based on the low-frequency gain adjustment voltage Vc _01. It has come to be.

The attenuated audio signal S _DM ^{* that} has passed through the low-frequency rectangular wave compensation unit 352 and the high-frequency rectangular wave compensation unit 353 is input to the high-pass filter 357 to extract a high-band frequency component (reference symbol PL in FIG. 5 (d)). ₀₂ ^* ), and the peak voltage V ₀₂ ^* is detected by the high band peak detection unit 358, and the high band gain adjustment unit 359 detects the voltage (peak voltage when not attenuated) V ₀ and the voltage (when attenuated). is calculated the difference voltage [Delta] V ₀₂ between the peak _{voltage) V 02} ^* reference (FIG. 5 (d)), the high frequency gain adjustment voltage _{Vc 02} is high-frequency image compensating unit 351 and high according to the difference voltage [Delta] V ₀₂ computed Feedback is made to the rectangular wave compensator 353 (see FIG. 6). These high-frequency image compensation unit 351 and high-frequency rectangular wave compensation unit 353 have variable gain amplifiers (not shown), and the gain (high-frequency gain G _H ) is adjusted based on the high-frequency gain adjustment voltage Vc _02. It has come to be.

As the low-frequency gain adjustment voltage Vc ₀₁ and the high-frequency gain adjustment voltage Vc ₀₂ are fed back, the gain (low-frequency gain _GL and high-frequency gain) of the low-frequency rectangular wave compensation unit 352 and the high-frequency rectangular wave compensation unit 353 is obtained. G _H ) is adjusted, and each frequency component of the audio signal is amplified. As a result, the peak voltage V ₀₁ ^* and the peak voltage V ₀₂ ^* detected by the low band peak detection unit 355 and the high band peak detection unit 358 are higher than before amplification, and the low band gain adjustment unit 356 and the low band peak adjustment unit 356 are low. The difference voltage ΔV ₀₁ and the difference voltage ΔV ₀₂ calculated by the band gain adjustment unit 356 are reduced, and the low band gain adjustment voltage Vc ₀₁ and the high band gain adjustment voltage Vc ₀₂ are also reduced, so that the low band video compensation unit 350 and the high band video compensation are reduced. increment of the low-frequency gain _{G L} and the high gain _{G H} decreases in section 351. Then, the differential voltage [Delta] V _01, upon reaching the [Delta] V ₀₂ is 0, the low frequency gain _{G L} and the high gain _{G H} reaches a predetermined value.

Although low-frequency gain G _L and the high gain G _H of as described above low band image compensation unit 350 and the high image compensating unit 351 reaches a predetermined value, the video signal in these compensation unit 350, 351 ( Since R ^* , G ^* , and Bp ^* are input, the low-frequency image compensator 350 amplifies the low-frequency component and the high-frequency image compensator 351 receives the high-frequency signal. The frequency component is amplified.

    The video signals R, G, and Bp that have been attenuation-compensated in this way are input to the synchronization signal separation unit (see reference numeral 36 in FIG. 1), and the synchronization signals HD and VD superimposed on the color signal B are separated. And output to the synchronization signal restoration unit 37. The synchronization signal restoration unit 37 outputs negative synchronization signals HD and VD based on the polarity information PI input as described above. For example, if the polarity information PI is negative, the synchronization signals HD and VD are output as they are. If the polarity information PI is positive, the polarity is inverted and the synchronization signals HD and VD are output.

By the way, in this embodiment, as shown in FIG. 2, a personal computer 5 is connected to the transmitter 2 by cables 6A, 6B, and video signals (specifically, color signals R, G, B and synchronization signal HD) are connected. , VD) and analog audio signals S _LA , S _RA can be input, and a display 7 is connected to the receiver 3 by cables 8A, 8B, and video signals (color signals R, G from the synchronization signal separation unit 36) are connected. , B, the synchronization signals HD and VD from the synchronization signal restoration unit 37, and the audio signals (analog audio signals S _LA and S _RA from the DA conversion unit 30).

FIG. 1 is a block diagram showing an example of the structure of an information signal transmission apparatus according to the present invention. FIG. 2 is a block diagram showing an example of a usage state of the information signal transmission apparatus according to the present invention. FIG. 3A is a waveform diagram showing an example of an input signal to the parallel / serial converter, and FIG. 3B is a waveform diagram showing an example of an output signal from the parallel / serial converter. FIG. 4A is a waveform diagram showing an example of an input signal to the clock signal generator, and FIG. 4B is a waveform diagram showing an example of an output signal from the clock signal generator. FIG. 5 (a) is a waveform diagram showing the shape of a rectangular wave pulse that is a part of the serial modulation signal, and FIG. 5 (b) is a waveform diagram showing the shape of the rectangular wave pulse after transmission. (C) is a waveform diagram showing the shape of the low-frequency component extracted from these rectangular wave pulses, and (d) is the high-frequency component extracted from those rectangular wave pulses. It is a wave form diagram which shows the shape. FIG. 6 is a block diagram showing the structure of the attenuation compensation unit. FIG. 7 is a block diagram showing an example of the configuration of a conventional information signal transmission apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Information signal transmission apparatus 2 Transmitter 3 Receiver 4 Twisted pair cable 20 AD conversion part 21 Clock signal generation part 22 Modulation part 23 Parallel / serial conversion part 30 DA conversion part 31 Clock signal reproduction | regeneration part 32 Demodulation part 33 Serial / parallel conversion part 350 Low-frequency image compensation unit (video signal restoration unit)
351 High-frequency video compensation unit (video signal restoration unit)
356 Low-frequency gain adjustment unit (attenuation degree detection unit)
359 High-frequency gain adjustment unit (attenuation degree detection unit)
CP clock signal CP _RB clock signal R, G, B Video signal (information signal)
S Audio signal (information signal)

Claims (4)

In the information signal transmission device for transmitting the left audio signal and the right audio signal from the transmitter to the receiver,
A clock signal generator for generating a clock signal;
An AD converter that is disposed in the transmitter and converts an analog left audio signal and a right audio signal into a 16-bit digital signal based on a clock signal from the clock signal generator ;
A parallel / serial conversion unit connected to the AD conversion unit for converting the left audio signal and the right audio signal in the digital format converted by the AD conversion unit into a serial signal;
A modulation unit arranged in the transmitter and frequency-modulating the serial signal converted by the parallel / serial conversion unit based on a clock signal having a frequency of 1.4 MHz or more supplied from the clock signal generation unit;
A clock signal reproduction unit arranged in the receiver for reproducing a clock signal from the frequency-modulated signal transmitted;
A demodulator that is disposed in the receiver and demodulates the signal that has been frequency-modulated and transmitted to a signal before being frequency-modulated;
A serial / parallel converter disposed in the receiver for converting the transmitted serial signal into a parallel signal;
A DA converter that is disposed in the receiver and reconverts the parallel signal converted by the serial / parallel converter into an analog format based on the clock signal reproduced by the clock signal reproducer ;
Information signal transmission device, wherein a is provided. The clock signal generator is disposed in the transmitter;
Between the transmitter and the receiver, a cable for transmitting a clock signal from the clock signal generator to the DA converter is interposed,
The frequency of the clock signal when transmitted through the cable is 10 MHz or less,
The information signal transmission apparatus according to claim 1. The receiver is provided with a frequency multiplier that multiplies the frequency of the clock signal supplied to the DA converter,
The information signal transmission apparatus according to claim 1, wherein the information signal transmission apparatus is an information signal transmission apparatus. A video signal is transmitted from the transmitter to the receiver;
An attenuation level detection unit for detecting an attenuation level attenuated as the audio signal is transmitted from the transmitter to the receiver;
A video signal restoration unit that restores the video signal attenuated as a result of being transmitted based on the degree of attenuation detected by the attenuation level detection unit to a state before attenuation;
The information signal transmission apparatus according to claim 1 , wherein the information signal transmission apparatus is an information signal transmission apparatus.

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