JP4562154B2 - Manufacturing method of semiconductor module - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor module.
[0002]
[Prior art]
In recent years, in order to cope with high-density mounting of IC chips, a technique for manufacturing a semiconductor module in which IC chips are stacked has been developed. For example, JP-A-9-219490, JP-A-10-135267, and JP-A-10-163414 disclose such a stacked package.
[0003]
In such a conventional technique, IC packages such as TSOP (Thin Small Outline Package), TCP (Tape Carrier Package), and BGA (Ball Grid Array) are assembled for each layer, and then a plurality of IC packages are stacked. At this time, the respective layers are connected via external connection terminals provided in advance in each package. Thus, in the conventional construction method, since many manufacturing steps have to be performed, the processing cost has increased.
[0004]
10 and 11 show a stacked package manufactured by the conventional method as described above. The one shown in FIG. 10 is a laminate of packages molded with resin. 11 is a side view and a plan view of a module substrate on which the package of FIG. 10 is mounted. The IC packages 100A and 100B include an IC mounting portion 106, an IC chip 102 mounted on the upper surface thereof, a lead 101 connecting the IC chip 102 and an external component, and the IC chip 102 and the lead 101 inside the resin. And a bonding wire 103 to be connected with each other. A predetermined region including the IC chip 102 is covered with a resin body 104.
[0005]
Another IC package 100B is stacked on the upper side of the IC package 100A having such a structure and mounted on the substrate 105.
[0006]
[Problems to be solved by the invention]
If the IC packages 100A and 100B are stacked in the thickness direction and mounted on the substrate 105, the total module thickness increases due to the thickness of the resin body 104. Further, when the IC packages 100A and 100B are mounted on the substrate 105 in the horizontal direction, there is a problem that the total module becomes large. Furthermore, since the upper and lower packages 100A and 100B are connected to the substrate 105 by the respective leads 101, there is a possibility that the leads 101 are short-circuited if a positional shift occurs when the packages 100A and 100B are stacked. .
[0007]
In the future, for example, with the miniaturization of electronic devices such as IC cards and mobile phones, it is considered that further increases in density and thickness will be achieved for IC packages, but depending on the conventional construction method, It is difficult to achieve such high density and thinning.
[0008]
In order to solve this problem, a configuration in which the IC chip 102 is molded with the resin body 104 is changed, and for example, a configuration in which the IC chip is mounted between the layers while a printed board is laminated via an interlayer member is conceivable. When such a configuration is adopted, the conductor circuit of the printed circuit board is electrically connected by conductive bumps formed on the interlayer members arranged on the front and back sides.
[0009]
However, when the printed circuit board to be laminated has a conductor circuit only on one side, the number of printed circuit boards and interlayer members to be used is increased by the same number as the increase in the number of necessary conductor circuits. There is a problem that the module becomes large. In addition, the risk of poor electrical connection increases as the number of printed circuit boards and interlayer members to be stacked increases.
[0010]
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a method capable of manufacturing a higher-density stacked semiconductor module.
[0011]
[Means for Solving the Problems]
According to a first aspect of the present invention for solving the above-described problem, a printed circuit board having a predetermined wiring circuit formed thereon and a semiconductor chip mounted on one side thereof, a conductive bump connectable to the wiring circuit, and the semiconductor chip are provided. A method of manufacturing a semiconductor module that is laminated via an interlayer member having an opening that can be accommodated, wherein a via hole that penetrates through an insulating layer of a single-sided copper-clad laminate to be the printed circuit board and reaches a conductor layer is predetermined. Forming a plated conductor made of a metal having a melting point lower than that of copper in the via hole, and electrically connecting the plated conductor in the via hole on the insulating layer side of the single-sided copper-clad laminate. Attaching the continuous conductor foil; etching the conductor layer and the conductor foil to form the wiring circuit; mounting the semiconductor chip on the wiring circuit; Having said the preparative substrate and the interlayer member where undergoing a process of bonding by alternately laminating.
[0013]
According to a second aspect of the present invention, there is provided a printed circuit board in which a predetermined wiring circuit is formed and a semiconductor chip is mounted on one side, conductive bumps that can be connected to the wiring circuit, and openings that can receive the semiconductor chip. A method of manufacturing a semiconductor module that is laminated via an interlayer member provided, the step of forming a via hole that penetrates an insulating layer of a single-sided copper-clad laminate to be the printed circuit board and reaches a conductor layer at a predetermined position; Forming a plated conductor consisting of two layers of copper provided on the conductor layer side of the single-sided copper clad laminate and a metal having a melting point lower than that of copper provided on the opposite surface side in the via hole; Attaching the conductive foil electrically connected to the plated conductor in the via hole to the insulating layer side of the single-sided copper-clad laminate, etching the conductive layer and the conductive foil, and forming the wiring circuit; It is characterized in that it goes through a step of mounting the semiconductor chip on the wiring circuit and a step of alternately laminating and bonding the printed circuit board and the interlayer member.
[0014]
Operation and effect of the invention
According to the first aspect of the present invention, the plated conductor is formed in the via hole formed in the insulating layer of the single-sided copper clad laminate, and the conductive foil is also provided on the surface on the insulating layer side. In addition, it is possible to form a wiring circuit by etching. Thus, according to the method of manufacturing a semiconductor module of the present invention using the printed circuit board having the wiring circuits formed on both sides, even when the required number of wiring circuits is increased, the printed circuit board and the interlayer which are half the number of the wiring circuits are increased. What is necessary is just to use a member. Therefore, an increase in the size of the stacked semiconductor module can be avoided, and an excellent effect is obtained that a thin and high-density semiconductor module can be obtained.
[0015]
Further, when the plated conductor is made of a metal having a melting point lower than that of copper, such as solder, there is an effect that adhesion between the plated conductor and the conductor foil attached to the insulating layer is improved.
Alternatively, the via hole is filled with copper, a metal having a lower melting point than copper is laminated on the surface thereof, and the plated conductor has a two-layer structure, thereby improving the adhesion to the conductor foil to be attached to the surface on the insulating layer side. It is good also as a structure (invention of Claim 2 ).
[0016]
DETAILED DESCRIPTION OF THE INVENTION
<First Embodiment>
Hereinafter, a first embodiment embodying the present invention will be described in detail with reference to FIGS. The semiconductor module 1 of the present embodiment is integrated by alternately superimposing the printed circuit boards 10 on which the semiconductor chips 2 are mounted and the interlayer member 20 and then superposing the I / O wiring board 3 on the lowermost layer and performing heat pressing. It has a structure (see FIG. 1).
[0017]
First, a method for manufacturing the printed circuit board 10 on which the semiconductor chip 2 is mounted will be described.
The starting material for the printed circuit board 10 is a single-sided copper-clad laminate 11. This single-sided copper-clad laminate 11 is, for example, on one surface (upper surface in FIG. 2) of an insulating substrate 12 having a thickness of 40 μm formed of a plate-like glass cloth epoxy resin, and a copper foil 13 having a thickness of 12 μm on the entire surface. Is a well-known structure to which is attached.
[0018]
Laser irradiation is performed at a predetermined position from, for example, a pulse oscillation type carbon dioxide laser processing apparatus from the insulating substrate 12 side (the lower surface side in FIG. 2) of the single-sided copper-clad laminate 11 to penetrate the insulating substrate 12. A via hole 14 reaching the copper foil 13 is formed (FIG. 2A). The processing conditions are preferably such that the pulse energy is 0.5 to 10.0 mJ, the pulse width is 1 to 100 μs, the pulse interval is 0.5 ms or more, and the number of shots is 3 to 50. Next, a desmear process for removing the resin remaining in the via hole 14 is performed. Thereafter, the surface of the copper foil 13 is protected with a protective film (not shown), and the plated conductor made of a metal having a melting point lower than that of copper such as solder is formed in the via hole 14 by electrolytic plating using the copper foil 13 as one electrode. 15 is formed. The plated conductor 15 is formed up to a position slightly protruding on the surface of the insulating substrate 12 (FIG. 2B).
[0019]
Thereafter, an adhesive layer 36 is formed on the entire surface of the insulating substrate 12 (FIG. 2C). Then, a 12 μm-thick copper foil 13 is pressure-bonded and laminated on the adhesive layer 36, the copper foil 13 is provided on both sides, and the copper foil 13 is electrically connected by the plated conductor 15 in the via hole 14. (FIG. 2D).
[0020]
Next, after peeling off the protective film, a photosensitive dry film 30 is attached onto the copper foil 13 on the upper surface, and the dry film 30 is exposed and developed with a predetermined pattern to form the hole 31. (FIG. 2E). Then, a plating layer to be the mounting bumps 17 for mounting the semiconductor chip 2 is formed by performing electrolytic plating in the hole 31. Thereafter, the dry film 30 is peeled off, and the mounting bumps 17 are projected (FIG. 3F).
[0021]
Next, a photoresist layer 32 is formed on the entire surface of the copper foil 13 on both surfaces of the laminate 16 by electrodeposition (FIG. 3G). Then, the photoresist layers 32 on both sides are exposed and developed in accordance with a predetermined pattern of the wiring circuit 18. Thereafter, the copper foil 13 portion not protected by the photoresist layer 32 is etched to form wiring circuits 18 on both surfaces of the laminate 16 (FIG. 3H). A part of the wiring circuit 18 serves as a connection land 19 for connection to a conductive bump 25 of an interlayer member 20 described later. Finally, by removing the photoresist layer 32, the production of the printed circuit board 10 is completed (FIG. 3I).
[0022]
The semiconductor chip 2 is mounted on the central portion on the upper surface side of the printed board 10 (FIG. 3J). The semiconductor chip 2 is fixed to the center of the printed circuit board 10 by the adhesive layer 7, and terminal portions (not shown) formed on the lower surface side of the semiconductor chip 2 are embedded in the mounting bumps 17. It is electrically connected to the wiring circuit 18.
[0023]
Next, a method for manufacturing the interlayer member 20 will be described.
The starting material of the interlayer member 20 is, for example, a prepreg 21 formed in a plate shape in a semi-heated state by impregnating a glass cloth base material with an epoxy resin (FIG. 4A). The thickness of the prepreg 21 is higher than the height from the upper surface of the printed circuit board 10 to the upper surface of the semiconductor chip 2 because the semiconductor chip 2 needs to be accommodated in a cavity 26 (corresponding to the opening of the present invention) described later. Slightly thick, for example, 130 μm. Further, the area of the upper surface and the lower surface of the prepreg 21 is substantially equal to the area of the opposing printed circuit board 10.
[0024]
Both surfaces of the prepreg 21 are protected with a protective film 22 made of PET (FIG. 4B), and a laser is applied to a position corresponding to the connection lands 16 and 19 of the opposing printed board 10 by, for example, a pulse oscillation type carbon dioxide laser processing apparatus. By irradiating, a through hole 23 penetrating in the thickness direction of the prepreg 21 is formed (FIG. 4C).
[0025]
The through-hole 23 is filled with a conductive paste 24 (FIG. 4D). The filling can be performed by printing the conductive paste 24 on the protective film 22 using, for example, a screen printer. When the protective film 22 is peeled off, the conductive paste 24 is projected from the surface of the prepreg 21 by the thickness of the protective film 22 to form conductive bumps 25 (FIG. 4E).
[0026]
Then, for example, laser irradiation is performed on the central portion of the prepreg 21 so as to penetrate the cavity 26, thereby completing the manufacture of the interlayer member 20 (FIG. 4F). The size of the cavity 26 is slightly larger than the outer dimensions of the semiconductor chip 2 so that the semiconductor chip 2 can be accommodated therein.
[0027]
The printed circuit board 10 and the interlayer member 20 manufactured as described above are alternately overlapped (FIG. 5A). At this time, the printed circuit board 10 is disposed on the uppermost layer such that the surface on which the semiconductor chip 2 is mounted is on the lower surface side, and the interlayer member 20 is disposed below the printed circuit board 10. The interlayer member 20 accommodates the semiconductor chip 2 of the printed board 10 in the cavity 26 and is overlaid so that the conductive bumps 25 can be connected to the connection lands 19 of the printed board 10. Below that, the printed board 10 and the interlayer member 20 are similarly overlapped, and the I / O wiring board 3 is laminated in the lowermost layer. The I / O wiring board 3 is formed by forming a via hole 5 at a predetermined position of the insulating substrate 4 and forming a predetermined wiring circuit (not shown) and a land 6 above and below the via hole 5.
[0028]
Next, when pressure heating is performed by a press, the prepreg 21 once melts and flows, cures with time, and adheres to the upper and lower printed boards 10 and the I / O wiring board 3 to form the semiconductor module 1. Is done. At this time, the connecting lands 19 of each printed circuit board 10 and the lands 6 of the I / O wiring board 3 are connected to the conductive bumps 25 of the adjacent interlayer member 20. The wiring circuits of the I / O wiring board 3 are electrically connected. Also, solder balls 8 for connection to an external substrate are formed on the lands 6 on the lower surface side of the I / O wiring substrate 3 (FIG. 5B).
[0029]
According to the manufacturing method of the semiconductor module of the present embodiment described above, since the printed circuit 10 has the wiring circuits 18 formed on both sides thereof, an excellent effect that a thin and high-density semiconductor module can be manufactured. Make an effect.
[0030]
<Second Embodiment>
The semiconductor module of this embodiment is different from the first embodiment in the configuration of the plated conductor of the printed board. Also, an interlayer member different from that in the first embodiment is used.
[0031]
First, from the insulating substrate 42 side (the lower surface side in FIG. 6) of the single-sided copper-clad laminate 41, laser irradiation is performed at a predetermined position by, for example, a pulse oscillation type carbon dioxide laser processing apparatus, thereby penetrating the insulating substrate 42. A via hole 44 reaching the copper foil 43 is formed (FIG. 6A), and a desmear process for removing the resin remaining inside the via hole 44 is performed. Thereafter, the surface of the copper foil 43 is protected with a protective film (not shown), and a plated conductor 45A made of copper is formed in the via hole 44 by electrolytic plating using the copper foil 43 as one electrode (FIG. 6B). The filling depth of the plating conductor 45A is set so that the upper surface thereof is flush with the surface of the insulating substrate 42.
Further, a plating conductor 45B such as solder having a melting point lower than that of the plating conductor 45A is plated so as to cover the surface of the plating conductor 45A (FIG. 6C).
[0032]
Thereafter, as in the first embodiment, the protective film is peeled off, the adhesive layer 36 is formed on the entire surface on the insulating substrate 42 side (FIG. 6D), and a 12 μm thick copper foil 43 is laminated by pressure bonding. The copper foil 43 is provided on both surfaces, and the copper foil 43 is a laminated plate 46 electrically connected by the plated conductor 45 in the via hole 14 (FIG. 6E).
[0033]
Then, mounting bumps 47 for mounting the semiconductor chip 2 are formed on the upper copper foil 43 (FIG. 7F). Next, a photoresist layer is formed on both sides of the laminated plate 46 by electrodeposition, and the photoresist layers on both sides are exposed and developed in accordance with a pattern of a predetermined wiring circuit 48, and then protected by the photoresist layer. The wiring circuit 48 is formed by etching the portion of the copper foil 43 that is not present. A part of the wiring circuit 48 is formed as a connection land 49. Thereafter, the photoresist layer is removed (FIG. 7G).
[0034]
Finally, the semiconductor chip 2 is mounted on the central portion on the upper surface side of the printed circuit board 40, and is electrically connected to the wiring circuit 48 of the printed circuit board 40, thereby completing the production of the printed circuit board 40 (FIG. 7H).
[0035]
Next, a method for manufacturing the interlayer member 50 will be described. In this embodiment, instead of the prepreg 21 of the first embodiment, an insulating substrate 51 formed of a plate-like glass cloth substrate epoxy resin is used (FIG. 8A). The insulating base 51 has a thickness from the upper surface of the printed circuit board 40 to the upper surface of the semiconductor chip 2 because it is necessary to accommodate the semiconductor chip 2 in a cavity 56 (corresponding to the opening of the present invention) described later. It is slightly thicker than the height, for example, 130 μm. Further, the areas of the upper surface and the lower surface of the insulating base 51 are substantially equal to the area of the opposing printed circuit board 40.
[0036]
An adhesive layer 52 is formed on both surfaces of the insulating substrate 51, and the upper surface thereof is protected with a protective film 53 made of PET (FIG. 8B). Next, the thickness of the insulating base 51 is increased by irradiating the protective film 53 with a laser beam, for example, by a pulse oscillation type carbon dioxide laser processing apparatus at positions corresponding to the connection lands 46 and 49 of the opposing printed circuit board 40. A through hole 54 penetrating in the vertical direction is formed (FIG. 8C).
[0037]
The through-hole 54 is filled with a conductive paste 55 (FIG. 8D). Filling can be performed, for example, by printing the conductive paste 55 on the protective film 53 using a screen printer. When the protective film 53 is peeled off, the conductive paste 55 is projected from the surface of the adhesive layer 52 by the thickness of the protective film 53 to form conductive bumps 56 (FIG. 8E).
[0038]
Then, the cavity 57 is formed through the central portion of the insulating base 51 by, for example, laser irradiation, and the manufacture of the interlayer member 50 is completed (FIG. 8F). The size of the cavity 57 is slightly larger than the outer dimension of the semiconductor chip 2 so that the semiconductor chip 2 can be accommodated therein.
[0039]
The printed circuit board 40 and the interlayer member 50 manufactured as described above are alternately overlapped as in the first embodiment (FIG. 9A). At this time, the conductive bumps 56 of the interlayer member 50 are overlaid so that they can be connected to the connection lands 49 of the printed circuit board 40. The I / O wiring board 3 is laminated on the lowest layer.
[0040]
Next, the adhesive layer 52 is cured and bonded to the upper and lower printed boards 40 and the I / O wiring board 3 by heating and vacuum pressing, and the semiconductor module 1 is formed (FIG. 9B). The upper and lower printed circuit boards 40 and the wiring circuits of the I / O wiring board 3 are electrically connected by through holes 54 formed in the interlayer member 50. At this time, the connection lands 49 of each printed circuit board 40 and the lands 6 of the I / O wiring board 3 are connected to the conductive bumps 56 of the adjacent interlayer members 50, thereby the upper and lower printed circuit boards 40 and The wiring circuits of the I / O wiring board 3 are electrically connected.
[0041]
According to the manufacturing method of the semiconductor module of the present embodiment described above, the wiring circuit 48 is formed on both sides of the printed circuit board 40 as in the first embodiment. Obtainable.
[0042]
<Other embodiments>
The technical scope of the present invention is not limited by the above-described embodiments, and, for example, those described below are also included in the technical scope of the present invention. In addition, the technical scope of the present invention extends to an equivalent range.
[0043]
(1) In the above embodiment, each of the semiconductor modules 1 is composed of two printed boards, an interlayer member, and five I / O wiring boards. According to the present invention, the number of stacked layers is the same as that of these embodiments. For example, it may be configured by three layers of one printed board, an interlayer member, and an I / O wiring board. Alternatively, each may be composed of seven layers of three printed boards, an interlayer member, and an I / O wiring board, and may be further multilayered.
[0044]
(2) In the above embodiment, the plated conductor is formed by the electrolytic plating method. However, according to the present invention, the method for forming the plated conductor is not limited to these embodiments. For example, the plated conductor may be formed by electroless plating. .
[0045]
(3) In the above embodiment, the mounting bump is formed on the copper foil side of the single-sided copper-clad laminate. However, the mounting bump is formed on the copper foil attached to the insulating substrate side, and the semiconductor chip It is good also as a structure to mount.
[0046]
(4) In the said embodiment, although it was set as the structure which laminates | stacks an adhesive layer on an insulating substrate and affixes a copper foil, it is good also as a structure which forms an adhesive layer in the copper foil side and affixes on an insulating substrate.
[0047]
(5) The combination of each kind of the printed circuit board and interlayer member manufactured by the said embodiment is arbitrary, and is not restricted.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a state before a semiconductor module is manufactured by laminating a printed board and an interlayer member according to an embodiment of the invention. FIG. 2 is a cross-sectional view showing a method for manufacturing a printed board according to the first embodiment. -1
FIG. 3 is a cross-sectional view 2 showing a method for manufacturing a printed circuit board.
4 is a cross-sectional view showing the same method for producing an interlayer member. FIG. 5 is a cross-sectional view in which a printed circuit board and an interlayer member are also laminated. FIG. 1
FIG. 7 is a cross-sectional view-2 showing a method for manufacturing a printed circuit board.
8 is a cross-sectional view showing a method for manufacturing an interlayer member. FIG. 9 is a cross-sectional view in which a printed circuit board and an interlayer member are laminated. FIG. 10 is a side cross-sectional view of a conventional IC package. Side view of a substrate on which a conventional IC package is mounted (b) Plan view of a substrate on which a conventional IC package is mounted
DESCRIPTION OF SYMBOLS 1 ... Semiconductor module 2 ... Semiconductor chip 3 ... I / O wiring board 10, 40 ... Printed circuit board 11, 41 ... Single-sided copper clad laminated board 12, 42 ... Insulating board (insulating layer)
13, 43 ... Copper foil (conductor layer)
14, 44 ... via holes 15, 45 ... plated conductors 17,47 ... mounting bumps 18,48 ... wiring circuits 19, 49 ... connection lands 20,50 ... interlayer members 25, 56 ... conductive bumps 26, 57 ... cavities ( Aperture)
36 ... Adhesive layer

Claims (2)

A printed circuit board in which a predetermined wiring circuit is formed and a semiconductor chip is mounted on one side is laminated via an interlayer member provided with conductive bumps connectable to the wiring circuit and openings capable of accommodating the semiconductor chip. A method for manufacturing a semiconductor module comprising:
A step of forming a via hole penetrating the insulating layer of the single-sided copper clad laminate to be the printed circuit board to reach the conductor layer, and forming a plated conductor made of a metal having a lower melting point than copper in the via hole Forming a wiring circuit by etching the conductive layer and the conductive foil, and attaching the conductive foil electrically connected to the plated conductor in the via hole to the insulating layer side of the single-sided copper-clad laminate. A method of manufacturing a semiconductor module, comprising: a step, a step of mounting the semiconductor chip on the wiring circuit, and a step of alternately laminating and bonding the printed circuit board and the interlayer member. A printed circuit board in which a predetermined wiring circuit is formed and a semiconductor chip is mounted on one side is laminated via an interlayer member provided with conductive bumps connectable to the wiring circuit and openings capable of accommodating the semiconductor chip. A method for manufacturing a semiconductor module comprising:
A step of forming a via hole penetrating the insulating layer of the single-sided copper-clad laminate to be the printed circuit board and reaching the conductor layer at a predetermined position; and provided in the via hole on the conductor layer side of the single-sided copper-clad laminate Forming a plating conductor composed of two layers of copper and a metal having a melting point lower than that of the copper provided on the opposite side of the copper; and the plating conductor in the via hole on the insulating layer side of the single-sided copper-clad laminate A step of affixing a continuous conductor foil, a step of etching the conductor layer and the conductor foil to form the wiring circuit, a step of mounting the semiconductor chip on the wiring circuit, the printed circuit board and the interlayer member And a step of alternately laminating and adhering to each other .

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