JP4568063B2 - Control device for frequency converter - Google Patents

Description

  The present invention relates to a control device for a frequency conversion device in which a plurality of inverter devices that convert commercial AC power into DC power once with a rectifier and further convert into high frequency AC power with an inverse converter are connected in parallel.

  For example, as a power supply device for high-frequency power that induction-heats a material to be heated such as a metal material, a frequency conversion device that converts commercial AC power into DC power once with a rectifier and then converts it into high-frequency AC power with an inverse converter and outputs it Is used. Furthermore, in order to efficiently induction-heat the material to be heated, a frequency conversion device in which a plurality of inverter devices composed of a rectifier and an inverse converter are connected in parallel has been put into practical use. In such a frequency conversion device, the number of operating inverter devices can be changed according to the load current.

  The frequency conversion device in which the plurality of inverter devices are incorporated and the control device for the frequency conversion device are configured as shown in FIG. 2, for example.

  The frequency converter shown in FIG. 2 includes two inverter devices 40a and 40b connected in parallel. And this frequency converter supplies high frequency electric power to the parallel resonant load 7 which consists of the load coil 7b in which the power factor improvement capacitor | condenser 7a and the to-be-heated material 8 are inserted.

  Each of the inverter devices 40a and 40b includes rectifiers 1a and 1b including thyristors that convert commercial AC power supplied from the outside into DC power, DC reactors 2a and 2b, and thyristor elements that convert DC power into high-frequency power. The inverters 3a and 3b are formed by bridge-connecting u, v, x, and y. The outputs of the inverters 3a and 3b are connected in parallel, and high frequency power is supplied to the parallel resonant load 7 including the load coil 7b into which the power factor improving capacitor 7a and the material to be heated 8 are inserted.

  On the other hand, the starter circuit 4 composed of the capacitor 4a and the thyristor 4b connected between the output terminals of the inverter 3a of the inverter device 40a has the inverter 3a of U phase and X phase (thyristor elements u, x), Alternatively, it is a circuit that switches from the bypass pair operation in which the V-phase and the Y-phase (thyristor elements v and y) are simultaneously fired to the high-frequency operation.

  The heated material 8 mounted on the parallel resonant load 7 is induction-heated by generating an eddy current loss with a high-frequency magnetic flux generated from the load coil 7a.

  The output voltage transformer 5 detects the AC output voltage of the frequency converter and sends it to the voltage detection circuit 9. The voltage detection circuit 9 converts the detection value from the output voltage transformer 5 into an appropriate value to control the AC output voltage, and sends it to the margin angle control circuits 20a and 20b and the subtractors 11a and 11b.

  Input current transformers 6a and 6b provided at the input terminals of the respective inverter devices 40a and 40b detect the AC input currents of the rectifiers 1a and 1b and send them to the current detection circuits 10a and 10b. The current detection circuits 10a and 10b convert the detected values from the input current transformers 6a and 6b to appropriate values in order to control the AC input current, and the margin angle control circuits 20a and 20b on their own side and subtracters, respectively. 14a, 14b and the common adder 22.

  The voltage reference setting circuits 11a and 11b set voltage reference values of the output voltages of the inverse converters 3a and 3b based on instructions from an operation control unit (not shown), and send them to the subtracters 12a and 12b. The subtracters 12a and 12b subtract the output voltage from the voltage detection circuit 9 from the voltage reference value set by the voltage reference setting circuits 11a and 11b, and send it to the voltage control circuits 13a and 13b. The voltage control circuits 13a and 13b are voltages in which the output voltage from the voltage detection circuit 9 (AC output voltage of the frequency converter) is set by the voltage reference setting circuits 11a and 11b based on the outputs from the subtracters 12a and 12b. A control signal that becomes the reference value is sent to the high level priority circuits 17a and 17b.

  The current reference setting circuits 14a and 14b set current reference values for the AC input currents of the rectifiers 1a and 1b based on instructions from an operation control unit (not shown), and send them to the subtracters 15a and 15b. The subtracters 15a and 15b subtract the input currents from the current detection circuits 10a and 10b from the current reference values set by the current reference setting circuits 14a and 14b and send them to the current control circuits 16a and 16b. The current control circuits 16a and 16b are configured so that the input currents from the current detection circuits 10a and 10b become the current reference values set by the current reference setting circuits 14a and 14b based on the outputs from the subtracters 15a and 15b. The control signal is sent to the high level priority circuits 17a and 17b.

  The high level priority circuits 17a and 17b compare the control signals from the voltage control circuits 13a and 13b with the control signals from the current control circuits 16a and 16b, select a control signal with a high signal level, and select the phase control circuit 18a, Send to 18b. The phase control circuits 18a and 18b create a gate signal having a gate width calculated based on the input control signal and send it to the rectifiers 1a and 1b.

  As a result, the AC output voltage of the frequency converter becomes the voltage reference value set by the voltage reference setting circuits 11a and 11b, or the AC input current of each rectifier 1a and 1b is set by the current reference setting circuits 14a and 14b. Current reference value.

  The margin angle reference setting circuits 19a and 19b, based on an instruction from an operation controller (not shown), provide a commutation margin between the phase of the AC input current of each rectifier 1a and 1b and the phase of the AC output voltage of the frequency converter. The margin angle reference which is a corner is set and sent to the margin angle control circuits 20a and 20b.

  In the margin angle control circuits 20a and 20b, the margin angle between the input current from each of the current detection circuits 10a and 10b and the output voltage from the voltage detection circuit 9 is set to the margin angle reference specified by the margin angle reference setting circuits 19a and 19b. Such a control signal is sent to the phase control circuits 21a and 21b. The phase control circuits 21a and 21b create a gate signal having a rising timing calculated based on the input control signal and send it to the inverse converters 3a and 3b.

  The gate signal from one phase control circuit 21b is sent to the inverse converter 3b via the AND circuit 27.

  Input currents from the current detection circuits 10a and 10b are added by the adder 22 and input to the level detectors 23 and 24 as a combined current. The level detector 23 applies a high level signal to the set terminal S of the flip-flop 25 when the input combined current rises above a determination value for determining the number of inverters 40a, 40b to be operated, and the flip-flop 25 is turned on. set. The level detector 24 applies a high-level signal to the reset terminal R of the flip-flop 25 when the input combined current falls below a determination value for determining the number of inverters 40a and 40b to be operated. Reset.

  The current reference setting circuit 14b on the one inverter device 40b side is controlled during standby and during operation according to the setting state of the flip-flop 25.

  That is, when the flip-flop 25 is set, a high level output signal is output from the output terminal Q to the current reference setting circuit 14b, and the current reference value of the current reference setting circuit 14b is changed from the standby value to the current during normal operation. Change to the reference value.

  Further, the high level output signal from the output terminal Q is delayed for a predetermined time by the on-time delay circuit 26 and then input to the AND circuit 27. Since the AND circuit 27 is inserted in the signal path of the gate signal from the phase control circuit 21b to the inverse converter 3b, the inverse conversion connected in parallel when the input current of the current detection circuit 10a increases to a determination value or more. The device 3b is additionally operated.

  When the flip-flop 25 is reset, the output signal from the output terminal Q changes to a low level, so that the current reference value of the current reference setting circuit 14b returns to the standby value and the phase control circuit 21b returns the inverse converter. Since the gate signal to 3b is cut off, the operation of the inverse converter 3b is stopped.

  That is, in this frequency conversion device, at the time of start-up, only one inverter device 40a is operated, and when the input current of the current detection circuit 10a increases to a determination value or more, the other inverter device 40b is additionally operated. When the combined current of each of the current detection circuits 10a and 10b decreases below the determination value, the other inverter device 40b stops operating and is operated only by the original one inverter device 40a.

  The operation of this frequency converter will be described with reference to the time chart shown in FIG.

  The capacitor 4a of the starting circuit 4 is charged by a charging circuit (not shown) at the time of starting by a starting signal from an operation control unit (not shown). When charging is complete, disconnect the charging circuit. Next, in order to make the current of the DC reactor 2a of one inverter device 40a rise at time T1, the two serial thyristor elements u and x constituting the inverse conversion unit 3a are made conductive at the same time. The direct current portion (input side) of the converter 3a is short-circuited to be in a bypass pair state. Similarly, the inverse converter 3b of the other inverter device 40b is also in the bypass pair state.

  The currents (output currents) of the rectifiers 1a and 1b at this time are limited to required values by the current control circuits 16a and 16b of the rectifiers 1a and 1b, respectively. At time T2 when this current (output current) sufficiently rises, the energy charged in advance in the capacitor 4a of the starting circuit 4 by the control signal from the operation control unit (not shown) When the thyristor 4 b is fired and supplied to the parallel resonant load 7, an oscillating voltage is generated across the parallel resonant load 7.

  When the voltage generated by the lower side of the parallel resonant load 7 having a positive polarity is turned on by a control signal from an operation control unit (not shown) before inverting the polarity of the inverse converter 3a, Of the thyristor elements u and x that have been conducting the DC short-circuit current, the current of the thyristor element x is commutated to the thyristor element y. That is, a current (load current) flows through the parallel resonant load 7, and the parallel resonant load 7 is excited to generate a voltage.

  Thereafter, it is possible to shift from the bypass pair state to the steady state by alternately conducting the thyristor elements u, y, v, and x of the inverse converter 3a with the gate signal of the phase control circuit 21a.

  However, at this time, the inverse converter unit 3b is bypassed by not giving an ignition signal from the phase control circuit 21b to each thyristor element u, y, v, x constituting the inverse converter 3b of the other inverter device 40b. Maintain pair status. That is, the gate signal from the phase control circuit 21 b is blocked by the AND circuit 27.

  From time T2 to time T3, when the output of the rectifier 1a and the inverse converter 3a is increased by changing the voltage reference value of the voltage reference setting circuit 11a according to a command from an operation control unit (not shown), the load of the parallel resonant load 7 is increased. The voltage increases.

  When the heated material 8 is gradually inserted into the load coil 7b at time T4 after the output voltage reaches a predetermined value, the load impedance starts to decrease. As a result, when the output current of the inverse converter 3a (the input current of the rectifier 1a) becomes equal to or greater than the determination value at time T5, a predetermined ignition signal (gate signal) is sent from the phase control circuit 21b to the thyristor constituting the inverse converter 3b. As a result, the inverse converter 3b also shifts from the bypass pair operation to the normal operation. That is, the gate signal from the phase control circuit 21 b is supplied via the AND circuit 27. In this way, after time T5, the two inverse converters 3a and 3b supply power to the parallel resonant load 7 in parallel operation. The load impedance becomes stable at time T6.

  At time T7, when the material to be heated 8 begins to be removed from the load coil 7b, the load impedance starts to increase, and accordingly, the load resistance current and the forward converter output current also start to decrease. At time T8 when this value becomes a predetermined value or less, the two serial thyristor elements u, x, v, and y constituting the inverse converter 3b are turned on at the same time, and the inverse converter 3b is short-circuited to be in the bypass pair state again. Or stop it. In this case, the gate signal from the phase control circuit 21 b is blocked by the AND circuit 27. Thereby, only the output of the inverse converter 3a of one inverter apparatus 40a is supplied to the parallel resonant load 7 after time T8.

  However, the control device for the frequency converter shown in FIG. 2 still has the following problems to be solved.

  In the frequency converter that induction-heats the material to be heated attached to the parallel resonant load, the voltage of the load varies depending on the output of the frequency converter, so in the frequency converter shown in FIG. 2, each inverter device 40a, 40b Inverter phase control circuits 21a and 21b are provided for controlling the phase of conduction control of the thyristor elements of the inverse converters 3a and 3b. Since the phase control circuits 21a and 21b independently control the phase of the inverters 3a and 3b whose outputs are connected in parallel to each other, the outputs of the phase control circuits 21a and 21b interfere with each other. The output of the frequency conversion device may become unstable. Further, since the plurality of phase control circuits 21a and 21b are incorporated in one frequency conversion device, there is a problem that the frequency conversion device becomes complicated and the manufacturing cost increases.

  Further, in the process of starting up the frequency converter, if the input current of the current detection circuit 10a increases more than the determination value during the operation period of the inverter 3a of one inverter device 40a, the inverse conversion of the other inverter device 40b is performed. Since the converter 3b is activated, excessive power is temporarily supplied to the load at the instant of activation of the additional inverter 3b, and the output side of the frequency converter becomes overvoltage, and the operation is continued by the operation of the overvoltage protection circuit. There was a possibility of becoming impossible.

  The present invention has been made in view of such circumstances, and even when a plurality of inverse converters are in a parallel operation state, interference between controls for each inverse converter is prevented, and An object of the present invention is to provide a control device for a frequency converter that can be stably operated even during additional operation, in which the amount of overvoltage generated is greatly reduced.

The present invention in order to solve the above problems is for converting DC power rectifier and converted by the rectifier converts commercial AC power into dc power to high frequency AC power, the thyristor element is bridge-connected Inverter devices each having an inverter that is connected to a load that forms a resonance circuit and supplies high-frequency AC power output from a frequency conversion device that is connected in parallel to each other, and according to the load current that flows through the load In the control device of the frequency conversion device that changes the number of operating inverter devices, a voltage detection circuit that detects an output voltage to the load, and a plurality of current detection circuits that respectively detect an input current to each rectifier,
A gate signal for commonly controlling the phase of each of the inverse converters based on the output voltage detected by the voltage detection circuit and the input current detected by each of the current detection circuits ; A phase control unit for an inverter, and a gate signal for controlling an output of the corresponding rectifier based on an output voltage detected by the voltage detection circuit and an input current to the rectifier for each detected by the current detection circuit. And a plurality of phase control units for rectifiers to be sent to the corresponding rectifiers.

  In the control device of the frequency conversion device configured as described above, there is one phase controller for the inverse converter, and the gate signal of this one phase controller has the same timing for a plurality of inverters. The inverse converter is ignited with an ignition pulse. Therefore, even if a plurality of inverter devices are connected in parallel, the inverters of each inverter device are ignited and operated in the same phase so that no interference occurs.

  According to another aspect of the invention, in the control device for the frequency converter according to the invention described above, the phase control unit for the inverse converter selects the maximum input current among the input currents input from the plurality of current detection circuits. A margin selection circuit that outputs a control signal for margin angle control based on the input current selected by the maximum value selection circuit, the detected output voltage, and the margin angle reference, and the margin angle A phase control circuit that generates and outputs a gate signal using the control signal output from the control circuit.

  In the control device of the frequency converter configured as described above, the input current used for the constant margin angle control uses the maximum input current among the input currents input from the plurality of current detection circuits. It is operated at a margin angle that does not cause flow failure.

According to another aspect of the invention, the phase converter for the inverter includes a constant margin angle control circuit for controlling a constant margin angle, and the input of the constant margin angle control circuit is the control device for the frequency converter of the invention described above. As the current, the maximum input current among the input currents input from the plurality of current detection circuits is used.

  According to another aspect of the invention, in the control device for the frequency converter according to the invention described above, one designated phase control unit in the phase control unit for the plurality of rectifiers controls the input output voltage to a voltage reference value. A voltage control circuit for outputting a control signal for output, a current control circuit for outputting a control signal for controlling an input current input from a current detection circuit of a corresponding rectifier to a current reference value, and a control signal for the voltage control circuit And a phase control circuit that creates and outputs a gate signal using the larger control signal of the control signals of the current control circuit.

  Further, the other phase control unit in the phase control unit for a plurality of rectifiers, a current control circuit that outputs a control signal for controlling the input current input from the current detection circuit of the corresponding rectifier to a current reference value, and A phase control circuit for generating and outputting a gate signal using a control signal of a larger one of the control signal of the current control circuit and the control signal of the voltage control circuit of the designated phase control unit;

  In the control device of the frequency conversion device configured as described above, the voltage control circuit of the phase control unit for the rectifier is one circuit, and basically the rectifiers connected in parallel are ignited with the same phase. The circuit becomes simple and an increase in manufacturing cost can be suppressed.

  According to another invention, in the control device for the frequency converter according to the above-described invention, when the combined current of each input current detected by each current detection circuit exceeds a determination value for increasing the number of operating inverter devices, additional operation is performed. After the additional operation, the starting means for starting the phase control unit of the inverter device, the additional operation is performed for a predetermined time from the start time of the inverter device, the rectifier of the currently operating inverter device and the gate signal for the additional operation of the inverter device rectifier And changing means for changing the output voltage so as to be lower than the output voltage currently in operation.

  In the control device for the frequency converter configured as described above, since the output voltage of each rectifier decreases excessively when the inverse converter is additionally operated, the overvoltage generated when the inverse converter is additionally activated is reduced.

  According to the present invention, even if a plurality of inverter devices are connected in parallel, the inverters of each inverter device operate in the same phase, so there is no interference and stable operation is possible. In addition, it is possible to reduce the overvoltage generated when the inverse converter is additionally activated.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing a schematic configuration of a control device of a frequency conversion device according to an embodiment of the present invention. The same parts as those in the control apparatus of the conventional frequency converter shown in FIG. 2 are denoted by the same reference numerals, and detailed description of the overlapping parts is omitted, and only different parts will be described here.

  In the control device of the frequency converter according to this embodiment, the voltage reference setting circuit 11b, the subtractor 12b, the voltage control circuit 13b, the margin on the other inverter device 40b side in the control device of the conventional frequency converter shown in FIG. The angle reference setting circuit 19b, the margin angle control circuit 20b, and the phase control circuit 21b are omitted.

  Each input current from each current detection circuit 10 a, 10 b is input to maximum value selection circuit 28. The maximum value selection circuit 28 selects the larger input current among the input currents from the current detection circuits 10a and 10b and inputs the selected input current to the margin angle control circuit 20a.

  The margin angle control circuit 20a performs control so that the margin angle between the input current selected by the maximum value selection circuit 28 and the output voltage from the voltage detection circuit 9 becomes the margin angle reference specified by the margin angle reference setting circuit 19a. The signal is sent to the phase control circuit 21a. The phase control circuit 21a creates a gate signal having a rising timing calculated based on the input control signal and sends it to each of the inverse converters 3a and 3b. The gate signal from the phase control circuit 21a is sent to the inverse converter 3b via the AND circuit 27.

  Therefore, each inverse converter 3a, 3b is operated in a state having a margin angle reference.

  Here, the phase control unit for the inverse converter includes a maximum value selection circuit 28, a margin angle control circuit 20a, and a phase control circuit 21a.

  Input currents from the current detection circuits 10a and 10b are added by the adder 22 and input to the level detectors 23 and 24 as a combined current. The level detector 23 applies a high level signal to the set terminal S of the flip-flop 25 when the input combined current rises above a determination value for determining the number of inverters 40a, 40b to be operated, and the flip-flop 25 is turned on. set. The level detector 24 applies a high-level signal to the reset terminal R of the flip-flop 25 when the input combined current falls below a determination value for determining the number of inverters 40a and 40b to be operated. Reset.

  The current reference setting circuit 14b on the one inverter device 40b side is controlled during standby and during operation according to the setting state of the flip-flop 25.

  That is, when the flip-flop 25 is set, a high level output signal is output from the output terminal Q to the current reference setting circuit 14b, and the current reference value of the current reference setting circuit 14b is changed from the standby value to the current during normal operation. Change to the reference value.

  A high level output signal from the output terminal Q of the flip-flop 25 is input to the pulse generation circuit 29. When a high-level output signal is input, the pulse generation circuit 29 sends a pulse waveform signal to one input terminal of the adder 30. A control signal from the voltage control circuit 13 a is input to the other input terminal of the adder 30. The adder 30 adds the pulse waveform signal to the control signal from the voltage control circuit 13a, and sends it as a new control signal to the high level priority circuits 17a and 17b.

  The high level priority circuits 17a and 17b compare a new control signal from the adder 30 with a control signal from the current control circuits 16a and 16b, select a control signal with a high signal level, and select the phase control circuits 18a and 18b. To send. The phase control circuits 18a and 18b create a gate signal having a gate width calculated based on the input control signal and send it to the rectifiers 1a and 1b.

  Further, the high level output signal from the output terminal Q of the flip-flop 25 is delayed by a predetermined time by the on-time delay circuit 26 and then input to the AND circuit 27. Since the AND circuit 27 is inserted in the signal path of the gate signal from the phase control circuit 21a to the inverse converter 3b, the inverse conversion connected in parallel when the input current of the current detection circuit 10a increases to a determination value or more. The device 3b is additionally operated.

  When the flip-flop 25 is reset, the output signal from the output terminal Q changes to the low level, so that the current reference value of the current reference setting circuit 14b returns to the standby value and the phase control circuit 21a returns to the inverse converter. Since the gate signal to 3b is cut off, the operation of the inverse converter 3b is stopped.

  That is, in this frequency conversion device, at the time of start-up, only one inverter device 40a is operated, and when the input current of the current detection circuit 10a increases to a determination value or more, the other inverter device 40b is delayed for a predetermined time and then the additional operation is performed. Is done. When the combined current of each of the current detection circuits 10a and 10b decreases below the determination value, the other inverter device 40b stops operating and is operated only by the original one inverter device 40a.

  Here, each phase control unit for the rectifier includes a voltage control circuit 13a, current control circuits 16a and 16b, high level priority circuits 17a and 17b, and phase control circuits 18a and 18b.

  Next, characteristics of the control device of the frequency converter according to the embodiment configured as described above will be described.

First, the case where two stationary inverter devices 40a and 40b are operated in parallel will be described.
In the control device for the frequency converter according to the embodiment, during the normal operation, the inverse converters 3a and 3b are controlled by the gate signals having the same phase from the phase control circuit 21a, so that they do not interfere with each other.

  Further, since the maximum value selection circuit 28 inputs the maximum value of the input current of the current detection circuit 10a and the input current of the current detection circuit 10b to the margin angle control circuit 20a, the margin angle control circuit 20a has a margin angle that does not cause a commutation failure. Driven.

  In such a frequency converter, the voltage control angle (control signal of the voltage control circuit 13a) is larger than the control angle of current control (control signals of the current control circuits 16a and 16b) in normal operation. Is set to Since the flip-flop 25 is set during normal operation, the output of the pulse generation circuit 29 is “0”, so the output of the adder 30 is equal to the control signal of the voltage control circuit 13a. Accordingly, the output of the high level priority circuit 17a and the output of the high level priority circuit 17b are equal and equal to the control signal of the voltage control circuit 13a. Therefore, since the rectifier 3a and the rectifier 3b are controlled by the same phase gate signal, they do not interfere with each other.

  As described above, even if the two inverter devices 40a and 40b are connected in parallel, the two inverter devices 40a and 40b are operated in the same phase, so there is no interference and stable operation is possible.

  Next, it will be described that the other inverse converter 3b is additionally activated while one inverse converter 3a is in operation.

  When the material to be heated 8 enters the load coil 7b and the load impedance decreases and the current increases, the input current of the current detection circuit 10a increases, the combined current of the adder 22 also increases, and the level detector 23 determines. When the value is exceeded, a high-level output signal is output from the output terminal Q of the flip-flop 25, delayed by a predetermined time by the on-time delay circuit 26, and then input to the AND circuit 27. Since the AND circuit 27 is inserted in the signal path of the gate signal from the phase control circuit 21a to the inverse converter 3b, the inverse conversion connected in parallel when the input current of the current detection circuit 10a increases to a determination value or more. The device 3b is additionally operated.

  At the same time, a high level output signal from the output terminal Q of the flip-flop 25 is input to the pulse generation circuit 29 to the pulse circuit 29. The pulse generation circuit 29 sends a pulse waveform signal to the adder 30. The adder 30 adds the pulse waveform signal to the control signal from the voltage control circuit 13a, and sends it as a new control signal to the high level priority circuits 17a and 17b.

  In normal operation, since the output of the voltage control circuit 13a is larger than the output of the current control circuits 16a and 16b, the high level priority circuits 17a and 17b provide a new control signal obtained by adding a pulse waveform signal to the control signal of the voltage control circuit 13a. Select and send to phase control circuits 18a, 18b. That is, before the inverse converter 3b is started, the gate signals of the phase control circuits 18a and 18b have a phase delay corresponding to the value of the pulse waveform signal (the gate width is narrow) to the rectifiers 1a and 1b. Will be output.

  Accordingly, since the output voltages of the rectifiers 1a and 1b are temporarily reduced, the power supplied from the respective inverse converters 3a and 3b to the parallel resonant load 7 is also reduced. Therefore, when the inverse converter 3b is additionally activated. The generated overvoltage of the load is reduced.

  As described above, in the control device of the frequency converter according to the embodiment, even if two inverter devices are connected in parallel, each inverter is operated in the same phase, so there is no interference and stable operation is possible. It is. In addition, it is possible to reduce the overvoltage generated when the inverse converter is additionally activated. In addition, the control circuit is simplified and an increase in manufacturing costs can be suppressed.

  In addition, this invention is not limited to embodiment mentioned above. The frequency conversion device can be composed of three inverter devices connected in parallel to each other or four inverter devices connected in parallel to each other.

The block diagram which shows schematic structure of the control apparatus of the frequency converter concerning one Embodiment of this invention. The block diagram which shows schematic structure of the control apparatus of the conventional frequency converter Timing chart showing the operation of the control device of the conventional frequency converter

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1a, 1b ... Rectifier, 2a, 2b ... DC reactor, 3a, 3b ... Inverter, 4 ... Starting circuit, 4a ... Capacitor, 4b ... Thyristor, 5 ... Output voltage transformer, 6a, 6b ... Input current transformer, DESCRIPTION OF SYMBOLS 7 ... Parallel resonance load, 7a ... Power factor improvement capacitor, 7b ... Load coil, 8 ... Heated material, 9 ... Voltage detection circuit, 10a, 10b ... Current detection circuit, 11a, 11b ... Voltage reference setting circuit, 12a, 12b 15a, 15b ... subtractor, 13a, 13b ... voltage control circuit, 14 ... current reference setting circuit, 16a, 16b ... current control circuit, 17a, 17b ... high level priority circuit, 18a, 18b, 21a, 21b ... phase control Circuit, 19a, 19b ... margin angle reference setting circuit, 20a, 20b ... margin angle control circuit, 22, 30 ... adder, 23, 24 ... level detection circuit, 25 ... flip-flop , 26 ... delay circuit at ON, 27 ... AND circuit, 28 ... maximum value selection circuit, 29 ... pulse circuit, u, v, x, y ... thyristor element, 40a, 40b ... inverter device

Claims (5)

A converts the DC power rectifier and converted by the rectifier converts commercial AC power into dc power to high frequency AC power, an inverter device including an inverse transformer comprising a thyristor element is bridge-connected A frequency for supplying high-frequency AC power output from a frequency converter connected in parallel to a load that forms a resonance circuit and changing the number of operating inverter devices according to the load current flowing through the load In the control device of the conversion device,
A voltage detection circuit for detecting an output voltage to the load;
A plurality of current detection circuits for respectively detecting input currents to the rectifiers;
A gate signal for commonly controlling the phase of each of the inverse converters based on the output voltage detected by the voltage detection circuit and the input current detected by each of the current detection circuits . A phase controller for the inverse converter;
A plurality of gate signals for controlling the outputs of the corresponding rectifiers based on the output voltages detected by the voltage detection circuits and the input currents to the rectifiers detected by the current detection circuits to the corresponding rectifiers. A control device for a frequency converter, comprising: a phase controller for a rectifier. The phase converter for the inverse converter includes a constant margin angle control circuit that controls a constant margin angle, and the input current of the constant margin angle control circuit is the input current input from the plurality of current detection circuits. 2. The control device for a frequency converter according to claim 1, wherein the maximum input current is used. The phase converter for the inverse converter includes a maximum value selection circuit that selects a maximum input current among the input currents input from the plurality of current detection circuits, and an input current selected by the maximum value selection circuit; A margin angle control circuit that outputs a control signal for margin angle control based on the detected output voltage and margin angle reference, and the gate signal is created using the control signal output from the margin angle control circuit And a phase control circuit for outputting to each of the inverse converters . One designated phase control unit in the phase control unit for the plurality of rectifiers includes a voltage control circuit that outputs a control signal for controlling the input output voltage to a voltage reference value, and a current of a corresponding rectifier A current control circuit that outputs a control signal for controlling an input current input from the detection circuit to a current reference value; and a control signal that is larger of the control signal of the voltage control circuit and the control signal of the current control circuit A phase control circuit that creates the gate signal using and outputs the gate signal to each rectifier ,
The other phase control unit in the phase control unit for the plurality of rectifiers, a current control circuit that outputs a control signal for controlling the input current input from the current detection circuit of the corresponding rectifier to a current reference value, and this A phase control circuit that generates and outputs the gate signal using a control signal of a larger one of a control signal of a current control circuit and a control signal of a voltage control circuit of the designated phase control unit; The control device of the frequency conversion device according to claim 1 . When the combined current of each input current detected by each of the current detection circuits exceeds a determination value for the increase in the number of operating inverter devices, starting means that is additionally operated to start the phase control unit of the inverter device;
The rectifier of the inverter device that is currently operating and the gate signal to the rectifier of the additionally operated inverter device for a predetermined time from the startup time of the inverter device that has been additionally operated so that the output voltage after the additional operation drops below the output voltage that is currently operating 5. The control device for a frequency converter according to claim 1, further comprising changing means for changing to

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