JP4588985B2 - Harmonic analyzer - Google Patents

Description

  The present invention relates to an apparatus for analyzing harmonics generated in an AC circuit such as a three-phase AC circuit.

  Today, currents flowing in electric devices such as televisions, inverter-type fluorescent lamps, and air conditioners often contain harmonic components. Also, when a device that generates harmonics is connected to the power facility, harmonic current flows through the AC circuit. Since such harmonics adversely affect other electrical equipment, it is necessary to perform harmonic analysis.

  FIG. 7 is a system diagram of an apparatus for analyzing harmonic current flowing in a three-phase four-wire three-phase AC circuit. FIG. 8 is a diagram showing the installation positions of the input terminals of the harmonic analysis apparatus. The three-phase AC circuit shown in the figure is a star-star connection, and in addition to the R-phase, S-phase, and T-phase, the neutral points are connected and has a three-phase 4-wire connection.

  In this case, r, s, t, and w in the connection diagram shown in the figure indicate input terminals of the harmonic analysis apparatus. These input terminals detect the corresponding signals i1 (t), i2 (t), i3 (t), i4 (t) and output them to the input circuits 1 to 4, respectively. The input circuits 1 to 4 normalize the detected current, send it to a corresponding ADC (analog / digital converter), and convert it into digital data using a common sampling clock.

  A DSP (digital signal processor) 5 processes the input signal converted into the digital data and stores it in the memory 6. The signal stored in the memory 6 is subjected to FFT (Fast Fourier Transform), and the processing result is output to the CPU 7. The CPU 7 displays the calculation result on the display 8 and performs harmonic analysis processing.

  Patent Document 1 discloses a configuration in which a fundamental wave component or a harmonic component of an AC frequency is extracted and the harmonic current of the AC power system is reliably compensated.

Japanese Patent Laid-Open No. 9-209644

    In the conventional harmonic analysis apparatus, in addition to the R phase, S phase, and T phase, neutral points are connected to perform harmonic analysis, so that a harmonic analysis apparatus having a four-input circuit is required. For this reason, the conventional harmonic analysis apparatus causes an increase in the cost of the apparatus.

According to the first aspect of the present invention, there are provided n input circuits for inputting a waveform signal including harmonics, and n pieces of signals for converting a signal input from the input circuit into digital waveform signal data. A conversion circuit; an arithmetic unit for generating other waveform signal data related to the waveform signal data from the waveform signal data input from the n number of conversion circuits; and an input from the arithmetic unit and the n number of conversion circuits A memory for storing the waveform signal data, a fast Fourier transform computing unit for Fourier transforming the waveform signal data read from the memory, and a display for displaying the computation result,
The waveform signal input to the input circuit is a signal of a current waveform flowing through two lines of the inverter type fluorescent lamp, and the waveform signal data generated by the computing unit is waveform signal data of a lamp current flowing through the fluorescent lamp. This can be achieved by providing a harmonic analyzer characterized by the above.

  Here, the input circuit is composed of n circuits having the same configuration. For example, n signals including harmonics are received from an input terminal for detecting a waveform signal, and normalization processing is performed in each circuit.

  The arithmetic unit adds, subtracts, multiplies, or divides the waveform signals input from the n input circuits to generate waveform signals related to the n waveform signals, and performs fast Fourier transform processing. The amplitude value of the signal with respect to the frequency and the harmonic order is displayed on the display with a numerical value and a graph.

  With this configuration, even a harmonic analysis apparatus having only a small number of input circuits (for example, n input circuits) can generate higher harmonics of more input signals (for example, n + 1 or more input signals). Analysis can be possible.

The waveform signal is converted into a digital signal by a conversion circuit and then stored in the memory.
With this configuration, subsequent signal processing can be facilitated.

The waveform signal input to the input circuit is a signal of a current waveform flowing through two lines of an inverter type fluorescent lamp, and the waveform signal generated by the computing unit is a waveform signal of a lamp current flowing through the fluorescent lamp. .
In this example, a waveform signal of the lamp current flowing through the fluorescent lamp is generated from the current waveform flowing through the two lines of the inverter type fluorescent lamp, and harmonic analysis of the lamp current is also possible.
With this configuration, harmonic analysis can be performed even for a lamp current that is difficult to analyze conventionally.

According to a second aspect of the present invention, in the first aspect of the present invention, the computing unit is an adder, a subtracter, a multiplier, a divider, or a complex thereof.
According to a third aspect of the present invention, in the first or second aspect, the calculation result displayed on the display is based on display control of the CPU.

With the above-described configuration, the present invention can perform harmonic analysis of more signals by using a harmonic analysis apparatus having a small number of input circuits, and can use a low-cost harmonic analysis apparatus.
In addition, it is possible to perform harmonic analysis of signals that have been difficult to analyze in the past.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
(Embodiment 1)
FIG. 1 is a circuit diagram of a three-phase four-wire three-phase AC circuit using the harmonic analysis apparatus of the present embodiment. In the figure, a power source 10 is an AC power source such as a three-phase induction generator or a synchronous generator, and is star-connected. Therefore, it has a neutral point 10a in addition to the R phase, the S phase, and the T phase. On the other hand, the load 11 is a three-phase load such as a three-phase induction motor, and is a load that easily generates harmonics.

  The power supply 10 and the load 11 are respectively connected between corresponding phases, and further neutral points 10a and 11a are connected by a neutral wire. Each line is provided with input terminals r, s, and t for detecting harmonics of the current flowing through the line, and detects harmonics of the current flowing through the line.

  FIG. 2 is a system configuration diagram of the harmonic analysis apparatus of this example. In the figure, input circuits 12 to 14 are circuits for normalizing harmonic signals detected at the input terminals r, s, and t.

  The ADCs 15 to 17 convert input analog signals into digital data using a common sampling clock and output the digital data to a DSP (digital signal processor) 18. This sampling clock is set to a frequency obtained by multiplying the frequency of the fundamental wave of the input analog signal by an integral multiple (for example, 512 times).

  FIG. 3 is a circuit diagram illustrating a circuit configuration of a DSP (digital signal processor) 18. A memory 19 is connected to the DSP 18. The DSP 18 includes a calculator 20 and an FFT (Fast Fourier Transform) calculator 21, and the output of the calculator 20 is supplied to the memory 19. The output of the memory 19 is output to an FFT (Fast Fourier Transform) calculator 21.

The arithmetic unit 20 adds the detection signals i1 (m), i2 (m), i3 (m) converted into digital data by the ADCs 15 to 17 and writes them in the memory 19. m indicates the order of digital data when the signal at time t is A / D converted. The computing unit 20 adds i1 (m), i2 (m) and i3 (m) input at the same time, and computes i4 (m) flowing through the neutral line. That is,
i4 (m) = i1 (m) + i2 (m) + i3 (m)
And the addition result is stored in the memory 19 for the number of data obtained between integer multiples of the fundamental wave period. FIG. 4 shows the calculation results (i4 (m)) for the detection currents i1 (m), i2 (m), and i3 (m) using waveform diagrams.

Next, the stored values of i1 (m), i2 (m), i3 (m) and the stored value of i4 (m) as a calculation result are read from the memory 19 to an FFT (Fast Fourier Transform) computing unit 21, An FFT (Fast Fourier Transform) process is performed for each. This result is output to the CPU 22, and the CPU 22 displays each calculation result on the display 23.
In order to perform FFT (Fast Fourier Transform) processing, as described above, all data obtained in an integer multiple of the fundamental wave period must exist. For this reason, the necessary number of data calculated by the arithmetic unit is temporarily stored in the memory. As the memory at this time, the inside of the memory 19 may be divided into regions, or a separate memory may be provided.

By performing the processing as described above, harmonic analysis of the current flowing through the neutral wire of the three-phase four-wire three-phase AC circuit can be performed using the three-input terminal harmonic analysis device.
In the first embodiment, the harmonic analysis device used for the star-star connection three-phase AC circuit has been described. However, the same applies to the harmonic analysis of the phase voltage on the power source side of the star-delta connection shown in FIG. Can be applied to. In the example shown in the figure, the three-phase load 30 is a delta connection, and the three-phase power supply 31 is a star connection.

And the voltage signal of line voltage U1 (t) and U2 (t) is detected, and the voltage of each phase is as follows by DSP (arithmetic unit).
U4 (m) = U1 (m)-(U1 (m) + U2 (m)) / 3
U5 (m) = U2 (m)-(U1 (m) + U2 (m)) / 3
U6 (m) =-(U1 (m) + U2 (m)) / 3

  Then, an FFT (Fast Fourier Transform) operation is performed on each calculation result and displayed on the display, thereby enabling harmonic analysis of each phase voltage.

(Embodiment 2)
Next, Embodiment 2 of the present invention will be described. This example is a harmonic analysis device for lamp current of an inverter type fluorescent lamp.

  FIG. 6 is a circuit diagram of an inverter type fluorescent lamp. In the figure, a fluorescent material such as mercury or argon gas is sealed in a fluorescent lamp (fluorescent tube) 25, and a lamp current is supplied into the fluorescent lamp 25 by power supply from an AC power supply 27 supplied via a ballast 26. To emit light.

  For this circuit, harmonic analysis of the lamp current is usually difficult. However, according to this example, the harmonic analysis of the lamp current can be performed by using the harmonic analysis device having two input terminals.

That is, as in the above-described embodiment, the harmonic signals detected at the input terminals a and b are normalized, converted into digital data by the ADC, and output to the DSP. As described above, the DSP is composed of an arithmetic unit and an FFT arithmetic unit, and subtracts i2 (m) from the detection signal i1 (m), which is digital data, to calculate a lamp current i3 (m).
That is, i3 (m) = i1 (m) -i2 (m)
And the FFT (Fast Fourier Transform) is performed to obtain the lamp current i3 (m), and the harmonics included in the lamp current are analyzed.

  As described above, according to this example, the harmonic analysis of the lamp current of the inverter type fluorescent lamp can be performed.

FIG. 3 is a circuit diagram of a three-phase four-wire three-phase AC circuit that uses the harmonic analysis apparatus of the first embodiment. It is a system configuration figure of a harmonic analysis device. It is a figure explaining the circuit structure of DSP (digital signal processor). It is a figure which shows the calculation result with respect to each detection current using a waveform diagram. It is a figure explaining the modification of Embodiment 1. FIG. FIG. 10 is a diagram for explaining harmonic analysis of the second embodiment. It is a system diagram of the analysis apparatus of the harmonic current which flows into the conventional three-phase alternating current circuit. It is a figure which shows the installation position of the input terminal of the conventional harmonic analyzer.

Explanation of symbols

10 Power supply 10a Neutral point 11 Load 11a Neutral wire 12, 13, 14 Input circuit 15, 16, 17 ADC
18 DSP (Digital Signal Processor)
19 memory 20 computing unit 21 FFT computing unit 22 CPU
23 Display

Claims (3)

N input circuits for inputting waveform signals including harmonics;
N conversion circuits for converting a signal input from the input circuit into digital waveform signal data;
A calculator for generating other waveform signal data related to the waveform signal data from the waveform signal data input from the n number of conversion circuits;
A memory for storing waveform signal data input from the arithmetic unit and the n number of conversion circuits;
A fast Fourier transform operator for Fourier transforming the waveform signal data read from the memory;
A display for displaying the calculation result;
Have
The waveform signal input to the input circuit is a signal of a current waveform flowing through two lines of the inverter type fluorescent lamp, and the waveform signal data generated by the computing unit is waveform signal data of a lamp current flowing through the fluorescent lamp. Harmonic analyzer characterized by that.   2. The harmonic analysis apparatus according to claim 1, wherein the arithmetic unit is an adder, a subtracter, a multiplier, a divider, or a complex thereof.   The harmonic analysis apparatus according to claim 1 or 2, wherein the calculation result displayed on the display is based on display control of a CPU.

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