JP4590838B2 - Inverter device - Google Patents

Description

  According to the present invention, a DC voltage obtained from a three-phase AC power source through a converter unit including a diode rectifier circuit and a smoothing capacitor is converted into an AC voltage having a desired voltage and frequency by an inverter unit including an inverter main circuit and a control circuit. The present invention relates to an inverter device that converts power into a load and supplies power to a load.

  In this type of inverter device, each diode or smoothing capacitor of the diode rectifier circuit constituting the converter unit is overloaded due to an imbalance in the phase voltage of the three-phase AC power source or an open phase of one of the phases. As a result, the diode and the smoothing capacitor are damaged. In order to prevent this, there is a method of detecting an open phase relay by installing an open phase relay on the three-phase AC power supply side, but in this case, an expensive open phase relay is necessary, and further, the installation space Therefore, the downsizing and cost reduction of the inverter device have been hindered. For this reason, adding the phase loss detection function of the said three-phase alternating current power supply in an inverter apparatus is also performed (for example, refer patent document 1).

  FIG. 8 is a circuit configuration diagram of a conventional inverter device including the above-mentioned patent document, wherein 1 is a three-phase AC power source, 2 is an inverter device, and 3 is an electric motor as a load of the inverter device 2. The inverter device 2 includes a diode rectifier circuit 21 formed by connecting diodes in a three-phase bridge, an electrolytic capacitor 22 as a smoothing capacitor, and an anti-parallel circuit of, for example, an IGBT (insulated gate / bipolar transistor) and a diode. An inverter main circuit 23 formed by phase bridge connection, a control circuit 24 for controlling the output of the inverter main circuit 23 to a desired voltage and frequency, a voltage detector 25 for detecting the voltage across the electrolytic capacitor 22, Phase loss detection means 26 is provided.

  The voltage detector 25 shown in FIG. 8 detects, for example, that the voltage across the electrolytic capacitor 22 has risen to a predetermined value or more with regenerative power from the motor 3, and operates a resistance discharge circuit (not shown) that suppresses this rise. Can be shared with other voltage detectors. Further, the phase loss detection means 26 includes, for example, a high-pass filter circuit, a frequency measurement circuit, a phase loss signal output circuit, and the like. The ripple component of the voltage is extracted, the frequency of the ripple component is measured by the frequency measuring circuit, and when the measured frequency is twice the fundamental frequency of the three-phase AC power supply 1, the phase loss is detected. The signal output circuit detects this and sends an open phase signal to the control circuit 24. When this open phase signal is issued, the control circuit 24 stops its control operation.

That is, the phase loss detection means 26 shown in FIG. 8 normally has a frequency of the ripple component that is six times the fundamental frequency of the three-phase AC power source 1, and any one of the three-phase power sources 1 This is made by paying attention to the fact that the frequency of the ripple component becomes twice the fundamental frequency of the three-phase AC power supply 1 when the phase is in an open phase state.
Japanese Patent Laid-Open No. 11-206003 (pages 2 to 3, FIG. 1)

In the conventional inverter device shown in FIG. 8, each of the diode rectifier circuits 21 is caused by the phase loss of any phase of the three-phase AC power supply 1 by adding the phase loss detection means 26 described above. Although it is possible to prevent the diode and the electrolytic capacitor 22 from being damaged, in particular, an AC reactor (not shown) or a diode that may be inserted in a connection path between the three-phase AC power supply 1 and the diode rectifier circuit 21. Due to a DC reactor (not shown) that may be inserted in the connection path between the rectifier circuit 21 and the electrolytic capacitor 22, the phase voltage unbalance amount of the three-phase AC power supply 1 is relatively less than an allowable value. Even if the value is small, the phase loss detection means 26 may erroneously output the phase loss signal.

  An object of the present invention is to provide an inverter device that solves the above problems.

  In order to solve the above problems, the inverter device according to claim 1, that is, a DC voltage obtained from a three-phase AC power source through a converter unit including a diode rectifier circuit and a smoothing capacitor, is controlled with the inverter main circuit. In an inverter device that converts an AC voltage having a desired voltage and frequency and supplies power to a load by an inverter composed of a circuit, obtains a time differential value of the DC voltage and multiplies the time differential value by a predetermined frequency coefficient value. A square value of the obtained value is derived, and the conversion operation of the inverter unit is stopped when a value obtained by multiplying the square value by a predetermined first-order lag coefficient exceeds a predetermined allowable value. .

  In the inverter device according to claim 2, a time differential value of the DC voltage is obtained, a square value of a value obtained by multiplying the time differential value by a predetermined frequency coefficient value is derived, and the square value is calculated in advance. When the duration of the value divided by the determined base value exceeds a predetermined inverse time characteristic value, the conversion operation of the inverter unit is stopped.

  According to the present invention, the above-described arithmetic function can be easily performed especially when it corresponds to digital control by the microcomputer of the inverter device, and the A / D converter for operating the above-described resistance discharge circuit, etc. Since this inverter device does not require a new hardware circuit and can be easily implemented by adding only a microcomputer program, the protection function of this type of inverter device can be improved and its performance improved. It can contribute to cost reduction.

  FIG. 1 is a circuit configuration diagram showing an embodiment of an inverter device according to the present invention. Components having the same functions as those in the configuration of the conventional example shown in FIG. That is, in the inverter device 4 shown in FIG. 1, instead of the phase loss detection means 26 in the conventional inverter device 2, any one of the overload detection means 41 to 46 and the overload detection means are provided. When operating and issuing a stop signal, a control circuit 24a replacing the control circuit 24 has a function of stopping the control operation.

FIG. 2 shows a first embodiment of the present invention, and is a detailed circuit configuration diagram of the overload detection means 41 shown in FIG. 1. The overload detection means 41 calculates a time differential value of the DC voltage _VDC. The dV _DC / dt calculator 51, the allowable value setter 52, and the comparator 53 are configured.

First, as shown in FIG. 1, when the voltage across the electrolytic capacitor 22 is V _DC [V] and the ripple current flowing through the electrolytic capacitor 22 is i _C [A], the relationship of the following formula (1) is established.

(Equation 1)
i _C = C · dV _DC / dt (1)
Here, C [F] is the capacitance of the electrolytic capacitor 22.

That is, the dV _DC / dt calculator 51 obtains the rate of change per unit time of the DC voltage V _DC across the electrolytic capacitor 22 , that is , the time differential value [dV _DC / dt] of the DC voltage V _DC. In the device 4, since the electrostatic capacitance C of the electrolytic capacitor 22 is a constant value, the obtained time differential value [dV _DC / dt] is a value proportional to the ripple current [i _C ] flowing through the electrolytic capacitor 22. .

When the unbalance amount of the phase voltage of the three-phase AC power supply 1 is increased or when any phase is lost, the ripple current [i _C ] flowing through the electrolytic capacitor 22 is increased. The temperature rise also increases, and the electrolytic capacitor 22 may be damaged or its life may be shortened. Therefore, in the overload detection means 41, the time differential value [dV _DC / dt] obtained by the dV _DC / dt calculator 51 is an allowable value set by the allowable value setter 52 (for example, the three-phase AC power source 1). When the voltage exceeds 200V, the comparator 53 detects this and sends a stop signal to the control circuit 24a. Based on this stop signal, the control circuit 24a By stopping the control operation, it is possible to prevent the electrolytic capacitor 22 from being damaged or shortened.

In addition, when each diode forming the diode rectifier circuit 21 is in a state where the amount of unbalance of the phase voltage of the three-phase AC power supply 1 is increased or a state where one of the phases is lost, the phase of the affected phase is also increased. The current flowing in the diode increases, and with this increase, the temperature rises and the diode may be damaged. The increase in the diode current is also obtained by the time differential obtained by the dV _DC / dt calculator 51. In order to increase the value [dV _DC / dt], the overload detection means 41 can also prevent the diode from being damaged.

  FIG. 3 shows a second embodiment of the present invention, which is a detailed circuit configuration diagram of the overload detection means 42 shown in FIG. 1, and has the same function as the overload detection means 41 shown in FIG. Are denoted by the same reference numerals, and the description thereof is omitted here.

That is, the overload detection means 42 is formed of a dV _DC / dt calculator 51, a squarer 61, an allowable value setter 62, and a comparator 63.

When the unbalance amount of the phase voltage of the three-phase AC power supply 1 is increased or when any phase is lost, the ripple current [i _C ] flowing through the electrolytic capacitor 22 is increased. However, since the temperature rise at this time is proportional to the square of the ripple current, the overload detection means 42 uses the DC voltage obtained by the dV _DC / dt calculator 51. The time differential value [dV _DC / dt] of V _DC is converted to a value [{dV _DC / dt} ² ] squared by the squarer 61, and the square value is set to the allowable value set by the allowable value setting unit 62. When the value exceeds the value (for example, when the voltage of the three-phase AC power supply 1 is 200 V system, it is set to about 60 to 90 V ² /0.5 mS ² ), the comparator 63 detects this and sends a stop signal to the control circuit 24 a. Control circuit 24 based on the stop signal. By stopping the control operation, it is possible to prevent damage or shorter lifetime of the electrolytic capacitor 22.

  In addition, when each diode forming the diode rectifier circuit 21 is in a state where the amount of unbalance of the phase voltage of the three-phase AC power supply 1 is increased or a state where one of the phases is lost, the phase of the affected phase is also increased. The current flowing through the diode increases, and heat is generated with this increase. Since the amount of generated heat is proportional to the square of the flowing current, the overload detection means 42 described above can prevent damage to the diode. it can.

  4 is a detailed circuit diagram of the overload detection means 43 shown in FIG. 1, showing a third embodiment of the present invention. The overload detection means 41 shown in FIG. 2 and the overload detection means 41 shown in FIG. Components having the same functions as those of the load detecting means 42 are denoted by the same reference numerals, and description thereof is omitted here.

That is, the overload detection means 43 includes an OR element 64 in addition to the dV _DC / dt calculator 51, the allowable value setting unit 52, the comparator 53, the square unit 61, the allowable value setting unit 62, and the comparator 63. Therefore, the phase voltage unbalance amount of the three-phase AC power source 1 is increased, or one of the phases is lost. When at least one of them operates, a stop signal is sent to the control circuit 24a via the OR element 64, and the control circuit 24a stops the control operation based on the stop signal, thereby diode rectification. Damage to the diode forming the circuit 21 and the electrolytic capacitor 22 and shortening of the life can be prevented.

  FIG. 5 shows a fourth embodiment of the present invention, which is a detailed circuit configuration diagram of the overload detection means 44 shown in FIG. 1, and has the same function as the overload detection means 41 shown in FIG. Are denoted by the same reference numerals, and the description thereof is omitted here.

That is, in addition to the dV _DC / dt calculator 51, the allowable value setter 52, and the comparator 53, a timer 71 is added to the overload detection means 44. This overload detection means 44 sends a stop signal to the control circuit 24a via the timer 71 when the period during which the above-described overload detection means 41 is operating continues for 0.5S or more, for example. The control circuit 24a stops the control operation based on the stop signal, thereby improving the reliability of the stop signal.

  FIG. 6 shows a fifth embodiment of the present invention, which is a detailed circuit configuration diagram of the overload detection means 45 shown in FIG. 1, and has the same function as the overload detection means 41 shown in FIG. Are denoted by the same reference numerals, and the description thereof is omitted here.

That is, the overload detecting means 45 and dV _DC / dt calculator 51, a frequency coefficient calculator 81, a multiplier 82, a squarer 83, a first-order lag calculator 84, an allowable value setting unit 85, Comparator 86 is formed.

When the unbalance amount of the phase voltage of the three-phase AC power supply 1 is increased or when any phase is lost, the ripple current [i _C ] flowing through the electrolytic capacitor 22 is increased. However, the temperature rise value at this time depends on the frequency of the ripple current, that is, the temperature rise value increases as the frequency decreases. A coefficient depending on the frequency of the ripple current set by the frequency coefficient calculator 81 is derived from the time differential value [dV _DC / dt] of the DC voltage _VDC obtained by the _DC / dt calculator 51, and this coefficient was multiplied by the time differential value by the multiplier 82, by converting the multiplied value by squarer 83 to the square values, to derive the temperature rise value that depends on the frequency of the ripple current, further, Since it takes about 5 to 10 minutes for the electrolytic capacitor 22 to actually rise in response to the temperature rise value, the operation corresponding to this time is performed by the first-order lag calculator 84, and the value of this calculation result Exceeds the allowable value set by the allowable value setting unit 85 (for example, set to about 40 [C] increase), the comparator 86 detects this and sends a stop signal to the control circuit 24a. Based on the stop signal, the control circuit 24a stops the control operation, thereby preventing the electrolytic capacitor 22 from being damaged or shortening its life.

  The frequency coefficient has a smaller value as the frequency is higher, and a larger value as the frequency is lower.

  FIG. 7 is a detailed circuit diagram of the overload detection means 46 shown in FIG. 1, showing the sixth embodiment of the present invention. The overload detection means 41 shown in FIG. 2 and the overload detection means 41 shown in FIG. Components having the same functions as those of the load detection unit 45 are denoted by the same reference numerals, and description thereof is omitted here.

That is, the overload detection means 46 includes a dV _DC / dt calculator 51, a frequency coefficient calculator 81, a multiplier 82, and a squarer 83, as well as a base value setting unit 91, a divider 92, and an inverse time limit. And a characteristic calculator 93.

  In this overload detection means 46, as described above, the temperature rise value depending on the frequency of the ripple current flowing through the electrolytic capacitor 22 is derived by the squarer 83, and the base value setter 91 outputs this temperature rise value. The normalized value of the temperature rise value is derived by performing a division operation with the base value to be divided via the divider 92, and further, for example, an inverse time characteristic calculator 93 having a characteristic value of about 5 to 10 minutes at 150%. When the inverse time characteristic calculator 93 is operated via the control circuit 24a, a stop signal is sent to the control circuit 24a, and the control circuit 24a stops the control operation based on the stop signal, thereby damaging the electrolytic capacitor 22. And the shortening of the service life can be prevented more practically.

The circuit block diagram of the inverter apparatus which shows embodiment of this invention FIG. 1 is a partial detailed circuit configuration diagram of an inverter device showing a first embodiment of the invention; Partially detailed circuit diagram of an inverter device showing a second embodiment of the present invention Partial detailed circuit configuration diagram of an inverter device showing a third embodiment of the present invention Partially detailed circuit diagram of an inverter device showing a fourth embodiment of the present invention Partial detailed circuit configuration diagram of an inverter device showing a fifth embodiment of the present invention Partial detailed circuit configuration diagram of an inverter device showing a sixth embodiment of the present invention Circuit diagram of an inverter device showing a conventional example

DESCRIPTION OF SYMBOLS 1 ... Three-phase alternating current power supply, 2 ... Inverter apparatus, 3 ... Electric motor, 4 ... Inverter apparatus, 21 ... Diode rectifier circuit, 22 ... Electrolytic capacitor, 23 ... Inverter main circuit, 24, 24a ... Control circuit, 25 ... Voltage detector , 26 ... phase loss detection means, 41 to 46 ... overload detection means, 51 ... dV _DC / dt calculator, 52 ... tolerance setting device, 53 ... comparator, 61 ... squarer, 62 ... tolerance setting device 63: Comparator, OR element, 71 ... Timer, 81 ... Frequency coefficient calculator, 82 ... Multiplier, 83 ... Squarer, 84 ... First-order lag calculator, 85 ... Tolerance setter, 86 ... Comparator, 91: Base value setter, 92 ... Divider, 93 ... Inverse time characteristic calculator.

Claims (2)

A DC voltage obtained from a three-phase AC power source through a converter unit consisting of a diode rectifier circuit and a smoothing capacitor is converted into an AC voltage of a desired voltage and frequency by an inverter unit consisting of an inverter main circuit and a control circuit. In an inverter device that supplies power to a load,
A time differential value of the DC voltage is obtained, a square value of a value obtained by multiplying the time differential value by a predetermined frequency coefficient value is derived, and a value obtained by multiplying the square value by a predetermined primary delay coefficient is determined in advance. When the allowable value is exceeded, the inverter unit stops the conversion operation of the inverter unit. A DC voltage obtained from a three-phase AC power source through a converter unit consisting of a diode rectifier circuit and a smoothing capacitor is converted into an AC voltage of a desired voltage and frequency by an inverter unit consisting of an inverter main circuit and a control circuit. In an inverter device that supplies power to a load,
A duration of a value obtained by calculating a time differential value of the DC voltage, deriving a square value of a value obtained by multiplying the time differential value by a predetermined frequency coefficient value, and dividing the square value by a predetermined base value. An inverter device that stops the conversion operation of the inverter unit when the value exceeds a predetermined inverse time limit characteristic value .

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