Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JP4601128B2 - LED light source and manufacturing method thereof - Google Patents
[go: Go Back, main page]

JP4601128B2 - LED light source and manufacturing method thereof - Google Patents

LED light source and manufacturing method thereof Download PDF

Info

Publication number
JP4601128B2
JP4601128B2 JP2000191101A JP2000191101A JP4601128B2 JP 4601128 B2 JP4601128 B2 JP 4601128B2 JP 2000191101 A JP2000191101 A JP 2000191101A JP 2000191101 A JP2000191101 A JP 2000191101A JP 4601128 B2 JP4601128 B2 JP 4601128B2
Authority
JP
Japan
Prior art keywords
pair
led
substrate
led chip
light source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2000191101A
Other languages
Japanese (ja)
Other versions
JP2002009347A (en
Inventor
聖貴 手島
宏 三溝
俊宣 黒山
卓也 石田
英夫 柳澤
祐介 菊川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kanto Kasei Co Ltd
Toyoda Gosei Co Ltd
Koha Co Ltd
Original Assignee
Kanto Kasei Co Ltd
Toyoda Gosei Co Ltd
Koha Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kanto Kasei Co Ltd, Toyoda Gosei Co Ltd, Koha Co Ltd filed Critical Kanto Kasei Co Ltd
Priority to JP2000191101A priority Critical patent/JP4601128B2/en
Publication of JP2002009347A publication Critical patent/JP2002009347A/en
Application granted granted Critical
Publication of JP4601128B2 publication Critical patent/JP4601128B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、基板上にLED(Light Emitting Diode:発光ダイオード)チップを搭載したLED光源およびその製造方法に関し、特に、発光効率が高く、生産性に優れ、高精度で、封止部材の形状や材質の自由度が高いLED光源およびその製造方法に関する。
【0002】
【従来の技術】
従来のLED光源として、例えば、特開平11−168235号公報に示されるものがある。
【0003】
図9は、そのLED光源を示す。このLED光源は、基材101上に正負一対のリード110A,110Bが形成されたLED搭載用基板100と、一対のリード110A,110Bに、基板製作工程とは別工程にて個々に形成された金,はんだ等からなる一対のバンプ120a,120bを介して接続されたLEDチップ130と、LEDチップ130を封止する透明樹脂140と、アンダーフィル樹脂150とを有する。一対のリード110A,110Bは、基材101の表面101aから側面101bを経て裏面101cに延在して形成されている。LEDチップ130は、光出射面となる上面130aと反対側の下面130bには反射層131、および図示しない正負一対の電極が形成されており、一対の電極は一対のバンプ120a,120bを介して一対のリード110A,110Bに接続されている。また、LEDチップ130が搭載されたLED搭載用基板100をメイン基板上に実装する場合は、LEDチップ130の上面130aを吸着したのではバンプ120a,120bが剥離されるおそれがあることから、ある程度の硬度を有する透明樹脂140の平坦な上面を吸着してハンドリングしている。このような構成によれば、LEDチップ130の光出射面には電極を設けていないため、発光効率の向上が図れる。
【0004】
【発明が解決しようとする課題】
しかし、従来のLED光源によると、バンプは、金、はんだ等の細線を球状にし、バンプボンダーによって一つ一つ圧接して形成されるなど、生産性が悪く、また、ボールバンプを形成する際にリードパターンを基準に位置決めしているため、リードパターンのエッジのだれやパターンずれ等により位置精度が出し難い。
また、LEDチップが搭載されたLED搭載用基板をハンドリングするために、ある程度の硬度を有し、上面が平坦な透明樹脂140を予め設けなければならないため、透明樹脂の形状や材質が制限される。
【0005】
従って、本発明の目的は、発光効率が高く、生産性に優れ、高精度のLED光源およびその製造方法を提供することにある。
また、本発明の他の目的は、封止部材の形状や材質の自由度が高いLED光源およびその製造方法を提供することにある。
【0006】
【課題を解決するための手段】
本発明は、上記目的を達成するため、絶縁基材の裏面に形成された正負一対の裏リード、および前記絶縁基材の表面に前記一対の裏リードに一対の金属接続部によって接続された正負一対の表リードを有する基板と、前記基板に対向する面側に正負一対の電極を有し、前記一対の電極が一対の接合用バンプを介して前記基板の前記一対の表リードに接続されたLEDチップとを備え、前記一対の接合用バンプは、前記LEDチップの搭載後に円形となるように、前記LEDチップの搭載前に、超音波振動による接合の際の超音波振動方向と垂直な方向に長い楕円形あるいは長円形に形成され、かつ、メッキによって前記一対の表リード上に形成されたことを特徴とするLED光源を提供する。
上記構成によれば、複数のLEDチップからの光は、電極が設けれていない光出射面から出射される。また、一対の接合用バンプをメッキによって形成することにより、生産性が向上し、基板の外形あるいは合せ穴を基準とすることができるので、高い位置精度が得られる。「一対の接合用バンプ」には、正負の極にそれぞれ1つのバンプを用いた場合に限らず、一方の極に1つ、他方の極に複数のバンプを用いた場合や、正負の極にそれぞれ複数のバンプを用いた場合が含まれる。
【0007】
本発明は、上記目的を達成するため、絶縁基材の裏面に正負一対の裏リード、および前記絶縁基材の表面に前記一対の裏リードに一対の金属接続部により接続された正負一対の表リードを複数組有する集合基板を形成し、前記集合基板の複数組の前記一対の表リードに一対の接合用バンプをそれぞれ前記LEDチップの搭載後に円形となるように、超音波振動方向と垂直な方向に長い楕円形あるいは長円形に形成し、1つの面側に正負一対の電極を有する複数のLEDチップを、前記一対の電極を前記一対のバンプに接続して前記集合基板上に搭載し、前記複数のLEDチップが搭載された前記集合基板をLEDチップ毎に分割することを特徴とするLED光源の製造方法を提供する。
【0008】
【発明の実施の形態】
図1および図2は、本発明の実施の形態に係るLED光源を適用したLED面発光装置を示し、図1(a)は正面図、同図(b)は側面図、同図(c)は底面図、図2(a)は図1(a)のA部拡大図、図2(b)は図1(a)のB部拡大図、図2(c)はLEDチップの底面図である。
【0009】
このLED面発光装置1は、表面2aおよび裏面2bに配線パターンが形成されたマザー基板2を有する。
【0010】
このマザー基板2の表面2aには、図1(a),(b)、および図2に示すように、サブマウント基板3を介して列状に配置された複数のLEDチップ4と、各LEDチップ4を封止する透明樹脂からなる複数の封止部材5と、マザー基板2の表面2aに配置されたスペーサ6と、LEDチップ4からの光を図1(a)において上方に反射するリフレクタ7と、内部を保護するとともに、LEDチップ4からの光を透過させる透明板8と、この装置1全体を保護するカバー9とを設けている。なお、サブマウント基板3、LEDチップ4および封止部材5によりLED光源を構成する。
【0011】
このマザー基板2の裏面2bには、図1(c)に示すように、後述するLED駆動回路を構成する複数の抵抗素子10と、1つのツェナーダイオード11とを設けている。なお、図1において左側の12A,13Aと右側の12B,13Bは複数のLEDチップ4に電圧を印加するための接続端子であり、本装置1組み付け時の配線引き出し方向に応じて左右の接続端子12A,13A,12B,13Bを使い分けるようにしている。
【0012】
複数のLEDチップ4は、図1(a)に示すように、マザー基板2上にサブマウント基板3を介して縦方向に4個、横方向に12個の計48個配列されている。LEDチップ4は、フリップチプボンディング(FCB)によってサブマウント基板3に搭載されている。LEDチップ4は、透明の絶縁体であるサファイア基板上に窒化ガリウム等の半導体層を積層させ、図2に示すように、チップ4の下面4bとなる半導体層の表面に正電極40aと負電極40bを形成したものであり、チップ4の上面4aとなるサファイア基板の底面が光出射面となる。本実施の形態では、例えば、380nmの波長を有する紫外線を発光するGaN(窒化ガリウム)系の半導体を用いる。
【0013】
マザー基板2は、基材の表面2aおよび裏面2bに配線パターンを印刷したものである。マザー基板2の基材は、サブマウント基板3の実装の際に、変形や強度低下を起こさないように耐熱性と低膨張係数を有し、さらに、LEDチップ4の発光波長(例えば、紫外線の波長)に対して高い光反射率と低い光吸収率を有する材料が好ましい。このような材料として、例えば、紫外線に対して42%程度の高い光反射率を有するガラスエポキシ樹脂等を用いることができる。また、マザー基板2よりもLEDチップ4に近いサブマウント基板3の基材として、紫外線に対して42%程度の高い光反射率を有する材料を用いた場合には、それよりも光反射率の低い10〜22%程度のガラスエポキシ樹脂等を用いてもよい。この他に、放熱性と強度を重視する場合は、アルミニュウム等の金属、アルミナ等のセラミックスを用いることもできる。
【0014】
封止部材5は、LEDチップ4を所定の外形形状で封止することにより、LEDチップ4が発する光に所定の配光特性を付与するものである。また、封止部材5は、LEDチップ4の発光波長に対して耐久性を有する透明樹脂材料が好ましい。例えば、紫外線に対してはシリコーンを用いることができる。
【0015】
スペーサ6は、図2(a)に示すように、複数のLEDチップ4が配置される位置に複数の円形の開口6aが設けられ、例えば、シリコーンゴム等の弾性を有する部材から形成されている。スペーサ6は、カバー9によってリフレクタ7とマザー基板2との間で挟持されているので、装置1内部が密閉され、装置1内部に対する防塵・防湿を図ることができる。また、このような構成により、透明板8等の各部品の厚み方向のばらつきあるいは誤差を吸収し、装置1全体のゆがみやソリ等を防止あるいは緩和することができ、さらに、ガラスからなる透明板8をカバー9とともに保護することができる。
【0016】
リフレクタ7は、LEDチップ4に対応する位置に開口7a有し、その開口の7a周囲は図2(a)に示すようにコーン状の反射面7bを形成している。このリフレクタ7は、湿度・熱・紫外線等に対する十分な耐候性を有し、LEDチップ4の発光波長に対して高い光反射率を有する材料から形成するのが好ましい。本実施の形態では、図1(a),(b)および図2(a)に示すように、銅,スレンレス等からなる金属板を絞り加工してLEDチップ4に対応する位置に開口7a有し、その開口の7a周囲はコーン状の反射面7bを形成し、表面に高い光反射率を有するような処理、例えば、光沢Niメッキを施している。このようなリフレクタ7を設けることにより、チップ4から透明体8に向う方向(前方向)に対する光量を更に向上させることができる。なお、リフレクタ7は、樹脂に金属をメッキあるいは蒸着してもよい。これにより、全体が金属の物に比べての軽量化が図れる。また、リフレクタ7は、樹脂等の基体に薄い金属カバーを接合したものでもよい。これにより、金属カバーを薄い金属板の絞り加工等の工法によって形成することが可能であるため、材料コスト・加工コストが安く、全体が金属の物に比べての軽量化も図れる。
【0017】
透明板8は、LEDチップ4の発光波長(例えば紫外線の波長)に対して高透過率を有する材料から形成されていることが好ましい。このような材料として、例えば、ガラスを用いることができる。
【0018】
カバー9は、図1(a)に示すように、4つのLEDチップ4に対応した細長形状を有する複数の開口9aを有する。カバー9は、耐候性と機械的強度を有する材料から形成することが好ましい。このような材料として、例えば、鋼材、アルミニウム等の金属板を用いることができる。
【0019】
抵抗素子10は、図1(a),(c)に示すように、マザー基板2の裏面2bであって各LEDチップ4から均等に距離が離れるようにLEDチップ4の間に配置されている。これにより、抵抗素子10の発熱がLEDチップ4の出力低下・信頼性低下に影響しないようになり高信頼性が得られる。抵抗素子10は、各LEDチップ4のVF差による電流のばらつきを緩和するとともに、各LEDチップ4への電流の制限を行うものである。
【0020】
図3は、LEDチップ4のFCBによる搭載構造を示す。サブマウント基板3は、基材31を有し、この基材31の表面31aに、同図(a)に示すように、正リード32aおよび負リード32bを形成し、基材31の裏面31bに、同図(e)に示すように、正リード33aおよび負リード33bを形成し、表面31aの正リード32aおよび負リード32bと裏面31bの正リード33aおよび負リード33bとをスルーホールめっき34a,34bによって各々接続し、表面31aの正リード32aに正極側であることを表示する正極性表示部35を延在して形成している。また、表面31aの正リード32aおよび負リード32bには、表面31aのLEDチップ4が搭載される領域以外の領域に電圧を印加してLEDチップ4の特性を検査するための一対の三角形の検査用領域38a,38bを有する。これらのリード32a,32b,33a,33b、および正極性表示部35は、エッチング法等の通常の半導体製造技術における電極配線技術を使用して形成され、例えば、Cu+Ni等の下地金属層にAu等の金属めっき層を積層して形成される。また、基材31の表面31aの正リード32aおよび負リード32bの対角線上に、一対のAuからなる位置認識用メッキバンプ36a,36bを形成し、表面31aの正リード32aおよび負リード32bにAuからなる搭載用メッキバンプ37a,37bを各々形成している。搭載用メッキバンプ37a,37bは、同図(c)に示すように、LEDチップ4の搭載前は、超音波によるボンディングの際の超音波振動方向16に垂直な方向に長い楕円、長円等の形状を有しており、LEDチップ4の搭載後は、同図(d)に示すように、円形となるようにしている。これらのメッキバンプ36a,36b,37a,37bは、例えば、ホトリソグラフィ法等によって一括形成される。搭載用メッキバンプ37a,37bを同図(c)に示すような形状とすることにより、ショートを防止しながら、接合面積を大きくして接合強度の向上を図ることができる。なお、表面31aのLEDチップ4が搭載される領域以外の領域は、一対の搭載用メッキバンプ37a,37bを介してLEDチップ4が搭載されたサブマウント基板3をハンドリングするための吸着面となる。
【0021】
基材31は、LEDチップ4の実装の際に、変形や強度低下を起こさないように耐熱性と低膨張係数を有し、さらに、LEDチップ4の発光波長(例えば、紫外線の波長)に対して高い光反射率と低い光吸収率を有する材料が好ましい。このような材料として、例えば、紫外線に対して42%程度の高い光反射率を有するガラスエポキシ樹脂等を用いることができる。この他に、要求される特性に応じて他の樹脂やセラミックス等の絶縁体を用いてもよい。
【0022】
図4は、マザー基板2の表面2aの配線パターンを示す。配線パターン20は、エッチング法等の通常の半導体製造技術における電極配線技術を使用して形成され、例えば、Cu+Ni等の下地金属層にAu等の金属めっき層を積層して形成される。サブマウント基板3が搭載される位置には、同図(b)に示すように、サブマウント基板3の裏面31bの正リード33aおよび負リード33bがそれぞれ銀ペーストを介して接続される一対の接続領域20a,20bが形成されている。また、マザー基板2の表面2aのサブマウント基板3が搭載される以外のスペースの複数の個所(本実施の形態では3個所)に、同図(c)に示すように、テスト用の接続領域20a,20bが形成されている。
【0023】
図5は、LED駆動回路を示す。このLED駆動回路は、同図に示すように、複数のLEDチップ4のアノードに接続された接続端子12と、複数のLEDチップ4に抵抗素子10を介して接続された複数のLEDチップ4と、複数のLEDチップ4のカソードに接続された接続端子13と、過電圧を防止するツェナーダイオード11とを備えている。なお、ツェナーダイオード11は、これに限定されず、アバランシェダイオード、その他のダイオードを用いることができる。
【0024】
図6〜図8は、本実施の形態の製造方法を示す。まず、多数個取り用サブマウント集合基板30を準備する(ST1)。すなわち、図6(a),(b)、および図7(a)に示すように、サブマウント集合基板30の基材の表面に正リード32aおよび負リード32bを形成し、裏面に正リード33aおよび負リード33bを形成し、表面の正リード32aおよび負リード32bと裏面の正リード33aおよび負リード33bとをスルーホールめっき34a,34bによって各々接続する。次に、図7(b)に示すように、レジスト14を塗布し、同図(c)に示すように、穴15aを有するマスク15の上から紫外線(HV)を照射し、同図(d)に示すように、レジスト14に穴14aを形成する。次に、同図(e)に示すように、レジスト14の穴14a内に搭載用メッキバンプ37a,37bを形成する。このとき、同時に位置認識用メッキバンプ36a,36bも形成する。次に、同図(f)に示すように、レジスト14を除去する。このようにして基材にリード32a,32b,33a,33bとメッキバンプ36a,36b,37a,37bが形成されたサブマウント集合基板30が完成する。
【0025】
次に、サブマウント集合基板30上にフリップチップとしてのLEDチップ4をフリップチップボンディングし、LEDチップ4を封止部材5によって封止し(ST2)、専用の検査装置によって各LEDチップ4の光量等の特性検査を行う(ST3)。このとき、不良のLEDチップ4にはマーキングを行う。次に、サブマウント集合基板30をLEDチップ4毎に分割して複数のサブマウント基板3を製作する(ST4)。
【0026】
一方、複数のサブマウント基板3を搭載されるマザー基板2を準備する(ST10)。ここでは、マザー基板2の基材に配線パターン20が形成される。次に、マザー基板2に抵抗素子10、ツェナーダイオード11等の回路部品を実装する(ST11)。
【0027】
次に、上記工程ST11で製作されたマザー基板2上に上記工程ST4で製作された複数のサブマウント基板3を搭載する(ST12)。LEDチップ4上にシリコンで封止する(ST13)。マザー基板2に、スペーサ6、リフレクタ7、透明板8およびカバー9を組み込んでLED面発光装置1を組み立て(ST14)、装置1全体の検査(ST15)で終了する。
【0028】
上記実施の形態によれば、LEDチップ4がFCB実装されたサブマウント基板3は、多数個取り用サブマウント集合基板30上に多数のLEDチップ4をFCB実装し、それを分割することによって製作しているので、生産性が向上し、コスト低減を図ることができる。また、サブマウント集合基板30上に高密度で一括して多数のバンプを形成することにより、メッキバンプ工程を短縮化できるので、これによってもサブマウント基板3の製造コストを低減することができる。
また、加熱以外に加圧等の他のストレスが加わるLEDチップ4のFCB実装をサブマウント基板3に対して行っているので、マザー基板2への搭載部品やマザー基板2の材質の選択の自由度が大きくなる。
また、サブマウント集合基板30のサイズを統一することにより、FCB実装用の高精度な治具を統一することができる。
また、サブマウント基板3をマザー基板2に実装しているので、汎用のハンドリングマシンの使用が可能となり、ハンドリングし易くなる。
また、バンプをメッキによって形成することにより、生産性が向上し、サブマウント基板3の外形(あるいは合せ穴)を基準とすることができるので、高い位置精度が得られる。
また、超音波振動により搭載用メッキバンプ37a,37bとLEDチップ4を接合すると、搭載用メッキバンプ37a,37bは、超音波振動方向に長くなるが、予めその分を考慮して超音波振動方向に垂直な方向に長い形状とすることにより、短絡を防止することが可能となる。
また、サブマウント基板3を小型化してLEDチップサイズに限りなく近づけた場合には、IC等で言うチップサイズパッケージ(CSP)製作が可能になる。
また、フリップチップボンダという特殊で高価な設備類がない工程でも、マウンター・ダイボンダー等の一般設備による利用が可能になる。また、形状・形態などの都合からフリップチップボンダーとその周辺治具類との関連で、直接搭載することが困難な実装パッケージヘの応用も可能になる。
また、サブマウント基板3の表面31aにLEDチップ4が搭載されたサブマウント基板3をハンドリングするための吸着面を有しているので、モールドレスでのハンドリング(後工程のダイスボンド等)が可能になる。
また、ダイスボンド・マウント後での樹脂封止が可能であるので、シリコーン系の非常に柔らかく機械でのハンドリングが困難な樹脂による直接モールドが可能になる。また、ケース9、リフレクタ7などの形状や、サブマウント基板3のスペースにとらわれない形状での樹脂封止ができる。
また、特性検査を集合状態で行うことができるため、検査工数の低減も可能である。
また、GaN系のLEDチップを多数個使用したLED面発光装置においてFCB方式のベアチップ実装を行っているので、発光効率の向上を図ることができる。
また、マザー基板2およびサブマウント基板3は、搭載するLEDチップ4の発光波長に対して、光反射率が高く、かつ光吸収率の少ない材料を使用しているので、発光効率が高くなり、低電力化が図れる。
また、LED駆動回路の入力側にツェナーダイオード11を設けているので、GaN系LEDチップ4の静電耐圧が低いことによる静電破壊を防ぐことができる。
また、光量テストを含む特性検査を行った後、マザー基板2上にLEDチップ4がFCB実装されたサブマウント基板3を実装できるので、予め単体での選別が容易になるため、面発光装置1としての光量ムラを緩和するための選別搭載が可能になり、リペアが不要になる。
また、マザー基板2上にLEDチップ4がFCB実装されたサブマウント基板3を実装した後に封止部材5をモールド形成しているので、実装後にその封止部材5の形状や材質を決定することか可能となるため、その形状や材質の選択性が拡がり、希望の配光特性が実現しやすくなる。
また、本面発光装置1は、全体がカバー9により保護されているので、信頼性・機械的強度を確保することができる。
【0029】
なお、本発明は、基板上にFCB実装されたLEDチップからリード線あるいはリードフレーム等を導出するとともに、LEDチップを封止部材により封止した単一のLEDランプに適用してもよい。また、複数のLEDチップをマトリクス状に配列し、複数のLEDチップを画像信号に応じて選択的に点灯させる画像表示装置に適用してもよい。
【0030】
【発明の効果】
以上説明した通り、本発明のLED光源およびその製造方法によれば、複数のLEDチップからの光は、電極が設けれていない光出射面から出射されるので、発光効率の向上を図ることができる。また、一対の接合用バンプをメッキによって形成しているので、生産性が向上し、高い位置精度が得られる。また、LEDチップが搭載された基板をハンドリングした後に封止部材を設けることができるので、封止部材の形状や材質の自由度が高くなる。
【図面の簡単な説明】
【図1】本発明の実施の形態に係るLED光源を適用したLED面発光装置を示し、(a)は正面図、(b)は側面図、(c)は底面図である。
【図2】(a)は図1(a)のA部拡大図、(b)は図1(a)のB部拡大図、(c)はLEDチップの底面図である。
【図3】本実施の形態のFCB構造を示し、(a)はLEDチップが搭載されたサブマウント基板の表面図、(b)は断面図、(c),(d)はLEDチップ搭載用バンプの形状を示す図、(e)はサブマウント基板の裏面図である。
【図4】(a)はマザー基板の表面図、(b)は(a)のD部拡大図、(c)は(a)のE部拡大図である。
【図5】本実施の形態のLED駆動回路を示す図
【図6】(a),(b)は本実施の形態のサブマウント基板の製造工程を示す図である。
【図7】(a)〜(f)は本実施の形態のサブマウント基板の製造工程を示す図である。
【図8】本実施の形態のLED面発光装置の製造工程を示す図である。
【図9】従来のLED光源を示す断面図である。
【符号の説明】
1 LED面発光装置
2 マザー基板
2a 表面
2b 裏面
3 サブマウント基板
4 LEDチップ
4a 正電極
4b 負電極
5 封止部材
6 スペーサ
6a 開口
7 リフレクタ
7a 開口
7b 反射面
8 透明板
9 カバー
9a 開口
10 抵抗素子
11 ツェナーダイオード
12A,12B,13A,13B 接続端子
14 レジスト
14a 穴
15 マスク
15a 穴
20 配線パターン
20a,20b 接続領域
30 多数個取り用サブマウント集合基板
31a 表面
31b 裏面
32a 正リード
32b 負リード
33a 正リード
33b 負リード
34a,34b スルーホールめっき
35 正極性表示部
36a,36b 位置認識用メッキバンプ
37a,37b 搭載用メッキバンプ
38a,38b 検査用領域
40a 正電極
40b 負電極
100 基板
101 基材
101a 表面
101b 側面
101c 裏面
110A,110B リード
120a,120b バンプ
130 LEDチップ
130a 上面
130b 下面
131 反射層
140 透明樹脂
150 アンダーフィル樹脂
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an LED light source in which an LED (Light Emitting Diode) chip is mounted on a substrate and a method for manufacturing the same, and in particular, has high luminous efficiency, excellent productivity, high accuracy, and the shape of a sealing member. The present invention relates to an LED light source having a high degree of freedom of material and a manufacturing method thereof.
[0002]
[Prior art]
As a conventional LED light source, for example, there is one disclosed in JP-A-11-168235.
[0003]
FIG. 9 shows the LED light source. This LED light source was individually formed on a substrate for LED mounting 100 in which a pair of positive and negative leads 110A and 110B was formed on a base material 101, and a pair of leads 110A and 110B in a separate process from the board manufacturing process. It has LED chip 130 connected via a pair of bumps 120a and 120b made of gold, solder, etc., transparent resin 140 for sealing LED chip 130, and underfill resin 150. The pair of leads 110A and 110B is formed to extend from the front surface 101a of the base material 101 to the back surface 101c through the side surface 101b. In the LED chip 130, a reflective layer 131 and a pair of positive and negative electrodes (not shown) are formed on a lower surface 130b opposite to the upper surface 130a serving as a light emitting surface, and the pair of electrodes are interposed via a pair of bumps 120a and 120b. It is connected to a pair of leads 110A and 110B. Further, when the LED mounting substrate 100 on which the LED chip 130 is mounted is mounted on the main substrate, the bumps 120a and 120b may be peeled off if the upper surface 130a of the LED chip 130 is adsorbed. The transparent upper surface of the transparent resin 140 having a hardness of 1 is adsorbed and handled. According to such a configuration, since no electrode is provided on the light emitting surface of the LED chip 130, the light emission efficiency can be improved.
[0004]
[Problems to be solved by the invention]
However, according to the conventional LED light source, the bumps are formed by forming fine wires such as gold and solder into a spherical shape and pressing them one by one with a bump bonder. In addition, since the positioning is based on the lead pattern, it is difficult to obtain the position accuracy due to the edge of the lead pattern or the pattern deviation.
In addition, in order to handle the LED mounting substrate on which the LED chip is mounted, the transparent resin 140 having a certain degree of hardness and a flat upper surface must be provided in advance, so that the shape and material of the transparent resin are limited. .
[0005]
Accordingly, an object of the present invention is to provide a highly accurate LED light source having high luminous efficiency, excellent productivity, and a manufacturing method thereof.
Another object of the present invention is to provide an LED light source having a high degree of freedom in the shape and material of the sealing member and a method for manufacturing the LED light source.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, the present invention provides a pair of positive and negative back leads formed on the back surface of an insulating base material, and a positive and negative polarity connected to the pair of back leads on the surface of the insulating base material by a pair of metal connecting portions. A substrate having a pair of front leads, and a pair of positive and negative electrodes on the surface facing the substrate, the pair of electrodes being connected to the pair of front leads of the substrate via a pair of bonding bumps A direction perpendicular to the direction of ultrasonic vibration at the time of bonding by ultrasonic vibration before mounting the LED chip, so that the pair of bonding bumps are circular after mounting the LED chip. long oval or formed into oval, and to provide an LED light source, characterized in that formed on the pair of tables lead by plating.
According to the said structure, the light from a some LED chip is radiate | emitted from the light-projection surface in which the electrode is not provided. Further, by forming the pair of bonding bumps by plating, productivity is improved and the outer shape of the substrate or the alignment hole can be used as a reference, so that high positional accuracy can be obtained. “A pair of bonding bumps” is not limited to the case where one bump is used for each positive and negative pole, but one bump is used for one pole and a plurality of bumps are used for the other pole. The case where a plurality of bumps are used is included.
[0007]
In order to achieve the above object, the present invention provides a pair of positive and negative back leads on the back surface of an insulating base material, and a pair of positive and negative surfaces connected to the surface of the insulating base material by a pair of metal connecting portions on the pair of back leads. An assembly substrate having a plurality of sets of leads is formed, and a pair of bonding bumps are formed on the plurality of pairs of front leads of the assembly substrate so as to be circular after the LED chip is mounted. A plurality of LED chips formed in a long oval shape or an oval shape in a direction and having a pair of positive and negative electrodes on one surface side are mounted on the aggregate substrate by connecting the pair of electrodes to the pair of bumps, An LED light source manufacturing method is provided, wherein the collective substrate on which the plurality of LED chips are mounted is divided for each LED chip.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
1 and 2 show an LED surface light emitting device to which an LED light source according to an embodiment of the present invention is applied. FIG. 1 (a) is a front view, FIG. 1 (b) is a side view, and FIG. Is a bottom view, FIG. 2 (a) is an enlarged view of part A of FIG. 1 (a), FIG. 2 (b) is an enlarged view of part B of FIG. 1 (a), and FIG. 2 (c) is a bottom view of the LED chip. is there.
[0009]
The LED surface light emitting device 1 includes a mother substrate 2 having a wiring pattern formed on a front surface 2a and a back surface 2b.
[0010]
On the surface 2a of the mother substrate 2, as shown in FIGS. 1A, 1B, and 2, a plurality of LED chips 4 arranged in a row via the submount substrate 3, and each LED A plurality of sealing members 5 made of transparent resin for sealing the chip 4, a spacer 6 disposed on the surface 2a of the mother substrate 2, and a reflector that reflects light from the LED chip 4 upward in FIG. 7, a transparent plate 8 that protects the inside and transmits light from the LED chip 4, and a cover 9 that protects the entire device 1. The sub-mount substrate 3, the LED chip 4, and the sealing member 5 constitute an LED light source.
[0011]
On the back surface 2b of the mother substrate 2, as shown in FIG. 1C, a plurality of resistance elements 10 and one Zener diode 11 constituting an LED drive circuit to be described later are provided. In FIG. 1, 12A on the left side and 13B on the right side and 12B and 13B on the right side are connection terminals for applying a voltage to the plurality of LED chips 4, and left and right connection terminals according to the direction in which the wiring is drawn when the apparatus 1 is assembled. 12A, 13A, 12B, and 13B are properly used.
[0012]
As shown in FIG. 1A, the plurality of LED chips 4 are arranged on the mother substrate 2 via the submount substrate 3, for a total of 48 in a vertical direction and 12 in a horizontal direction. LED chip 4 is mounted on the sub-mount substrate 3 by Furippuchi-up bonding (FCB). In the LED chip 4, a semiconductor layer such as gallium nitride is stacked on a sapphire substrate that is a transparent insulator, and as shown in FIG. 2, a positive electrode 40 a and a negative electrode are formed on the surface of the semiconductor layer that becomes the lower surface 4 b of the chip 4. 40b is formed, and the bottom surface of the sapphire substrate, which is the top surface 4a of the chip 4, is the light emitting surface. In this embodiment, for example, a GaN (gallium nitride) -based semiconductor that emits ultraviolet light having a wavelength of 380 nm is used.
[0013]
The mother substrate 2 is obtained by printing a wiring pattern on the front surface 2a and the back surface 2b of the base material. The base material of the mother substrate 2 has heat resistance and a low expansion coefficient so as not to cause deformation or a decrease in strength when the submount substrate 3 is mounted. Further, the emission wavelength of the LED chip 4 (for example, ultraviolet rays) A material having a high light reflectance and a low light absorption rate with respect to (wavelength) is preferable. As such a material, for example, a glass epoxy resin having a high light reflectance of about 42% with respect to ultraviolet rays can be used. Further, when a material having a high light reflectance of about 42% with respect to ultraviolet rays is used as the base material of the submount substrate 3 closer to the LED chip 4 than the mother substrate 2, the light reflectance is higher than that. A low glass epoxy resin of about 10 to 22% may be used. In addition, when importance is attached to heat dissipation and strength, metals such as aluminum and ceramics such as alumina can also be used.
[0014]
The sealing member 5 provides a predetermined light distribution characteristic to the light emitted from the LED chip 4 by sealing the LED chip 4 with a predetermined outer shape. Further, the sealing member 5 is preferably a transparent resin material having durability with respect to the emission wavelength of the LED chip 4. For example, silicone can be used for ultraviolet rays.
[0015]
As shown in FIG. 2A, the spacer 6 is provided with a plurality of circular openings 6a at positions where the plurality of LED chips 4 are arranged, and is formed of an elastic member such as silicone rubber. . Since the spacer 6 is sandwiched between the reflector 7 and the mother substrate 2 by the cover 9, the inside of the device 1 is hermetically sealed, so that dust and moisture can be prevented from the inside of the device 1. Further, with such a configuration, variations or errors in the thickness direction of each component such as the transparent plate 8 can be absorbed, and distortion or warping of the entire apparatus 1 can be prevented or alleviated, and a transparent plate made of glass. 8 can be protected together with the cover 9.
[0016]
The reflector 7 has an opening 7a at a position corresponding to the LED chip 4, and a cone-shaped reflecting surface 7b is formed around the opening 7a as shown in FIG. The reflector 7 is preferably formed of a material having sufficient weather resistance against humidity, heat, ultraviolet rays, and the like, and having a high light reflectance with respect to the emission wavelength of the LED chip 4. In the present embodiment, as shown in FIGS. 1A, 1B, and 2A, a metal plate made of copper, stainless steel, or the like is drawn to form an opening 7a at a position corresponding to the LED chip 4. And the periphery of the opening 7a forms a cone-like reflection surface 7b, and the surface is subjected to a treatment having a high light reflectivity, for example, gloss Ni plating. By providing such a reflector 7, the amount of light with respect to the direction from the chip 4 toward the transparent body 8 (forward direction) can be further improved. In addition, the reflector 7 may plate or vapor-deposit a metal on a resin. Thereby, the weight reduction compared with the thing of the whole metal can be achieved. In addition, the reflector 7 may be formed by bonding a thin metal cover to a substrate such as a resin. As a result, the metal cover can be formed by a method such as drawing of a thin metal plate, so that the material cost and processing cost are low, and the overall weight can be reduced compared to a metal object.
[0017]
The transparent plate 8 is preferably formed of a material having a high transmittance with respect to the emission wavelength (for example, the wavelength of ultraviolet rays) of the LED chip 4. As such a material, for example, glass can be used.
[0018]
As shown in FIG. 1A, the cover 9 has a plurality of openings 9 a having an elongated shape corresponding to the four LED chips 4. The cover 9 is preferably formed from a material having weather resistance and mechanical strength. As such a material, for example, a metal plate such as steel or aluminum can be used.
[0019]
As shown in FIGS. 1A and 1C, the resistance element 10 is disposed between the LED chips 4 on the back surface 2 b of the mother substrate 2 so as to be evenly spaced from each LED chip 4. . As a result, the heat generated by the resistance element 10 does not affect the output reduction / reliability reduction of the LED chip 4, and high reliability is obtained. The resistance element 10 reduces current variation due to the VF difference of each LED chip 4 and limits the current to each LED chip 4.
[0020]
FIG. 3 shows a mounting structure of the LED chip 4 by FCB. The submount substrate 3 has a base material 31, and a positive lead 32 a and a negative lead 32 b are formed on the front surface 31 a of the base material 31, as shown in FIG. As shown in FIG. 5E, positive leads 33a and negative leads 33b are formed, and positive leads 32a and negative leads 32b on the front surface 31a and positive leads 33a and negative leads 33b on the rear surface 31b are formed through-hole plating 34a, Each positive electrode 32 is connected to the positive lead 32a on the front surface 31a, and a positive-polarity display portion 35 for indicating that it is on the positive electrode side extends. In addition, a pair of triangular inspections for inspecting the characteristics of the LED chip 4 by applying a voltage to the positive lead 32a and the negative lead 32b on the surface 31a to a region other than the region where the LED chip 4 is mounted on the surface 31a. Use areas 38a, 38b. These leads 32a, 32b, 33a, 33b and the positive display portion 35 are formed by using an electrode wiring technique in a normal semiconductor manufacturing technique such as an etching method. For example, Au or the like is formed on a base metal layer such as Cu + Ni. These metal plating layers are laminated. Further, position recognition plating bumps 36a and 36b made of a pair of Au are formed on the diagonal lines of the positive lead 32a and the negative lead 32b on the surface 31a of the substrate 31, and Au is formed on the positive lead 32a and the negative lead 32b on the surface 31a. The mounting plating bumps 37a and 37b are respectively formed. As shown in FIG. 5C, the mounting plating bumps 37a and 37b are, for example, an ellipse or an ellipse that is long in a direction perpendicular to the ultrasonic vibration direction 16 during bonding by ultrasonic waves before the LED chip 4 is mounted. After the LED chip 4 is mounted, it has a circular shape as shown in FIG. These plating bumps 36a, 36b, 37a, and 37b are collectively formed by, for example, photolithography. By forming the mounting plating bumps 37a and 37b as shown in FIG. 5C, the bonding area can be increased and the bonding strength can be improved while preventing a short circuit. The region other than the region where the LED chip 4 is mounted on the surface 31a is an adsorption surface for handling the submount substrate 3 on which the LED chip 4 is mounted via a pair of mounting plating bumps 37a and 37b. .
[0021]
The base material 31 has heat resistance and a low expansion coefficient so as not to cause deformation or a decrease in strength when the LED chip 4 is mounted. Further, the base material 31 corresponds to the emission wavelength (for example, ultraviolet wavelength) of the LED chip 4. A material having a high light reflectance and a low light absorption rate is preferable. As such a material, for example, a glass epoxy resin having a high light reflectance of about 42% with respect to ultraviolet rays can be used. In addition, other insulators such as resin and ceramics may be used according to required characteristics.
[0022]
FIG. 4 shows a wiring pattern on the surface 2 a of the mother board 2. The wiring pattern 20 is formed by using an electrode wiring technique in a normal semiconductor manufacturing technique such as an etching method. For example, the wiring pattern 20 is formed by laminating a metal plating layer such as Au on a base metal layer such as Cu + Ni. In the position where the submount substrate 3 is mounted, a pair of connections in which the positive lead 33a and the negative lead 33b on the back surface 31b of the submount substrate 3 are connected via silver paste, as shown in FIG. Regions 20a and 20b are formed. Further, as shown in FIG. 5C, a test connection region is provided at a plurality of locations (three locations in the present embodiment) in the space other than where the submount substrate 3 is mounted on the surface 2a of the mother substrate 2. 20a and 20b are formed.
[0023]
FIG. 5 shows an LED driving circuit. As shown in the figure, the LED drive circuit includes a connection terminal 12 connected to the anodes of the plurality of LED chips 4, and a plurality of LED chips 4 connected to the plurality of LED chips 4 via a resistance element 10. And a connection terminal 13 connected to the cathodes of the plurality of LED chips 4 and a Zener diode 11 for preventing overvoltage. The Zener diode 11 is not limited to this, and an avalanche diode or other diode can be used.
[0024]
6 to 8 show the manufacturing method of the present embodiment. First, a multi-mount submount assembly substrate 30 is prepared (ST1). That is, as shown in FIGS. 6A, 6B, and 7A, the positive lead 32a and the negative lead 32b are formed on the surface of the base material of the submount aggregate substrate 30, and the positive lead 33a is formed on the back surface. The negative lead 33b is formed, and the positive lead 32a and negative lead 32b on the front surface and the positive lead 33a and negative lead 33b on the back surface are connected by through-hole plating 34a and 34b, respectively. Next, as shown in FIG. 7 (b), a resist 14 is applied, and as shown in FIG. 7 (c), ultraviolet rays (HV) are irradiated from above the mask 15 having the holes 15a. ), A hole 14 a is formed in the resist 14. Next, mounting plating bumps 37a and 37b are formed in the holes 14a of the resist 14 as shown in FIG. At the same time, position-recognizing plating bumps 36a and 36b are also formed. Next, the resist 14 is removed as shown in FIG. In this way, the submount aggregate substrate 30 in which the leads 32a, 32b, 33a, 33b and the plating bumps 36a, 36b, 37a, 37b are formed on the base material is completed.
[0025]
Next, the LED chip 4 as a flip chip is flip-chip bonded onto the submount collective substrate 30, the LED chip 4 is sealed with the sealing member 5 (ST 2), and the light quantity of each LED chip 4 is measured with a dedicated inspection device. And the like are inspected (ST3). At this time, the defective LED chip 4 is marked. Next, the submount aggregate substrate 30 is divided for each LED chip 4 to manufacture a plurality of submount substrates 3 (ST4).
[0026]
On the other hand, a mother substrate 2 on which a plurality of submount substrates 3 are mounted is prepared (ST10). Here, the wiring pattern 20 is formed on the base material of the mother substrate 2. Next, circuit components such as the resistance element 10 and the Zener diode 11 are mounted on the mother board 2 (ST11).
[0027]
Next, the plurality of submount substrates 3 manufactured in step ST4 are mounted on the mother substrate 2 manufactured in step ST11 (ST12). The LED chip 4 is sealed with silicon (ST13). The spacer 6, the reflector 7, the transparent plate 8, and the cover 9 are assembled into the mother board 2 to assemble the LED surface light emitting device 1 (ST 14), and the process is finished with the entire device 1 inspection (ST 15).
[0028]
According to the above embodiment, the submount substrate 3 on which the LED chips 4 are FCB-mounted is manufactured by mounting a large number of LED chips 4 on the multi-mount submount assembly substrate 30 and dividing them. Therefore, productivity can be improved and cost can be reduced. In addition, the plating bump process can be shortened by forming a large number of bumps at a high density on the submount collective substrate 30, thereby reducing the manufacturing cost of the submount substrate 3.
In addition, since the FCB mounting of the LED chip 4 to which other stresses such as pressure are applied in addition to heating is performed on the submount substrate 3, the components to be mounted on the mother substrate 2 and the material of the mother substrate 2 can be freely selected. The degree is increased.
Further, by unifying the sizes of the submount collective substrates 30, it is possible to unify high-precision jigs for FCB mounting.
Further, since the submount substrate 3 is mounted on the mother substrate 2, a general-purpose handling machine can be used, and handling becomes easy.
Further, by forming the bumps by plating, productivity is improved and the outer shape (or the matching hole) of the submount substrate 3 can be used as a reference, so that high positional accuracy can be obtained.
Further, when the mounting plating bumps 37a and 37b and the LED chip 4 are joined by ultrasonic vibration, the mounting plating bumps 37a and 37b become longer in the ultrasonic vibration direction. By making the shape long in the direction perpendicular to, a short circuit can be prevented.
Further, when the submount substrate 3 is downsized and brought close to the LED chip size as much as possible, a chip size package (CSP) referred to as an IC or the like can be manufactured.
In addition, it can be used by general equipment such as a mounter and die bonder even in a process without special and expensive equipment such as a flip chip bonder. In addition, it is possible to apply to a mounting package that is difficult to mount directly in relation to the flip chip bonder and its peripheral jigs due to the shape and form.
In addition, the surface 31a of the submount substrate 3 has a suction surface for handling the submount substrate 3 on which the LED chip 4 is mounted, so that it can be handled in a mold dress (such as dice bonding in the subsequent process). become.
Further, since resin sealing after die bonding and mounting is possible, direct molding with a resin of a silicone type that is very soft and difficult to handle with a machine becomes possible. In addition, the resin sealing can be performed in the shape of the case 9, the reflector 7, or the like, or the shape that is not limited by the space of the submount substrate 3.
In addition, since the characteristic inspection can be performed in a collective state, the number of inspection steps can be reduced.
In addition, since the FCB bare chip mounting is performed in the LED surface light emitting device using a large number of GaN-based LED chips, the luminous efficiency can be improved.
Moreover, since the mother substrate 2 and the submount substrate 3 are made of a material having a high light reflectivity and a low light absorption rate with respect to the emission wavelength of the LED chip 4 to be mounted, the light emission efficiency is increased. Low power can be achieved.
Further, since the Zener diode 11 is provided on the input side of the LED drive circuit, electrostatic breakdown due to the low electrostatic withstand voltage of the GaN-based LED chip 4 can be prevented.
In addition, since the submount substrate 3 on which the LED chip 4 is FCB-mounted can be mounted on the mother substrate 2 after performing the characteristic inspection including the light amount test, the single light emitting device 1 can be easily selected in advance. As a result, it becomes possible to perform selective mounting to alleviate the unevenness in the amount of light, and repair is unnecessary.
In addition, since the sealing member 5 is molded after mounting the sub-mount substrate 3 on which the LED chip 4 is FCB mounted on the mother substrate 2, the shape and material of the sealing member 5 are determined after mounting. Therefore, the selectivity of the shape and material is expanded, and desired light distribution characteristics are easily realized.
Further, since the entire surface light emitting device 1 is protected by the cover 9, reliability and mechanical strength can be ensured.
[0029]
The present invention may be applied to a single LED lamp in which a lead wire, a lead frame, or the like is derived from an LED chip that is FCB mounted on a substrate, and the LED chip is sealed with a sealing member. Further, the present invention may be applied to an image display device in which a plurality of LED chips are arranged in a matrix and the plurality of LED chips are selectively lit according to an image signal.
[0030]
【The invention's effect】
Above-described above, according to the LED light source and the manufacturing method thereof of the present invention, the light from a plurality of LED chips, since the electrodes are emitted from the light emitting surface is not et provided, possible to improve the luminous efficiency Can do. Further, since the pair of bonding bumps are formed by plating, productivity is improved and high positional accuracy is obtained. Further, since the sealing member can be provided after handling the substrate on which the LED chip is mounted, the degree of freedom of the shape and material of the sealing member is increased.
[Brief description of the drawings]
FIG. 1 shows an LED surface light emitting device to which an LED light source according to an embodiment of the present invention is applied, wherein (a) is a front view, (b) is a side view, and (c) is a bottom view.
2A is an enlarged view of part A in FIG. 1A, FIG. 2B is an enlarged view of part B in FIG. 1A, and FIG. 2C is a bottom view of the LED chip;
FIGS. 3A and 3B show the FCB structure of the present embodiment, where FIG. 3A is a surface view of a submount substrate on which an LED chip is mounted, FIG. 3B is a cross-sectional view, and FIGS. The figure which shows the shape of a bump, (e) is a back view of a submount substrate.
4A is a front view of a mother substrate, FIG. 4B is an enlarged view of a portion D in FIG. 4A, and FIG. 4C is an enlarged view of an E portion in FIG.
5A and 5B are diagrams showing an LED drive circuit according to the present embodiment. FIGS. 6A and 6B are diagrams showing a manufacturing process of a submount substrate according to the present embodiment.
FIGS. 7A to 7F are diagrams showing manufacturing steps of the submount substrate according to the present embodiment.
FIG. 8 is a diagram showing a manufacturing process of the LED surface light emitting device of the present embodiment.
FIG. 9 is a cross-sectional view showing a conventional LED light source.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 LED surface light-emitting device 2 Mother board | substrate 2a Front surface 2b Back surface 3 Submount substrate 4 LED chip 4a Positive electrode 4b Negative electrode 5 Sealing member 6 Spacer 6a Opening 7 Reflector 7a Opening 7b Reflecting surface 8 Transparent plate 9 Cover 9a Opening 10 Resistive element 11 Zener diodes 12A, 12B, 13A, 13B Connection terminal 14 Resist 14a Hole 15 Mask 15a Hole 20 Wiring pattern 20a, 20b Connection area 30 Multi-mounting submount collective substrate 31a Front surface 31b Back surface 32a Positive lead 32b Negative lead 33a Positive lead 33b Negative lead 34a, 34b Through-hole plating 35 Positive display part 36a, 36b Position recognition plating bump 37a, 37b Mounting plating bump 38a, 38b Inspection area 40a Positive electrode 40b Negative electrode 100 Substrate 101 Base material 101a Surface 1 01b Side surface 101c Back surface 110A, 110B Lead 120a, 120b Bump 130 LED chip 130a Upper surface 130b Lower surface 131 Reflective layer 140 Transparent resin 150 Underfill resin

Claims (13)

絶縁基材の裏面に形成された正負一対の裏リード、および前記絶縁基材の表面に前記一対の裏リードに一対の金属接続部によって接続された正負一対の表リードを有する基板と、
前記基板に対向する面側に正負一対の電極を有し、前記一対の電極が一対の接合用バンプを介して前記基板の前記一対の表リードに接続されたLEDチップとを備え、
前記一対の接合用バンプは、前記LEDチップの搭載後に円形となるように、前記LEDチップの搭載前に、超音波振動による接合の際の超音波振動方向と垂直な方向に長い楕円形あるいは長円形に形成され、かつ、メッキによって前記一対の表リード上に形成されたことを特徴とするLED光源。
A pair of positive and negative back leads formed on the back surface of the insulating base, and a substrate having a pair of positive and negative front leads connected to the pair of back leads by a pair of metal connecting portions on the surface of the insulating base;
An LED chip having a pair of positive and negative electrodes on a surface facing the substrate, the pair of electrodes being connected to the pair of front leads of the substrate via a pair of bonding bumps;
Before the LED chip is mounted, the pair of bonding bumps are circular or long in a direction perpendicular to the ultrasonic vibration direction when the LED chip is bonded, so that the bump becomes circular after the LED chip is mounted. An LED light source formed in a circular shape and formed on the pair of front leads by plating.
前記一対の接合用バンプは、前記一対の接合用バンプが配列された方向に垂直な方向に長い楕円形あるいは長円形を有する構成の請求項1記載のLED光源。  2. The LED light source according to claim 1, wherein the pair of bonding bumps has an elliptical shape or an oval shape that is long in a direction perpendicular to a direction in which the pair of bonding bumps are arranged. 前記一対の表リードは、前記一対の接合用バンプに対して所定の位置関係を有する自動認識用のバンプが前記一対の接合用バンプとメッキによって一括で形成された構成の請求項1記載のLED光源。  2. The LED according to claim 1, wherein the pair of front leads has a configuration in which bumps for automatic recognition having a predetermined positional relationship with the pair of bonding bumps are collectively formed by plating with the pair of bonding bumps. light source. 前記一対の表リードは、前記表面の前記LEDチップが搭載される領域以外の領域に電圧を印加して前記LEDチップの特性を検査するための一対の検査用領域を有する構成の請求項1記載のLED光源。  The pair of front leads has a configuration in which a pair of inspection areas for inspecting the characteristics of the LED chip by applying a voltage to an area other than the area where the LED chip is mounted on the surface is provided. LED light source. 前記LEDチップは、所定の外形形状によって前記LEDチップが発する光に所定の配光特性を付与する透明樹脂からなる封止部材によって封止された構成の請求項1記載のLED光源。  The LED light source according to claim 1, wherein the LED chip is sealed by a sealing member made of a transparent resin that imparts a predetermined light distribution characteristic to light emitted from the LED chip with a predetermined outer shape. 前記基板は、四角形状を有し、前記封止部材は、底面が前記基板の四角形状に対応した四角形状を有し、先端部が球状を有する構成の請求項記載のLED光源。The LED light source according to claim 5 , wherein the substrate has a quadrangular shape, the bottom surface of the sealing member has a quadrangular shape corresponding to the quadrangular shape of the substrate, and a tip portion has a spherical shape. 前記一対の金属接続部は、一対のスルーホールめっきである構成の請求項1記載のLED光源。  The LED light source according to claim 1, wherein the pair of metal connection portions is a pair of through-hole plating. 前記基板は、前記表面の前記LEDチップが搭載される領域以外の領域に、前記一対の接合用バンプを介して前記LEDチップが搭載された前記基板をハンドリングするための吸着面を有する構成の請求項1記載のLED光源。  The said board | substrate is a structure of having the adsorption | suction surface for handling the said board | substrate with which the said LED chip was mounted in the area | regions other than the area | region where the said LED chip is mounted on the said surface via the said pair of bonding bumps. Item 1. An LED light source according to Item 1. 絶縁基材の裏面に正負一対の裏リード、および前記絶縁基材の表面に前記一対の裏リードに一対の金属接続部により接続された正負一対の表リードを複数組有する集合基板を形成し、
前記集合基板の複数組の前記一対の表リードに一対の接合用バンプをそれぞれ前記LEDチップの搭載後に円形となるように、超音波振動方向と垂直な方向に長い楕円形あるいは長円形に形成し、1つの面側に正負一対の電極を有する複数のLEDチップを、前記一対の電極を前記一対のバンプに接続して前記集合基板上に搭載し、
前記複数のLEDチップが搭載された前記集合基板をLEDチップ毎に分割することを特徴とするLED光源の製造方法。
Forming a pair of positive and negative back leads on the back surface of the insulating base, and a set substrate having a plurality of pairs of positive and negative front leads connected to the pair of back leads by a pair of metal connecting portions on the surface of the insulating base;
A pair of bonding bumps is formed in a plurality of pairs of the front leads of the collective substrate in an oval shape or an oval shape that is long in a direction perpendicular to the ultrasonic vibration direction so as to be circular after the LED chip is mounted. A plurality of LED chips having a pair of positive and negative electrodes on one surface side are mounted on the collective substrate by connecting the pair of electrodes to the pair of bumps,
A method of manufacturing an LED light source, wherein the collective substrate on which the plurality of LED chips are mounted is divided for each LED chip.
前記複数組の一対の接合用バンプの形成は、メッキによって形成する構成の請求項記載のLED光源の製造方法。The method of manufacturing an LED light source according to claim 9, wherein the plurality of pairs of bonding bumps are formed by plating. 前記集合基板への複数組の前記一対の接合用バンプの形成は、前記一対の接合用バンプに対して所定の位置関係を有する自動認識用のバンプの形成を含む構成の請求項記載のLED光源の製造方法。The LED according to claim 9 , wherein the formation of the plurality of pairs of bonding bumps on the aggregate substrate includes formation of automatic recognition bumps having a predetermined positional relationship with respect to the pair of bonding bumps. Manufacturing method of light source. 前記複数組の一対の接合用バンプ、および前記自動認識用のバンプの形成は、メッキによって一括して形成する構成の請求項11記載のLED光源の製造方法。12. The method of manufacturing an LED light source according to claim 11, wherein the plurality of pairs of bonding bumps and the automatic recognition bumps are collectively formed by plating. 前記複数のLEDチップの前記集合基板上への搭載は、所定の外形形状によって前記LEDチップが発する光に所定の配光特性を付与する透明樹脂からなる複数の封止部材によって前記複数のLEDチップを封止する工程を含む構成の請求項記載のLED光源の製造方法。The plurality of LED chips are mounted on the collective substrate by a plurality of sealing members made of a transparent resin that imparts a predetermined light distribution characteristic to light emitted from the LED chips with a predetermined outer shape. The manufacturing method of the LED light source of Claim 9 of the structure including the process of sealing.
JP2000191101A 2000-06-26 2000-06-26 LED light source and manufacturing method thereof Expired - Lifetime JP4601128B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000191101A JP4601128B2 (en) 2000-06-26 2000-06-26 LED light source and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000191101A JP4601128B2 (en) 2000-06-26 2000-06-26 LED light source and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JP2002009347A JP2002009347A (en) 2002-01-11
JP4601128B2 true JP4601128B2 (en) 2010-12-22

Family

ID=18690454

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000191101A Expired - Lifetime JP4601128B2 (en) 2000-06-26 2000-06-26 LED light source and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JP4601128B2 (en)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003008071A (en) * 2001-06-22 2003-01-10 Stanley Electric Co Ltd LED lamp using LED board assembly
DE10245930A1 (en) 2002-09-30 2004-04-08 Osram Opto Semiconductors Gmbh Optoelectronic component and component module
JP4288931B2 (en) * 2002-11-11 2009-07-01 日亜化学工業株式会社 Light emitting device and manufacturing method thereof
CN1759492B (en) 2003-03-10 2010-04-28 丰田合成株式会社 Method for manufacturing solid state device
JP4008943B2 (en) * 2003-03-10 2007-11-14 豊田合成株式会社 Method for manufacturing solid element device
JP4029843B2 (en) 2004-01-19 2008-01-09 豊田合成株式会社 Light emitting device
JP3804649B2 (en) 2003-09-19 2006-08-02 株式会社村田製作所 Electronic circuit device manufacturing method and electronic circuit device
US7850314B2 (en) 2006-02-24 2010-12-14 Konica Minolta Opto, Inc. Light-emitting module and image projection apparatus using same
US8969908B2 (en) * 2006-04-04 2015-03-03 Cree, Inc. Uniform emission LED package
US7964888B2 (en) * 2007-04-18 2011-06-21 Cree, Inc. Semiconductor light emitting device packages and methods
US10505083B2 (en) 2007-07-11 2019-12-10 Cree, Inc. Coating method utilizing phosphor containment structure and devices fabricated using same
US9401461B2 (en) 2007-07-11 2016-07-26 Cree, Inc. LED chip design for white conversion
US8877524B2 (en) 2008-03-31 2014-11-04 Cree, Inc. Emission tuning methods and devices fabricated utilizing methods
JP2008277871A (en) * 2008-08-22 2008-11-13 Showa Denko Kk LED lamp
JP2011101054A (en) * 2009-07-03 2011-05-19 Sharp Corp Substrate for mounting semiconductor light emitting element, backlight chassis, display device, and television receiver
KR101051326B1 (en) 2010-04-23 2011-07-22 주식회사 세미콘라이트 Compound Semiconductor Light Emitting Device
US8558252B2 (en) 2011-08-26 2013-10-15 Cree, Inc. White LEDs with emission wavelength correction
JP6476857B2 (en) * 2014-12-29 2019-03-06 日亜化学工業株式会社 Light emitting device
CN108257947A (en) * 2016-12-29 2018-07-06 晶能光电(江西)有限公司 A kind of UVLED area sources module

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02113336U (en) * 1989-02-27 1990-09-11
JPH04315486A (en) * 1991-04-15 1992-11-06 Hitachi Ltd Optoelectronic device and its manufacturing method
JP2576426B2 (en) * 1994-10-28 1997-01-29 日本電気株式会社 Semiconductor device bonding method and bonding apparatus
JPH09306936A (en) * 1996-05-20 1997-11-28 Seiko Epson Corp Projection electrode and method of manufacturing the same
JP2851589B2 (en) * 1996-08-15 1999-01-27 日本レック株式会社 Optoelectronic component manufacturing method
EP1959506A2 (en) * 1997-01-31 2008-08-20 Matsushita Electric Industrial Co., Ltd. Method of manufacturing a semiconductor light-emitting device
JPH118414A (en) * 1997-06-18 1999-01-12 Sony Corp Semiconductor device and semiconductor light emitting device
JP3257455B2 (en) * 1997-07-17 2002-02-18 松下電器産業株式会社 Light emitting device
JPH1197493A (en) * 1997-09-19 1999-04-09 Toshiba Corp Bonding method and apparatus
JP3416040B2 (en) * 1997-11-11 2003-06-16 富士通株式会社 Semiconductor device
JP3500287B2 (en) * 1997-11-26 2004-02-23 京セラ株式会社 Wiring board

Also Published As

Publication number Publication date
JP2002009347A (en) 2002-01-11

Similar Documents

Publication Publication Date Title
JP4601128B2 (en) LED light source and manufacturing method thereof
EP2197051B1 (en) Light emitting device and method for manufacturing same
US8044423B2 (en) Light emitting device package
CN103384924B (en) Encapsulation of photonic building blocks with only top-side connections in interconnect structures
US8637892B2 (en) LED package and method for manufacturing same
US20120273826A1 (en) Led package and method for manufacturing same
CN103443943B (en) Includes sealed LED package
US9512968B2 (en) LED module
JP5940799B2 (en) Electronic component mounting package, electronic component package, and manufacturing method thereof
CN102148224A (en) Led module
JP2002009349A (en) LED surface light emitting device and method of manufacturing the same
TWM379163U (en) Packaging apparatus for high power and high orientation matrix semiconductor light-emitting devices
JP4301075B2 (en) Light emitting diode package and light emitting device using the same
JP2012124249A (en) Led package and manufacturing method thereof
TW201327948A (en) Light-emitting diode package and manufacturing method
US10727373B2 (en) Light emitting diode, method for manufacturing light emitting diode, light emitting diode display device, and method for manufacturing light emitting diode display device
CN101295754A (en) Flip chip bonding packaging structure and method for light emitting diode
US20120126256A1 (en) Led package
TWI536512B (en) Projection laser chip package structure
JP2003036707A (en) Illumination device and manufacturing method thereof
CN113725721A (en) Lead frame package of semiconductor side-emitting laser and manufacturing method thereof
CN104112811B (en) A kind of packaging method of LED
CN102104037A (en) Luminous device with integrated circuit and manufacturing method thereof
JP2003037296A (en) Illumination device and manufacturing method thereof
JP2007335734A (en) Semiconductor device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070508

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20100218

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100302

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100506

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100831

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100928

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131008

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 4601128

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term