JP4610075B2

JP4610075B2 - Receiver

Info

Publication number: JP4610075B2
Application number: JP2000369557A
Authority: JP
Inventors: 勝也小倉; 健三鐘堂
Original assignee: Rohm Co Ltd
Current assignee: Rohm Co Ltd
Priority date: 2000-12-05
Filing date: 2000-12-05
Publication date: 2011-01-12
Anticipated expiration: 2020-12-05
Also published as: JP2002171142A

Description

【０００１】
【発明の属する技術分野】
本発明は、デジタルカメラやビデオカメラ等に用いる光信号を電気信号に変換する受光装置に関するものである。
【０００２】
【従来の技術】
従来の受光装置の回路図を図４に示す。フォトダイオード１は、アノードがグランドＧＮＤに接続されており、カソードが演算増幅器２の反転入力端子（−）に接続されている。演算増幅器２は、非反転入力端子（＋）には所定の直流電圧Ｖ_ｒｅｆが印加されており、出力端子が抵抗３を介して反転入力端子（−）に接続されている。そして、演算増幅器２の出力端子が外部端子ＯＵＴに接続されている。
【０００３】
フォトダイオード１には入射光の強度に応じた光電流Ｉ_ＰＤが図４に矢印で示す方向に流れる。そして、この光電流Ｉ_ＰＤは、演算増幅器２の出力端子から抵抗３を介して流れると見なすことができる。また、演算増幅器２には負帰還がかかっているので、演算増幅器２の非反転入力端子（＋）と反転入力端子（−）との電圧は等しいと見なすことができる。したがって、外部端子ＯＵＴに発生する電圧Ｖ_Ｏは、抵抗３の抵抗値をＲとすると、
Ｖ_Ｏ＝Ｉ_ＰＤ・Ｒ＋Ｖ_ｒｅｆ
となる。
【０００４】
【発明が解決しようとする課題】
しかしながら、上記構成の受光装置では、受光感度を良くするためには、抵抗３の抵抗値を大きくしなければならず、集積化する場合には、チップサイズが大きくなるとともに、時定数が大きくなって周波数特性が悪化するという問題を招く。特に、本構成の受光装置を１つの画素として多数有する画像装置の場合、チップサイズの増大を抑える必要がある。
【０００５】
そこで、本発明は、チップサイズの増大を抑えながら、周波数特性の悪化を伴うことなく、受光感度を向上させることができるようにした受光装置を提供することを目的とする。
【０００６】
【課題を解決するための手段】
上記の目的を達成するため、本発明の受光装置では、ゲート及びドレインが接続された第１の電界効果トランジスタと、該第１の電界効果トランジスタのドレインに接続されることによって該第１の電界効果トランジスタのドレイン−ソース間に入射光の強度に応じた電流を供給する光電変換部と、オフセット部と、該光電変換部から供給される電流により該第１の電界効果トランジスタのドレイン−ソース間に生成する電圧と該オフセット部で得られた電圧との和がゲート−ソース間に印加される第２の電界効果トランジスタと、該第２の電界効果トランジスタのドレインに反転入力端子が接続されるとともに非反転入力端子に所定の直流電圧が入力される差動増幅器および該差動増幅器の出力端子と反転入力端子間の負帰還路に接続されることにより該第２の電界効果トランジスタのドレイン電流が流れる抵抗とを持つ電流電圧変換部と、を備えている。
【０００７】
この構成により、上記オフセット部の電圧を適切に設定しておけば、入射光の強度に応じて光電変換部に発生する光電流よりも大きな値の電流が電流／電圧変換部の抵抗に流れる。
【０００８】
【発明の実施の形態】
以下に、本発明の実施形態を図面を参照しながら説明する。本発明の第１実施形態である受光装置の回路図を図１に示す。尚、同図に示す全ての構成要素が１チップに集積化されている。フォトダイオード１は、カソードが電源電圧Ｖ_CCに接続されており、アノードがｎチャネルのＭＯＳ型の電界効果トランジスタ４のドレインに接続されている。
【０００９】
演算増幅器２は、非反転入力端子（＋）に所定の直流電圧Ｖ_refが印加されており、反転入力端子（−）がｎチャネルのＭＯＳ型の電界効果トランジスタ５のドレインに接続されており、出力端子が外部端子ＯＵＴに接続されている。演算増幅器２の反転入力端子（−）と出力端子とが抵抗３を介して接続されている。
【００１０】
トランジスタ４は、ドレインがフォトダイオード１のアノードに接続されており、ソースはオフセット電圧Ｖ_OSの電源７の＋電極側に接続されており、ゲート−ドレイン間が短絡されている。電源７の−電極側はグランドＧＮＤに接続されている。
【００１１】
トランジスタ５は、ゲートがフォトダイオード１のアノードとトランジスタ４のドレインとの接続中点に接続されており、ソースがグランドＧＮＤに接続されており、ドレインが演算増幅器２の反転入力端子（−）と抵抗３との接続中点に接続されている。
【００１２】
以上の構成により、外部端子ＯＵＴに発生する電圧Ｖ_Oは、トランジスタ５のドレイン電流をＩ_D、抵抗３の値をＲとすると、
Ｖ_O＝Ｉ_D・Ｒ＋Ｖ_ref
となる。
【００１３】
このようにして、トランジスタ５のゲートには、入射光の強度に応じてフォトダイオード１に流れる光電流Ｉ_ＰＤがゲート−ドレイン間が短絡されたトランジスタ４のドレイン−ソース間を流れることによって生成する電圧Ｖ_ＰＤとオフセット電圧Ｖ_ＯＳとの和が印加される。
【００１４】
したがって、オフセット電圧Ｖ_OSの値を適切に設定しておけば、光電流Ｉ_PDよりも大きな値の電流をトランジスタ５のドレイン電流Ｉ_Dとして得ることができる。これにより、抵抗３の値を大きくすることなく、すなわち、チップサイズの増大、及び、周波数特性の悪化を伴うことなく、受光感度を向上させることができる。
【００１６】
本発明の第２実施形態である受光装置の回路図を図２に示す。尚、同図に示す全ての構成要素が１チップに集積化されている。フォトダイオード１は、カソードが電源電圧Ｖ_CCに接続されており、アノードがｎチャネルのＭＯＳ型の電界効果トランジスタ４のドレイン、及び、演算増幅器６の反転入力端子（−）に接続されている。
【００１７】
演算増幅器２は、非反転入力端子（＋）に所定の直流電圧Ｖ_refが印加されており、反転入力端子（−）がｎチャネルのＭＯＳ型の電界効果トランジスタ５のドレインに接続されており、出力端子が外部端子ＯＵＴに接続されている。演算増幅器２の反転入力端子（−）と出力端子とが抵抗３を介して接続されている。
【００１８】
トランジスタ４は、ドレインがフォトダイオード１のアノードと演算増幅器６の非反転入力端子（＋）との接続中点に接続されており、ソースが演算増幅器６の出力端子、及び、トランジスタ５のソースに接続されており、ゲート−ドレイン間が短絡されている。
【００１９】
トランジスタ５は、ゲートがオフセット電圧Ｖ_OSの２倍の電源８の＋電極側に接続されており、ドレインが演算増幅器２の反転入力端子（−）と抵抗３との接続中点に接続されており、ソースがトランジスタ４のソース及び演算増幅器６の出力端子に接続されている。電源８の−電極側はグランドに接続されている。
【００２０】
演算増幅器６は、非反転入力端子（＋）がオフセット電圧Ｖ_OSの電源７の＋電極側に接続されており、反転入力端子（−）がフォトダイオード１のアノード、及び、トランジスタ４のドレインに接続されており、出力端子がトランジスタ４のソース及びトランジスタ５のソースに接続されている。電源７の−電極側はグランドＧＮＤに接続されている。
【００２１】
本発明の第３実施形態である受光装置の回路図を図３に示す。尚、同図に示す全ての構成要素が１チップに集積化されている。この第３実施形態では、上記第２実施形態において、演算増幅器６の非反転入力端子（＋）に接続されていたオフセット電源をなくすとともに、トランジスタ４のソースにオフセット電圧Ｖ_OSの電源７の＋電極側を接続し、この電源７の−電極側をトランジスタ５のソース、及び、演算増幅器６の出力端子に接続し、トランジスタ５のゲートをグランドＧＮＤに接続した構成である。
【００２２】
これらの第２、第３実施形態においても、トランジスタ５のゲート−ソース間には、入射光の強度に応じてフォトダイオード１に流れる光電流Ｉ_ＰＤがゲート−ドレイン間が短絡されたトランジスタ４のドレイン−ソース間を流れることによって生成する電圧Ｖ_ＰＤとオフセット電圧Ｖ_ＯＳとの和が印加されるので、オフセット電圧Ｖ_ＯＳの値を適切に設定しておけば、光電流Ｉ_ＰＤよりも大きな値の電流がトランジスタ５のドレイン電流Ｉ_Ｄとして得られるようになり、チップサイズの増大、周波数特性の悪化を伴うことなく、受光感度を向上させることができる。
【００２３】
【発明の効果】
以上説明したように、本発明の受光装置によれば、入射光の強度に応じて光電変換部に発生する光電流よりも大きな値の電流を電流／電圧変換部の抵抗に流すことができるので、受光感度を向上させるにあたって上記抵抗の値を大きくすることによるチップサイズの増大を抑えながら、周波数特性の悪化を伴うことなく、受光感度を向上させることができるようになる。また、第１及び第２の実施形態の受光装置を用いた画像装置では、オフセット電圧源を共通化することができ、チップサイズの増大がさらに少なくて済むようになる。
【図面の簡単な説明】
【図１】本発明の第１実施形態である受光装置の回路図である。
【図２】本発明の第２実施形態である受光装置の回路図である。
【図３】本発明の第３実施形態である受光装置の回路図である。
【図４】従来の受光装置の回路図である。
【符号の説明】
１フォトダイオード
２演算増幅器
３抵抗
４ｎチャネルのＭＯＳ型の電界効果トランジスタ
５ｎチャネルのＭＯＳ型の電界効果トランジスタ
６演算増幅器
７電源
８電源[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a light receiving device that converts an optical signal used for a digital camera, a video camera, or the like into an electrical signal.
[0002]
[Prior art]
The circuit diagram of a conventional light-receiving device shown in FIG. The photodiode 1 has an anode connected to the ground GND and a cathode connected to the inverting input terminal (−) of the operational amplifier 2. In the operational amplifier 2, a predetermined DC voltage V _ref is applied to the non-inverting input terminal (+), and the output terminal is connected to the inverting input terminal (−) via the resistor 3. The output terminal of the operational amplifier 2 is connected to the external terminal OUT.
[0003]
The photodiode 1 photocurrent I _PD corresponding to the intensity of incident light flows in a direction indicated by an arrow in FIG. Then, the photocurrent I _PD can be considered to flow from the output terminal of the operational amplifier 2 via the resistor 3. Further, since negative feedback is applied to the operational amplifier 2, it can be considered that the voltages at the non-inverting input terminal (+) and the inverting input terminal (-) of the operational amplifier 2 are equal. Therefore, the voltage V _O generated at the external terminal OUT is represented by R as the resistance value of the resistor 3.
V _O = I _PD · R + V _ref
It becomes.
[0004]
[Problems to be solved by the invention]
However, in the light receiving device having the above configuration, in order to improve the light receiving sensitivity, the resistance value of the resistor 3 must be increased. In the case of integration, the chip size increases and the time constant increases. This causes a problem that the frequency characteristic is deteriorated . In particular, in the case of an image device having many light-receiving device of this configuration as a single pixel, it is necessary to suppress an increase in chip size.
[0005]
The present invention, while suppressing an increase in chip size, without deterioration in the frequency characteristics, and an object thereof is to provide a light receiving apparatus that can improve the light receiving sensitivity.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, in the light receiving device of the present invention, the first electric field effect transistor having a gate and a drain connected to each other and the first electric field effect transistor connected to the drain of the first field effect transistor. A photoelectric conversion unit that supplies current according to the intensity of incident light between the drain and source of the effect transistor, an offset unit, and the drain and source of the first field effect transistor by current supplied from the photoelectric conversion unit A second field effect transistor in which the sum of the voltage generated at the offset and the voltage obtained at the offset portion is applied between the gate and the source, and the inverting input terminal is connected to the drain of the second field effect transistor And a differential amplifier in which a predetermined DC voltage is input to the non-inverting input terminal and a negative feedback path between the output terminal and the inverting input terminal of the differential amplifier. And a, a current-to-voltage converter having a resistance which the drain current of the field effect transistor of the second flow by.
[0007]
With this configuration, if the voltage of the offset unit is appropriately set, a current having a value larger than the photocurrent generated in the photoelectric conversion unit according to the intensity of incident light flows through the resistance of the current / voltage conversion unit .
[0008]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a circuit diagram of the light receiving device according to the first embodiment of the present invention. It should be noted that all the constituent elements shown in the figure are integrated on one chip. The photodiode 1 has a cathode connected to the power supply voltage V _CC and an anode connected to the drain of the n-channel MOS field effect transistor 4.
[0009]
In the operational amplifier 2, a predetermined DC voltage V _ref is applied to the non-inverting input terminal (+), the inverting input terminal (−) is connected to the drain of the n-channel MOS field effect transistor 5, The output terminal is connected to the external terminal OUT. An inverting input terminal (−) and an output terminal of the operational amplifier 2 are connected via a resistor 3.
[0010]
The transistor 4 has a drain connected to the anode of the photodiode 1, a source connected to the + electrode side of the power source 7 of the offset voltage V _OS , and the gate and the drain are short-circuited. The negative electrode side of the power source 7 is connected to the ground GND.
[0011]
The transistor 5 has a gate connected to the midpoint of connection between the anode of the photodiode 1 and the drain of the transistor 4, a source connected to the ground GND, and a drain connected to the inverting input terminal (−) of the operational amplifier 2. It is connected to the midpoint of connection with the resistor 3.
[0012]
With the above configuration, the voltage V _O generated at the external terminal OUT is such that the drain current of the transistor 5 is I _D and the value of the resistor 3 is R.
V _O = _ID・ R + V _ref
It becomes.
[0013]
In this way, the photocurrent _IPD flowing through the photodiode 1 according to the intensity of incident light is generated at the gate of the transistor 5 by flowing between the drain and source of the transistor 4 whose gate and drain are short-circuited. The sum of the voltage V _PD and the offset voltage V _OS is applied.
[0014]
Therefore, if properly set the value of the offset voltage V _OS, can than the photocurrent I _PD obtained by a current of a large value between the drain current I _D of the transistor 5. Thereby, it is possible to improve the light receiving sensitivity without increasing the value of the resistor 3, that is, without increasing the chip size and deteriorating the frequency characteristics.
[0016]
FIG. 2 shows a circuit diagram of a light receiving device according to the second embodiment of the present invention. It should be noted that all the constituent elements shown in the figure are integrated on one chip. The photodiode 1 has a cathode connected to the power supply voltage V _CC and an anode connected to the drain of the n-channel MOS field effect transistor 4 and the inverting input terminal (−) of the operational amplifier 6.
[0017]
In the operational amplifier 2, a predetermined DC voltage V _ref is applied to the non-inverting input terminal (+), the inverting input terminal (−) is connected to the drain of the n-channel MOS field effect transistor 5, The output terminal is connected to the external terminal OUT. An inverting input terminal (−) and an output terminal of the operational amplifier 2 are connected via a resistor 3.
[0018]
The transistor 4 has a drain connected to a connection midpoint between the anode of the photodiode 1 and the non-inverting input terminal (+) of the operational amplifier 6, and a source connected to the output terminal of the operational amplifier 6 and the source of the transistor 5. The gate and drain are short-circuited.
[0019]
The transistor 5 has a gate connected to the + electrode side of the power supply 8 that is twice the offset voltage V _OS , and a drain connected to the connection midpoint between the inverting input terminal (−) of the operational amplifier 2 and the resistor 3. The source is connected to the source of the transistor 4 and the output terminal of the operational amplifier 6. The negative electrode side of the power supply 8 is connected to the ground.
[0020]
In the operational amplifier 6, the non-inverting input terminal (+) is connected to the + electrode side of the power supply 7 of the offset voltage V _OS , and the inverting input terminal (−) is connected to the anode of the photodiode 1 and the drain of the transistor 4. The output terminal is connected to the source of the transistor 4 and the source of the transistor 5. The negative electrode side of the power source 7 is connected to the ground GND.
[0021]
FIG. 3 shows a circuit diagram of a light receiving device according to the third embodiment of the present invention. It should be noted that all the constituent elements shown in the figure are integrated on one chip. In the third embodiment, the offset power supply connected to the non-inverting input terminal (+) of the operational amplifier 6 in the second embodiment is eliminated, and the +7 of the power supply 7 of the offset voltage V _OS is connected to the source of the transistor 4. The electrode side is connected, the negative electrode side of the power supply 7 is connected to the source of the transistor 5 and the output terminal of the operational amplifier 6, and the gate of the transistor 5 is connected to the ground GND.
[0022]
These second, also in the third embodiment, the gate of the transistor 5 - between the source, the photoelectric current I _PD flowing through the photodiode 1 according to the intensity of the incoming Shako the gate - drain of transistors 4 shorted Since the sum of the voltage V _PD generated by flowing between the drain and the source and the offset voltage V _OS is applied, if the value of the offset voltage V _OS is appropriately set, the value is larger than the photocurrent _IPD. I current of Ru obtained as the drain current I _D of the transistor 5 Uninari, increase in chip size, without deterioration in the frequency characteristic, it is possible to improve the light receiving sensitivity.
[0023]
【The invention's effect】
As described above, according to the light receiving device of the present invention, a current having a value larger than the photocurrent generated in the photoelectric conversion unit according to the intensity of incident light can be passed through the resistance of the current / voltage conversion unit. , while suppressing an increase in chip size by increasing the value of the resistor when improving the receiving sensitivity, without deterioration in the frequency characteristic, it is possible to improve the light receiving sensitivity. Further, in the image apparatus using the light receiving device of the first and second embodiments, the offset voltage source can be shared, and the increase in chip size can be further reduced.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of a light receiving device according to a first embodiment of the present invention.
FIG. 2 is a circuit diagram of a light receiving device according to a second embodiment of the present invention.
FIG. 3 is a circuit diagram of a light receiving device according to a third embodiment of the present invention.
FIG. 4 is a circuit diagram of a conventional light receiving device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Photodiode 2 Operational amplifier 3 Resistance 4 N channel MOS type field effect transistor 5 N channel MOS type field effect transistor 6 Operational amplifier 7 Power supply 8 Power supply

Claims

  A first field effect transistor having a gate and a drain connected;
  A photoelectric conversion unit that is connected to a drain of the first field effect transistor to supply a current corresponding to an intensity of incident light between a drain and a source of the first field effect transistor;
  An offset part;
  The sum of the voltage generated between the drain and source of the first field effect transistor by the current supplied from the photoelectric conversion unit and the voltage obtained at the offset unit is applied between the gate and the source. A field effect transistor;
  A differential amplifier in which an inverting input terminal is connected to the drain of the second field effect transistor and a predetermined DC voltage is input to the non-inverting input terminal, and negative feedback between the output terminal and the inverting input terminal of the differential amplifier A current-voltage converter having a resistance through which the drain current of the second field-effect transistor flows by being connected to a path;
  A light receiving device comprising:

  The offset portion has its positive electrode connected to the source of the first field effect transistor,
  The source of the second field effect transistor is connected to the negative electrode of the offset portion, and the gate of the first field effect transistor is connected to the gate of the second field effect transistor,
  The sum of the voltage generated between the drain and source of the first field effect transistor by the current supplied from the photoelectric conversion unit and the voltage obtained at the offset unit is the gate and source of the second field effect transistor. The light receiving device according to claim 1, wherein the light receiving device is applied between them.

A voltage obtained by subtracting a voltage generated between the drain and source of the first field effect transistor from the voltage obtained at the offset portion as viewed from the reference voltage is applied to the source of the second field effect transistor, and By connecting a second offset portion having a voltage twice the voltage obtained from the offset portion as viewed from the reference voltage to the gate of the field effect transistor of FIG.
The sum of the voltage generated between the drain and source of the first field effect transistor by the current supplied from the photoelectric conversion unit and the voltage obtained at the offset unit is the gate and source of the second field effect transistor. The light receiving device according to claim 1, wherein the light receiving device is applied between them.

A voltage obtained by subtracting the voltage obtained at the offset portion from the reference voltage and the voltage generated between the drain and source of the first field effect transistor is applied to the source of the second field effect transistor, and the second By applying a reference voltage to the gate of the field effect transistor of
The sum of the voltage generated between the drain and source of the first field effect transistor by the current supplied from the photoelectric conversion unit and the voltage obtained at the offset unit is the gate and source of the second field effect transistor. The light receiving device according to claim 1, wherein the light receiving device is applied between them.

An inverting input terminal is connected to a drain of the first field effect transistor, a non-inverting input terminal is connected to a positive electrode of the offset section, and an output is a source of the first field effect transistor and the second field effect transistor. By providing a second differential amplifier connected to the source of
The sum of the voltage generated between the drain and source of the first field effect transistor by the current supplied from the photoelectric conversion unit and the voltage obtained at the offset unit is the gate and source of the second field effect transistor. The light receiving device according to claim 3, wherein the light receiving device is applied between them.

A second differential amplifier having an inverting input connected to a drain of the first field effect transistor, a non-inverting input connected to a reference voltage, and an output connected to a negative electrode of the offset unit; Has a positive electrode connected to the source of the first field effect transistor and a negative electrode connected to the source of the second field effect transistor,
The sum of the voltage generated between the drain and source of the first field effect transistor by the current supplied from the photoelectric conversion unit and the voltage obtained at the offset unit is the gate and source of the second field effect transistor. The light receiving device according to claim 4, wherein the light receiving device is applied between them.