JP4617541B2 - AC plasma display panel drive device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a driving device for an AC type plasma display panel (hereinafter referred to as a panel) used for image display of a television receiver, a computer terminal or the like. In place It is related.
[0002]
[Prior art]
In the conventional panel, N pairs of scan electrodes SCN _i And sustain electrode SUS _i A substrate provided with (i = 1 to N) and M data electrodes D ₁ ~ D _M Is disposed opposite to the substrate provided with the discharge space, and the scan electrode SCN ₁ ~ SCN _N And sustain electrode SUS ₁ ~ SUS _N And data electrode D ₁ ~ D _M Intersects at right angles. One discharge cell is formed at the intersection of a pair of scan and sustain electrodes and one data electrode.
[0003]
Next, a conventional panel driving method will be described with reference to an operation timing chart shown in FIG. In this panel, one field period is divided into a plurality of subfields having different light emission period weights, and gradation display is performed by a combination of subfields that emit light. FIG. 7 shows a drive waveform in one subfield, and the subfield includes an initialization period, a write period, a sustain period, and an erase period.
[0004]
As shown in FIG. 7, in the initialization period, the scan electrode SCN ₁ ~ SCN _N An initialization waveform is applied to a wall to form wall charges in the discharge cell. In the next writing period, scan electrode SCN ₁ ~ SCN _N The scan pulses are sequentially applied to the data electrodes D ₁ ~ D _M A wall pulse corresponding to display data is formed by applying a data pulse to the scan electrode SCN in the next sustain period. ₁ ~ SCN _N And sustain electrode SUS ₁ ~ SUS _N A display pulse is continuously applied by alternately applying a sustain pulse to each other. In the subsequent erase period, the sustain electrode SUS ₁ ~ SUS _N The display discharge is stopped by applying an erasing waveform to.
[0005]
In the initialization period, a gentle rise period from Vc (V) to Vd (V) in the first half of the initialization waveform and a slow fall period from Ve (V) to 0 (V) in the second half When the initializing waveform ends, that is, when the voltage reaches 0 (V), it is easy to write data in the next writing period. A predetermined amount of wall charge is formed in each discharge cell in accordance with the characteristics of each discharge cell (discharge start voltage, etc.).
[0006]
Since the output of the initialization circuit fluctuates due to the influence of the load fluctuation caused by the change in the temperature characteristic of the initialization circuit that outputs the initialization waveform and the display state of the panel, the scan electrode SCN ₁ ~ SCN _N The slope of the gently falling part (the part from Ve to 0) of the initialization waveform applied to the fluctuates. In consideration of this variation, even when the portion where the initialization waveform falls slowly due to the influence of the temperature characteristics of the initialization circuit, etc., the scan electrode SCN is at the end of the initialization waveform. ₁ ~ SCN _N Is set to 0 (V). That is, the designed initialization waveform is the scan electrode SCN. ₁ ~ SCN _N Applied to the scan electrode SCN after the initialization waveform is completed. ₁ ~ SCN _N A time t1 (about 50 μs) is set for keeping the voltage at 0 (V).
[0007]
[Problems to be solved by the invention]
However, in such a conventional driving method, the wall charges formed in the discharge cell are reduced during the time t1, and the voltage of the data pulse has to be increased. Therefore, there is a problem in that a high voltage driving element is required for a circuit for generating a data pulse, resulting in an increase in cost and an increase in power consumption.
[0008]
In addition, when the initialization waveform is set so that the time when the initialization waveform falls gently and becomes 0 is the end of the initialization period, the initial waveform is initialized when the gradient of the initialization waveform becomes gentler due to the temperature characteristics of the initialization circuit. As a result, the amount of wall charges formed in the discharge cells in the initialization period differs between one subfield and another subfield, resulting in an erroneous discharge in the writing period. As a result, there is a problem that display quality is lowered.
[0009]
The present invention has been made to solve such problems, and can reduce the withstand voltage of the writing circuit and reduce the cost and power consumption without lowering the display quality, and can perform a stable writing operation. AC plasma display panel drive device Place The purpose is to obtain.
[0010]
[Means for Solving the Problems]
In order to solve the above problems, the present invention provides a substrate on which a plurality of scan electrodes and sustain electrodes covered with a dielectric layer are arranged, and a plurality of data electrodes so as to intersect the scan electrodes and the sustain electrodes. An AC type plasma display panel driving apparatus arranged opposite to another arrayed substrate across a discharge space, wherein the initialization circuit outputs a slow gradient waveform having a rising voltage waveform and a gently falling voltage waveform A constant voltage circuit that outputs a voltage of a predetermined value, and a control circuit that has a voltage comparator that compares the output voltage of the initialization circuit and the output voltage of the constant voltage circuit, When the initialization waveform is applied to the scan electrode, the control circuit determines that the output voltage of the initialization circuit is lower than the output voltage of the constant voltage circuit. Upon detection, the high voltage of the scan electrode than the predetermined value No discharge Control is performed so as to switch to a voltage, whereby the end voltage of the initialization waveform is controlled to the predetermined value.
[0011]
In addition, this departure Tomorrow A substrate on which a plurality of scan electrodes and sustain electrodes covered with a dielectric layer are arranged, and a plurality of data electrodes arranged to intersect the scan electrodes and the sustain electrodes other Of an AC plasma display panel in which the substrate is placed opposite to the discharge space apparatus Because stand up Voltage waveform and Gently An initialization circuit that outputs a gentle gradient waveform having a falling voltage waveform, and when an initialization waveform based on the gentle gradient waveform is applied to the scan electrode, the end voltage of the initialization waveform is set to a predetermined value. A control circuit for controlling, and the control circuit includes first to third diodes, a resistor, and a constant voltage circuit for outputting the voltage of the predetermined value, and the initialization circuit and the scan electrode In between, the first diode is provided so that the initialization circuit side becomes an anode, the anode of the second diode is connected to the cathode of the first diode, and the anode of the first diode and the first diode The resistor is connected between the cathode of the two diodes, and the constant voltage is connected to the connection point between the second diode and the resistor via the third diode having the cathode connected to the connection point. The circuit is connected and said initial When the output voltage of the circuit becomes equal to or lower than the output voltage of the constant voltage circuit, the connection point between the second diode and the resistor is clamped to the output voltage of the constant voltage circuit, whereby the end voltage of the initialization waveform Is clamped to the predetermined value .
[0012]
This drive In place Thus, the end voltage of the initialization waveform can be reliably set to a predetermined value, and the wall charges formed in the discharge space by the initialization waveform can be held.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of a panel driving apparatus and a driving method according to the present invention will be described with reference to the drawings.
[0014]
In the panel of the present embodiment, as shown in FIG. 3, a plurality of pairs of scan electrodes 2 and sustain electrodes 3 are attached in parallel to each other on a glass first substrate 1. A dielectric layer 4 is provided so as to cover the electrode 3, and a protective film 5 is provided on the dielectric layer 4. A plurality of data electrodes 8 covered with a dielectric layer 7 are attached on the second glass substrate 6, and a partition wall 9 is formed on the dielectric layer 7 between the data electrodes 8 in parallel with the data electrodes 8. Is provided. A phosphor 10 is provided on the surface of the dielectric layer 7 and the side surfaces of the partition walls 9. The first substrate 1 and the second substrate 6 are arranged to face each other across the discharge space 11 so that the scan electrode 2 and the sustain electrode 3 and the data electrode 8 intersect at right angles. A discharge cell 12 is formed at the intersection of the scan electrode 2 and the sustain electrode 3 and the data electrode 8 which are sandwiched between two adjacent barrier ribs 9 and form a pair. In the discharge space 11, at least one of helium, neon, and argon and xenon are sealed as a discharge gas.
[0015]
The electrode arrangement of this panel is an M × N matrix configuration as shown in FIG. 4, and M columns of data electrodes D are arranged in the column direction. ₁ ~ D _M (Data electrode 8 in FIG. 3) are arranged, and N rows of scan electrodes SCN are arranged in the row direction. ₁ ~ SCN _N (Scan electrode 2 in FIG. 3) and sustain electrode SUS ₁ ~ SUS _N (Sustain electrodes 3 in FIG. 3) are arranged. Further, the discharge cell 12 shown in FIG. 3 is formed in a region as shown in FIG.
[0016]
FIG. 1 is a block diagram of a panel driving apparatus according to the first embodiment of the present invention. In FIG. 1, the data electrode D of the panel 13 ₁ ~ D _M Is connected to a write circuit 14. Scan electrode SCN ₁ ~ SCN _N Is connected to the scanning circuit 15, and the scanning circuit 15 is connected as a floating circuit to a line to which the outputs of the sustain circuit 16 and the initialization circuit 17 in the previous stage are connected. Sustain electrode SUS ₁ ~ SUS _N A sustain circuit 18 and an erasure circuit 19 are connected to each other.
[0017]
The control circuit 27 includes a constant voltage circuit 23, a voltage comparator 24, a gate circuit 25, and a voltage level shift circuit 26. The voltage comparator 24 receives the output of the initialization circuit 17 and the output Vref (V) of the constant voltage circuit 23. The voltage comparator 24 outputs a switching signal that becomes a valid level when the output of the initialization circuit is lower than Vref (V) and becomes an invalid level when the output of the initialization circuit is equal to or higher than Vref (V). The switching signal output from the voltage comparator 24 is input to the scanning circuit 15 via the gate circuit 25 and the voltage level shift circuit 26.
[0018]
The display signal input to the display signal processing circuit 20 is subjected to processing such as A / D conversion, scanning line conversion, and subfield conversion, and the signal-processed display signal is output to the writing circuit 14. The synchronization signal is input to the display signal processing circuit 20 and the timing control circuit 21. The timing control circuit 21 generates a timing control signal for controlling each drive circuit, and outputs the timing control signal to the write circuit 14, the sustain circuit 16, the initialization circuit 17, the sustain circuit 18, the erase circuit 19 and the gate circuit 25, and also the voltage level. The data is output to the scanning circuit 15 via the shift circuit 22.
[0019]
The operation of this driving apparatus will be described with reference to the operation timing chart shown in FIG. 2 and FIG. FIG. 2 shows the drive waveform in one subfield as in FIG. In the initialization period of FIG. 2, the sustain circuit 16 is in a high impedance state, and the initialization circuit 17 rises sharply from 0 (V) to Vc (V) and gradually from Vc (V) to Vd (V). After rising, a gentle gradient waveform is output that sharply falls from Vd (V) to Ve (V) and gently falls from Ve (V) to 0 (V). The scanning circuit 15 is in a state of allowing the output of the initialization circuit 17 to pass therethrough, and the gentle gradient waveform output from the initialization circuit 17 remains in the form of the scan electrode SCN. ₁ ~ SCN _N To be applied.
[0020]
In the initialization period, the sustain circuit 18 is in a high impedance state, and the erase circuit 19 first outputs 0 (V) and subsequently Vk (V). Sustain electrode SUS ₁ ~ SUS _N Is supplied with the output of the erasing circuit 19 and the timing at which the voltage changes from 0 (V) to Vk (V) depends on the scan electrode SCN. ₁ ~ SCN _N The voltage applied to is substantially the same as the timing at which Vd (V) changes to Ve (V). Further, 0 (V) is output from the write circuit 14 and the data electrode D ₁ ~ D _M To be applied.
[0021]
The enable signal output from the timing control circuit 21 to the gate circuit 25 becomes an effective level from the time when the gentle gradient waveform output from the initialization circuit 17 becomes Vd (V) until the writing period ends. ing. When the voltage level of the gentle gradient waveform decreases from Ve (V) and becomes lower than the output Vref (V) of the constant voltage circuit 23, this is detected by the voltage comparator 24, and the switching signal output from the voltage comparator 24 is Change to effective level. Since the enable signal is at an effective level, an effective level signal is output from the gate circuit 25 and input to the scanning circuit 15 via the voltage level shift circuit 26. Then, the scanning circuit 15 switches from the state in which the output of the initialization circuit 17 is passed to the state in which Vg (V) is output superimposed on the output of the initialization circuit 17.
[0022]
Since each circuit operates as described above, if the output Vref of the constant voltage circuit 23 is set to a voltage slightly higher than 0 (V), the scan electrode SCN ₁ ~ SCN _N The initialization waveform applied to is steeply rising from 0 (V) to Vc (V), gradually rising from Vc (V) to Vd (V), and then steeply from Vd (V) to Ve (V). The waveform gradually falls from the falling Ve (V) and reaches a predetermined value 0 (V) controlled by the control circuit 27. Scan electrode SCN ₁ ~ SCN _N As soon as the initialization waveform is finished, the voltage rises to Vg (V).
[0023]
In the initialization period, a gentle rising slope from Vc (V) to Vd (V) in the first half of the initialization waveform and a gentle falling slope from Ve (V) to 0 (V) in the second half By causing weak initializing discharge in all the discharge cells twice, a predetermined amount of wall charges corresponding to the characteristics (discharge start voltage, etc.) of each discharge cell is formed in each discharge cell. That is, at the rising slope of the initialization waveform, the scan electrode SCN ₁ ~ SCN _N A negative wall charge is formed on the surface of the protective film 5 and the sustain electrode SUS ₁ ~ SUS _N Upper protective film 5 surface and data electrode D ₁ ~ D _M Positive wall charges are formed on the surface of the upper phosphor 10, and the positive and negative wall charges formed at the rising slope are weakened at the next falling slope, and each discharge cell at the end of the initialization waveform The wall charge formed inside is adjusted to an amount suitable for the write operation. At the end of the initialization waveform in any subfield, scan electrode SCN ₁ ~ SCN _N Is always a predetermined voltage controlled by the control circuit 27, so that a predetermined amount of wall charge corresponding to the characteristics of the discharge cell always remains in each discharge cell in the initialization period of any subfield. Adjusted to
[0024]
Also, as soon as the initialization waveform is finished, scan electrode SCN ₁ ~ SCN _N Is set to a voltage Vg (V) that is higher than 0 (V) and does not generate discharge, thereby preventing wall charges formed in each discharge cell from decreasing. That is, scan electrode SCN ₁ ~ SCN _N As soon as this voltage reaches 0 (V), it is changed in the opposite direction to the voltage change of the falling slope of the initialization waveform. If the wall charge formed in the discharge cell during the initialization period is large, discharge during the writing period is likely to occur. ₁ ~ D _M The write operation can be performed without increasing the voltage of the data pulse applied to.
[0025]
In the subsequent writing period, 0 (V) is output from the sustain circuit 16, and the initialization circuit 17 enters a high impedance state. The scanning circuit 15 continues to output Vg (V) in a form superimposed on the output 0 (V) of the sustain circuit 16 by the switching signal of the voltage comparator 24, and the scanning pulse of 0 (V) is scanned. Electrode SCN ₁ ~ SCN _N Are sequentially applied. The sustain circuit 18 is in a high-impedance state, and Vk (V) is output from the erase circuit 19 and the sustain electrode SUS. ₁ ~ SUS _N To be applied. The write circuit 14 outputs a data pulse of Va (V) lower than the voltage Vb (V) of the conventional data pulse, and the data electrode D ₁ ~ D _M To be applied. In the address period, address discharge occurs in the discharge cells to which the scan pulse and the data pulse are simultaneously applied, and wall charges that cause sustain discharge in the subsequent sustain period are formed in the discharge cells.
[0026]
In the subsequent sustain period, the initialization circuit 17 is in a high impedance state, and the sustain circuit 16 outputs a sustain pulse of Vh (V). At this time, the scanning circuit 15 is in a state of passing the output of the sustain circuit 16, and the output of the sustain circuit 16 is left as it is as the scan electrode SCN. ₁ ~ SCN _N To be applied. Further, the erase circuit 19 is in a high impedance state, and a sustain pulse of Vh (V) is output from the sustain circuit 18 and the sustain electrode SUS. ₁ ~ SUS _N To be applied. Further, 0 (V) is output from the write circuit 14 and the data electrode D ₁ ~ D _M To be applied. In the sustain period, in the discharge cell in which the address discharge occurred in the previous address period, the scan electrode SCN ₁ ~ SCN _N Or sustain electrode SUS ₁ ~ SUS _N Each time a sustain pulse is applied, a sustain discharge occurs, causing the discharge cell to display light.
[0027]
In the subsequent erasing period, the initialization circuit 17 is in a high impedance state, and 0 (V) is output from the sustain circuit 16. At this time, the scanning circuit 15 is in a state of allowing the output of the sustain circuit 16 to pass through, and the output of the sustain circuit 16 is directly used as the scan electrode SCN. ₁ ~ SCN _N To be applied. The sustain circuit 18 is in a high impedance state, and an erase waveform of Vk (V) that rises gently is output from the erase circuit 19 to output the sustain electrode SUS. ₁ ~ SUS _N To be applied. The write circuit 14 outputs 0 (V), and the data electrode D ₁ ~ D _M To be applied. In the erasing period, a weak erasing discharge is caused in the discharge cell that has caused the sustaining discharge in the previous sustaining period to weaken the wall charge and stop the sustaining discharge.
[0028]
As described above, the control circuit 27 for controlling the end voltage of the initialization waveform to a constant value without being affected by the temperature characteristics of the initialization circuit, the constant voltage circuit 23 that outputs the reference voltage, The circuit configuration includes a voltage comparator 24 that compares the voltage and the voltage of the initialization waveform, and the output of the scanning circuit 15 is switched by the switching signal that is an output signal from the voltage comparator 24 to complete the initialization waveform. By setting the voltage to Vg (V) immediately after setting the voltage to 0 (V), wall charges suitable for the writing operation in the writing period are surely formed in the discharge cells and writing is performed. The operation is held until the voltage of the data pulse can be lowered as a result.
[0029]
When the driving method of the present embodiment and the conventional driving method were used, the data pulse voltage required for driving was compared. The rising slope from Vc (V) to Vd (V) in the front part of the initialization waveform and the falling slope from Ve (V) to 0 (V) in the rear part are 3 V / μs, 1 V, respectively. / Μs, Vc = 180V, Vd = 430V, Ve = 180V, Vg = 80V, Vk = 200V, Vh = 180V. In the case of the present embodiment, that is, when Vg (V) is set immediately after reaching the end voltage (0 V) of the initialization waveform, the data electrode D is used to cause a write discharge. ₁ ~ D _M The voltage of the data pulse applied to is Va = 65V. On the other hand, in the conventional case, that is, when a time (50 μs) for continuing the end voltage (0V) of the initialization waveform for a while after the initialization waveform is completed, the voltage of the data pulse is Vb = 75V. . According to the present embodiment, since the voltage of the data pulse can be lowered as compared with the conventional case, the power consumption of the writing circuit is reduced to 75% of the conventional value and the driving element used in the writing circuit is reduced. Since the withstand voltage decreases, the cost can be suppressed.
[0030]
Next, FIG. 5 shows a block diagram of a panel driving apparatus according to the second embodiment of the present invention. FIG. 5 differs from FIG. 1 in that a control circuit 28 is provided between the initialization circuit 17 and the scanning circuit 15 instead of the control circuit 27. In the control circuit 28, a resistor 29 and a diode 30 and a diode 31 connected in series are connected in parallel, and a constant voltage circuit 33 is connected to a connection point between the resistor 29 and the diode 30 via a diode 32. .
[0031]
The operation of the driving device during the initialization period will be described with reference to the initialization waveform diagram shown in FIG. 6 and FIG. Since the drive waveforms other than the initialization waveform in FIG. 6 are the same as the drive waveforms described in FIG. 2, description of operations in the write period, the sustain period, and the erase period is omitted.
[0032]
In the initialization period of FIG. 6, the sustain circuit 16 is in a high impedance state, and the initialization circuit 17 rises sharply from 0 (V) to Vc (V) and gradually from Vc (V) to Vd (V). After rising, a gentle gradient waveform is output that sharply falls from Vd (V) to Ve (V) and gently falls from Ve (V) to 0 (V). The output of the constant voltage circuit 33 is set to Vref = Vi (V). During the period in which the gentle gradient waveform rises from 0 (V) to Vd (V), the diode 31 in the control circuit 28 is turned on, so that the gentle gradient waveform output from the initialization circuit 17 and input to the control circuit 28 remains unchanged. Is output from the control circuit 28 and added to the scanning circuit 15. During the period in which the gentle gradient waveform falls from Vd (V) to Vi (V), the diode 30 in the control circuit 28 is conductive, and the resistor 29 is set to a resistance value at which the voltage drop at this time can be ignored. The gentle gradient waveform output from the initialization circuit 17 and input to the control circuit 28 is output from the control circuit 28 as it is and added to the scanning circuit 15. When the gentle gradient waveform output from the initialization circuit 17 becomes equal to or lower than the output Vref (V) of the constant voltage circuit 33, the diode 32 becomes conductive, and the connection point between the resistor 29 and the diode 30 is connected via the diode 32 to Vref. = Vi (V), and the output of the control circuit 28 is also clamped to Vref = Vi (V). Even when the output of the initialization circuit 17 becomes 0 (V), the output current capability of the constant voltage circuit 33 is set larger than Vref / (resistance value of the resistor 29). The connection point and the output of the control circuit 28 will continue to be clamped at Vref = Vi (V). The scanning circuit 15 is in a state of passing the output of the control circuit 28, and the output of the control circuit 28 is directly used as the scanning electrode SCN. ₁ ~ SCN _N To be applied.
[0033]
Therefore, in the initialization period, the scan electrode SCN ₁ ~ SCN _N Includes a steep rise from 0 (V) to Vc (V), a gentle rise from Vc (V) to Vd (V), and a steep fall from Vd (V) to Ve (V) Ve (V). An initialization waveform that gently falls from 1 to Vi (V) is applied, and after the initialization waveform is completed, Vi (V) that is the end voltage of the initialization waveform is applied as a voltage that can hold the wall charges. In this way, the control circuit 28 is a circuit that can clamp the end voltage of the initialization waveform to the predetermined voltage Vref = Vi (V).
[0034]
As described above, since the wall charges formed in each discharge cell are weakened by the weak discharge occurring at the gentle falling slope in the latter half of the initialization waveform, each discharge cell at the end of the initialization waveform. The amount of wall charges remaining in varies depending on the value of the end voltage of the initialization waveform. In the second embodiment, the end voltage of the initialization waveform is set to Vi (V) higher than 0 (V), so that the end voltage of the initialization waveform is within the discharge cell as compared with the case where the end voltage of the initialization waveform is 0 (V). The amount of wall charges formed in is increased. By increasing the wall charge amount in advance in this way, the scan electrode SCN is obtained. ₁ ~ SCN _N Even if the wall charge formed in the discharge cell is slightly reduced while the voltage of 2 is clamped to the end voltage Vi (V) of the initialization waveform, the amount of wall charge remaining in the discharge cell during the write discharge is reduced. More than before. That is, the wall charges can be held in the discharge cells so as to facilitate the write discharge. As a result, the data electrode D in the writing period ₁ ~ D _M The write operation can be performed without increasing the voltage of the data pulse applied to.
[0035]
When the driving method of the present embodiment and the conventional driving method were used, the data pulse voltage required for driving was compared. The slope of the rising slope from Vc (V) to Vd (V) in the first half of the initialization waveform and the slope of the falling slope from Ve (V) to Vi (V) in the second half are 3 V / μs, 1 V, respectively. / Μs, and Vc = 180V, Vd = 430V, Ve = 180V, Vg = 80V, Vk = 200V, Vh = 180V. In the case of the present embodiment, that is, scan electrode SCN ₁ ~ SCN _N Was clamped to the initialization waveform end voltage Vi = 20V, the data pulse voltage was Va = 55V. On the other hand, in the conventional case, the voltage of the data pulse is Vb = 75V. According to the present embodiment, by setting Vi = 20V, the voltage of the data pulse can be reduced as compared with the conventional case. Therefore, the power consumption of the write circuit is reduced to 54% of the conventional value and used for the write circuit. Since the withstand voltage of the driving element to be reduced is reduced, the cost can be suppressed.
[0036]
In the second embodiment, the control circuit 28 is provided independently of the initialization circuit 17. However, a circuit configuration in which the initialization circuit 17 incorporates a clamp function may be used.
[0037]
In the first embodiment, the end voltage of the initialization waveform is 0 (V). However, the end voltage of the initialization waveform is not 0 (V) but Vi (V) as in the second embodiment. And may be raised to Vg (V) immediately after reaching Vi (V). For example, by setting Vi = 5 to 20 (V) and increasing to Vg (V) immediately after reaching Vi (V), the voltage of the data pulse can be lowered. When Vi = 20V, the voltage of the data pulse is Va = 45V, and the power consumption of the writing circuit can be reduced to 36% of the conventional one.
[0038]
In the above embodiment, the case where the initialization waveform has a ramp waveform with a gentle slope in the first half and the second half has been described, but this ramp waveform with a gentle slope is generated by a time constant circuit using CR. The present invention can be applied even when the waveform is distorted. In addition, if the second half of the initialization waveform has a gentle slope, the first half of the initialization waveform may be a pulsed waveform that rises rapidly. Furthermore, the present invention is applied if the drive waveform in the initialization period is an initialization waveform having a voltage waveform of a certain polarity and then a voltage waveform that gradually changes in the direction of the opposite polarity with respect to a certain polarity. In the case where the drive waveform in the write period, the sustain period, and the erase period is another waveform, for example, the erase waveform may be a narrow pulse.
[0039]
Although the case where the initialization waveform is applied to the scan electrode has been described in the above embodiment, the present invention can be applied even when the initialization waveform is applied to the sustain electrode.
[0040]
In the above embodiment, the case where the reference voltage is 0 (V) has been described. However, since the operation of the panel depends on the voltage applied between the electrodes, the reference voltage may not be 0 (V).
[0041]
Furthermore, in the above embodiment, the case where the subfield is composed of the initialization period, the write period, the sustain period, and the erase period has been described. However, even when the operation based on the erase waveform is included as part of the operation based on the initialization waveform, The invention can be applied.
[0042]
【The invention's effect】
As described above, according to the AC plasma display panel driving apparatus of the present invention, ,book The voltage of the data pulse applied to the data electrode in the writing period can be reduced, the withstand voltage of the writing circuit can be reduced, the cost can be reduced, and the power consumption of the writing circuit can be reduced.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a panel driving apparatus according to a first embodiment of the present invention.
FIG. 2 is an operation timing chart showing a panel driving method according to the first embodiment of the present invention.
FIG. 3 is a partially cutaway perspective view of an AC type plasma display panel.
FIG. 4 is an electrode array diagram of an AC type plasma display panel.
FIG. 5 is a block diagram showing a panel driving apparatus according to a second embodiment of the present invention.
FIG. 6 is a diagram showing an initialization waveform according to the second embodiment of the present invention.
FIG. 7 is an operation timing chart showing a driving method of a conventional AC type plasma display panel.
[Explanation of symbols]
1 First substrate
2 Scanning electrodes
3 sustain electrodes
4, 7 Dielectric layer
5 Protective film
6 Second board
8 Data electrode
9 Bulkhead
10 Phosphor
11 Discharge space
12 Discharge cell
13 panels
14 Writing circuit
15 Scanning circuit
16, 18 maintenance circuit
17 Initialization circuit
19 Erase circuit
20 Display signal processing circuit
21 Timing control circuit
22, 26 Voltage level shift circuit
23, 33 Constant voltage circuit
24 Voltage comparator
25 Gate circuit
27, 28 Control circuit
29 Resistance
30, 31, 32 Diode

Claims (3)

A substrate on which a plurality of scan electrodes and sustain electrodes covered with a dielectric layer are arranged, and another substrate on which a plurality of data electrodes are arranged so as to intersect the scan electrodes and the sustain electrodes sandwich the discharge space And an AC type plasma display panel driving device arranged opposite to each other, wherein an initialization circuit that outputs a slowly rising waveform having a rising voltage waveform and a slowly falling voltage waveform, and a constant voltage that outputs a voltage having a predetermined value A control circuit having a voltage comparator for comparing the output voltage of the circuit and the initialization circuit with the output voltage of the constant voltage circuit,
When an initialization waveform based on the gentle gradient waveform is applied to the scan electrode, the control circuit determines that the output voltage of the initialization circuit is lower than the output voltage of the constant voltage circuit. When the comparator detects, that the voltage higher rather discharge than the predetermined value of the scanning electrodes is controlled to switch to the voltage does not occur, thereby controlling the end voltage of the initialization waveform to the predetermined value AC type plasma display panel drive device characterized by the above. A scanning circuit connected to the scanning electrode, and when the initialization waveform based on the gentle gradient waveform is applied to the scanning electrode, the control circuit is configured such that the output voltage of the initialization circuit is the constant voltage circuit When the voltage comparator detects that the output voltage is lower than the output voltage, an effective level switching signal is output, and when the scanning circuit receives the effective level switching signal, the voltage of the scan electrode is set to the predetermined value. AC type plasma display panel driving device according to claim 1, high rather discharge is characterized in that the switching voltage does not occur than. A substrate on which a plurality of scan electrodes and sustain electrodes covered with a dielectric layer are arranged, and another substrate on which a plurality of data electrodes are arranged so as to intersect the scan electrodes and the sustain electrodes sandwich the discharge space An AC type plasma display panel driving apparatus disposed opposite to each other, an initialization circuit for outputting a slow gradient waveform having a rising voltage waveform and a slowly falling voltage waveform, and an initial stage based on the gentle gradient waveform A control circuit for controlling the end voltage of the initialization waveform to a predetermined value when applying the initialization waveform to the scan electrode;
The control circuit includes first to third diodes, a resistor, and a constant voltage circuit that outputs the voltage of the predetermined value, and the initialization circuit side is disposed between the initialization circuit and the scan electrode. The first diode is provided to be an anode, the anode of the second diode is connected to the cathode of the first diode, and between the anode of the first diode and the cathode of the second diode The constant voltage circuit is connected to a connection point between the second diode and the resistor via the third diode having a cathode connected to the connection point. When the output voltage of the circuit becomes equal to or lower than the output voltage of the constant voltage circuit, the connection point between the second diode and the resistor is clamped to the output voltage of the constant voltage circuit, whereby the end voltage of the initialization waveform The predetermined value AC type plasma display panel driving apparatus, characterized by clamping.

Images