Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JP4646803B2 - Method for forming silicon nitride film - Google Patents
[go: Go Back, main page]

JP4646803B2 - Method for forming silicon nitride film - Google Patents

Method for forming silicon nitride film Download PDF

Info

Publication number
JP4646803B2
JP4646803B2 JP2005380965A JP2005380965A JP4646803B2 JP 4646803 B2 JP4646803 B2 JP 4646803B2 JP 2005380965 A JP2005380965 A JP 2005380965A JP 2005380965 A JP2005380965 A JP 2005380965A JP 4646803 B2 JP4646803 B2 JP 4646803B2
Authority
JP
Japan
Prior art keywords
nitride film
silicon nitride
molybdenum
forming
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005380965A
Other languages
Japanese (ja)
Other versions
JP2007165813A (en
Inventor
浩司 又井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko NPC Corp
Original Assignee
Seiko NPC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko NPC Corp filed Critical Seiko NPC Corp
Priority to JP2005380965A priority Critical patent/JP4646803B2/en
Publication of JP2007165813A publication Critical patent/JP2007165813A/en
Application granted granted Critical
Publication of JP4646803B2 publication Critical patent/JP4646803B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Description

本発明は、ゲート電極などに使用される金属電極上へのシリコン窒化膜の形成方法に関する。The present invention relates to a method for forming a silicon nitride film on a metal electrode used for a gate electrode or the like.

トランジスタのゲート電極などに使用される金属電極上へ別の配線の形成する場合、または、金属電極−シリコン窒化膜(SiN)−アルミニウム電極(A1)の構造にて容量素子を形成する場合など、金属電極を周囲から絶縁状態にするためその表面にシリコン窒化膜を形成する場合がある。このシリコン窒化膜の形成は通常減圧CVDにて行われる。  When another wiring is formed on a metal electrode used for a gate electrode of a transistor, or when a capacitor element is formed with a structure of metal electrode-silicon nitride film (SiN) -aluminum electrode (A1), etc. A silicon nitride film may be formed on the surface of the metal electrode in order to make it insulated from the surroundings. This silicon nitride film is usually formed by low pressure CVD.

具体的には、シリコン酸化膜を介してパターニング形成された金属電極を有するシリコン基板を減圧CVD装置内に収納し、そして該減圧CVD装置内を真空にするとともに約730度まで加熱し、その後アンモニアガス(NH3)及びジクロルシランガス(SiH2Cl2)を導入することによりシリコン窒化膜の形成が行われる。Specifically, a silicon substrate having a metal electrode patterned through a silicon oxide film is housed in a reduced pressure CVD apparatus, and the reduced pressure CVD apparatus is evacuated and heated to about 730 degrees, and then ammonia. A silicon nitride film is formed by introducing gas (NH 3) and dichlorosilane gas (SiH 2 Cl 2).

タングステンなどの高融点金属からなるゲート電極上への、減圧CVD法によるシリコン窒化膜の形成方法は、例えば特開平10−223556号公報に記載されている。  A method for forming a silicon nitride film on a gate electrode made of a refractory metal such as tungsten by a low pressure CVD method is described in, for example, Japanese Patent Application Laid-Open No. 10-223556.

特開平10−223556号公報JP-A-10-223556

しかしながら、上記背景技術記載の工程で金属電極上にシリコン窒化膜を形成する場合、その金属電極も同時に加熱される。例えば、その金属電極がモリブデンにより構成される場合、モリブデン電極上にシリコン窒化膜が堆積するのと同時に、モリブデン電極の表面でアンモニアガスとモリブデンとが反応し、その表面層の一部がモリブデン窒化膜になることが判明した。  However, when a silicon nitride film is formed on a metal electrode in the process described in the background art, the metal electrode is also heated simultaneously. For example, when the metal electrode is composed of molybdenum, a silicon nitride film is deposited on the molybdenum electrode and at the same time ammonia gas reacts with molybdenum on the surface of the molybdenum electrode, and a part of the surface layer is molybdenum nitrided. It turned out to be a film.

図2に、該製造方法を実施することによりその表面上にシリコン窒化膜が形成されたモリブデン電極に係わる半導体装置の断面図を示す。シリコン酸化膜2を介してシリコン基板1上に形成されたモリブデン電極の表面の一部はモリブデン窒化膜3となっており、その上にシリコン窒化膜4が形成された状態となっている。このモリブデン窒化膜3の比抵抗はモリブデン電極5に比べ一桁程度大きい。FIG. 2 shows a cross-sectional view of a semiconductor device related to a molybdenum electrode having a silicon nitride film formed on its surface by carrying out the manufacturing method. Part of the surface of the molybdenum electrode formed on the silicon substrate 1 via the silicon oxide film 2 is a molybdenum nitride film 3, and the silicon nitride film 4 is formed thereon. The specific resistance of the molybdenum nitride film 3 is about one digit larger than that of the molybdenum electrode 5.

モリブデン電極が、高抵抗のモリブデン窒化膜3と元の低抵抗のモリブデン電極5との2層構造に変化することは、配線層全体として比抵抗が高まることを意味し、低抵抗化のため又回路全体の高速化のために採用した金属電極としての優位性が失われることになる。The change of the molybdenum electrode to a two-layer structure of the high-resistance molybdenum nitride film 3 and the original low-resistance molybdenum electrode 5 means that the specific resistance of the entire wiring layer is increased. The advantage as a metal electrode adopted for speeding up the entire circuit is lost.

また、仮にその窒化することを考慮してある抵抗値をもった配線を設計する場合には、モリブデン窒化膜の厚さ分大きいスケールで設計する必要があり、それはICとしての集積化の妨げとなる。In addition, when designing a wiring having a certain resistance value in consideration of nitriding, it is necessary to design on a scale that is larger by the thickness of the molybdenum nitride film, which hinders integration as an IC. Become.

本発明は、金属電極の表面へシリコン窒化膜を形成したとしても、金属電極の比抵抗の上昇を抑制し、それを使った回路の高速動作を可能とすることができるシリコン窒化膜の形成方法を提供することを目的とする。Even if a silicon nitride film is formed on the surface of a metal electrode, the present invention suppresses an increase in the specific resistance of the metal electrode and enables a high-speed operation of a circuit using the same. The purpose is to provide.

上記目的を達成するために、本発明に係わるシリコン窒化膜の形成方法は、金属電極が形成された半導体基板を減圧CVD装置内に配置する工程と、前記減圧CVD装置内を700度よりも低い温度に加熱すると共に窒素を含む原料ガス及びシラン系ガスを導入し、前記金属電極上にシリコン窒化膜を形成する第1のシリコン窒化膜形成工程と、前記第1のシリコン窒化膜形成工程の後、前記減圧CVD装置内の温度を700度よりも高い温度に変更して再度シリコン窒化膜を形成する第2のシリコン窒化膜形成工程とを有する。In order to achieve the above object, a method of forming a silicon nitride film according to the present invention includes a step of placing a semiconductor substrate on which a metal electrode is formed in a low pressure CVD apparatus, and the inside of the low pressure CVD apparatus is lower than 700 degrees. A first silicon nitride film forming step of forming a silicon nitride film on the metal electrode by introducing a source gas containing nitrogen and a silane-based gas while heating to a temperature, and after the first silicon nitride film forming step And a second silicon nitride film forming step of changing the temperature in the low-pressure CVD apparatus to a temperature higher than 700 degrees and forming a silicon nitride film again.

また、金属電極は、モリブデンより構成されることを特徴とする。The metal electrode is made of molybdenum.

また、第1のシリコン窒化膜形成工程は、5〜50オングストローム以下の膜厚を有するシリコン窒化膜を形成する工程であることを特徴とする。The first silicon nitride film forming step is a step of forming a silicon nitride film having a film thickness of 5 to 50 angstroms or less.

本発明の製造方法によれば、意図しない窒化膜の形成を抑制しつつ、信頼性の高いシリコン窒化膜の形成が可能になる。すなわち、700度以下で行われる第1の工程により、原料ガス中の窒素と金属との反応を抑制しつつ薄いシリコン窒化膜を形成し、続く700度以上での第2の工程では最初の薄いシリコン窒化膜を保護膜として、窒素と金属との反応を気にせずに高品質のシリコン窒化膜を生産性よく形成することができる。  According to the manufacturing method of the present invention, it is possible to form a silicon nitride film with high reliability while suppressing formation of an unintended nitride film. That is, a thin silicon nitride film is formed by suppressing the reaction between nitrogen in the source gas and the metal by the first process performed at 700 degrees or less, and the first thin film is formed in the subsequent second process at 700 degrees or more. Using the silicon nitride film as a protective film, a high-quality silicon nitride film can be formed with high productivity without worrying about the reaction between nitrogen and metal.

以下本発明の好適な実施の形態を、添付図面を参照して説明する。図1は、本発明の実施の形態に係わるシリコン窒化膜の形成方法を説明するための半導体装置の断面図である。  Preferred embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a cross-sectional view of a semiconductor device for explaining a method of forming a silicon nitride film according to an embodiment of the present invention.

シリコン酸化膜20を介してシリコン基板10上に、金属電極としてモリブデン電極50が形成されており、その上に第一のシリコン窒化膜60、第二のシリコン窒化膜70が形成されている。A molybdenum electrode 50 is formed as a metal electrode on the silicon substrate 10 via the silicon oxide film 20, and a first silicon nitride film 60 and a second silicon nitride film 70 are formed thereon.

製造方法は、先ず、シリコン基板10上でシリコン酸化膜20を介してパターニング形成されたモリブデン電極50を有する半導体基板(ウェハ)は減圧CVD装置内に収納される。そして、該減圧CVD装置内を所定の状態に減圧するとともに約630度まで加熱し、その後アンモニアガス(NH3)及びジクロルシランガス(SiH2Cl2)を導入することにより、モリブデン電極50上への第1のシリコン窒化膜60の形成が行われる。In the manufacturing method, first, a semiconductor substrate (wafer) having a molybdenum electrode 50 patterned on the silicon substrate 10 via the silicon oxide film 20 is housed in a low pressure CVD apparatus. Then, the pressure inside the reduced pressure CVD apparatus is reduced to a predetermined state and heated to about 630 ° C., and then ammonia gas (NH 3) and dichlorosilane gas (SiH 2 Cl 2) are introduced to thereby form a first on the molybdenum electrode 50. A silicon nitride film 60 is formed.

装置内温度は、膜形成レートや膜質を考慮すると、通常の半導体デバイスでは730度程度が適していると考えられる。しかし、700度を超える温度では窒素とモリブデンとの反応速度も速く、その過多な反応進行を避けてシリコン窒化膜を形成することは困難であるため、先にそれよりも低い温度で第一のシリコン窒化膜60を形成した。Considering the film formation rate and film quality, it is considered that the internal temperature of the apparatus is about 730 degrees for a normal semiconductor device. However, since the reaction rate between nitrogen and molybdenum is high at temperatures exceeding 700 ° C. and it is difficult to form a silicon nitride film by avoiding excessive reaction progress, the first is performed at a temperature lower than that first. A silicon nitride film 60 was formed.

上述の方法で第一のシリコン窒化膜60を形成する場合、原料ガスに含まれる窒素とモリブデンとの反応が大きく抑制されるという利点はあるが、成長レートが遅いということ又絶縁膜としての信頼性が比較的悪いとの欠点もある。したがって、半導体素子としての信頼性を向上させるためには、次の工程で前記第一のシリコン窒化膜60の欠点を補う第二のシリコン窒化膜70を形成する必要がある。When the first silicon nitride film 60 is formed by the above-described method, there is an advantage that the reaction between nitrogen and molybdenum contained in the source gas is greatly suppressed, but the growth rate is low and the reliability as an insulating film is also provided. There is also a drawback that the nature is relatively bad. Therefore, in order to improve the reliability as a semiconductor element, it is necessary to form the second silicon nitride film 70 that compensates for the defect of the first silicon nitride film 60 in the next step.

第一のシリコン窒化膜60の膜厚は、この第二のシリコン窒化膜70を形成する際の窒素とモリブデンとの反応をさせないための保護となる程度にすることが生産性上望ましい。すなわち、第一のシリコン窒化膜60の膜厚は、5〜50オングストロームが適当である。It is desirable in terms of productivity that the film thickness of the first silicon nitride film 60 is set to a level that protects against the reaction between nitrogen and molybdenum when the second silicon nitride film 70 is formed. That is, the thickness of the first silicon nitride film 60 is appropriately 5 to 50 angstroms.

第一のシリコン窒化膜60形成に続きに該CVD装置内を約730度に変更し、第一のシリコン窒化膜60の形成時と同様の原料ガスを用いて、その上への第2のシリコン窒化膜70の形成が行われる。上述のようにして形成されたシリコン窒化膜で覆われたモリブデン電極は、設計値に比較して比抵抗の上昇が抑制され、該電極を使った回路の高速動作上有利である。Following the formation of the first silicon nitride film 60, the inside of the CVD apparatus is changed to about 730 degrees, and the same source gas as that used to form the first silicon nitride film 60 is used to form the second silicon thereon. The nitride film 70 is formed. The molybdenum electrode covered with the silicon nitride film formed as described above is advantageous in terms of high-speed operation of a circuit using the electrode because an increase in specific resistance is suppressed compared to the design value.

本実施の形態によれば、意図しないモリブデン窒化膜の形成を抑制しつつ、信頼性の高いシリコン窒化膜の形成が可能になる。すなわち、700度以下で行われる第1の工程により、原料ガス中の窒素とモリブデンとの反応を抑制しつつ薄いシリコン窒化膜を形成し、続く700度以上での第2の工程では最初の薄いシリコン窒化膜を保護膜として、窒素とモリブデンとの反応を気にせずに高品質なシリコン窒化膜を生産性よく形成することができる。    According to the present embodiment, it is possible to form a silicon nitride film with high reliability while suppressing formation of an unintended molybdenum nitride film. That is, a thin silicon nitride film is formed by suppressing the reaction between nitrogen and molybdenum in the source gas by the first process performed at 700 degrees or less, and the first thin film is formed in the subsequent second process at 700 degrees or more. Using the silicon nitride film as a protective film, a high-quality silicon nitride film can be formed with high productivity without worrying about the reaction between nitrogen and molybdenum.

以上は金属電極としてモリブデン電極を用いた場合の実施の形態について説明したが、金属はモリブデンに限定されるものではない。すなわち、本発明は、金属電極上に保護膜を形成する際の該電極の比抵抗上昇を抑制することを目的としたものであり、この目的を逸脱しない限り、種々の金属を採用することが可能である。The embodiment in the case where a molybdenum electrode is used as the metal electrode has been described above, but the metal is not limited to molybdenum. That is, the present invention aims to suppress an increase in specific resistance of the electrode when a protective film is formed on the metal electrode, and various metals can be adopted without departing from this purpose. Is possible.

そして、該金属電極は、MOS型半導体装置あるいはバイポーラ型半導体装置の配線電極などに適用でき、その際には、金属の電極を使ったことによる回路動作の高速化という利点を妨げることのない保護膜の形成方法となる。The metal electrode can be applied to a wiring electrode of a MOS type semiconductor device or a bipolar type semiconductor device. In this case, protection that does not hinder the advantage of speeding up the circuit operation by using the metal electrode. This is a film forming method.

本発明の実施の形態に係わるシリコン窒化膜の形成方法を説明するための半導体装置の断面図である。It is sectional drawing of the semiconductor device for demonstrating the formation method of the silicon nitride film concerning embodiment of this invention. 従来のシリコン窒化膜の形成方法を説明するための半導体装置の断面図である。It is sectional drawing of the semiconductor device for demonstrating the formation method of the conventional silicon nitride film.

符号の説明Explanation of symbols

1、10 シリコン基板
2、20 シリコン酸化膜
3 モリブデン窒化膜
4 シリコン窒化膜
5、50 モリブデン電極
60 第一のシリコン窒化膜
70 第二のシリコン窒化膜
1, 10 Silicon substrate 2, 20 Silicon oxide film 3 Molybdenum nitride film 4 Silicon nitride film 5, 50 Molybdenum electrode 60 First silicon nitride film 70 Second silicon nitride film

Claims (2)

モリブデン電極が形成された半導体基板を減圧CVD装置内に配置する工程と、前記減圧CVD装置内を700度よりも低い温度に加熱すると共に窒素を含む原料ガス及びシラン系ガスを導入し、前記原料ガスに含まれる窒素と前記モリブデン電極との反応を抑制しつつ前記モリブデン電極上にシリコン窒化膜を形成する第1のシリコン窒化膜形成工程と、前記第1のシリコン窒化膜形成工程の後、前記減圧CVD装置内の温度を700度よりも高い温度に変更して再度シリコン窒化膜を形成する、第2のシリコン窒化膜形成工程とを有するシリコン窒化膜の形成方法。 Placing a semiconductor substrate on which molybdenum electrodes are formed in the low pressure CVD apparatus, and introducing a material gas and silane-based gas containing nitrogen while heating the inside pressure CVD apparatus at a temperature lower than 700 degrees, the raw material A first silicon nitride film forming step of forming a silicon nitride film on the molybdenum electrode while suppressing a reaction between nitrogen contained in the gas and the molybdenum electrode; and after the first silicon nitride film forming step, A method for forming a silicon nitride film, comprising: forming a silicon nitride film again by changing the temperature in the low-pressure CVD apparatus to a temperature higher than 700 ° C. and forming a silicon nitride film again. 第1のシリコン窒化膜形成工程は、5〜50オングストロームの膜厚を有するシリコン窒化膜を形成する工程であることを特徴とする請求項1記載のシリコン窒化膜の形成方法。

2. The method of forming a silicon nitride film according to claim 1, wherein the first silicon nitride film forming step is a step of forming a silicon nitride film having a thickness of 5 to 50 angstroms.

JP2005380965A 2005-12-13 2005-12-13 Method for forming silicon nitride film Expired - Fee Related JP4646803B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005380965A JP4646803B2 (en) 2005-12-13 2005-12-13 Method for forming silicon nitride film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005380965A JP4646803B2 (en) 2005-12-13 2005-12-13 Method for forming silicon nitride film

Publications (2)

Publication Number Publication Date
JP2007165813A JP2007165813A (en) 2007-06-28
JP4646803B2 true JP4646803B2 (en) 2011-03-09

Family

ID=38248322

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005380965A Expired - Fee Related JP4646803B2 (en) 2005-12-13 2005-12-13 Method for forming silicon nitride film

Country Status (1)

Country Link
JP (1) JP4646803B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2522182C1 (en) * 2012-12-17 2014-07-10 Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования Кабардино-Балкарский государственный университет им. Х.М. Бербекова Manufacturing method of semiconductor device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1041249A (en) * 1996-07-23 1998-02-13 Sony Corp Method for manufacturing semiconductor device
JP4585205B2 (en) * 1996-12-03 2010-11-24 株式会社東芝 Manufacturing method of semiconductor device

Also Published As

Publication number Publication date
JP2007165813A (en) 2007-06-28

Similar Documents

Publication Publication Date Title
US6960515B2 (en) Method of forming a metal gate
TWI411020B (en) PMOS metal gate structure manufacturing method
JP5247059B2 (en) Method for manufacturing an integrated circuit capacitor using a tantalum pentoxide layer
KR100456315B1 (en) Gate electrode formation method of semiconductor device
TWI483396B (en) Semiconductor element having vertical gate and method of manufacturing the same
JP2004128501A (en) Improvement of nickel silicide-silicon nitride adhesion by surface protection
JP4646803B2 (en) Method for forming silicon nitride film
US6238737B1 (en) Method for protecting refractory metal thin film requiring high temperature processing in an oxidizing atmosphere and structure formed thereby
JP2006135229A (en) Method for forming insulating film and semiconductor device provided with the insulating film
JP4026908B2 (en) Manufacturing method of semiconductor device
US8980742B2 (en) Method of manufacturing multi-level metal thin film and apparatus for manufacturing the same
KR20040001861A (en) Metal gate electrode and method for fabricating the same
TWI329340B (en) Method for manufacturing semiconductor device
KR100846391B1 (en) Method for manufacturing tungsten silicide gate of semiconductor device
CN101425462B (en) Method for manufacturing semiconductor device
JPH09115901A (en) Method for forming SiNx / PSG laminated structure
KR100940267B1 (en) Electrode Formation Method of Semiconductor Device
TW200727361A (en) Method of forming metal oxide dielectric film and method of manufacturing semiconductor memory device
KR100905185B1 (en) Method for manufacturing gate electrode of semiconductor device
KR20090074561A (en) Contact formation method of semiconductor device
JPS61290771A (en) Manufacture of semiconductor memory device
KR20020002905A (en) Method for forming gate electrode of semiconductor device
KR20040039982A (en) Method of manufacturing capacitor for semiconductor device
KR20080067177A (en) Metal contact formation method of semiconductor device
KR20070069761A (en) Method of forming contact plug of semiconductor device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20081202

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20100819

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100827

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100927

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20101130

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20101207

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131217

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 4646803

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees