JP4647840B2 - Gm-C filter - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a Gm-C filter that combines a transconductance amplifier (hereinafter referred to as a Gm amplifier), a capacitor, and a common mode feedback circuit.
[0002]
[Prior art]
Conventionally, such a Gm-C filter as shown in FIG. 3 is known.
As shown in FIG. 3, the Gm-C filter includes a Gm amplifier 1 that generates and outputs a differential output signal corresponding to a differential input signal, a capacitor 2 connected between output lines of the Gm amplifier 1, A common mode feedback circuit 3 that generates a predetermined feedback signal based on the differential output signal of the Gm amplifier 1 and feeds back the feedback signal to the Gm amplifier 1 is provided.
[0003]
The Gm amplifier 1 includes a differential pair of NMOS transistors M31 and M32 that generate a differential output signal in response to a differential input signal, and a + input signal Pin and a −input signal Nin are input to the respective gates thereof. It has come to be.
The source of the NMOS transistor M31 is grounded, and the power supply voltage VDD is applied to the drain of the NMOS transistor M31 via the PMOS transistors M33 and M35. The source of the NMOS transistor M32 is grounded, and the power supply voltage VDD is applied to the drain of the NMOS transistor M32 via the PMOS transistors M34 and M36.
[0004]
The + output signal Pout and the − output signal Nout of the Gm amplifier 1 are applied to both ends of the capacitor 2 and can be taken out from the + output terminal 4 and the − output terminal 5. The common mode feedback circuit 3 generates a feedback voltage based on the output voltage of the Gm amplifier 1, and applies the generated feedback voltage to each gate of the PMOS transistors M35 and M36. A predetermined voltage V1 is applied to each gate of the PMOS transistors M33 and M34.
[0005]
Next, a specific configuration of the common mode feedback circuit 3 shown in FIG. 3 will be described with reference to FIG.
The common mode feedback circuit 3 applies feedback to the Gm amplifier 1 so that the value of the current flowing through the Gm amplifier 1 is constant without depending on the amplitude of the differential input signal input to the Gm amplifier 1. As shown in FIG. 4, the MOS transistors M41 to M47 are used.
[0006]
That is, as shown in FIG. 4, the + output signal Pout and the − output signal Nout of the Gm amplifier 1 are inputted to the gates of the MOS transistors M41 and M42. In addition, constant voltages V2 and V3 are applied to the gates of the MOS transistors M46 and M47. Further, the voltage of the drain of the MOS transistor M45 is applied to the gates of the PMOS transistors M35 and M36 of the Gm amplifier 1, respectively.
[0007]
More specifically, as shown in FIG. 4, in this common mode feedback circuit, the NMOS transistors M41 and M42 constituting the differential pair are regarded as input MOS transistors for the next stage Gm-C filter. Feedback is applied to the Gm amplifier 1 so that the sum of the currents flowing through the transistors M41 and M42 is constant.
[0008]
That is, in this common mode feedback circuit, if the sum of the currents flowing through the NMOS transistors M41 and M42 is constant, the current flowing through the differential pair MOS transistors for the input of the next stage Gm-C filter is also equal. It is based on the idea.
For this reason, in the common mode feedback circuit 3, the drains of the MOS transistors M41 and M42 to which the output signals Pout and Nout of the Gm amplifier 1 are input are connected to each other, thereby generating in the MOS transistors M41 and M42, respectively. The sum of currents flows into the MOS transistor M44.
[0009]
Then, the current flowing through the MOS transistor M44 is mirrored by the MOS transistor M45, and an imbalance occurs between the mirrored current and the reference current generated by the MOS transistor M47. For this reason, the drain voltage of the MOS transistor M45 changes, and this voltage change is fed back to the gates of the MOS transistors M35 and M36 of the Gm amplifier 1.
[0010]
As a result, the sum of the currents flowing through the NMOS transistors M41 and M42 is fixed to a constant current value determined by the reference current flowing through the MOS transistor M47 and the mirror ratio of the MOS transistors M44 and M45.
[0011]
[Problems to be solved by the invention]
Incidentally, in the conventional common mode feedback circuit 3 shown in FIG. 4 described above, the current value flowing through the Gm amplifier 1 is constant without depending on the amplitude of the differential input signal input to the Gm amplifier 1 as described above. Thus, feedback is applied to the Gm amplifier 1.
[0012]
On the other hand, the transconductance value Gm of the Gm amplifier 1 depends on the amplitude of the differential input signal input to the Gm amplifier 1. This means that the characteristic of the Gm-C filter including the conventional common mode feedback circuit shown in FIG. 4 changes depending on the amplitude (level) of the differential input signal.
[0013]
Therefore, a Gm-C filter as shown in FIG. 3 is used, for example, to form a band-pass filter that passes the intermediate frequency of the wireless receiver, and the center frequency alignment accuracy requirement is as extremely low as 0.1%. In such a case, it may be inconvenient that the accuracy cannot be satisfied.
Accordingly, an object of the present invention is to provide a Gm-C filter in which the characteristics of the filter are made constant without depending on the amplitude of the differential input signal input to the Gm amplifier. It is in.
[0014]
[Means for Solving the Problems]
  In order to solve the above problems and achieve the object of the present invention, claims 1 to 1 are provided.3Each invention described in the above was configured as follows.
  That is, according to the first aspect of the present invention, a Gm amplifier that generates and outputs a differential output signal corresponding to a differential input signal, a capacitive element connected between the output terminals of the Gm amplifier, and the Gm amplifier A common mode feedback circuit that generates a predetermined feedback signal based on an output signal and feeds back the feedback signal to a feedback terminal of the Gm amplifier, wherein the common mode feedback circuit includes:At each gateIt consists of first and second transistors of a differential pair that inputs a differential output signal of the Gm amplifier, and converts it into a current corresponding to the differential output signalAnd outputting the current from each drain of the first and second transistors.Converting means for generating, a Gm adding means for generating a voltage including a voltage expressed by a sum of transconductances of the first and second transistors based on the current converted by the converting means, and the Gm adding means Feedback means for generating a voltage corresponding to the difference between a response current responsive to the generated voltage and a predetermined reference current, and feeding back the generated voltage to the Gm amplifier.The Gm adding means is connected in series with the first transistor, connected in series to the third transistor having the gate and drain connected thereto, and connected in series to the second transistor, and has the gate and drain connected in series. A fourth transistor connected in series with the fourth transistor, a fifth transistor whose drain is connected to the drain of the third transistor, and the same difference as the second transistor; A sixth transistor that receives a dynamic input signal; a seventh transistor that is connected in series with the sixth transistor and that forms a current mirror circuit with the fifth transistor;It is characterized by comprising.
[0016]
Claim2The invention described in claim1The Gm-C filter described above is characterized in that a level shifter is further provided between the Gm addition means and the feedback means.
  Claims3The invention described in claim 1Or claim 2In the Gm-C filter, the feedback means receives a generated voltage of the Gm adding means or an output voltage of the level shifter, and generates a current corresponding to the added voltage or the output voltage. And a constant current source for supplying a predetermined current to the transistor.
[0017]
Thus, in the present invention, the conversion means inputs the differential output signal from the Gm amplifier and converts it into a current corresponding thereto. The Gm addition means generates a voltage including a voltage expressed by the sum of both transconductances of the first and second transistors constituting the conversion means based on the conversion current. The converting means generates a voltage corresponding to the difference between the response current responsive to the generated voltage of the Gm adding means and a predetermined reference current, and feeds back the generated voltage to the Gm amplifier.
[0018]
By the way, the output differential signal of the Gm amplifier input to the first and second transistors is based on the input differential signal of the transistors of the input differential pair of the Gm amplifier. Therefore, the feedback control as described above means that the transistor transconductance value becomes constant even if the level of the input differential signal of the transistor of the input differential pair of the Gm amplifier is large or small.
[0019]
Therefore, according to the present invention, the transconductance value Gm of the Gm amplifier can be made constant regardless of the amplitude of the differential input signal of the Gm amplifier. Can be constant without dependence.
[0020]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
As shown in FIG. 1, the embodiment of the Gm-C filter of the present invention is connected between a Gm amplifier 1 that generates and outputs a differential output signal corresponding to a differential input signal, and an output line of the Gm amplifier 1. And a common mode feedback circuit 13 that generates a predetermined feedback signal based on the differential output signal of the Gm amplifier 1 and feeds back the feedback signal to the Gm amplifier 1. is there.
[0021]
The embodiment of the Gm-C filter of the present invention is different in that the common mode feedback circuit 3 of the Gm-C filter shown in FIG. 3 is replaced with a common mode feedback circuit 13, and the configuration of other parts is the configuration of FIG. It is the same.
Therefore, the same components as those in FIG. 3 are denoted by the same reference numerals, and the description thereof is omitted. Hereinafter, the common mode feedback circuit 13 will be described mainly with reference to FIG.
[0022]
As shown in FIG. 2, the common mode feedback circuit 13 according to this embodiment includes a V / I converter 21, a Gm adder 22, a dummy circuit 23, a level shifter 24, and a current comparator 25. Yes.
Here, the conversion means in the claims corresponds to the V / I conversion section 21, the Gm addition means corresponds to the Gm addition section 22, and the feedback means corresponds to the current comparison section 25.
[0023]
The V / I converter 21 receives the differential output voltages Pout and Nout of the Gm amplifier 1 and converts them into differential output currents corresponding thereto.
For this reason, as shown in FIG. 2, the V / I converter 21 includes MOS transistors M2 and M3 comprising a differential pair, and MOS transistors M8 and M9 connected in series to the MOS transistors M2 and M3, respectively. Become.
[0024]
Here, the transistor sizes of the MOS transistors M2 and M3 are the same as the transistor sizes of the MOS transistors M31 and M32 of the Gm amplifier 1.
More specifically, in the MOS transistor M2, the + output voltage Pout of the Gm amplifier 1 is input to the gate, the source is grounded, and the drain is connected to the source of the MOS transistor M8. Further, the MOS transistor M3 has a gate to which the negative output voltage Nout of the Gm amplifier 1 is input, a source grounded, and a drain connected to the source of the MOS transistor M9. A constant voltage V4 is applied to the gates of the MOS transistors M8 and M9.
[0025]
Based on the current converted by the V / I converter 21, the Gm adder 22 generates a voltage including a voltage expressed by the sum of both transconductances of the MOS transistor M2 and the MOS transistor M3, as will be described later. Output.
For this purpose, as shown in FIG. 2, the Gm adding unit 22 includes P-type MOS transistors M16, M13, M17, and M18 and N-type MOS transistors M4 and M10, and the MOS transistor M18 and the MOS transistor M17. Forms a current mirror circuit.
[0026]
More specifically, the gate and drain of the MOS transistor M16 are connected, and the common connection is connected to the drain of the MOS transistor M8. A power supply voltage VDD is applied to the source of the MOS transistor M16. The gate and drain of the MOS transistor M13 are connected in common, and the common connection is connected to the drain of the MOS transistor M9 and to the gate of the level shift MOS transistor M14 of the level shifter 24. Yes. The source of the MOS transistor M13 is connected to the drain of the MOS transistor M17 and to the drain of the MOS transistor M16.
[0027]
The gate of the MOS transistor M17 is connected to the gate of the MOS transistor M18, and the power supply voltage VDD is applied to the source. The MOS transistor 18 has its gate and drain connected in common, and its common connection is connected to the gate of the MOS transistor M17 and to the drain of the MOS transistor M10. Further, the power supply voltage VDD is applied to the source of the MOS transistor M18. Therefore, the MOS transistor M18 and the MOS transistor M17 form a current mirror circuit.
[0028]
In the MOS transistor M10, a constant voltage V4 is applied to its gate, and its source is connected to the drain of the MOS transistor M4. Further, the negative output voltage Nout of the Gm amplifier 1, which is the same as that inputted to the gate of the MOS transistor M3, is inputted to the gate of the MOS transistor 4. The source of the MOS transistor M4 is grounded.
[0029]
The dummy circuit 23 is provided in order to balance the circuit because the Gm adding unit 22 includes a circuit including the MOS transistors M4, M10, and M18.
Therefore, as shown in FIG. 2, the dummy circuit 23 includes MOS transistors M1, M7, and M15 corresponding to the MOS transistors M4, M10, and M18, and these are connected in series between the power supply line and the ground line. It is connected to the.
[0030]
More specifically, the + output voltage Pout of the Gm amplifier 1 which is the same as that inputted to the gate of the MOS transistor M2 is inputted to the gate of the MOS transistor M1. The source of the MOS transistor M1 is grounded and the drain thereof is connected to the source of the MOS transistor M7. In the MOS transistor M7, a constant voltage V4 is applied to its gate, and its drain is connected to the drain of the MOS transistor M15. Further, the gate and drain of the MOS transistor 15 are connected in common, and the power supply voltage VDD is applied to the source.
[0031]
The level shifter 24 performs a level shift of the direct current potential of the generated voltage of the Gm adder 23.
Therefore, as shown in FIG. 2, the level shifter 24 is connected in series to a P-type MOS transistor M14 for level shift, P-type MOS transistors M19 and M20 forming a current mirror circuit, and the MOS transistor M20. N-type MOS transistors M5 and M11.
[0032]
More specifically, the MOS transistor M14 has its gate connected to the gate of the MOS transistor M13 and its drain grounded. The source of the MOS transistor M14 is connected to the drain of the MOS transistor M19 and to the gate of the MOS transistor M21 of the current comparison unit 25.
[0033]
The gate of the MOS transistor M19 is connected to the gate of the MOS transistor M20, and the power supply voltage VDD is applied to the source. In the MOS transistor M20, the power supply voltage VDD is applied to the source, and the gate and the drain are commonly connected. Further, the common connection is connected to the drain of the MOS transistor M11 and to the gate of the MOS transistor M19. Therefore, the MOS transistor M20 and the MOS transistor M19 form a current mirror circuit.
[0034]
In the MOS transistor M11, a constant voltage V4 is applied to its gate, and its source is connected to the drain of the MOS transistor M5. The gate of the MOS transistor M5 is connected to the gate of the MOS transistor M6 of the current comparison unit 25, and the source thereof is grounded.
The current comparator 25 generates a voltage corresponding to the difference between the response current responsive to the output voltage of the level shifter 24 and a predetermined reference current, and this generated voltage is applied to each gate of the MOS transistors M35 and M36 of the Gm amplifier 1. Return.
[0035]
For this purpose, as shown in FIG. 2, the current comparator 25 includes a P-type MOS transistor M21 for inputting the output voltage of the level shifter 24, a MOS transistor M12 connected in series with the MOS transistor M12, a MOS transistor M21, It comprises MOS transistors M6 and M22 forming a current mirror circuit for supplying a reference current to M12.
[0036]
More specifically, in the MOS transistor M21, the power supply voltage VDD is applied to the source, and the gate is connected to the source of the MOS transistor M14.
The drain of the MOS transistor M21 is connected to the drain of the MOS transistor M12 and to the gates of the MOS transistors M35 and M36. A constant voltage V4 is applied to the gate of the MOS transistor M12, and its source is connected to the drain of the MOS transistor M6.
[0037]
The gate of the MOS transistor M6 is connected to the gate of the MOS transistor M22, and the source thereof is grounded. In addition, the MOS transistor M22 is supplied with a reference current to its drain, and its source is grounded. Therefore, the MOS transistor 22 and the MOS transistor M6 form a current mirror circuit.
[0038]
Next, the operation of the common mode feedback circuit 13 having such a configuration will be described with reference to FIG.
First, the operation of the V / I converter 21 will be described.
Now, when the + output voltage Pout of the Gm amplifier 1 is inputted to the gate of the MOS transistor M2 of the V / I converter 21, the current I as shown in the following equation (1) is supplied to the MOS transistor M2 in response to this.₂Flows.
[0039]
I₂= K_M2× (Von_M2)²(1)
Where K in equation (1)_M2Is K_M2= K '× (W / L). K 'is a gain factor, W is a channel width of the MOS transistor M2, and L is a channel length of the MOS transistor M2.
Von_M2Von_M2= Vgs-Vth. Vgs is a voltage between the gate and source of the MOS transistor M2, and Vth is a threshold voltage of the MOS transistor M2.
[0040]
In addition, K in the formula (1)_M2, Von_M2The subscript “M2” indicates a symbol for identifying the MOS transistor shown in FIG._M2Represents the constant of the MOS transistor M2 and its contents are as described above. Therefore, subscripts in the following cases are handled in the same manner.
When the negative output voltage Nout of the Gm amplifier 1 is input to the gate of the MOS transistor M3, the current I as shown in the following equation (2) is supplied to the MOS transistor M3 in response to this._ThreeFlows.
[0041]
I_Three= K_M3× (Von_M3)²(2)
Next, the operation of the Gm addition unit 22 will be described.
The same transistor size is used for the MOS transistor M4 of the Gm adder 22 and the MOS transistor M3 of the V / I converter 21. Therefore, the current I flowing through the MOS transistor M4_FourI_Four= I_Three= K_M3× (Von_M3)²become that way.
[0042]
Since the MOS transistors M18 and M17 form a current mirror circuit and the mirror ratio is set to 1: 1, the MOS transistor M17 and the MOS transistor M3 have the same current I._Three= K_M3× (Von_M3)²Flows.
As a result, the voltage V of the node A of the Gm adder 22_AIs the current I_ThreeWithout depending on the above, it is determined only by the voltage Vgs between the gate and the source of the MOS transistor M16 and is expressed by the following equation (3).
[0043]
V_A= √ (I₂/ K_M16) + Vth_M16.... (3)
Where √ (I₂/ K_M16) Is (I₂/ K_M16), And so on. K_M16Is the constant of the MOS transistor 16, Vth_M16Is the threshold voltage of the MOS transistor M16.
On the other hand, the voltage V of the node B of the Gm adder 22_BIs the voltage V of node A_AAnd a voltage Vgs between the gate and the source of the MOS transistor M13 is added, and is expressed by the following equation (4).
[0044]
V_B= √ (I₂/ K_M16) + Vth_M16+ √ (I₂/ K_M13) + Vth_M13.... (4)
When this equation (4) is rearranged using the equations (1) and (2), the voltage V of the node B_BBecomes the following equation (5).
V_B= Von_M2× √ (K_M2/ K_M16) + Von_M3× √ (K_M3/ K_M13) + Vth_M16+ Vth_M13(5)
Where K in equation (5)_M2, K_M3, K_M13, K_M16, Vth_M13, Vth_M16Are constants. K_M2= K_M3, K_M13= K_M16, Vth_M13= Vth_M16There is a relationship.
[0045]
Therefore, in equation (5), √ (K_M2/ K_M16) = √ (K_M3/ K_M13) = Α and Vth_M16+ Vth_M13= 2Vth_pThen, the equation (5) becomes the following equation (6).
V_B= Α (Von_M2+ Von_M3) + 2Vth_p.... (6)
Here, according to the Sah equation, the current Ids flowing through the MOS transistor is expressed by the following equation (7).
[0046]
Ids = K × Von²(7)
Here, K is a constant, and Von is as described above.
Further, the transconductance Gm of the MOS transistor is obtained as shown in the following equation (8) by partial differentiation of the current Ids.
Gm = ∂Ids / ∂Von = 2K × Von (8)
When Von is expressed by transconductance Gm by the equation (8), the following equation (9) is obtained.
[0047]
Von = Gm / (2K) (9)
Substituting this equation (9) into equation (6), the voltage V of node B_BBecomes the following equation (10).
V_B= Α (Gm_M2+ Gm_M3) / Kn + 2Vth_p(10)
Where Gm_M2, Gm_M3Are the transconductance values of the MOS transistors M2 and M3, and Kn is the constants of the MOS transistors M2 and M3.
[0048]
According to equation (10), the voltage V of node B_BIs the transconductance value Gm of the MOS transistor M2._M2And the transconductance value Gm of the MOS transistor M3_M3It can be seen that it is expressed as the sum of
Next, the operation of the level shifter 24 will be described.
The voltage V of the node B of the Gm adder 22_BEven if it is intended to be input directly to the gate of the MOS transistor M21 of the current comparison unit 25, it cannot be input due to the difference in operation level. Therefore, in the level shifter 2, the DC voltage is level-shifted by the voltage Vgs between the gate and the source in the level shift MOS transistor M14 so as to match the operating point of the MOS transistor M21.
[0049]
The voltage Vgs between the gate and source of the MOS transistor M14_M14Is a reference current flowing through the MOS transistor M14 (generated by a current mirror by the MOS transistors M20 and M19) and a constant K of the MOS transistor._M14It is always constant because it is determined only by Therefore, the voltage (output voltage) V at the node C of the level shifter 24._CIs expressed by the following equation (11).
[0050]
V_C= Α (Gm_M2+ Gm_M3) / Kn + 2Vth_p+ Vgs_M14(11)
Next, the operation of the current comparison unit 25 will be described.
Current I generated in MOS transistor M21_{twenty one}Is the voltage V of node C_C(Input voltage of MOS transistor M21) and constant K of MOS transistor M21_M21When the equation (11) is used, it is expressed by the following equation (12).
[0051]
I_{twenty one}= K_M21× (V_C−Vth_p)²= K_M21× [α (Gm_M2+ Gm_M3) / Kn + Vth_p+ Vgs_M14]²(12)
By the way, the current generated in the MOS transistor M6 is supplied with the reference current Iref to the MOS transistor M22, and the MOS transistors M22 and M6 form a current mirror, and therefore have a constant value determined by the mirror ratio. If the mirror ratio is 1: 1, currents Iref and I_{twenty one}, Can be expressed by the following equation (13).
[0052]
Iref = I_{twenty one}= K_M21× (V_C−Vth_p)²= K_M21× [α (Gm_M2+ Gm_M3) / Kn + Vth_p+ Vgs_M14]²(13)
As can be seen from the equation (13), the transconductance Gm of the MOS transistors M2 and M3._M2, Gm_M3(Gm_M2+ Gm_M3) Is input to the gates of the MOS transistors M2 and M3, the voltage at the node D of the current comparison unit 25 is set to the MOS transistor M35 of the Gm amplifier 1, so as to satisfy the equation (13). Returned to each gate of M36.
[0053]
The above operations are summarized as follows.
That is, the differential output voltage from the Gm amplifier 1 is converted into a differential output current according to the differential output voltage by the MOS transistors M2 and M3 of the V / I converter 21. Next, based on the converted current, the Gm adder 22 outputs an output voltage V including a voltage expressed by the sum of both transconductances of the MOS transistors M2 and M3._BIs generated.
[0054]
Further, this output voltage V_BIs level-shifted by the MOS transistor M14 of the level shifter 24 and V_CThis is applied to the gate of the MOS transistor M21 of the current comparator 25. Current I generated by MOS transistor M21_{twenty one}And the reference current generated by the MOS transistor M6 appear as a change in the drain voltage of the MOS transistor M21, and this is fed back to the Gm amplifier 1. Thereby, the operation | movement which satisfy | fills (13) Formula is realizable.
[0055]
Incidentally, the output differential voltage of the Gm amplifier 1 input to the MOS transistors M2 and M3 is based on the input differential voltage of the MOS transistors M31 and M32 of the Gm amplifier 1. Therefore, satisfying the expression (13) by the feedback control as described above means that the transconductance values of the MOS transistors M31 and M32 are constant even if the level of the input differential voltage of the MOS transistors M31 and M32 is large or small. It means to become.
[0056]
Therefore, according to this embodiment, since the transconductance value Gm of the Gm amplifier can be made constant regardless of the amplitude of the differential input signal of the Gm amplifier 1, the characteristics of the filter can be changed with respect to the differential input signal. It can be made constant without depending on the amplitude. For this reason, when a band pass filter is configured using the Gm-CF filter of this embodiment, ideal characteristics can be obtained.
[0057]
【The invention's effect】
As described above, according to the present invention, the transconductance value Gm of the Gm amplifier can be made constant regardless of the amplitude of the differential input signal of the Gm amplifier. It can be made constant without depending on the amplitude of the signal. For this reason, when a band pass filter is configured using the present invention, ideal characteristics can be obtained.
[Brief description of the drawings]
FIG. 1 is a circuit diagram (block diagram) showing a configuration of an embodiment of the present invention.
FIG. 2 is a circuit diagram showing a specific configuration example of the common mode feedback circuit shown in FIG. 1;
FIG. 3 is a diagram illustrating a configuration example of a conventional Gm-C filter.
4 is a circuit diagram showing a specific configuration example of the common mode feedback circuit shown in FIG. 3; FIG.
[Explanation of symbols]
1 Gm amplifier
2 Capacitor (capacitance element)
13 Common mode feedback circuit
21 V / I converter
22 Gm adder
23 Dummy circuit
24 level shifter
25 Current comparator

Claims (3)

A Gm amplifier that generates and outputs a differential output signal corresponding to the differential input signal, a capacitive element connected between the output terminals of the Gm amplifier, and a predetermined feedback signal based on the output signal of the Gm amplifier And a common mode feedback circuit that feeds back the feedback signal to the feedback terminal of the Gm amplifier, and a Gm-C filter comprising:
The common mode feedback circuit is
The first and second transistors of the differential pair that input the differential output signal of the Gm amplifier to each gate, and converted into a current corresponding to the differential output signal, the first and second transistors Conversion means for outputting the current from each drain ;
Gm addition means for generating a voltage including a voltage expressed by the sum of transconductances of the first and second transistors based on the current converted by the conversion means;
Feedback means for generating a voltage corresponding to a difference between a response current responsive to the generated voltage of the Gm adding means and a predetermined reference current, and feeding back the generated voltage to the Gm amplifier;
Equipped with a,
The Gm adding means includes
A third transistor connected in series with the first transistor and having its gate and drain connected;
A fourth transistor connected in series to the second transistor and having its gate and drain connected;
A fifth transistor connected in series to the fourth transistor and having its drain connected to the drain of the third transistor;
A sixth transistor that receives the same differential input signal as the second transistor;
A seventh transistor connected in series with the sixth transistor and forming a current mirror circuit with the fifth transistor;
Gm-C filter according to comprising the. The Gm-C filter according to claim 1, wherein a level shifter is further provided between the Gm adding means and the feedback means. The return means is
A transistor that inputs a generated voltage of the Gm adding means or an output voltage of the level shifter, and generates a current corresponding to the added voltage or the output voltage;
A constant current source connected to the transistor for passing a predetermined current through the transistor;
The Gm-C filter according to claim 1 or 2, characterized by comprising:

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