JP4658998B2 - shell - Google Patents

Description

  The present invention relates to a shell used for a semiconductor wafer reliability evaluation test.

  In the semiconductor inspection process, electrical characteristics are inspected at the wafer level for a large number of semiconductor elements (hereinafter referred to as “devices”) formed on the surface of a semiconductor wafer (hereinafter referred to as “wafers”). Screening for defects-free chips. Then, as a final inspection process, after dicing the wafer, each device is subjected to reliability evaluation tests such as electromigration test of multilayer wiring in the wafer and leakage current test between the upper and lower wirings in the same plane under accelerated conditions. Do.

  When performing a reliability evaluation test, a test package is prepared and a device is packaged. Subsequently, for example, about 70 packages are subjected to a reliability evaluation test for each device in a heating furnace at a predetermined high temperature (for example, 300 ° C.).

  However, in the case of a reliability evaluation test in a heating furnace as in the prior art, after dicing a wafer, a test package is prepared, and each device is packaged using this test package. There has been a problem that a considerable period and cost are required for producing a test package and packaging each device. Furthermore, the conventional heating furnace has a problem that it can test only several tens of packages at a time, in other words, several tens of devices.

  In addition, in the case of a device having a metal wiring that easily oxidizes, such as copper or copper alloy, the inside of the heating furnace is made an inert gas atmosphere, but the heating furnace is inferior in airtightness and prevents, for example, oxidation of the copper wiring. The oxygen concentration cannot be lowered to the extent. Therefore, in the case of copper wiring, not only the pad portion of the copper wiring but also the copper wiring itself is oxidized, so an aluminum pad layer for preventing oxidation is added to the copper pad portion during wafer sample preparation. Must-have. In addition, when a plurality of types of samples are tested, there is a problem that a dicing method and a wire bonding portion must be devised according to the types. Therefore, there is a problem that it takes a long time of 3 weeks or more before the reliability evaluation test result is obtained.

  Furthermore, parameters that are important for reliability and dependencies related to various test patterns have a problem that test efficiency is inferior because test data must be obtained by performing tests many times. For example, in the case of an electromigration test, the locations of voids generated by electromigration are observed one by one, and the observation results are fed back to subsequent process development. After disassembling and taking out each device and removing the bonding wire, there is a problem that it takes a lot of labor and time to observe the device with a microscope.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a shell capable of performing a reliability evaluation test on a semiconductor element quickly and efficiently at a wafer level and with high reliability. Yes.

The shell according to claim 1 of the present invention includes a heat resistant substrate and a conductor circuit having a connection pad portion formed on the heat resistant substrate, and performs a reliability evaluation test of the semiconductor wafer at a temperature of 160 ° C. or higher. A shell comprising a contactor having a thermal expansion coefficient of 1 to 50 ppm / ° C. and a wafer holder formed of a magnetic material and holding the semiconductor wafer, When performing the reliability test, the semiconductor wafer is placed on the wafer holder , the plurality of contact pad portions of the contactor and the plurality of electrode pads of the semiconductor wafer are collectively contacted, and the semiconductor wafer is wafer holder and in a state interposed between the contactor, the wafer transfer device having a magnetic circuit or a magnet into contact with the contactor, the magnetic circuit or By the magnetic force of the serial magnet is characterized in that characterized by comprising the wafer holder by suction into the contactor-side above the wafer holder, the semiconductor wafer and the contactor are integrated to be conveyed.

  The shell according to claim 2 of the present invention is characterized in that, in the invention according to claim 1, the thermal expansion coefficient of the heat-resistant substrate is a thermal expansion coefficient in a plane direction.

Further, the shell according to claim 3 of the present invention, in the invention described in 請 Motomeko 2, the thermal expansion coefficient of the heat-resistant substrate is characterized in that a 2~30ppm / ℃.

  According to a fourth aspect of the present invention, there is provided the shell according to any one of the first to third aspects, wherein the conductor circuit has a bump. is there.

The shell according to claim 5 of the present invention is the shell according to any one of claims 1 to 4, wherein the heat-resistant substrate is made of a heat-resistant resin, a metal, a semiconductor and a ceramic. An insulating layer is formed between the surface of the heat resistant substrate and the conductor circuit when at least a metal or a semiconductor is selected as the heat resistant substrate. is there.

The shell according to claim 6 of the present invention is the shell according to claim 5, wherein the heat resistant resin is used as the heat resistant substrate, and the heat resistant resin is polyimide, bismaleimide triazine or glass cloth. Or it is at least 1 type of heat resistant resin selected from the heat resistant resin which contains carbon fiber as a reinforcing material, It is characterized by the above-mentioned.

Further, in the shell according to claim 7 of the present invention, in the invention according to claim 5, the metal is used as the heat- resistant substrate, and the metal is aluminum, copper, stainless steel, invar alloy, or invar. It is characterized by being at least one metal selected from.

According to an eighth aspect of the present invention, in the shell according to the fifth aspect, the ceramic is used as the heat- resistant substrate, and the ceramic is aluminum nitride or silicon carbide. Is.

Further, the shell according to claim 9 of the present invention is the surface of the invention according to any one of claims 1 to 8 except for a portion that conducts when performing a reliability evaluation test of the contactor. Is provided with an insulating film .

Also, the shell of claim 10 is the invention according to claim 5, it is characterized in that the upper Kize' edge layer is a silicon oxide film.

A shell according to an eleventh aspect of the present invention is the shell according to any one of the first to tenth aspects, wherein the shell is connected between the connection pad portion of the contactor and the electrode pad portion of the semiconductor wafer. An anisotropic conductive film is interposed.

According to the present invention, by using the wafer transfer device having a magnetic circuit, or magnet, be transported in a state where the semiconductor wafer and the contactor are in contact with each other, contactors, remains to reliability test device with integrated semiconductor wafer and wafer holder can be, contactor, quickly and efficiently a plurality of semiconductor elements formed on a semiconductor wafer by the reliability test device at the wafer level in a state in which integrated semiconductor wafer and c Ehahoruda is, moreover with high reliability reliable A shell capable of performing a sex assessment test can be provided.

Hereinafter, the present invention will be described based on the embodiment shown in FIGS.
The reliability evaluation test system of the present embodiment includes a reliability evaluation test apparatus 10 and an aligner 50, both of which are connected by a communication network so that data communication is possible. Therefore, after first describing the reliability evaluation test apparatus 10 of the present embodiment, the aligner 50 will be described.

  As shown in FIGS. 1A and 1B and FIG. 2, the reliability evaluation test apparatus 10 of this embodiment is electrically connected to a contactor 11 (see FIGS. 3A and 3B) described later. The wafer storage unit 12 that stores the wafers that are collectively contacted with each other, the pressing mechanism 13 that is disposed above the wafer storage unit 12 and presses the contactor 11, and the wafer that is pressed via the pressing mechanism 13 are directly heated. A heating mechanism 14 (see FIG. 2), a measurement unit 15 that performs electrical measurement of a wafer heated via the heating mechanism 14, and a measurement signal for the measurement unit 15 are generated and the measurement result signal is processed. A tester unit 16, a temperature controller 17 for controlling the temperature of the wafer, a tester management unit 18 for managing the tester unit 16, a casing 19 for storing these devices, and each device in the casing 19 are controlled. controller 0 and a (in see FIG. 1 (b)), temperature, current density, etc. wiring film formed on the semiconductor wafer under accelerated conditions of, assessing the reliability of the insulating film. As shown in FIG. 1B, the controller 20 is configured by a desktop type computer and is disposed adjacent to the housing 19. For example, the test result is displayed as a wafer map (see FIG. 16) on the monitor screen 20A of the computer, and the test result can be instantaneously displayed on the monitor screen 20A by clicking each device on the wafer map with the mouse 20B. Further, the controller 20 has a data communication function with an aligner described later, and can transmit the result of the reliability evaluation test to the aligner. Further, the wafer storage unit 12 can be taken in and out in the direction of arrow A in FIG. The measurement unit 15 includes, for example, an electromigration (EM) measurement unit 15A and a leakage current (BT) measurement unit 15B, and the tester unit 16 is configured to correspond to these measurement units 15A and 15B. FIG. 2 shows the main part of the structure of the reliability evaluation test apparatus 10.

  For example, as shown in FIG. 2, the wafer storage unit 12 includes a mounting table 22 made of a heat insulating and insulating material for mounting a wafer W that is in electrical contact with the contactor 11 through a heating body to be described later. A heat-resistant connection ring 24 that surrounds the mounting table 22 via a cylindrical body 23 made of a heat-insulating and insulating material and is in electrical contact with the contactor 11 via a heat-resistant contact terminal (for example, pogo pin) 24A; A wiring board 25 that is in electrical contact with the connection ring 24 and receives a test signal from the measurement unit 15 is provided, and the contactor 11 and the wafer W are brought into electrical contact with each other reliably through the pressing mechanism 13. The contactor 11 is configured to be electrically connected to the measurement unit 15 via the connection ring 24 and the wiring board 25.

  As shown in FIG. 2, a seal ring 26 made of a heat-resistant resin such as silicon rubber is disposed on the outer peripheral edge of the connection ring 24, and the seal ring 26 and the contactor 11 come into elastic contact with each other to form a wafer. An airtight space is formed in the storage portion 12. Further, the wafer storage unit 12 includes a pressing mechanism 27 that presses the outer peripheral edge of the contactor 11, and the contactor 11 and the connection ring 24 are in electrical contact with each other via the pressing mechanism 27. The pressing mechanism 27 is formed of, for example, a first ring-shaped member 27A formed of a heat-resistant material (for example, ceramic) in accordance with the outer peripheral edge of the contactor 11, and approximately the same size as the ring-shaped member 27A. The second ring-shaped member 27B, the heat-resistant spring member 27C interposed between the first and second ring-shaped members 27A and 27B, and the second ring-shaped member 27B are formed integrally with the rear of the wafer storage unit 12. And a pair of gas springs (not shown) that support the arm 27D, and the first and second ring-shaped members 27A and 27B open and close with a light force by the action of the gas springs. It is like that. The pressing mechanism 27 includes a lock mechanism 27E, and fixes the first and second ring-shaped members 27A and 27B to the outer peripheral edge portion of the contactor 11 via the lock mechanism 27E. Therefore, the wafer storage unit 12 stores the integrated contactor 11 and the wafer W, and when the contactor 11 is pressed via the pressing mechanism 13 and the pressing mechanism 27, the inside is thermally insulated from the outside, and the structure is kept airtight. Yes.

  Further, for example, as shown in FIG. 2, the mounting table 22 is formed with a pair of supply / exhaust holes 22A and 22B penetrating in the vertical direction. Reduction of inert gas such as nitrogen gas and / or hydrogen gas and the like from the supply hole 22A. An inert gas atmosphere or a reducing gas atmosphere is formed in a very limited minimum space, ie, a contact portion between the contactor 11 and the wafer W in the wafer storage unit 12 by supplying a reactive gas, and the inert gas is discharged from the exhaust hole 22B. And / or exhausting reducing gas. When supplying the reducing gas, it is preferable to add a predetermined amount of the reducing gas to the inert gas. By forming an inert gas atmosphere and / or a reducing gas atmosphere in a narrow space in the wafer storage unit 12, oxidation of metal wiring that is easily oxidized such as copper wiring formed on the wafer W at a high temperature is prevented, Alternatively, the metal oxide film can be reduced, and the supply amount of inert gas and / or reducing gas can be minimized. In addition, since the wafer storage unit 12 has an airtight structure, when air is replaced with an inert gas and / or a reducing gas, the oxygen concentration is a concentration that can prevent oxidation of metal wiring or pads that are easily oxidized such as copper, For example, it can be lowered to 10 ppm or less, specifically 1 to 5 ppm or less. The oxygen concentration is detected through a conventionally known oxygen sensor (not shown) disposed in the wafer storage unit 12, and an oxygen concentration measurement unit 28 (shown in FIG. 1), the oxygen concentration is calculated. Therefore, it is not necessary to provide an oxidation prevention aluminum pad layer on the test pad as in the prior art. Since the metal oxide film is reduced at a high temperature by replacing with reducing gas, the metal oxide film formed immediately before the test can be reduced, and electrical conduction between the wafer W and the contactor 11 can be ensured. .

  As shown in FIG. 1, the pressing mechanism 13 is fixed directly above the wafer storage portion 12 inserted into the housing 19. As shown in FIGS. 1 and 2, the pressing mechanism 13 includes a pressing plate 13A for pressing the contactor 11, a metal bellows 13B having a lower end connected to the upper surface of the pressing plate 13A, and an upper end of the bellows 13B. And a support plate 13C that supports the bellows 13B, and a cylinder mechanism 13D that is connected to the support plate 13C and is suspended and fixed in the housing 19. Further, as shown in FIG. 2, a through hole 13E is formed in the support plate 13C, compressed air is supplied from the through hole 13E, and the inside of the pressing plate 13A, the bellows 13B and the support plate 13C is pressurized. By this pressurization, the bellows 13B extends downward from the support plate 13C lowered via the cylinder mechanism 13D, presses the contactor 11 via the pressing plate 13D, and uniformly presses the entire surface of the contactor 11, thereby forming bumps on the contactor 11 and The electrode pads of the wafer W can be reliably brought into contact with each other. Further, as shown in FIG. 2, an auxiliary heating body to be described later is fixed at the center of the lower surface of the pressing plate 13A, and the wafer W is also heated from the contactor 11 side. Further, as described above, the holding mechanism 27 is hinged at the rear of the wafer storage unit 12 and is configured to be opened and closed via an auxiliary mechanism such as a gas spring. The integrated contactor 11 and wafer W are connected to the wafer storage unit 12. After being placed inside, the contactor is tilted forward and joined horizontally to the peripheral edge of the contactor 11 in the wafer storage unit 12 via the lock mechanism 27E and stored in the wafer storage unit 12 as shown in FIG. 11 is configured to hold the outer peripheral edge portion.

  The heating mechanism 14 is mainly composed of a heating body 29 which is disposed on the mounting table 22 and heats the wafer W from the lower surface side, and uniformly heats the entire surface of the wafer W. Furthermore, the heating body 29 includes, for example, a circular first heating unit 29A disposed in the center of the mounting table 22, and a ring-shaped second heating unit 29B surrounding the first heating unit 29A. The center part of the wafer W is heated via the first heating part 29A and the outer peripheral edge part of the wafer W is heated via the second heating part 29B. The second heating unit 29B plays a role of supplementing the heat radiation from the outer peripheral edge of the wafer W. The heating body 29 may not be divided as the first heating unit 29A and the second heating unit 29B as long as the entire surface of the wafer W can be heated uniformly. In addition to the heating body 29, the heating mechanism 14 includes a disk-shaped auxiliary heating body 29C that comes in contact with the upper surface of the contactor 11, and cooperates with the heating body 29 to more reliably heat the wafer W to a predetermined high temperature. And maintain that temperature. As described above, the heating mechanism 14 directly heats the wafer W from the upper and lower surfaces, and the heating space is extremely limited. Therefore, the wafer W can be heated to the target temperature in a short time, and the wafer W can be heated to 160. It can be heated and maintained at a high temperature of 350 ° C. or higher and at a maximum of 350 ° C., and the electromigration and leakage current of the metal wiring of the wafer W can be measured with high accuracy at a high temperature. When the wafer W is heated to 160 ° C. or higher, the heating mechanism 14 can control the temperature distribution on the entire surface of the wafer W within ± 2.0 ° C. to uniformly heat the entire surface of the wafer W. Therefore, for example, even when copper is used as a wiring material, a reliability evaluation test can be performed under accelerated conditions of high temperature and high density current, and wiring and insulating films can be evaluated with high accuracy.

  Further, the wiring board 25 constituting the wafer storage unit 12 is extended to the heel side (right side in FIG. 2) of the housing 19, and external connection terminals (not shown) are formed on both the upper and lower surfaces of the extended portion 25A. ing. On the other hand, the connection boards 15C and 15D of the EM measurement unit 15A and the BT measurement unit 15B shown in FIG. 1 are arranged so as to sandwich the extension part 25A as shown in FIG. 2, and these connection boards 15C and 15D are driven mechanisms (see FIG. The external connection terminals on the upper and lower surfaces of the extended portion 25A are alternately electrically contacted via the extension portion 25A, and the EM measurement unit 15A and the BT measurement unit 15B are alternately switched. That is, the connection boards 15C and 15D function as a switching mechanism between the EM measurement unit 15A and the BT measurement unit 15B. Each of these measurement units 15A and 15B is composed of a board having 512 channels, for example, and can measure 512 devices simultaneously.

  The contactor 11 and the wafer W are in contact with each other through an anisotropic conductive sheet 31 as shown in FIG. The bumps of the contactor 11 and the electrode pads of the wafer W are preferably circular, polygonal, or a combination thereof. The maximum length of the bumps in the pitch direction is preferably equal to or less than the pitch size of the electrode pads of the wafer. For example, the bumps are formed to have a diameter of about 75 μm and are spaced from each other by about 120 μm. On the other hand, the anisotropic conductive sheet 31 has an elastic structure capable of absorbing the height difference even if there is a height difference between the bumps of the contactor 11 and the electrode pads of the wafer W. As such an anisotropic sheet 31, for example, Gore Mate (trade name manufactured by Gore) is preferably used. For example, as shown in FIGS. 7A and 7B, the gore mate is evenly spaced with a predetermined interval (for example, 70 μm) between the tetrafluoroethylene resin sheet 31A and the entire surface of the tetrafluoroethylene resin sheet 31A. An aggregate of nickel fine particles (for example, a diameter of 25 μm) 31B is formed. Since the aggregate 31B is formed by aggregating gold fine particles, the nickel fine particles become consolidated when pressure is applied to the aggregate 31B. Therefore, simply by interposing the anisotropic conductive sheet 31 between the contactor 11 and the wafer W, the bumps of the contactor 11 and the electrode pads of the wafer W are elastically contacted together via the anisotropic conductive sheet 31, and both 11 and W can be reliably connected. This gore mate is usually disposable. 2 and 7, reference numeral 32 denotes a wafer holder made of a magnetic material such as an iron-based material. Note that an aligner described later can be used when aligning the bumps of the contactor 11 and the electrode pads of the wafer W.

  Thus, for example, as shown in FIGS. 3A and 3B, the contactor 11 includes a heat resistant substrate 11A formed of a material described later, and copper or copper on the upper surface of the heat resistant substrate 11A. Connection of the reliability evaluation test apparatus 10 with a conductor circuit 11B formed of a conductive metal such as an alloy, a plurality of bumps 11C formed integrally with the conductor circuit 11B and connection pads 11D for the wafer W, respectively. A connection pad portion 11E that is in electrical contact with the pogo pin 24A of the ring 24, and an insulating coating 11F that covers portions other than the bump 11C, the connection pad portion 11D, and the connection pad portion 11E. It is suitably used when performing a reliability evaluation test at a temperature of. By providing the insulating coating 11 </ b> F, excessive electrical contact between the contactor 11 and the wafer W can be prevented, and stable electrical conduction can be established between the contactor 11 and the wafer W. The heat-resistant substrate 11A has a very small coefficient of thermal expansion at a high temperature, and is made of a material having a coefficient of thermal expansion in the planar direction of the contactor 11 of 1 to 50 ppm / ° C, preferably 2 to 30 ppm / ° C at a temperature of 160 ° C or higher. Is formed. The heat-resistant substrate 11A maintains a collective contact state with little deviation from the thermal expansion of the wafer W even at a high temperature of 160 ° C. or higher, for example, 350 ° C., and ensures electrical conduction. And a reliability evaluation test can be reliably performed. The heat-resistant substrate 11 is made of a heat-resistant resin such as polyimide or bismaleimide triazine, a heat-resistant resin containing a reinforcing material (for example, glass cloth or carbon fiber), a metal such as aluminum, copper, stainless steel, Invar alloy, or Invar. And at least one material selected from conductors such as silicon and ceramics mainly composed of aluminum nitride, silicon carbide and the like. When two or more of these materials are used, the heat resistant substrate 11A can be formed by appropriately combining them. The material for forming the insulating coating 11F is not particularly limited, but for example, a heat resistant resin such as a polyimide resin is preferably used. The insulating coating 11 </ b> F only needs to be formed on the surface excluding the portion that conducts when performing the reliability evaluation test. Further, as shown in FIG. 4, an insulating layer 11G such as a silicon oxide film may be provided on the surface according to the type of the heat resistant substrate 11A.

  The controller 20 can display the test result of the wafer W on the display device as a wafer map (see FIG. 16), and can transmit the test result to the aligner 50 via a data communication line (not shown). It is like that.

  Thus, the aligner is configured as shown in FIGS. 5A and 5B, for example. As shown in FIG. 5A, the unliner 50 includes a loader chamber 51 that stores the wafer W and loads and unloads the wafer W, and is adjacent to the loader chamber 51 via a partition wall, and the wafer W. And an alignment chamber 52 for aligning the contactor 11 and the contactor 11 so that the contactor 11 and the contactor 11 can be brought into contact with each other at the same time. Although not shown, the loader chamber 51 is provided with a transfer mechanism (tweezers) and a preliminary alignment mechanism (sub-chuck), and transfers wafers W one by one from inside the carrier via the tweezers. Thus, after the wafer W is preliminarily aligned (prealignment) on the sub-chuck with reference to the orientation flat or notch, the wafer W is transferred to the alignment chamber 52 via tweezers.

  Further, as shown in FIG. 5A, a head plate 53 is attached to the alignment chamber 52 so as to be openable and closable. The contactor 11 is attached to the head plate 53, and the alignment chamber 52 is connected via the open / close drive mechanism 54. Open and close the top opening. A first opening 53A having a diameter smaller than that of the contactor 11 is formed at the center of the head plate 53, and a fixing mechanism 53B for fixing the contactor 11 is provided on the inner surface (opened upward in FIG. 5). Four pieces are arranged so as to surround the opening 53A. The fixing mechanism 53B includes, for example, a pressing member 53D pivotally mounted in recessed portions 53C formed at four locations around the first opening 53A and a base of the pressing member 53D, as shown in FIG. And an air cylinder 53E connected to the end. When the air cylinder 53E is driven, the pressing member 53D rotates counterclockwise to fix the contactor 11 placed in the first opening 53A to the head plate 53.

  Further, as shown in FIG. 5A, a main chuck 55 movable in the X, Y, Z, and θ directions is disposed below the head plate 53 in the alignment chamber 52, and on the main chuck 55. A wafer W is placed via the wafer holder 32. The main chuck 55 moves in the X and Y directions via the XY stage 56. The main chuck 55 has a built-in rotary lift mechanism (not shown), and moves up and down on the XY stage 56 via the rotary lift mechanism and rotates forward and backward in the θ direction. Then, the pre-aligned wafer W is transferred onto a wafer holder 32 made of a magnetic material such as an iron-based alloy previously placed on the main chuck 55 in the alignment chamber 52 through tweezers in the loader chamber 51. . The wafer holder 32 functions when the wafer W and the contactor 11 integrated by a wafer transfer tool described later are transferred.

  An alignment mechanism (not shown) is disposed in the alignment chamber 52. The alignment mechanism includes an upper camera fixed to the alignment bridge and a lower camera fixed to the main chuck 55 side, and images captured by these cameras. Is displayed on the display device 57. A touch panel is also displayed on the display screen of the display device 57, and the aligner 50 can be operated on the screen. Then, the main chuck 55 is moved to image the electrode pad of the wafer W with the upper camera, and the main chuck 55 is moved to image the bump (see FIG. 3) of the contactor 11 mounted on the head plate 53 with the lower camera. Based on these image data, the electrode pad of the wafer W and the bump of the contactor 11 are aligned. As this alignment mechanism, for example, the technique proposed in Japanese Patent Application No. 10-54423 can be used. Further, the opening / closing drive mechanism 54 is configured such that the contactor 11 and the wafer W are in contact with each other without any deviation, no matter how many times the head plate 53 is opened / closed after alignment.

  Further, the reliability evaluation test result transmitted by data communication with the reliability evaluation test apparatus 10 can be displayed on the display screen of the display device 57 as a wafer map (see FIG. 16). The test results are displayed numerically on the wafer map. Then, the defective part after the test and its state are selected via the wafer map, and this defective device can be observed with a microscope. That is, the head plate 53 is formed with a second opening 53F adjacent to the first opening 53A. A microscope (for example, a maximum magnification of 2000 times or more) (not shown) is mounted on the surface of the second opening 53F, and each device of the wafer W placed on the main chuck 55 is mounted via the microscope. It can be observed. Therefore, after the wafer W tested in the reliability evaluation test apparatus 10 is placed on the main chuck 55 of the aligner 50, the test result from the reliability evaluation test apparatus 10 is transmitted to the aligner 50 via a communication line. . Then, the test result is displayed as a wafer map on the display screen of the display device 57, and if the device used for the test is selected on the screen, the device after the test is moved directly under the microscope by operating the main chuck 55, Voids and the like due to electromigration phenomenon can be observed in a wafer state with a microscope.

  Thus, the wafer W and the contactor 11 that are collectively contacted in the aligner 50 are transferred to the reliability evaluation test apparatus 10 via the wafer transfer tool 60. For example, as shown in FIG. 6, the wafer transfer tool 60 includes a magnetic circuit (not shown) provided in the case 61 and an operation lever 62 pivotally attached to the case 61 for opening and closing the magnetic circuit. And a pair of handles 63 disposed on the left and right of the operation lever 62 and attached to the case. A magnet may be used instead of the magnetic circuit, and the magnet may be moved up and down by the operation lever 62. Accordingly, when the handle operation is performed with the wafer transfer tool placed on the contactor 11 from the first opening 53A of the head plate 53, the magnetic circuit is excited to strongly attract the wafer holder 32, as shown in FIG. Thus, the contactor 11, the anisotropic conductive sheet 31, and the wafer W are integrated without being displaced.

  Next, an embodiment of the reliability evaluation test method of the present invention will be described with reference to FIGS. 5 to 17 together with the operation of the reliability evaluation test system. First, the aligner 50 is used to align the bumps of the contactor 11 with the electrode pads of the wafer W. For this purpose, the head plate 53 is opened via the opening / closing drive mechanism 54, the contactor 11 is mounted to the first opening 53 </ b> A from the inner surface side of the head plate 53 via the fixing mechanism 53 </ b> B, and the wafer holder 32 is mounted on the main chuck 55. Put. Next, the head plate 53 is closed via the opening / closing drive mechanism 54. Thereafter, the wafer W is pre-aligned in the loader chamber 51 via tweezers and a sub chuck, and then the wafer W is placed on the wafer holder 32 via tweezers. Subsequently, the XY stage 56 and the rotation raising / lowering mechanism operate, and the alignment mechanism operates to align the electrode pads of the wafer W and the bumps of the contactor 11. After the alignment is completed, the head plate 53 is temporarily opened, and the anisotropic conductive sheet 31 is disposed on the aligned wafer W. Next, when the opening of the alignment chamber 52 is closed by the head plate 53 via the opening / closing drive mechanism 54, the main chuck 55 is driven and lifted by the rotary lift mechanism, and the bumps of the contactor 11 and the electrode pads of the wafer W are anisotropic. They are collectively contacted via the conductive conductive sheet 31 and integrated as a shell including the wafer holder 32.

  Thereafter, the operator places the wafer transfer tool 60 on the contactor 11 from the first opening 53A of the head plate 53, and excites the magnetic circuit via the operation lever 62 of the wafer transfer tool 60 to start the wafer holder from the contactor 11 side. 32 is attracted by a strong magnetic force, and the contactor 11, the anisotropic conductive sheet 31, the wafer W and the wafer holder 32 are integrated and fixed without being displaced. After the fixing mechanism 53B is released and the head plate 53 is opened, the wafer transfer tool 60 is removed from the main chuck 55 together with the shell, and then transferred to the reliability evaluation test apparatus 10 with the wafer transfer tool 60. Then, the wafer 19 is placed on the heating body 29 of the wafer storage unit 12 drawn out from the housing 19. Next, the pressing mechanism 27 of the wafer storage unit 12 is tilted by a handle operation, and the contactor 11 in the wafer storage unit 12 is pressed and fixed to the seal ring 26 on the connection ring 24 from the outer peripheral edge. By this operation, the wafer W is temporarily brought into contact with the heating body 29 on the mounting table 22 via the wafer holder 32. Further, the outer peripheral edge portion of the contactor 11 is elastically contacted with the seal ring 26 on the connection ring 24 to form an airtight state, and is elastically contacted with the pogo pin 24A of the connection ring 24, so that the contactor 11 and the connection ring 24 are in electrical contact. Next, the magnetic circuit is demagnetized via the operation lever 62 of the wafer transfer tool 60 to release the shell, and after the wafer transfer tool 60 is removed from the contactor 11, the wafer storage unit 12 is pushed into the housing 19.

  After that, when the cylinder mechanism 13D of the pressing mechanism 13 is driven via the controller 20 and compressed air is pressed into the bellows 13B from the through hole 13E, the cylinder moves down together with the pressing plate 13A and the bellows 13B via the cylinder mechanism 13D. Then, the auxiliary heating body 29C on the lower surface of the pressing plate 13A is fitted inside the pressing mechanism 27. The pressing plate 13A reaches the descending end, and the auxiliary heating body 29C on the lower surface of the pressing plate 13A comes into contact with the contactor 11. At this time, as shown in FIG. 7A, the pressing plate 13A pushes down the central portion of the contactor 11 through the auxiliary heating body 29C as shown in the arrow direction by the pressure of the pressurized air in the bellows 13B. Then, the contactor 11 is pressed against the wafer W evenly over the entire surface.

  The bumps 11C of the contactor 11 and the electrode pads of the wafer W are brought into electrical contact with each other through the anisotropic conductive sheet 31 by the pressing force from the pressing plate 13A and the pressing mechanism 27. At this time, as shown in FIG. 7B, even if the contactor 11 is slightly deformed, the contactor 11 is deformed by the pressurized air in the bellows 13B via the auxiliary heater 29C. As shown in FIG. 2A and FIG. 2, in combination with the function of the anisotropic conductive sheet 31, all the bumps of the contactor 11 and all the electrode pads of the wafer W have a uniform pressing force. Electrical contact at once. In the reliability evaluation test, 512 devices can be measured at once using 512 channels, so that the test time can be significantly reduced as compared with the conventional method using a heating furnace.

  If an inert gas is supplied into the wafer storage unit 12 from the air supply hole 22A for a predetermined time (for example, about 30 minutes) in the above-described manner, the air in the wafer storage unit 12 is exhausted from the exhaust hole 22B. An inert gas atmosphere can be formed in 12 to reduce the oxygen concentration to 10 ppm or less, specifically 1 to 5 ppm or less. When this oxygen concentration is reached, even if the electrode pads and the metal wiring of the wafer W are formed of, for example, copper or copper alloy that is easily oxidized, the oxidation of the metal is surely prevented. For example, in the case of a recently used pad P made of copper or copper alloy as shown in FIG. 8A, a long period of time is left until the test after the pad P made of copper or copper alloy is formed on the wafer W. In other words, an oxide film is formed on the surface of the pad P, and it may be difficult to obtain electrical conduction. Even in such a case, if an inert gas such as nitrogen gas is supplied in advance into the wafer storage unit 12 to form an inert gas atmosphere and the oxygen concentration is lowered to about several ppm, then heating is performed. As a result, the electrical connection between the contactor 11 and the wafer W is improved. Further, when the surface of the pad P is remarkably oxidized, if a reducing gas such as hydrogen gas is added to an inert gas such as nitrogen gas to supply several percent, it can be heated at 200 ° C. or higher. The oxide film on the pad P is reduced with a reducing gas, and the electrical connection with the contactor 11 is improved. After the electrical continuity between the contactor 11 and the wafer W is improved in this way, if the contactor 11 is pressurized via the pressing mechanism 13, the contactor 11 and the wafer W are electrically and reliably connected, and the reliability is improved. A high reliability evaluation test can be performed. At this time, an inert gas such as nitrogen gas and a reducing gas such as hydrogen gas are exhausted from the exhaust hole 22B. However, in order to form an inert gas atmosphere in the minimum space in the wafer storage unit 12, The amount of gas used can be minimized.

  As described above, since the reliability evaluation test can be performed at the wafer level in this embodiment, the wafer dicing process and the assembly (packaging) process, which have been performed by a conventional method using a heating furnace, can be omitted. The test time can be shortened and the test cost can be remarkably reduced. In particular, since it is difficult to bond a wire directly to a pad P made of copper or a copper alloy in the assembly process, after the aluminum barrier layer B and the pad layer P1 are provided as shown in FIG. It is necessary to bond L. However, in the present embodiment, since the oxygen concentration in the wafer storage unit 12 can be lowered to about several ppm, the conventional aluminum barrier layer B and pad layer P1 can be omitted as described above, and the test cost can be reduced. Further reduction can be achieved. In addition to the aluminum pad layer in the conventional method, an aluminum barrier layer is necessary because the heating furnace is generally not airtight, so the copper and copper alloy pad parts are oxidized during the test and are electrically This is because continuity cannot be obtained.

  Next, when the heating mechanism 14 is activated, the heating body 29 and the auxiliary heating body 29C are heated, and the wafer W is directly heated from above and below by both of them. Thus, since the wafer W is sandwiched between the heating body 29 and the auxiliary heating body 29C and heated from above and below, the wafer W can be heated to the target temperature (maximum 350 ° C.) in a short time (for example, within 1 hour). In addition, since the wafer storage unit 12 has a heat insulating structure, a temperature drop due to heat radiation from within the wafer storage unit 12 can be remarkably suppressed, and the wafer W can be maintained at the target temperature. Even if heat is radiated from the outer peripheral edge of the contactor 11, the heating body 29 is composed of the first and second heating units 29A and 29B that function individually, so that the outer second heating unit 29B works. The entire surface of the wafer W can be maintained at the target temperature by reliably compensating for the heat radiation from the outer peripheral edge of the contactor 11. At this time, the temperature distribution in the wafer W surface can be suppressed to ± 2.0 ° C. or less in the range of 160 to 350 ° C.

  Thus, when the electromigration test is performed at a high temperature, the connection board 15C of the EM measurement unit 15A is brought into contact with the external connection terminal of the extension portion 25A of the wiring board 25 as shown in FIG. Electromigration measurement is simultaneously performed on 512 devices in the wafer W via 15A, and the test result is analyzed in the tester unit 16. In this case, since the wafer W can be stably maintained at a high temperature of 350 ° C., for example, the movement of metal atoms in the copper wiring of each device can be easily induced, and the test result can be obtained in a short time. Each device can be evaluated in a short time.

  In the case of applying a current when performing an electromigration test, in the present embodiment, three types of currents of direct current, pulse direct current, and alternating current can be applied via the EM measurement unit 15A. In the case of a method using a conventional heating furnace, the current application method is only direct current, or pulse direct current or alternating current. However, the reliability evaluation test apparatus 10 of this embodiment has three types of current application methods. It can correspond to.

When these three types of currents are applied, for example, test patterns formed on the wafer W shown in FIGS. 9A and 9B are used as test patterns. These test patterns are usually the most frequently used. The basic test pattern is a one-end type test pattern having a connection hole at the upstream end with respect to the flow of electrons as shown in (a) of the figure, and an electron test pattern as shown in (b) of the figure. There are both termination type test patterns having connection holes at the upstream and downstream ends of the flow. In the case of the one-end type test pattern shown in FIG. 5A, it is used when electrons flow from the lower layer wiring to the upstream wiring through the connection hole. The test wiring length L is usually 0.5 to 2.0 MA / cm ² as the accelerated test current density. At this time, it is necessary to set the test wiring to such a length that the backflow effect does not occur. The wiring length L is sufficient if it is 50 μm or more, but is preferably 100 to 200 μm, for example. The test wiring width also varies depending on the device and the content of the study. Further, around the wiring to be tested, about 10 dummy wirings are arranged on one side of the normal device and about 20 on both sides. These dummy wirings are designed to avoid the proximity effect in the physography process of the wafer process when the test wiring is thin, and to finish the target wiring width, and during the electromigration test, the metal that is the wiring material blows out from the wiring (Extrusion ). The test is basically a four-terminal measurement and monitored by a blow-out monitor.

First, when using direct current, the one-end type test pattern of FIG. 9A is used, and the wiring length L is set to 100 μm. When the test wiring is copper or a copper alloy, it is preferable to use a test temperature of 250 to 350 ° C. When the wiring is aluminum or an aluminum alloy, a test temperature of 150 to 250 ° C. is preferable. The applied current density is preferably about 0.5 to 3 MA / cm ² so as not to cause a temperature rise due to Joule heat generation. FIG. 10 shows how the relative resistance value changes when the test pattern shown in FIG. 9A is used. As is apparent from this figure, it can be seen that the time during which the resistance value does not increase at all (Incubation Time) is long, and then the resistance value rapidly increases (Growth Time). At this time, for example, the time when the resistance value increases to 10% and 20% is defined as the time to failure (Time To Failure). FIG. 11 shows a failure graph. Although the logarithmic normal distribution is used as the statistical distribution in FIG. 11, the reliability evaluation test apparatus 10 can output the Weibull distribution and the normal distribution in the same manner as the log normal distribution. In FIG. 11, the time to 50% failure is defined as MTF (Median Time to Failure), and the reciprocal of the slope when linearly approximating is the variation in electromigration. These two values are very important parameters for predicting the electromigration lifetime of an LSI.

When using pulse direct current, for example, the pulse direct current shown in FIG. 12 is applied. What is important here is the pulse frequency. As the pulse frequency, for example, about 50 KHz to 10 MHz is necessary, and the reliability evaluation test apparatus 10 of this embodiment corresponds to this. During the electromigration test using pulsed direct current, it is known that the movement mode of metal atoms changes depending on the pulse frequency. In previous reports, the transition frequency is said to be 100 KHz to several MHz. Therefore, the reliability evaluation test apparatus 10 of this embodiment can reliably measure the movement mode of the metal atom. When an alternating current is applied, the duty ratio (t _on / t _cycle ) can be changed while maintaining the frequency and the area of the positive and negative frequency regions as shown in FIG. is important. This is because the behavior of metal atoms frequently occurring in LSI circuits is very similar.

When the electromigration test is performed on the wafer W, 512 devices can be tested simultaneously. On the other hand, in the case of the conventional method using a conventional heating furnace, only about 100 at most can be tested. Therefore, the test capability is improved by 4 to 5 times. In addition, by using the test pattern layout on the wafer W and the test pattern grouping function of the reliability evaluation test apparatus 10, data that is very important from the viewpoint of development of high reliability technology, that is, wiring width dependency (mainly (Diffusion path identification) (see (a) to (c) in FIG. 14), critical length (L _c : Critical Length) (see (a) in FIG. 15), Reservoir length dependence (see (b) in FIG. 15) ) Etc. can be efficiently obtained at once. On the other hand, in the case of the conventional method using a conventional heating furnace, the package must be set several times for each data, and the test is very complicated and it takes a long time to obtain a result. It was.

  Further, by performing a test at the wafer level, output parameters related to reliability, such as TTF and initial resistance value, are distributed in the wafer W plane and output as a wafer map shown in FIG. , The distribution state is immediately known. For example, in FIG. 16, the output result of the device with double squares is a diagram showing the change in relative resistance value shown in FIG. 10, and is a diagram showing the cumulative failure distribution shown in FIG. The change in resistance value over time and the cumulative failure over time are readily apparent. Therefore, the target data can be obtained efficiently in a short time based on the test result, and the data analysis can be performed efficiently and accurately in the tester unit 16 in a short time. On the other hand, in the case of the conventional method using the conventional heating furnace, after dicing the wafer, it takes time and effort to fill out the device when taking out the device and putting it in the package. May occur.

  Further, after the electromigration test, the test result can be transmitted from the reliability evaluation test apparatus 10 to the aligner 50 by data communication, and the test result can be taken into the aligner 50. Since the aligner 50 is provided with an alignment camera and a microscope, after the wafer W after the test is set in the alignment chamber 52, the defective product is aligned directly below the microscope through the alignment mechanism. Defects due to electromigration such as voids can be observed immediately. In addition, 512 test patterns can be stored as observation results. Also, for example, if there is something with a strange resistance behavior on the wafer map, the image can be immediately displayed on the screen of the display device 57. The aligner 50 can operate the camera in the manual mode as necessary, and can observe the defective portion and its vicinity at a high magnification. Furthermore, if the resistance behavior to be extracted in advance, the occurrence location of voids, etc. are designated, they can be automatically listed after the void observation by the aligner 50 after the test. On the other hand, in the case of the conventional method using a conventional heating furnace, devices are taken out from the package and are observed one by one with a microscope, so that much labor and time are required for observation.

When performing the electromigration test, the temperature distribution in the wafer W surface is controlled within ± 2.0 ° C. within a range of 160 to 350 ° C., for example. The electromigration test is performed under accelerated conditions of temperature and current density, and MTF and variation σ are obtained as test results. Furthermore, the acceleration parameters E _a (Activation energy) and n (Current exponent) are obtained by changing the temperature condition and the current density condition, and finally J _use (Use current dentisy at operating condition) is obtained. The larger this J _{use, the} better. n takes between 1 (growth time component) and 2 (incubation time component) from the principle of electromigration, and changes depending on how much the test pattern is completed and the relative resistance changes to determine what percentage is defective. E _a is an activation energy for diffusion, and is determined by what material and process form the test pattern. Ea and n are determined on the wafer W side, not on the reliability evaluation test apparatus 10 side. On the other hand, there is a variation σ as an influence of the performance of the reliability evaluation test apparatus 10. FIG. 17 shows the degree of influence of MTF and σ on J _use . As can be seen from FIG. 17, the influence of the variation σ is extremely large. In other words, if σ is large, for example, if σ is 0.5 or more, it does not make sense to have an MTF that is long. The variation σ may be caused by the wafer W (LSI manufacturing process) or by the reliability evaluation test apparatus 10. The smaller the variation σ caused by the reliability evaluation test apparatus 10, the better. There are two types of variations σ generated from the reliability evaluation test apparatus 10, which are caused by temperature distribution in the wafer W surface and those caused by current variations. In Figure 18 (a), (b) is a diagram showing a _{J use} loss due to variations in the current, respectively, a _{J use} loss due to the temperature distribution (variation). As can be seen from these calculation results, the loss due to the temperature distribution is very large. Therefore, in the reliability evaluation test apparatus 10, the temperature distribution is within ± 2.0 ° C. even at a high temperature of 350 ° C. by directly and evenly heating the entire surface of the wafer W in a very narrow space using the heating mechanism 14. It comes to suppress. Therefore, a highly reliable electromigration test can be performed by significantly suppressing variations caused by the reliability evaluation test apparatus 10.

In addition to the electromigration test described above, leakage current measurement (Bias-Temperature Testing: BT test) or TDDB (Time
When performing a Dependent Dielectric Breakdown) test, the connection board 15C of the EM measurement unit 15A is switched to the connection board 15D of the BT measurement unit 15B via a switching mechanism, and a completely different test can be performed with one apparatus. . Accordingly, the conventional assembly process can be omitted, and a large number of devices can be tested at one time, so that the test cost can be reduced and the test efficiency can be greatly increased.

  An example of a test pattern used for the leak current test is shown in FIGS. The test pattern in this case is basically a plane pattern or a wiring pattern between wirings different from the comb pattern as shown in FIG. In (b) and (d) of the figure, the hatched portions indicate the cross sections of the wirings from the direction indicated by the alternate long and short dash lines in FIGS. (A) and (b), respectively. ) And (d) □ indicate connection holes with the upper wiring. In the leak current test, a voltage is applied while keeping the wafer W at a certain temperature, and a change in the leak current between the wirings is monitored over time. The time when the leakage current reaches a certain value is the time until the sample becomes defective. Similar to the electromigration test, the distribution of time to failure is plotted. In the case of the leakage current test, the Weyl distributions agree well. In this case as well, in the same way as in the electromigration test, a large number of devices can be measured at once, and each test result can be grouped according to the test pattern. Data can be acquired. Further, when the contactor 11 is manufactured, the electromigration test and the leak current test can be performed simultaneously by arranging the positions of the pads for the electromigration test and the leak current test in the same contactor 11. However, the acceleration temperature of the electromigration test and the leakage current test is limited to the same temperature. When the acceleration temperatures of the electromigration test and the leakage current test are different, it is necessary to properly use the reliability evaluation test apparatus 10.

  As described above, according to the present embodiment, the heat resistant substrate having the heat resistant substrate 11A and the conductor circuit 11B formed on the heat resistant substrate 11A and performing a reliability evaluation test at a temperature of 160 ° C. or higher. 11B includes a contactor 11 having a thermal expansion coefficient of 1 to 50 ppm / ° C., a wafer holder 32, and a wafer W placed on the wafer holder 32. The contact pad portion 11D of the contactor 11 and the electrode pad of the wafer W Since the wafer holder 32, the wafer W, and the contactor 11 are integrated in a state where they are collectively contacted with each other, the wafer holder 12 of the reliability evaluation test apparatus 10 can be easily placed on the wafer holder 12. 13, the contactor 11 and the wafer W are pressed and electrically connected securely, and the wafer W is heated by the heating mechanism 14 to 160 ° C. or higher. For example, there is almost no difference in thermal expansion with the wafer W even at a high temperature of 350 ° C., and the electrical connection between the contactor 11 and the wafer W can be ensured. 512 devices can be subjected to reliability evaluation tests such as an electromigration test and a leakage current test. Therefore, it is possible to reduce the process of dicing the wafer W in units of devices and the assembly process thereof as in the prior art, to reduce the test cost, and to perform a plurality of types of reliability evaluation tests efficiently in a short time.

  Further, since the thermal expansion coefficient in the plane direction of the heat-resistant substrate is 1 to 50 ppm / ° C., preferably 2 to 30 ppm / ° C., misalignment due to the thermal expansion of the contactor 11 and the wafer W is prevented even at a high temperature of 160 ° C. or higher. As a result, the electrical connection between the bump 11C and the connection pad 11D of the contactor 11 and the electrode pad of the wafer W can be ensured. Moreover, since the heat resistant substrate 11A is formed of at least one selected from heat resistant resin, metal, semiconductor, and ceramic, the coefficient of thermal expansion of the heat resistant substrate 11 is suppressed to a range of 1 to 50 ppm / ° C. Can do. Further, the heat resistant resin of the heat resistant substrate is formed from at least one selected from heat resistant resins including polyimide, bismaleimide triazine, glass cloth, or carbon fiber as a reinforcing material, and the metal of the heat resistant substrate 11A is aluminum, When the ceramic of the heat-resistant substrate is made of aluminum nitride or silicon carbide, the thermal expansion of the contactor 11 is further suppressed when formed from at least one selected from copper, stainless steel, invar alloy, and invar. Can do.

  Further, since the insulating coating 11F is provided on the surface of the contactor 11 excluding the conductive portion when performing the reliability evaluation test such as the bump 11C and the connection pad portion 11E, an extra electrical connection between the contactor 11 and the wafer W is provided. Contact can be prevented, stable electrical continuity can be ensured between the contactor 11 and the wafer W, and a reliability evaluation test can be reliably performed.

  In addition, when silicon is used as the heat resistant substrate 11A, for example, a silicon oxide film is formed as an insulating layer 11G on the surface thereof, so that insulation between the heat resistant substrate 11A and the conductor circuit 11B can be ensured. Stable reliability evaluation test can be performed.

  Further, since the anisotropic conductive sheet 31 is interposed between the connection pad portion 11E of the contactor 11 and the electrode pad portion of the wafer W, the contactor 11 is pressed even if it is deformed to be slightly waved. By means of the mechanism 13 and the anisotropic conductive sheet 31, all the bumps of the contactor 11 and all the electrode pads of the wafer W can be reliably brought into electrical contact with equal pressing force. Further, since the wafer holder 32 contains a magnetic material, when the shell is transferred by the wafer transfer tool 60, the shell is firmly integrated via the holder 32 and is transferred as a shell to the wafer storage unit 12 in a stable state. As a result, the reliability evaluation test can be performed more reliably.

  A method and performance in the case of manufacturing a contactor constituting the shell of the present invention will be specifically described with reference to FIGS.

Example 1
In this embodiment, the case where the contactor 11 shown in FIG. 3 is manufactured will be described. First, for example, spray drying a composition comprising 100 parts by weight of aluminum nitride powder having an average particle diameter of 0.6 μm, 4 parts by weight of yttria powder having an average particle diameter of 0.4 μm, 12 parts by weight of an acrylic resin binder, and 20 parts by weight of alcohol. A granular composition powder was prepared. Next, this granular composition powder was put into a mold and molded into a flat plate shape to obtain a molded body (green). This molded body was hot-pressed at 1890 ° C. and a pressure of 15 MPa for 10 hours to obtain an aluminum nitride sintered body having a thickness of 5 mm. The sintered body was cut into a disk shape having a diameter of 310 mm to obtain a heat resistant substrate 11A shown in FIG. The thermal expansion coefficient in the planar direction of the heat resistant substrate 11A was 4.5 ppm / ° C.

Next, copper was sputtered onto the surface of the heat resistant substrate 11A using a sputtering apparatus, and a copper thin film 11B ₁ having a thickness of 5 μm was formed as shown in FIG. Further, after laminating the copper thin film 11B ₁ with the laminating film 101, the laminating film 101 was exposed and developed to form an etching resist film 101 having an opening 101A where the copper thin film 11B ₁ was partially exposed. (See (c) in the figure). Thereafter, the copper thin film 11B1 other than the portion where the etching resist film 101 was formed was removed using a 55 ° C. HF / HNO ₃ aqueous solution (HF / HNO ₃ / water = 1/1/2) (FIG. d)), the etching resist film 101 was removed, and a conductor circuit 11B made of metallic copper was formed (see (e) in FIG. 4).

Next, a liquid resist for bump formation is applied to the main surface of the heat-resistant substrate 11A (the surface on which the conductor circuit 11B is formed) using a spin coating method, and then dried at a temperature of 160 ° C. for 20 minutes. A film was formed. Next, the resist coating film was exposed and developed to form a plating resist film 102 having bump forming openings 102A as shown in FIG. Then, (see Fig. (B)) was subjected to nickel plating 11C ₁ to the conductor circuit 11B from the opening 102A in a electroless nickel plating bath, the resist film for plating as shown in the same figure (c) The bumps 11C for connecting to the wafer W were formed by removing 102. Further, a nickel plating film 103 was applied to the conductor circuit 11A and the bump 11C (see FIG. 4D).

Further, as shown in FIG. 22A, a solution of a photosensitive cardo polymer whose viscosity is adjusted to 30 Pa · s in advance using a spin coating method is applied to the entire surface of the nickel plating film 103 and the heat resistant substrate 11A. Thereafter, the photoresist film 104 was formed by drying at a temperature of 160 ° C. for 20 minutes. Next, as shown in FIGS. 2B and 2C, a photoetching mask having black circles drawn on the portions corresponding to the bump openings is placed on the photoresist film 104, and then ultraviolet rays are applied at 400 mJ / Irradiation was performed under conditions of cm ² to expose and develop the photoresist film 104, thereby forming a connection opening 104 A for connection to the wafer W. Furthermore, noble metal (for example, gold) plating 105 was applied from the opening 104A to the bump 11C and the conductor circuit 11B as shown in FIG. The conductor circuit 11B and the bumps 11C are formed on the heat resistant substrate 11A by a series of these processes. Although not shown, an opening for exposing the connection pad portion 11E for connection to the pogo pin 24A of the reliability evaluation test apparatus 10 is formed in the same manner as the above-described series of processes (FIG. 3). (Refer to (a) and (b)). The bump had a square shape, and the maximum length in the pitch direction was 75 μm.

Example 2
In this embodiment, a method for manufacturing the contactor 11 shown in FIG. 4 will be described. For example, spray drying a composition comprising 100 parts by weight of silicon carbide powder having an average particle size of 1.1 μm, 0.5 parts by weight of boron carbide powder as a sintering aid, 12 parts by weight of an acrylic resin binder, and 20 parts by weight of alcohol. A granular composition powder was prepared. Next, this granular composition powder was put into a mold and molded into a flat plate shape to obtain a molded body (green). This molded body was hot-pressed at 2100 ° C. and a pressure of 17.6 MPa for 10 hours to obtain a silicon carbide ceramic substrate having a thickness of 3 mm. The ceramic substrate was immersed in a silicon solution melted at 1500 ° C., and the ceramic substrate was impregnated with the silicon solution. Next, this ceramic substrate was cut out from the surface into a disk shape having a diameter of 210 mm to obtain a composite substrate. The thermal expansion coefficient in the planar direction of the composite substrate was 3.6 ppm / ° C. After applying a glass paste (G-523N: manufactured by Shoei Chemical Industry Co., Ltd.) to this composite substrate, it was baked at 600 ° C. for 1 hour to have a thickness of 2 μm on the surface of the composite substrate mainly composed of silicon carbide. A silicon oxide film 11G was formed to obtain a heat resistant substrate 11A (see FIG. 4). Then, the conductor circuit 11B and the like are formed on the main surface of the heat resistant substrate 11A according to the above-described process.

That is, copper was sputtered on the surface of the heat resistant substrate 11A using a sputtering apparatus to form a copper thin film having a thickness of 5 μm. Further, after laminating the copper thin film with the laminating film, the laminating film was exposed and developed to form an etching resist film in which the copper thin film was partially exposed. Thereafter, the copper thin film other than the portion where the etching resist film is formed is removed using a 55 ° C. HF / HNO ₃ aqueous solution (HF / HNO ₃ / water = 1/1/2), and then the etching resist film is removed. Thus, a conductor circuit 11B made of metallic copper was formed.

Next, a solution of a photosensitive cardo polymer whose viscosity has been adjusted to 30 Pa · s in advance using a spin coating method is applied to the entire main surface of the heat-resistant substrate 11A, and then dried at a temperature of 150 ° C. for 20 minutes. A resin layer made of a semi-cured film of a mold polymer was formed. Next, a photoetching mask having black circles drawn on the opening portion corresponding to the pad portion 11E for connection to the pad portion of the wafer W and the pogo pin 24A of the reliability evaluation test apparatus 10 was placed on the resin layer. Thereafter, the resin layer is exposed and developed by irradiating with ultraviolet rays at a condition of 400 mJ / cm ² , and the connection opening for connecting to the wafer W and the pogo pin 24A of the reliability evaluation test apparatus 10 are connected. An opening for exposing the connection pad portion 11E was formed. Thereafter, the resin layer was fully cured at 250 ° C. for 120 minutes to form an insulating coating 11F. Further, a contactor 11 shown in FIG. 4 was obtained by forming a gold layer having a thickness of 0.03 μm on the pad portion using a gold plating bath.

Example 3
In this example, a polyimide substrate containing glass cloth (coefficient of thermal expansion in the plane direction of 30 ppm / ° C.) was used as the substrate material. This substrate was manufactured by impregnating a glass cloth with a polyimide resin, drying it at 80 ° C. for 1 hour, laminating 10 sheets of prepreg as a B stage, and heating and pressing at 7.8 MPa, 120 ° C. for 1 hour. is there. That is, copper was sputtered on the surface of the polyimide substrate using a sputtering apparatus to form a copper thin film having a thickness of 5 μm. Furthermore, after laminating a copper thin film with a resist film (DF manufactured by Tokyo Ohka Kogyo Co., Ltd.), it was exposed and developed to form an etching resist film in which the copper thin film was partially exposed. Thereafter, the copper thin film other than the portion where the etching resist film is formed is removed using a 55 ° C. HF / HNO ₃ aqueous solution (HF / HNO ₃ / water = 1/1/2), and then the etching resist film is removed. Thus, a conductor circuit made of metallic copper was formed.

Next, a photosensitive cardo polymer whose viscosity has been adjusted to 30 Pa · s in advance using a spin coating method is applied to the entire main surface of the polyimide substrate, and then dried at a temperature of 150 ° C. for 20 minutes. A resin layer made of a semi-cured film was formed. Next, a photoetching mask having black circles drawn on the opening portion corresponding to the pad portion 11E for connection to the pad portion of the wafer W and the pogo pin 24A of the reliability evaluation test apparatus 10 was placed on the resin layer. Thereafter, the resin layer is exposed and developed by irradiating with ultraviolet rays at a condition of 400 mJ / cm ² , and the connection opening for connecting to the wafer W and the pogo pin 24A of the reliability evaluation test apparatus 10 are connected. An opening for exposing the connection pad portion 11E was formed. Thereafter, the resin layer was fully cured at 250 ° C. for 120 minutes to form an insulating coating 11F. Further, a gold layer is formed on the surface of the connection pad portion with the wafer W and the connection pad portion with the reliability evaluation test apparatus 10 using a gold plating bath, and a spire-like gold bump is formed using a wire bonding apparatus. A contactor was obtained by forming.

Comparative Example 1
In this comparative example, carbon fiber was used as the substrate material. For example, carbon fiber (Toray-made T-300 equivalent: fiber diameter 15 μm) and phenol resin are mixed and hot-pressed in nitrogen gas at a temperature of 1000 ° C. and a pressure of 19.6 Pa, and the thermal expansion coefficient in the plane direction A carbon substrate of 0.9 ppm / ° C. was obtained as a heat resistant substrate. A glass paste (G-523N manufactured by Shoei Chemical Industry Co., Ltd.) was applied to the carbon substrate and baked at 600 ° C. for 1 hour to form a silicon oxide film having a thickness of 2 μm on the surface.

Copper was sputtered onto the surface of the heat resistant substrate using a sputtering apparatus to form a copper thin film having a thickness of 5 μm. Furthermore, after laminating a copper thin film with a resist film (DF manufactured by Tokyo Ohka Kogyo Co., Ltd.), it was exposed and developed to form an etching resist film in which the copper thin film was partially exposed. Thereafter, the copper thin film other than the portion where the etching resist film is formed is removed using a 55 ° C. HF / HNO ₃ aqueous solution (HF / HNO ₃ / water = 1/1/2), and then the etching resist film is removed. Thus, a conductor circuit made of metallic copper was formed.

Next, a photosensitive cardo type polymer solution whose viscosity has been adjusted to 30 Pa · s in advance using a spin coating method is applied to the entire main surface of the heat-resistant substrate, and then dried at 150 ° C. for 20 minutes to form a photosensitive cardo type. A resin layer made of a semi-cured polymer film was formed. Next, a photoetching mask having black circles drawn on the opening portion corresponding to the pad portion 11E for connection to the pad portion of the wafer W and the pogo pin 24A of the reliability evaluation test apparatus 10 was placed on the resin layer. Thereafter, the resin layer is exposed and developed by irradiating with ultraviolet rays at a condition of 400 mJ / cm ² , and the connection opening for connecting to the wafer W and the pogo pin 24A of the reliability evaluation test apparatus 10 are connected. An opening for exposing the connection pad was formed. Thereafter, the resin layer was fully cured at 250 ° C. for 120 minutes to form an insulating coating 11F. Further, a contactor was obtained by forming a gold layer having a thickness of 0.03 μm on the surface of the connection pad portion with the wafer W and the connection pad portion with the reliability evaluation test apparatus 10 using a gold plating bath.

Comparative Example 2
This comparative example is the same as Comparative Example 1 except that a phenol resin plate is used. This phenolic resin plate is obtained by placing uncured phenolic resin in a fluororesin mold and curing it at 120 ° C. The thermal expansion coefficient in the plane direction of this substrate was 60 ppm / ° C.

  The contact ratio between the wafer W and the contactor at 25 ° C. and 250 ° C. was determined using a bump array sheet for the contactors obtained in the above Examples and Comparative Examples, and the results shown in Table 1 below were obtained. According to the results shown in Table 1 below, it was found that the contactors 11 of Examples 1 and 2 both showed a contact rate of 100% and could be used at a high temperature of 250 ° C. On the other hand, in Comparative Examples 1 and 2, a contact rate of 100% was exhibited at a temperature of about room temperature, but it was found that it could not withstand use at a high temperature of 250 ° C.

  The present invention is not limited to the above-described embodiment, and the design of each component can be changed as appropriate within the scope of the present invention. The shell of the present invention is not limited to the above embodiment. For example, the invention includes any heat-resistant substrate having a thermal expansion coefficient of 1 to 50 ppm / ° C. in the planar direction of the contactor of the shell. Needless to say, the shell of the present invention can be used for purposes other than the reliability evaluation test. In this embodiment, it is preferable that the anisotropic conductive sheet 31 is interposed between the contactor 11 and the wafer W. However, the bumps of the contactor 11 and the electrode pads of the wafer W are elastically in contact with each other. If so, the anisotropic conductive sheet 31 may not be interposed.

  The shell of the present invention can be suitably used for a reliability evaluation test of a semiconductor wafer.

It is a figure which shows an example of the reliability evaluation test apparatus for performing a reliability evaluation test using one Embodiment of the shell of this invention, (a) is a block diagram which shows the principal part, (b) shows a controller. It is a perspective view. It is sectional drawing which shows the principal part of the state which performs the reliability evaluation test of a wafer using the reliability evaluation test apparatus shown in FIG. It is a figure which shows the contactor used for one Embodiment of the shell of this invention, (a) is the sectional drawing, (b) is the top view. It is sectional drawing which shows the contactor used for other embodiment of the shell of this invention. It is a figure which shows an example of the aligner which aligns a wafer and a contactor and integrates as a shell, (a) is a perspective view which shows the external appearance, (b) is sectional drawing which shows a fixing mechanism. It is a side view which shows the state which adsorb | sucked the shell using the wafer conveyance tool. (A) is a schematic diagram showing a side surface of the contactor constituting the shell and the wafer in contact with each other through the pressing mechanism shown in FIG. 2, and (b) is a side view exaggerating the state in which the contactor is bent. is there. (A) is sectional drawing which expands and shows the electrode pad part in the copper wiring of the wafer of the shell used by the reliability evaluation test method, (b) is used by the reliability evaluation test method performed using the conventional heating furnace. It is sectional drawing which expands and shows the electrode pad part in the copper wiring of the wafer used. It is a top view which shows the test pattern on the wafer used for an electromigration test, (a) is a figure which shows a single terminal type, (b) is a figure which shows both terminal types. It is a graph which shows the relative resistance change during an electromigration test, and the relationship of test time. It is a graph which shows the accumulation defect by an electromigration test. It is a waveform of the electric current applied in the electromigration test using pulse direct current. It is the waveform of the alternating current applied in the electromigration test using alternating current. (A)-(c) is a figure which shows the relationship of the wiring width dependence of a main diffusion path and MTF, respectively. (A) is a graph which shows a critical length measurement result, (b) is a graph which shows Reservoir length dependence of MTF. It is a figure showing a wafer distribution of TTF and initial resistance. It is a graph which shows the influence which it has on Muse of MTF and (sigma). (A) is a graph which shows the Juse loss by the variation in electric current, (b) is a graph which shows the Juse loss by temperature distribution. It is a figure which shows an example of the test pattern used by BT test (TDDB test), (a) is a top view which shows the pattern of upper layer wiring, (b) is sectional drawing of (a), (c) is the pattern of lower layer wiring (D) is sectional drawing of (c). It is a figure which shows the process of manufacturing the contactor which comprises the shell of this embodiment. It is a figure which shows the contactor manufacturing process following the process shown in FIG. It is a figure which shows the contactor manufacturing process following the process shown in FIG.

Explanation of symbols

11 Contactor 11A Heat Resistant Substrate 11B Conductor Circuit 11C Bump 11D Connection Pad 11F Insulating Coating 11G Silicon Oxide Film (Insulating Layer)
31 Anisotropic conductive sheet 32 Wafer holder W Wafer

Claims (11)

A heat resistant substrate and a conductor circuit having a connection pad portion formed on the heat resistant substrate, and is used when performing a reliability evaluation test of a semiconductor wafer at a temperature of 160 ° C. or higher, and the thermal expansion of the heat resistant substrate. A shell comprising a contactor having a rate of 1 to 50 ppm / ° C. and a wafer holder formed of a magnetic material and holding the semiconductor wafer, wherein the shell is used when the reliability test is performed. state in which the semiconductor wafer is placed on the holder, a plurality of electrode pads of a plurality of connection pad portions and the semiconductor wafer of the contactors collectively contact, the semiconductor wafer is interposed between the wafer holder and the contactor in a magnetic circuit or is brought into contact with the wafer transfer device having a magnet to the contactor, the Uehaho by the magnetic circuit or magnetic force of the magnet Shell the loaders by suction into the contactor side above the wafer holder, the semiconductor wafer and the contactor is characterized by being integrated to be conveyed.   The shell according to claim 1, wherein the thermal expansion coefficient of the heat resistant substrate is a thermal expansion coefficient in a plane direction. The thermal expansion coefficient of the heat resistant substrate, the shell according to 請 Motomeko 2 it is a 2~30ppm / ℃.   The shell according to claim 1, wherein the conductor circuit has a bump.   The heat-resistant substrate is formed of at least one selected from a heat-resistant resin, a metal, a semiconductor, and a ceramic. When at least a metal or a semiconductor is selected as the heat-resistant substrate, The shell according to claim 1, wherein an insulating layer is formed between the conductor circuits. The heat- resistant resin selected as the heat-resistant substrate is at least one heat-resistant resin selected from polyimide, bismaleimide triazine, or a heat resistant resin containing glass cloth or carbon fiber as a reinforcing material. The shell according to claim 5. 6. The shell according to claim 5, wherein the metal selected as the heat resistant substrate is at least one metal selected from aluminum, copper, stainless steel, Invar alloy, and Invar. The shell according to claim 5, wherein the ceramic selected as the heat resistant substrate is aluminum nitride or silicon carbide. The shell according to any one of claims 1 to 8, wherein an insulating film is provided on a surface of the heat resistant substrate other than the connection pad portion and the bump.   6. The shell according to claim 5, wherein the insulating layer is a silicon oxide film.   11. The shell according to claim 1, wherein an anisotropic conductive film is interposed between the connection pad portion of the contactor and the electrode pad portion of the semiconductor wafer. .

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