JP4661601B2 - Semiconductor device and inspection method thereof - Google Patents

Description

  The present invention relates to a semiconductor device in which an element region is surrounded by an insulating isolation trench formed in a substrate and an inspection method thereof.

  2. Description of the Related Art Conventionally, a method for inspecting a defect in an insulating isolation trench in a semiconductor device in which an element region is surrounded by an insulating isolation trench formed on a substrate is known (see Patent Document 1).

In Patent Document 1, an insulating isolation trench (insulating isolation region) reaching from the surface to the insulating layer is formed in a form surrounding the element region with respect to the semiconductor layer disposed on the supporting substrate via the insulating layer, The element region and the field region are insulated and separated. A predetermined voltage is applied between the element region and the field region to detect a leak current flowing between the element region and the field region. That is, a defect in the isolation isolation trench is detected (insulation breakdown voltage is inspected) based on the presence or absence of leakage current.
JP-A-8-83830

  By the way, in a semiconductor device, an element region may be surrounded by a plurality of insulating isolation trenches in order to achieve a high breakdown voltage. In such a configuration in which a plurality of isolation trenches are provided so as to surround multiple element regions, even if the inspection method shown in Patent Document 1 is adopted, the element region and the field are not limited unless all the isolation trenches are defective. Leakage current does not flow between regions. That is, even if some of the plurality of insulating isolation trenches are defective, they cannot be detected.

  In view of the above problems, an object of the present invention is to provide a semiconductor device that can be detected even when a part of a plurality of insulating isolation trenches has a defect, and an inspection method thereof.

  In order to achieve the above object, the invention described in claim 1 is a semiconductor device in which an element region is surrounded by an insulating isolation trench formed in a substrate, and the insulating isolation trench surrounds the element region in multiple layers. The substrate has at least one region formed between adjacent isolation trenches, and each of the element region, the region between the isolation trenches, and the outer region of the isolation trench is insulated. Prior to the defect inspection of the isolation trench, regions in a positional relationship with two insulating isolation trenches in between are electrically connected to the same electrode, and each region is one of the two electrodes including the electrode. The regions are electrically connected to each other through wiring, and each region is electrically isolated in a state after the defect inspection of the insulating isolation trench.

  As described above, according to the present invention, each region from the element region to the outer region is electrically connected to one of the two electrodes before the defect inspection of the isolation trench, and one isolation isolation Two regions adjacent to each other with the trench interposed therebetween are electrically connected to one of the different electrodes, and each other region is electrically connected every other region. Therefore, by applying a predetermined voltage to the two electrodes, it is possible to detect a leak current flowing between two adjacent regions with one insulating isolation trench interposed therebetween. That is, even when a part of the plurality of insulating isolation trenches has a defect, the defect can be detected. Since each region is electrically isolated after the defect inspection, the element performs a desired function, and a high breakdown voltage can be realized by a plurality of insulating isolation trenches.

  In addition, by applying a predetermined voltage to the two electrodes regardless of the number of regions formed between adjacent insulating isolation trenches (that is, the number of insulating isolation trenches), a defect is caused in a part of the plurality of insulating isolation trenches. Even in some cases, defects are detected. That is, the number of electrodes for defect inspection is set to the minimum necessary number. Therefore, the size of the semiconductor device can be reduced.

  According to a second aspect of the present invention, the substrate is a semiconductor layer disposed on the support substrate via the insulating layer, and the insulating isolation trench adopts a configuration extending in a manner connected to the insulating layer. be able to.

  According to a third aspect of the present invention, at least one of the wirings connected to the electrode is provided with an isolation region that is easier to cut than other regions of the wiring before the defect inspection of the insulation isolation trench. In a state after the defect inspection of the insulation isolation trench, it is preferable that the wiring is separated in the isolation region.

  As described above, since a separation region that is easier to cut and separate than other regions is provided in a part of the wiring, the separation region is cut and separated (for example, by laser light) after defect inspection, and each region can be easily electrically connected. In an independent state. As the isolation region, for example, a region in which a thin film resistor is connected between the wirings may be adopted as described in claim 4. If it is a thin film resistor, it can be easily cut by laser light, for example.

  In addition, as described in claim 5, the outer region of the insulating isolation trench may be electrically connected to the electrode even after the defect inspection of the insulating isolation trench. For example, an electrode for fixing the outer region to a predetermined potential can be employed as one of the two electrodes.

  In the method for inspecting a semiconductor device according to claims 6 to 10, the operation and effect thereof are the same as the operation and effect of the semiconductor device according to claims 1 to 5, respectively.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(First embodiment)
FIG. 1 is a diagram schematically showing the main part of the planar layout of the semiconductor device according to the first embodiment of the present invention. FIG. 2 is a diagram schematically showing a cross-sectional structure of a main part of the semiconductor device.

  As shown in FIG. 1, the semiconductor device 100 is a semiconductor device having a configuration in which an element region 130 is surrounded by an insulating isolation trench 120 formed in a substrate 110.

  In the present embodiment, as a substrate 110, an SOI (Silicon On Insulator) substrate in which an insulating film is embedded is disposed on a support substrate 112 made of single crystal silicon via an insulating layer 111 made of a silicon oxide film. The semiconductor layer 110 obtained by adding impurities to single crystal silicon is employed.

  A plurality of insulating isolation trenches 120 are formed in the semiconductor layer 110 so as to surround the element region 130 in a multiple manner. In the present embodiment, four insulating isolation trenches 121 to 124 are formed as the insulating isolation trench 120. Each of the insulating isolation trenches 120 (121 to 124) is extended in a manner connected to the insulating layer 111, and the region surrounded by the innermost insulating isolation trench 121 and the insulating layer 111 is an element region. 130.

  Reference numeral 140 denotes an inter-trench region surrounded by the adjacent insulating isolation trench 120 and the insulating layer 111, and reference numeral 141 denotes the first trench between the insulating isolation trench 121 and the adjacent insulating isolation trench 122 described above. Reference numeral 142 denotes a second inter-trench region between the isolation trench 122 and the isolation trench 123, and reference numeral 143 denotes a third inter-trench region between the isolation trench 123 and the isolation trench 124.

As described above, the element region 130 is electrically separated from the field region 150 which is the peripheral region on the outer peripheral side of the insulating isolation trench 120 by the insulating isolation trench 120 and the insulating layer 111, and elements such as transistors and diodes are provided. Is formed. In the present embodiment, an npn transistor is shown in FIG. 2 as an example of the element. Reference numeral 130a denotes an n ⁺ region collector, reference numeral 130b denotes a p ⁺ region base, and reference numeral 130c denotes an n ⁺ region emitter. The field region corresponds to the outer region of the isolation trench 120 shown in the claims.

  Further, in the above configuration, in order to inspect the presence / absence of defects in the insulating isolation trench 120 (that is, to ensure a withstand voltage), two predetermined voltages for inspection are applied on the field region 150 (on an interlayer insulating film not shown). Electrode pads 160 and 161 are formed. The electrode pads 160 and 161 correspond to the electrodes shown in the claims. The element region 130, the inter-trench region 140 (141 to 143), and the field region 150 are electrically connected to either one of the two electrode pads 160 and 161 before the insulation isolation trench 120 is inspected for defects. Among the regions 130, 140, and 150, two regions adjacent to each other with one insulating isolation trench 120 interposed therebetween are electrically connected to different electrode pads 160 (161). , Every other region is electrically connected.

  Specifically, the element region 130, the second inter-trench region 142, and the field region 150, which are in a positional relationship with the two insulating isolation trenches 120 interposed therebetween with respect to the first electrode pad 160, are not illustrated. They are electrically connected via wirings 170, 171, and 172 formed on the insulating film. In addition, a first inter-trench region 141 and a third inter-trench region 143 are formed on an interlayer insulating film (not shown), which are in a positional relationship with the second electrode pad 161 sandwiching two insulating isolation trenches 120 therebetween. The wirings 173 and 174 are electrically connected. That is, the element region 130, the second inter-trench region 142, and the field region 150 have the same potential, and the first inter-trench region 141 and the third inter-trench region 143 have the same potential. In the present embodiment, an electrode pad for fixing the field region 150 to a predetermined potential is also used as the first electrode pad 160. Therefore, the second electrode pad 161 is added as an inspection electrode.

As shown in FIGS. 1 and 2, n ⁺ contact regions 141a to 143a for making ohmic contacts with the corresponding wirings 171, 173 and 174 are formed in the inter-trench regions 141 to 143, respectively. In the field region 150, an n ⁺ contact region 150a for making ohmic contact with the wiring 172 is also formed. In the element region 130, as described above, the collector 130 a is formed as an n ⁺ high concentration region in order to make ohmic contact with the wiring 170.

  In addition, the wirings 170 to 174 are formed with isolation regions 180 that are easier to cut than the other regions of the wirings 170 to 174 in a state before the defect inspection of the insulating isolation trench. Specifically, a region where the thin film resistors 181 to 185 are connected between the wirings is employed as the separation region 180. The wirings 170 to 174 according to this embodiment are made of an Al-based material (for example, AlSiCu) and have a thickness of several hundred μm. In contrast, the thin film resistors 181 to 185 are made of CrSi and have a thickness of about 10 to 20 μm. Therefore, after the defect inspection, the separation region 180 (thin film resistors 181 to 185) can be easily cut and the regions 130, 140, and 150 can be electrically separated. The thin film resistor 181 is formed on the wiring 170, the thin film resistor 182 is formed on the wiring 171, the thin film resistor 183 is formed on the wiring 172, the thin film resistor 184 is formed on the wiring 173, and the thin film resistor 185 is formed on the wiring 174.

  In the semiconductor device 100 having such a configuration, when inspecting the presence / absence of a defect in the insulating isolation trench 120, a test voltage having a level corresponding to the guaranteed breakdown voltage is applied between the electrode pads 160 and 161 from the DC voltage source 190. The polarity may be opposite to that shown in FIG. Along with this, the ammeter 191 detects whether or not a leak current flows between the electrode pads 160 and 161. In the present embodiment, as described above, one of the element regions 130, the inter-trench regions 140 (141 to 143), and the field region 150 are adjacent to each other with the insulating isolation trench 120 (121 to 124) interposed therebetween. The two regions are electrically connected to one different electrode pad 160 (161), and each region is electrically connected to every other region. Therefore, even if a part of the plurality of isolation trenches 120 (121 to 124) is defective, a leak current flows between the electrode pads 160 and 161, so that the isolation trench 120 is detected to be defective. can do. That is, even if there is a defect in the insulation isolation trench 120, it can be detected. Therefore, even when all are defective, it can be detected.

  After the defect inspection, the isolation region 180 described above is cut for those in which no defect exists in the insulating isolation trench 120. In the present embodiment, the thin film resistors 181 to 185 are integrated at one place in the plane direction of the semiconductor layer 110, and are collectively cut by laser light output from, for example, a YAG laser (wavelength 1047 nm). be able to. Therefore, in the state after the defect inspection is completed, the element region 130, the trench region 140 (141 to 143), and the field region 150 are electrically independent from each other. Since the first electrode 160 is an electrode pad for fixing the field region 150 to a predetermined potential, even if the thin film resistor 183 connected to the wiring 172 is cut, the field region 150 and the first electrode 160 are disconnected. Is ensured to be electrically connected.

  As described above, according to the semiconductor device 100 and the inspection method thereof according to the present embodiment, a defect can be detected even when a part of the plurality of insulating isolation trenches 120 has a defect. There is a defect, which makes it possible to exclude products with a low breakdown voltage. That is, the breakdown voltage can be guaranteed. Note that, after the defect inspection, the element region 130, the trench region 140 (141 to 143), and the field region 150 are in an electrically independent state, so that the element performs a desired function and a plurality of insulating isolation trenches 120 are obtained. High breakdown voltage can be realized.

  If electrode pads are formed for each of the five regions of the element region 130, the trench regions 141 to 143, and the field region 150, electrode pads corresponding to two regions adjacent to each other with one insulating isolation trench 120 interposed therebetween. By applying an inspection voltage in between, it is possible to detect a defect even if a part of the plurality of isolation trenches 120 has a defect. However, with such a configuration, the number of inspection electrode pads is required by the number of regions, and it is difficult to reduce the size of the semiconductor device 100. On the other hand, in this embodiment, a predetermined voltage is applied to the two electrode pads 160 and 161 regardless of the number of the inter-trench regions 140, so that a part of the plurality of insulating isolation trenches 120 (121 to 124). Even if there is a defect, the defect is detected. That is, the number of electrode pads for defect inspection is set to the minimum necessary number. Therefore, the size of the semiconductor device 100 can be reduced. In the present embodiment, since the electrode pad for fixing the field region 150 to a predetermined potential is used as the electrode pad 160 for inspection, the size of the semiconductor device 100 can be further reduced.

  The preferred embodiments of the present invention have been described above. However, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention.

  In the present embodiment, an example in which the semiconductor device 100 includes four insulating isolation trenches 121 to 124 as the insulating isolation trench 120 has been described. However, the number of insulating isolation trenches 120 is not limited to the above example. Two or more are sufficient.

  In this embodiment, a semiconductor layer of an SOI substrate is employed as the substrate 110, and the isolation region 120 is formed so as to reach the insulating layer 111, so that the element region 130 is electrically partitioned from the field region 150. An example was given. However, the substrate 110 is not limited to the above example. Other than that, any mode can be adopted as long as the element isolation region 120 can be electrically separated from the field region 150 by forming the insulating isolation trench 120.

  In the present embodiment, an example in which the electrode pad for fixing the field region 150 at a predetermined potential is the one electrode pad 160 for inspection is shown. However, an electrode pad for inspection may be separately formed as the first electrode pad 160. Further, depending on the number of insulating isolation trenches 120 (inter-trench regions 140), for example, an electrode pad (not shown) for the collector 130a and an electrode pad 160 for the field region 150 include two electrode pads 160 for inspection, 161 may also be used. In this case, the size can be further reduced. As described above, in the case of an electrode pad used other than for defect inspection, it is necessary to form the separation region 180 so that the connection state with the region according to the purpose of use is ensured even after the defect inspection. is there.

  In the present embodiment, an example in which the region where the thin film resistors 181 to 185 are connected to the wirings 170 to 174 is set as the separation region 180 and the region 180 is separated by the laser beam is shown. However, the configuration of the separation region 180 is not limited to the above example. As shown in FIG. 3, for example, a so-called bow tie structure may be formed in the wiring 170, and a region that is narrower or thinner than other portions may be used as the separation region 180. Note that the wirings 170 to 174 that do not have the isolation region 180 may be cut and separated. However, in general, the wiring has a thickness of several hundreds μm, and there is a risk that electrical reliability may be lowered due to, for example, chips generated during cutting. Therefore, as described above, it is preferable that the separation region 180 is formed and the separation region 180 is separated. Further, the separation method is not limited to laser light, and other known methods can be employed. FIG. 3 is a plan view showing a modified example of the separation region 180.

  In this embodiment, as shown in FIGS. 1 and 2, an example is shown in which thin film resistors 181 to 185 are formed as isolation regions 180 in the respective wirings 170 to 174. However, it is only necessary that the regions 130, 141 to 143, and 150 are electrically independent after the defect inspection is completed, and the field region 150 is connected to the first electrode pad 160. Accordingly, any two of the thin film resistors 181 to 183 are formed, and any one of the thin film resistors 184 and 185 is formed, which is the same as the semiconductor device 100 shown in the present embodiment. The effect can be expected.

  In the present embodiment, an example in which one element region 130 is configured by the insulating isolation trench 120 including the four insulating isolation trenches 121 to 124 has been described. However, the structure and the inspection method shown in this embodiment can also be applied when a plurality of element regions 130 are formed for the semiconductor layer 110. For example, the structure and the inspection method shown in this embodiment can also be applied to the semiconductor device 100 in which a plurality of trench groups including a plurality of insulating isolation trenches 120 are formed in the semiconductor layer 110. At that time, if the electrode pads for inspection are shared, the size of the semiconductor device 100 can be reduced.

It is the figure which showed typically the principal part of the planar layout of the semiconductor device which concerns on 1st Embodiment of this invention. It is the figure where the cross-section of the principal part of a semiconductor device was shown typically. It is a top view which shows the modification of a separation area | region.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Semiconductor device 110 ... Semiconductor layer (substrate)
111 ... Insulating layer 120 (121 to 124) ... Insulating isolation trench 130 ... Element region 140 (141 to 143) ... Inter-trench region 150 ... Field region (outside region of insulating isolation trench)
160, 161 ... Electrodes 170-174 ... Wiring 180 ... Isolation region 181-185 ... Thin film resistor

Claims (10)

A semiconductor device in which an element region is surrounded by an insulating isolation trench formed in a substrate,
A plurality of the isolation trenches are formed so as to surround the element region in multiple layers, and the substrate has at least one region configured between the adjacent isolation trenches,
Each region of the element region, the region between the isolation trenches, and the outer region of the isolation trench is in a positional relationship in which the two isolation trenches are sandwiched in between before the defect inspection of the isolation trench. The regions are electrically connected to the same electrode, and each region is electrically connected to one of two electrodes including the electrode via a wiring, and after the defect inspection of the isolation trench In this state, the respective regions are electrically isolated from each other. The substrate is a semiconductor layer disposed on a support substrate via an insulating layer;
The semiconductor device according to claim 1, wherein the insulating isolation trench is extended in a form connected to the insulating layer. At least one of the wirings connected to the electrode is provided with an isolation region in a mode that is easier to cut than other regions of the wiring in a state before the defect inspection of the insulating isolation trench,
3. The semiconductor device according to claim 1, wherein the wiring is isolated in the isolation region in a state after a defect inspection of the insulation isolation trench.   4. The semiconductor device according to claim 3, wherein the wiring separation region is formed by connecting a thin film resistor between the wirings.   5. The semiconductor device according to claim 1, wherein an outer region of the isolation trench is electrically connected to the electrode even after a defect inspection of the isolation trench. In a semiconductor device in which an element region is surrounded by an insulation isolation trench formed in a substrate, a semiconductor device inspection method for inspecting a defect of the insulation isolation trench,
A plurality of the isolation trenches are formed so as to surround the element region in multiple layers, and the substrate has at least one region configured between the adjacent isolation trenches,
The regions having a positional relationship in which the element region, the region between the isolation trenches, and the outer region of the isolation trench are sandwiched between the two regions are electrically connected to one electrode. As described above, while electrically connecting to any one of the two electrodes including the electrode via a wiring, applying a predetermined voltage to the two electrodes to inspect the defect of the insulating isolation trench,
A method for inspecting a semiconductor device, comprising: electrically isolating the regions after defect inspection of the isolation trench. The substrate is a semiconductor layer disposed on a support substrate via an insulating layer;
The semiconductor device inspection method according to claim 6, wherein the insulating isolation trench is extended in a manner connected to the insulating layer. At least one of the wirings connected to the electrode is provided with an isolation region in a mode that is easier to cut than other regions of the wiring in a state before the defect inspection of the insulating isolation trench,
8. The method for inspecting a semiconductor device according to claim 6, wherein after the defect inspection of the insulating isolation trench, the wiring is isolated in the isolation region.   9. The method for inspecting a semiconductor device according to claim 8, wherein the isolation region of the wiring is formed by connecting a thin film resistor between the wirings.   10. The semiconductor device according to claim 6, wherein an outer region of the isolation trench is electrically connected to the electrode even after a defect inspection of the isolation trench. Inspection method.

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