JP4667348B2 - Encoded data memory storage control device, method, and image processing device - Google Patents

Description

  The present invention relates to an encoded data memory storage control apparatus, method, and image processing apparatus. More specifically, the present invention is used when encoding image data in units of blocks such as JPEG (Joint Photographic Experts Group) compression processing. The present invention relates to an encoded data memory storage control device, a method thereof, and an image processing device including the control device.

  In digital multi-function peripherals, the image data is compressed to store the scanned image in a storage device, and the compressed data is expanded and the image data is decoded to print the stored image data. Print processing.

  When compressing a color image, a compression process based on the JPEG standard is often used. JPEG processing is compression processing in units of 8 × 8 blocks, and in a device that sequentially inputs data in the scanning direction, such as a digital multifunction peripheral, a line buffer in the scanning direction is secured in an internal or external memory, Implement compression processing. In a color image, the amount of information per pixel is large and a large memory area is required. Therefore, a processing method using the memory efficiently is required.

  In response to such a request, for example, Patent Document 1 discloses an image processing apparatus that saves memory capacity by sharing a buffer memory when compression / decompression processing, rotation processing, and enlargement / reduction processing are performed in parallel. It is disclosed.

  Japanese Patent Application Laid-Open No. 2004-228620 controls the data size below a specified compression ratio, facilitates memory management, saves memory capacity, performs encoding only by one image reading, An image processing apparatus capable of realizing a processing speed and image quality that are the same as the compression processing speed in the JPEG method is disclosed.

Further, in Patent Document 3, when transmitting transmission information to image data, transmission information is added to image data before compression (JPEG compression) instead of adding transmission information after compression. Thus, an image communication apparatus that can save memory and shorten transmission processing by omitting expansion / recompression processing during transmission of image data is disclosed.
JP-A-8-194812 JP-A-7-222152 JP 2001-16369 A

  However, since the image compression rate varies depending on the input image, in the conventional memory saving technique including the technique described in Patent Documents 1-3, as a memory for storing encoded data, the minimum encoding necessary for processing is required. It was necessary to secure the data storage memory area on the same memory separately from the image data storage memory area. As an alternative method, it is conceivable to provide a separate memory for storing encoded data in addition to the memory for storing image data, but the same is necessary in that a separate memory area is required. In either case, the capacity of the memory to be mounted increases, and the required arrangement space and cost increase.

  The present invention has been made in view of the above circumstances, and when encoding image data in units of blocks, it is possible to store encoded data only in a storage memory area of at least read target image data. It is an object of the present invention to provide an encoded data memory storage control device, a method thereof, and an image processing device including the control device.

In order to solve the above-described problem, the first technical means of the present invention provides image data input to the memory in the scanning order so that the data amount does not exceed the data amount of the image data and in a predetermined block unit. An encoded data memory storage control device for performing control for storing the encoded data encoded by the encoding means in the memory with respect to the encoding means for encoding in the encoding means , wherein the predetermined block is transferred from the memory The image data continuous in the scanning direction having the same number of data as the burst transfer unit of the memory and the number of pixels included in the memory is read at a time and temporarily stored in the encoding means. An input buffer to be passed, an output buffer for temporarily storing the encoded data output from the encoding means and outputting it to the memory, and a buffer for reading from the memory to the input buffer. Managed by looking out address and the output buffer a write address for writing to said memory, said and an address management unit that performs an access request specifying a read address and write address to the memory, the code after encoding When storing the encoded data in the memory, the memory area from which the image data has been read is obtained from the read address, and the encoded data is stored in the memory area in which the encoded image data is stored. The data is stored in block unit order, and when the encoded data to be stored is less than the predetermined block, the shortage is overwritten with empty data .

According to a second technical means, in the first technical means, the encoding means is means for executing an encoding process based on the JPEG standard or the JPEG2000 standard.

A third technical means is an image processing apparatus including the encoded data memory storage control device according to the first or second technical means, and includes the memory and the encoding means. Is.

According to a fourth technical means, for the encoding means for encoding the image data inputted in the memory in the scanning order so that the data amount does not exceed the data amount of the image data and in a predetermined block unit, An encoded data memory storage control method for performing control to store encoded data encoded by an encoding unit in the memory , wherein the reading unit is a natural number of the number of pixels included in the predetermined block from the memory the image data is continuous in the direction of the scan times and in having the same amount of data as the burst transfer unit of the memory, reading and temporarily stored at a time in the input buffer, a step of passing said encoding means, writing Means for temporarily storing the encoded data output from the encoding means in an output buffer and outputting it to the memory; and Managing a read address when reading from the memory to the input buffer and a write address when writing from the output buffer to the memory, and performing an access request designating the read address and write address to the memory, and writing step, the writing means, the encoded data after the encoding means encoded in storing and output to the memory, obtains the read already in the memory area of the image data from said read address, The encoded data is stored in the predetermined block unit order in the memory area where the encoded image data is stored, and if the encoded data to be stored is less than the predetermined block, the shortage is empty. It is characterized by overwriting with data .

  According to the present invention, when encoding image data in units of blocks, it is possible to store the encoded data only at least in the storage memory area of the image data to be read.

  An encoded data memory storage control device (hereinafter referred to as the present control device) according to the present invention performs control to store image data in a memory after encoding the image data in a predetermined block unit. Therefore, the present control device is a device for controlling the output (preferably input / output) of the encoding means for executing this encoding. In the present control apparatus, encoding is a process involving data compression, and the encoded data generally does not exceed the encoded image data (original image data) by the amount of data (at least In other words, control is performed to store the encoded data in the memory area of the encoded image data.

  The encoding means described above is preferably a means for executing an encoding process based on the JPEG standard or the JPEG2000 standard. In the following example, a description will be given by taking a hardware configuration as an encoding means, that is, an encoding circuit, but it can also be realized by incorporating an encoding program into a computer in an executable manner. Further, the image data handled by this control apparatus is not limited to still image data alone, but may be each frame of moving image data.

  An image processing apparatus according to the present invention is an apparatus that includes the present control device and performs image processing. The image processing apparatus is preferably an image encoding apparatus (image compression processing apparatus) including a memory to be read / written (and a memory controller that controls the memory) and the encoding unit described above. It suffices for the control device to be accessible at least. The image processing apparatus according to the present invention includes, for example, a digital multifunction machine having a copy function, a facsimile function, a data transmission function, a file management function, a file management apparatus that reads a document and stores it as a file, a scanner, an external PC, etc. Various devices such as a PC capable of inputting image data are applicable.

  FIG. 1 is a block diagram illustrating an example of the configuration of an image processing apparatus including an encoded data memory storage control circuit according to an embodiment of the present invention. FIG. 2 illustrates encoded data of the image processing apparatus of FIG. It is a block diagram which shows one structural example of the encoding circuit containing a memory control circuit. FIGS. 3 and 4 are conceptual diagrams for explaining an example of memory access processing in the encoded data memory storage control circuit of FIG.

  An image processing apparatus 1 illustrated in FIG. 1 includes an encoding / decoding processing unit 10 that performs encoding of image data and decoding of the encoded data, and an input / output target of the encoding / decoding processing unit 10 A memory 24 used as a data storage area in the various processing circuits and an arithmetic processing unit (CPU 21) for controlling all the circuits including the encoding / decoding processing unit 10 are provided.

  In FIG. 1, as various processing circuits, a scanner 22 that optically reads an image of a document and outputs image data as scan data, an image processing circuit 23 that executes various image processing such as color conversion, various filtering, and composition processing, and the like A communication circuit 25 that communicates with a device and a laser scanner unit (LSU) 26 that executes a printing process are listed. However, as various processing circuits, circuits other than these may be provided, and combinations provided at the same time are not limited to those illustrated.

  The encoding / decoding processing unit 10 illustrated in FIG. 1 includes an encoding circuit 18, a decoding circuit 19, and a memory controller 14 that controls the memory 24 as an I / F of the memory 24. Connected. Further, the encoding / decoding processing unit 10 includes a CPU I / F 11, an image input I / F 12, and an image processing I / F 13 that serve as interfaces to the CPU 21, the scanner 22, the image processing circuit 23, the communication circuit 25, and the LSU 26. The communication I / F 15 and the image output I / F 16 are connected by a bus. However, if the encoding means exemplified by the encoding circuit 18 is provided so as to be accessible to the memory 24, control by this control apparatus is possible.

  The memory 24 is preferably used for processing in various processing circuits as described above, but at least the image data to be encoded and the data after encoding in the encoding circuit 18 of the encoding / decoding processing unit 10. It can be used to store data. For example, the LSU 26 executes printing based on the image data developed in the page memory, but the memory 24 may be used as the page memory. The more the memory controller 14 receives and controls access from more circuits, the more likely that many memory areas of the memory 24 are reserved by circuits other than the encoding circuit 18. The effect of the present invention that the memory area to be reduced can be reduced.

  An encoding circuit 18 illustrated in FIG. 2 is a circuit that performs JPEG encoding processing, and performs transform encoding (DCT: Discrete Cosine Transform) unit 33 on input 8 × 8 block unit image data. A quantization unit 34 that quantizes image data (transform coefficients) after DCT, and an entropy code that outputs the encoded data by entropy encoding (Huffman encoding / arithmetic encoding) of the quantized quantized coefficients The conversion unit 35 is provided.

  The encoding circuit 18 may have other configurations such as performing a thinning process before DCT in the transform encoding unit 33, or performing DPCM (predictive encoding) instead of DCT. In addition, as long as the circuit performs an encoding process in units of blocks, an encoding circuit of another encoding method such as the JPEG2000 method may be incorporated instead of the encoding circuit 18. In addition, the encoding circuit 18 preferably performs encoding processing including orthogonal transformation as illustrated, but is not limited thereto.

  The encoding circuit 18 further includes an input buffer (input image buffer) 32, an output buffer (output image buffer) 36, and a control unit / address management unit 31. Although the control unit / address management unit 31 is illustrated and described collectively, the control unit and the address management unit may be configured separately. The address management unit and the control unit are not necessarily configured by hardware, and may be configured by incorporating an address management program and control unit so that they can be executed by the internal CPU.

  The control unit is a part that controls the encoding itself based on the control from the CPU 21. For example, the control unit specifies a control parameter (for example, a quantization step to be set or a quantization table to be selected) or an entropy code. A control parameter such as selection of a Huffman code for the conversion unit 35 is designated. The control unit also instructs the address management unit to execute encoding, whereby image data is input to the transform encoding unit 33 via the input image buffer 32.

  This control apparatus can be composed of the above-described input image buffer 32, output image buffer 36, and address management unit. The control device illustrated in FIG. 2 can be incorporated in the encoding circuit 18 as shown, but may be provided outside the encoding circuit 18.

  The address management unit reads a read address (on the memory 24 for read data) from the memory 24 to the input image buffer 32 and a write address (on the memory 24 for write data) when writing from the output image buffer 36 to the memory 24. And makes an access request designating the read address and write address to the memory 24 (actually the memory controller 14).

  The processing of the address management unit at the time of reading will be exemplified with reference to FIG. First, data stored in the memory 24 from the scanner 22 or the like is continuous data for each line. Therefore, if reading is performed as it is, reading of the next line is performed when reading of all the lines is completed. In order to process encoding in units of blocks, the address management unit needs to perform read processing as described below.

  In response to a JPEG processing start instruction from the control unit, the address management unit determines a memory area on the memory 24 for image data to be read into the input image buffer 32 (a memory area in which a JPEG processing target image block illustrated in a rectangle is stored). Then, a read request signal designating the read address is transmitted to the memory controller 14.

  The read address is specified so that it can be read in the order of ★ (start position) to ☆, ▲ to △, ..., ■ to □. Here, when only one block is read, ★ ˜ ☆ are data for 8 pixels, and when reading for n blocks, ★ ˜ ☆ are data for 8 × n pixels. Here, n is a natural number. Also when reading out n blocks, it is only necessary to read as long as possible in the main scanning direction in the order of ★ (start position) to ☆, ▲ to △, ..., ■ to □.

  Thereafter, the address management unit receives a read permission signal from the memory controller 14. Along with the reception of the read permission signal, image data (one or more image blocks) is input from the memory 24 to the input image buffer 32 in the order of scanning, and is encoded by the units 33 to 35 of the encoding circuit 18. The image data is encoded in predetermined block units.

  Subsequently, the next image block group is sequentially requested and read out and encoded. For example, after □, an address indicated by ● is designated, and the next image block group is read. 3 and 4 show only 8 lines. However, the actual memory area exists for at least one page, for example, is read for each of one or more image blocks, and encoding is performed in units of image blocks. The

  As illustrated in FIG. 3A as 8 × (8 × n) pixels, the input image buffer 32 has the number of pixels (8 × 8 in this example) included in a predetermined block which is an encoding processing unit. It is preferable that the image data is read out from the memory 24 by n times (that is, n image blocks), temporarily stored, and passed to the encoding means. Therefore, the input image buffer 32 preferably has a data storage area for 8 × 8 × n pixels (n ≧ 1) for JPEG processing. By performing reading of image data by n times the encoding processing unit, the encoding process can be executed smoothly.

  Furthermore, it is preferable that the memory controller 14 is capable of burst transfer of data in the memory 24. Of the n times the data, the data (8 × n) continuous in the n times main scanning direction (scanning direction stored in the memory 24), that is, the pixels in the main scanning direction included in the n image blocks to be read. The number (8 × n) is preferably the same data amount as the burst transfer unit of the memory 24 (actually, the burst transfer unit of the memory controller 14) from the viewpoint of processing speed.

  In other words, the image data read to the input image buffer 32 at a time is image data continuous in the scanning direction, and the image data preferably has the same data amount as the burst transfer unit of the memory 24.

  The processing of the address management unit at the time of writing will be exemplified with reference to FIG. The address management unit determines a write destination memory area on the memory 24 for the encoded data (encoded data) to be written from the output image buffer 36 to the memory 24, and sends a write request signal designating a write address, It transmits to the memory controller 14. Here, the encoded data to be written does not naturally exceed the storage capacity of the output image buffer 36.

  For example, when the read n blocks (data from * to □) have been encoded, at least the encoded data is accumulated in the output image buffer 36. The memory area where the encoded data is written may be at least the memory area of the encoded image data. Therefore, it is preferable to obtain a read address as the write address, obtain a read memory area of the image data, and specify an appropriate write address based on the obtained memory area. For example, in the same manner as at the time of reading, it is specified that writing is possible in the order of ★ (start position) to ☆, ▲ to Δ,.

  Actually, the encoded data is compressed compared to the image data before the encoding process, and at least fits in the same storage area. However, even if it is specified in the above-described order, it is compressed and the data storage area remains. The remainder (the surplus area for compression) may be written so as to completely correspond to the time of reading by overwriting empty data. In this case, when using the encoded data, it is only necessary to specify an address based on the address at the time of reading.

  As a more preferable example of overwriting the empty data, the encoded data for the subsequent n blocks of image data may be continuously written. That is, encoded data obtained by encoding image data for the subsequent n blocks may be stored in a memory area following the encoded data for the previous n blocks.

  Here, the encoded data output from the output image buffer 36 to the memory 24 is preferably a burst transfer unit, but may not necessarily be the same as the storage unit in the input image buffer 32. As a trigger for starting the writing, in addition to the time when the encoded data is accumulated in the output image buffer for the burst transfer unit, the time when the encoding of the read n image blocks is completed, Various events can be employed, such as when the remaining capacity falls below a certain threshold.

  Thereafter, the address management unit receives a write permission signal from the memory controller 14. With the reception of the write permission signal, the encoded data stored in the output image buffer 36 is sequentially output to the memory controller 14 and written to the memory 24 by the memory controller 14.

  In this way, when storing the encoded data after encoding in the memory 24, the present control device stores the encoded data in a predetermined block unit order in the memory area where the image data that has been encoded is stored. Store. This storage may be performed in block unit order, and may be executed simultaneously for a plurality of blocks as described above.

  In this way, the present control device performs control to store the encoded data after encoding by the encoding circuit 18 from the output image buffer 36 to the memory 24, and by executing the same processing at the next trigger, Encoded data storage is completed. As the reading of the image data and the writing of the encoded data proceed, the code storable area shown in white increases from the state of FIG. 3A to the state of FIG. 4A, and the encoded data is generated. And the storage is completed, and finally the state as shown in FIG.

  By performing such control, the address management unit only needs to secure the read memory area first designated as the encoding target, for example, the memory area designated as the write memory area by the scanner 22. Therefore, it is easy to secure a memory area when the memory 24 is used simultaneously with other various processing circuits, or the capacity prepared in advance can be reduced.

  On the other hand, the encoded data that has been stored in the memory 24 is processed by the memory 24 for processing in various processing circuits (for example, processing for transfer to an external or internal storage device, decoding processing, and printing processing with decoding processing). Read from. At this time, the codes may be read out in the stored order (the order of a predetermined block unit) as illustrated by an arrow in FIG. In addition, when empty data is overwritten, it may be read as it is, or may be read after skipping empty data.

  Although the present control apparatus and the image processing apparatus including the control apparatus have been described above, the present invention is an embodiment as a control method (encoded data memory storage control method; hereinafter referred to as the present method) executed by the control apparatus. Can also be adopted.

  In this method, the acquisition means acquires from the memory the information of the memory area where the image data that has been encoded is stored, and the writing means stores the encoded data that has been encoded by the encoding means in the memory. Storing the encoded data in a predetermined block unit order in the memory area acquired by the acquiring means when storing. The acquisition means and the writing means referred to here can be provided in the address management section as described above, and the buffer memory (output image buffer 36) can be controlled. The address management program described above is a program that executes such processing.

  Moreover, you may make it control from the time of reading as another form of this method. In this method, the reading means reads out image data from the memory in units of a predetermined block and passes it to the encoding means, and the writing means stores the encoded data after the encoding means encodes in the memory. And storing the encoded data in a predetermined block unit order in a memory area where the encoded image data is stored. The reading means and writing means here can be provided in the address management section as described above, and control of the buffer memory (input image buffer 32 and output image buffer 36) becomes possible. The address management program described above may be a program that executes such processing.

  As described above, according to the present invention, when encoding image data in units of blocks, the encoded data (code data) that has been encoded is stored in the order of predetermined block units in the image data area where encoding has already been completed. To do. Therefore, it is possible to store the encoded data only in the storage memory area of the image data to be read at least, that is, to store the encoded data without using more memory areas than the memory area from which the image data is read. Resources can be used efficiently.

It is a block diagram which shows the example of 1 structure of the image processing apparatus provided with the encoding data memory storage control circuit which concerns on one Embodiment of this invention. FIG. 2 is a block diagram illustrating a configuration example of an encoding circuit including an encoded data memory control circuit in the image processing apparatus of FIG. 1. FIG. 3 is a conceptual diagram for explaining an example of memory access processing in the encoded data memory storage control circuit of FIG. 2. It is a conceptual diagram for demonstrating the process following FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Image processing apparatus, 10 ... Encoding / decoding processing part, 11 ... CPU I / F, 12 ... Image input I / F, 13 ... Image processing I / F, 14 ... Memory controller, 15 ... Communication I / F , 16 ... Image output I / F, 17 ... Internal bus, 18 ... Coding circuit, 19 ... Decoding circuit, 21 ... CPU, 22 ... Scanner, 23 ... Image processing circuit, 24 ... Memory, 25 ... Communication circuit, 26 DESCRIPTION OF SYMBOLS ... Laser scanner unit (LSU) 31 ... Control part and address management part 32 ... Input image buffer 33 ... Transform encoding part 34 ... Quantization part 35 ... Entropy encoding part 36 ... Output image buffer

Claims (4)

In contrast to the encoding means for encoding the image data input in the scanning order into the memory so that the data amount does not exceed the data amount of the image data and in a predetermined block unit, An encoded data memory storage control device that controls to store encoded data in the memory,
The image data continuous in the scanning direction having the same amount of data as the burst transfer unit of the memory is read out at a time from the memory, and is temporarily multiplied by the natural number of pixels included in the predetermined block. An input buffer that accumulates and passes to the encoding means; an output buffer that temporarily accumulates encoded data output from the encoding means and outputs to the memory; and a read operation when reading from the memory to the input buffer An address management unit that manages an address and a write address when writing to the memory from the output buffer, and performs an access request specifying the read address and the write address in the memory;
When storing the encoded data after encoding in the memory, the memory area from which the image data has been read is obtained from the read address, and the code area is stored in the memory area where the encoded image data is stored. An encoded data memory storage control device, wherein encoded data is stored in the order of the predetermined block unit, and when the encoded data to be stored is less than the predetermined block, the shortage is overwritten with empty data . 2. The encoded data memory storage control device according to claim 1 , wherein the encoding means is means for executing an encoding process based on the JPEG standard or the JPEG2000 standard. An image processing apparatus including the encoded data memory storage control device according to claim 1 or 2, the image processing apparatus characterized by comprising said memory, and said encoding means. In contrast to the encoding means for encoding the image data input in the scanning order into the memory so that the data amount does not exceed the data amount of the image data and in a predetermined block unit, An encoded data memory storage control method for performing control to store encoded data in the memory,
Reading means receives, from the memory, the image data that is a natural number multiple of the number of pixels included in the predetermined block and has the same amount of data as the burst transfer unit of the memory, in the scanning direction, to the input buffer. Reading at a time, temporarily storing it, and passing it to the encoding means;
A writing step for temporarily storing the encoded data output from the encoding unit in an output buffer and outputting the encoded data to the memory;
The address management unit manages a read address when reading from the memory to the input buffer and a write address when writing from the output buffer to the memory, and makes an access request designating the read address and write address to the memory. Including steps,
The writing step, the writing means, the encoded data after the encoding means encoded in storing and output to the memory, obtains the read already in the memory area of the image data from the read address The encoded data is stored in the predetermined block unit order in the memory area where the encoded image data is stored, and if the encoded data to be stored is less than the predetermined block, a shortage is stored. An encoded data memory storage control method comprising overwriting with empty data .

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