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JP4709447B2 - Amplifying device and transmitter - Google Patents
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JP4709447B2 - Amplifying device and transmitter - Google Patents

Amplifying device and transmitter Download PDF

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Publication number
JP4709447B2
JP4709447B2 JP2001299957A JP2001299957A JP4709447B2 JP 4709447 B2 JP4709447 B2 JP 4709447B2 JP 2001299957 A JP2001299957 A JP 2001299957A JP 2001299957 A JP2001299957 A JP 2001299957A JP 4709447 B2 JP4709447 B2 JP 4709447B2
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Japan
Prior art keywords
signal
magnification
correction value
amplifier
amplitude
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JP2001299957A
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Japanese (ja)
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JP2003110634A (en
Inventor
司 石井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kokusai Denki Electric Inc
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Hitachi Kokusai Electric Inc
Kokusai Denki Electric Inc
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Priority to JP2001299957A priority Critical patent/JP4709447B2/en
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  • Amplifiers (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、増幅装置及び送信機に関する。特に本発明は、特に本発明は、ディジタル変調制御による振幅変調方式の送信機に関する。
【0002】
【従来の技術】
従来、ディジタル変調制御による振幅変調方式として、例えば特開2000-232380号広報に開示されている方式がある。当該方式は、複数の電力増幅器を直接ディジタル信号により"オン"、"オフ"し、変調信号のすべての情報(ビット)を変調増幅する。
【0003】
【発明が解決しようとする課題】
しかし、従来の変調方式では、複数の電力増幅器の増幅率の理想値に対する誤差により、送信機が出力する振幅変調信号に歪が生じるという問題があった。また、当該誤差は、電源電圧変動、温度変化、または経年劣化等によっても変化する。
【0004】
そのため、従来のディジタル変調制御による振幅変調方式において、送信機が出力する振幅変調信号に生じる歪により安定な運用が阻害されるという問題があった。そこで本発明は、上記の課題を解決することのできる増幅装置及び送信機を提供することを目的とする。この目的は特許請求の範囲における独立項に記載の特徴の組み合わせにより達成される。また従属項は本発明の更なる有利な具体例を規定する。
【課題を解決するための手段】
【0005】
即ち、本発明の第1の形態によると、被増幅信号の増幅率を指定する第1倍率信号と、第2倍率信号とに基づいて被増幅信号の振幅を増幅する増幅装置であって、前記第1倍率信号に基づいて前記被増幅信号の振幅を増幅した、第1増幅信号を出力する第1増幅部と、前記第1増幅信号の振幅を補正する補正値を、前記第1倍率信号が示す値のそれぞれに対応して記憶する補正値記憶部と、前記補正値と、前記第2倍率信号とに基づいて前記被増幅信号の振幅を増幅した、第2増幅信号を出力する第2増幅部と、前記第1増幅信号と、前記第2増幅信号とを合成して前記増幅装置の出力信号として出力する合成部とを備えることを特徴とする増幅装置を提供する。
【0006】
また、前記増幅装置は、前記増幅装置の前記出力信号と、前記第1倍率信号とに基づいて、前記補正値を補正する補正値更新部を更に備えるのが好ましい。
【0007】
本発明の第2の形態によると、変調信号に基づく振幅変調信号を出力する送信機であって、所定の周期を有する搬送波信号を出力する搬送波信号生成部と、前記変調信号の振幅に基づいて、第1倍率信号と、第2倍率信号とを出力する変換部と、第1倍率信号と、第2倍率信号とに基づく増幅率で前記搬送波信号の振幅を増幅した信号を前記振幅変調信号として出力する変調増幅部とを備え、前記変調増幅部は、前記第1倍率信号に基づいて前記搬送波信号の振幅を増幅した、第1増幅信号を出力する第1増幅部と、前記第1増幅信号の振幅を補正する補正値を、前記第1倍率信号が示す値のそれぞれに対応して記憶する補正値記憶部と、前記補正値と、前記第2倍率信号とに基づいて前記搬送波信号の振幅を増幅した、第2増幅信号を出力する第2増幅部と、前記第1増幅信号と、前記第2増幅信号とを合成して前記振幅変調信号として出力する合成部とを有することを特徴とする送信機を提供する。
【0008】
なお上記の発明の概要は、本発明の必要な特徴の全てを列挙したものではなくこれらの特徴群のサブコンビネーションも又発明となりうる。
【0009】
【発明の実施の形態】
以下、発明の実施の形態を通じて本発明を説明するが、以下の実施形態はクレームにかかる発明を限定するものではなく、また実施形態の中で説明されている特徴の組み合わせの全てが発明の解決手段に必須であるとは限らない。
【0010】
図1は、本発明の一実施形態に係る送信機100を示す。送信機100は、変調信号に基づく増幅率で搬送波信号CWSの振幅を増幅した振幅変調信号を出力する送信機であって、搬送波信号生成部102と、変換部104と、変調増幅部106とを備える。搬送波信号生成部102は、所定の周期を有し、変調信号に基づく情報を搬送する搬送波信号CWSを出力する。変換部104は、変調信号AMSの振幅に基づいて第1倍率信号HBSと、第2倍率信号LBSとを出力する。
【0011】
変換部104は、変調信号AMSの振幅を増幅した増幅変調信号を出力する変調信号増幅器222と、当該増幅変調信号をA/D変換した信号を11ビットのディジタル信号である倍率指定信号MASとして出力する第1A/D変換器224とを有する。変調信号増幅器222は、変調信号AMSの振幅を変調増幅部106で必要な入力振幅値まで増幅するのが好ましい。第1A/D変換器224は、倍率指定信号MASの上位5ビットを第1倍率信号HBSとして出力し、下位6ビットを第2倍率信号LBSとして出力する。
【0012】
変調増幅部106は、搬送波信号CWSと、第1倍率信号HBSと、第2倍率信号LBSとを受け取り、第1倍率信号HBSと、第2倍率信号LBSとに基づく増幅率で搬送波信号CWSの振幅を増幅した信号を振幅変調信号AASとして出力する。変調増幅部106は、第1増幅部202と、補正値記憶部206と、第2増幅部204と、合成部208とを備える。
【0013】
第1増幅部202は、第1倍率信号HBSに基づいて搬送波信号CWSの振幅を増幅した、第1増幅信号EBSを出力する。補正値記憶部206は、第1増幅信号EBSの振幅を補正する補正値を、第1倍率信号HBSが示す値のそれぞれに対応して記憶する。
【0014】
第2増幅部204は、当該補正値と、第2倍率信号LBSとに基づいて搬送波信号CWSの振幅を増幅した、第2増幅信号BBSを出力する。第2増幅部204は、第1増幅信号EBSの振幅より振幅が小である第2増幅信号BBSを出力するのが好ましい。合成部208は、第1増幅信号EBSと、第2増幅信号BBSとを合成して振幅変調信号AASとして出力する。
【0015】
変調増幅部106は、振幅変調信号AASと、第1倍率信号HBSとに基づいて、補正値テーブル206に記憶された補正値を補正する補正値更新部210を更に備えるのが好ましい。本実施形態において、変調増幅部106は、振幅変調信号AASと、第1倍率信号HBSとに基づく補正値更正信号CCSを補正値記憶部206に供給する補正値更新部210を更に有する。補正値記憶部206は、補正値更正信号CCSに基づいて補正値を補正する。補正値記憶部206は、補正値の初期値として値0を記憶してよい。以下、変調増幅部106が有する、第1増幅部202と、第2増幅部204と、補正値更新部210と、補正値記憶部206と、合成部208とについて詳細に説明する。
【0016】
第1増幅部202は、複数の第1増幅器322と、等電力PA選択部324を含むのが好ましい。本実施形態において、第1増幅部202は、26個の第1増幅器(322-1〜322-26)と、等電力PA選択部324とを含む。第1増幅器(322-1〜322-26)は、それぞれ等しい増幅率を有する電力増幅器である。
【0017】
第1増幅部202はそれぞれ、等電力PA選択部324が出力する複数の第1動作信号(ESS-1〜ESS-26) から1の第1動作信号ESSを受け取る。第1増幅器322は、1の第1動作信号ESSと、搬送波信号CWSとを受け取り、第1動作信号ESSが所定の論理値をとる場合に、搬送波信号CWSの振幅を所定の増幅率で増幅した第1増幅信号EBSを出力するのが好ましい。第1増幅器322-n(nは、1≦n≦26を満たす整数である)は、第1動作信号ESS-nと、搬送波信号CWSとを受け取り、第1動作信号ESS-nの論理値が1である場合に、搬送波信号CWSの振幅を所定の増幅率で増幅した第1増幅信号EBS-nを出力する。
【0018】
等電力PA選択部324は、複数の第1増幅器322から第1倍率信号HBSが表す数の第1増幅器322を選択する。ここで、ディジタル信号が表す数とは、当該ディジタル信号が2進数として示す値を10進数に換算した数値を言う。例えば、ディジタル信号が2進数として示す値が“01001”のとき、当該ディジタル信号が表す数は9である。等電力PA選択部324は、第1倍率信号HBSに基づいて、複数の第1動作信号ESSを出力する。等電力PA選択部324は、複数の第1動作信号ESSのうち、ディジタル信号である第1倍率信号HBSが表す数の第1動作信号ESSを選択し、論理値1を出力する。等電力PA選択部324は、第1動作信号ESSの論理値を1とすることで、第1動作信号ESSを受け取る第1増幅器322を選択する。
【0019】
本実施形態において、等電力PA選択部324は、5ビットのディジタル信号である第1倍率信号HBSを受け取り、第1倍率信号HBSに基づいて第1動作信号(ESS-1〜ESS-26)を出力する。等電力PA選択部324は、第1倍率信号HBSが表す数がk(kは、1≦k≦26を満たす整数である)であるとき、第1動作信号(ESS-1〜ESS-k)として論理値1を出力する。等電力PA選択部324は、第1倍率信号HBSが表す数が0であるとき、第1動作信号(ESS-1〜ESS-26)として論理値0を出力する。等電力PA選択部324は、例えば、第1倍率信号HBSが2進数として示す値が“01001”あるとき、1動作信号(ESS-1〜ESS-9)として論理値1を出力する。
【0020】
第2増幅部204は、複数の第2増幅器342と、バイナリPA選択部344とを含むのが好ましい。本実施形態において、第2増幅部204は、6個の第2増幅器(342-1〜342-6)とバイナリPA選択部344とを含む。第2増幅器342-k'(k'は、1≦k'≦6を満たす整数である)は、第1増幅器322の増幅率をAとしたときに、(1/2)k'×A×α(αは所定の数である)なる増幅率を有する電力増幅器である。第2増幅部204が、第2増幅信号BBSにより第1増幅信号EBSの振幅を補正するためには、所定の数αは、1以上であるのが好ましい。
【0021】
第2増幅部204はそれぞれ、バイナリPA選択部344が出力する複数の第2動作信号(BSS-1〜BSS-6)から1の第2動作信号BSSを受け取る。第2増幅器342は、1の第2動作信号BSSと、搬送波信号CWSとを受け取り、第2動作信号BSSが所定の論理値をとる場合に、搬送波信号CWSの振幅を所定の増幅率で増幅した第2増幅信号BBSを出力するのが好ましい。第2増幅器342-n'(n'は、1≦n'≦6を満たす整数である)は、第2動作信号BSS-n'と、搬送波信号CWSとを受け取り、第2動作信号BSS-n'の論理値が1である場合に、搬送波信号CWSの振幅を所定の増幅率で増幅した第2増幅信号BBS-n'を出力する。
【0022】
バイナリPA選択部344は、第2倍率信号LBSと、補正値信号CVSとに基づいて、複数の第2増幅器342から所定の第2増幅器342を選択する。バイナリPA選択部344は、第2倍率信号LBSと、補正値信号CVSとに基づいて、複数の第2動作信号BSSを出力する。バイナリPA選択部344は、複数の第2動作信号BSSから、第2倍率信号LBSと、補正値信号CVSとに基づいて所定の第2動作信号BSSを選択し、論理値1を出力する。バイナリPA選択部344は、第2動作信号BSSの論理値を1とすることで、第2動作信号BSSを受け取る第2増幅器342を選択する。
【0023】
本実施形態において、バイナリPA選択部344は、乗算器346と加算器348とを含む。乗算器346は、第2倍率信号LBSが表す数と所定の数1/αとを乗じた数を被除第2倍率信号DLBSとして出力する。加算器348は、被除第2倍率信号DLBSが表す数と補正値信号CVSが表す補正値との和を6ビットのディジタル信号として出力する。バイナリPA選択部344は、当該6ビットのディジタル信号を、第2動作信号(BSS-1〜BSS-6)として出力する。すなわち、バイナリPA選択部344は、当該6ビットのディジタル信号の、上位から数えてn'番目のビットの論理値を、第2動作信号BSS-n'として出力する。
【0024】
本実施形態において、補正値更新部210は、検波部366と第2A/D変換器364と、タイミング調整部370と、遅延信号生成部362と、補正値更正信号生成部368とを含む。検波部366は、振幅変調信号AASを受け取り、振幅変調信号AASの復調信号を出力する。第2A/D変換器364は、当該復調信号をA/D変換したディジタル信号である帰還信号FBSを出力する。本実施形態において、第2A/D変換器364は、当該復調信号をA/D変換した11ビットのディジタル信号である帰還信号FBSを出力する。タイミング調整部370は、第2A/D変換器364が行うA/D変換のタイミングを調整する。タイミング調整部370は、例えば、第2A/D変換器364が行うA/D変換のサンプルタイミングを調整する。
【0025】
遅延信号生成部362は、倍率指定信号MASを所定の遅延時間だけ遅延した遅延倍率指示信号DMSを出力する。遅延信号生成部362は、倍率指定信号MASを、帰還信号FBSと倍率指定信号MASとの位相差に等しい遅延時間だけ遅延した遅延倍率指示信号DMSを出力するのが好ましい。
【0026】
本実施形態において、遅延信号生成部362は、遅延倍率指示信号DMS の上位5ビットを遅延第1倍率信号DHSとして出力し、下位6ビットを遅延第2倍率信号DLSとして出力する。すなわち、遅延信号生成部362は、第1倍率信号HBSを当該所定の時間だけ遅延した遅延第1倍率信号DHSと、第2倍率信号LBSを当該所定の時間だけ遅延した遅延第2倍率信号DLSとを出力する。
【0027】
補正値更正信号生成部368は、遅延倍率指示信号DMSと、帰還信号FBSとに基づいて、補正値更正信号CCSを出力する。補正値更新部210は、第2倍率信号LBSのビット数と等しいビット数を有する補正値更正信号CCSを出力してよい。本実施形態において、補正値更新部210は、帰還信号FBSが表す数と、遅延倍率指示信号DMSが表す数との差分を、6ビットのディジタル信号である補正値更正信号CCSとして出力する。
【0028】
補正値記憶部206は、第1倍率信号HBSに対応する補正値を、第2倍率信号LBSのビット数と等しいビット数を有する補正値信号CVSとして出力するのが好ましい。本実施例において、補正値記憶部206は、当該補正値を、6ビットのディジタル信号である補正値信号CVSとして出力する
【0029】
補正値記憶部206は、補正値更正信号CCSと、遅延第1倍率信号DHSとを更に受け取る。補正値記憶部206は、補正値更正信号CCSに基づいて、遅延第1倍率信号DHSが示す値と等しい値を示す第1倍率信号HBSに対応する新たな補正値を生成するのが好ましい。
【0030】
本実施形態において、補正値記憶部206は、更新第1倍率信号CHSが示す値と等しい値を示す第1倍率信号HBSに対応する補正値である旧補正値と、補正値更正信号CCSが表す数との和を、当該新たな補正値として生成する。補正値記憶部206は、当該旧補正値に替えて、当該新たな補正値を記憶する。
【0031】
合成部208は、第1増幅器(322-1〜322-26)のそれぞれ、および第2増幅器(342-1〜342-6)のそれぞれとトランス結合により接続する。合成部208は、当該トランス結合を介して、第1増幅器(322-1〜322-26)のそれぞれが出力する第1増幅信号(EBS-1〜EBS-26)と、第2増幅器(342-1〜342-6)のそれぞれが出力する第2増幅信号(BBS-1〜BBS-6)とを受け取る。合成部208は、当該トランス結合におけるそれぞれの二次側のコイルを直列に接続する。合成部206は、当該二次側のコイルを直列に接続した両端のうち、一端を接地し、他端に生じる信号を振幅変調信号AASとして出力する。合成部206は、例えば、振幅変調信号AASを空中線出力として出力してよい。
【0032】
本実施形態によれば、送信機100は、第2増幅部204が出力する第2増幅信号BBSで、第1増幅部202が出力する第1増幅信号EBSの振幅を補正する。これにより、送信機100は、出力する振幅変調信号AASの歪を補償し、安定な送信を行うことができる。
【0033】
また、送信機100は、無線送受信機に適用されてよい。無線送受信機は、例えば、基地局、または移動局であってよい。この場合において、無線送受信機は、アンテナと、共用部と、受信部と、送信部とを備える。当該共用部は、当該アンテナと、当該受信部と、当該送信部と電気的に接続し、当該アンテナが信号を送受信する際の、送信信号と受信信号との相互作用を除去する。当該受信部は、受信信号を復調する復調回路である。当該送信部は、送信機100である。この場合も、当該無線送受信機は、当該送信部が出力する振幅変調信号に生じる歪を補償し、安定な送信を行うことができる。
【0034】
以上、本発明を実施の形態を用いて説明したが、本発明の技術的範囲は上記実施形態に記載の範囲には限定されない。上記実施形態に、多様な変更または改良を加えることができる。そのような変更または改良を加えた形態も本発明の技術的範囲に含まれ得ることが、特許請求の範囲の記載から明らかである。
【発明の効果】
【0035】
上記説明から明らかなように、本発明によればディジタル変調制御による振幅変調方式の送信機において、送信機が出力する振幅変調信号に生じる歪を低減することができる。
【図面の簡単な説明】
【図1】本発明の一実施形態に係る送信機100を示す。
【符号の説明】
100・・・送信機、102・・・搬送波信号生成部、104・・・変換部、106・・・変調増幅部、202・・・第1増幅部、204・・・第2増幅部、206・・・補正値記憶部、208・・・合成部、210・・・補正値更新部、222・・・変調信号増幅器、224・・・第1A/D変換器、322・・・第1増幅器、324・・・等電力PA選択部、342・・・第2増幅器、344・・・バイナリPA選択部、346・・・乗算器、348・・・加算器、362・・・遅延信号生成部、364・・・第2A/D変換器、366・・・検波部、368・・・更新補正値信号生成部、370・・・タイミング調整部、
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an amplification device and a transmitter. In particular, the present invention relates to an amplitude modulation type transmitter based on digital modulation control.
[0002]
[Prior art]
Conventionally, as an amplitude modulation method by digital modulation control, for example, there is a method disclosed in Japanese Unexamined Patent Publication No. 2000-232380. In this method, a plurality of power amplifiers are directly turned on and off by digital signals, and all information (bits) of the modulated signal is modulated and amplified.
[0003]
[Problems to be solved by the invention]
However, the conventional modulation scheme has a problem that distortion occurs in the amplitude modulation signal output from the transmitter due to an error with respect to the ideal value of the amplification factor of the plurality of power amplifiers. The error also changes due to power supply voltage fluctuations, temperature changes, aging degradation, and the like.
[0004]
Therefore, in the conventional amplitude modulation method using digital modulation control, there is a problem that stable operation is hindered by distortion generated in the amplitude modulation signal output from the transmitter. Therefore, an object of the present invention is to provide an amplifying apparatus and a transmitter that can solve the above-described problems. This object is achieved by a combination of features described in the independent claims. The dependent claims define further advantageous specific examples of the present invention.
[Means for Solving the Problems]
[0005]
That is, according to a first aspect of the present invention, there is provided an amplifying apparatus that amplifies the amplitude of an amplified signal based on a first magnification signal that specifies an amplification factor of the amplified signal and a second magnification signal, The first magnification signal includes a first amplification unit that outputs the first amplification signal obtained by amplifying the amplitude of the amplified signal based on the first magnification signal, and a correction value that corrects the amplitude of the first amplification signal. A second amplification signal that outputs a second amplified signal obtained by amplifying the amplitude of the signal to be amplified based on the correction value storage unit that stores the value corresponding to each of the indicated values, the correction value, and the second magnification signal; And an combining unit that combines the first amplified signal and the second amplified signal and outputs the synthesized signal as an output signal of the amplifying device.
[0006]
Moreover, it is preferable that the amplifying device further includes a correction value updating unit that corrects the correction value based on the output signal of the amplifying device and the first magnification signal.
[0007]
According to the second aspect of the present invention, a transmitter that outputs an amplitude-modulated signal based on a modulated signal, a carrier-wave signal generating unit that outputs a carrier-wave signal having a predetermined period, and the amplitude of the modulated signal A signal obtained by amplifying the amplitude of the carrier signal with an amplification factor based on the conversion unit that outputs the first magnification signal and the second magnification signal, the first magnification signal, and the second magnification signal is used as the amplitude modulation signal. A modulation amplification unit for outputting, wherein the modulation amplification unit amplifies the amplitude of the carrier signal based on the first magnification signal, and outputs a first amplification signal; and the first amplification signal A correction value storage unit that stores a correction value for correcting the amplitude of the carrier wave signal corresponding to each of the values indicated by the first magnification signal, the correction value, and the amplitude of the carrier signal based on the second magnification signal A second booster that outputs a second amplified signal It provides a section, the first amplified signal and the by synthesizing the second amplified signal transmitter, comprising a combining unit for outputting as the amplitude modulated signal.
[0008]
The above summary of the invention does not enumerate all necessary features of the present invention, and sub-combinations of these feature groups can also be the invention.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the claimed invention, and all combinations of features described in the embodiments are the solution of the invention. It is not always essential to the means.
[0010]
FIG. 1 shows a transmitter 100 according to an embodiment of the present invention. The transmitter 100 is a transmitter that outputs an amplitude modulation signal obtained by amplifying the amplitude of the carrier signal CWS with an amplification factor based on the modulation signal, and includes a carrier signal generation unit 102, a conversion unit 104, and a modulation amplification unit 106. Prepare. The carrier signal generation unit 102 outputs a carrier signal CWS having a predetermined period and carrying information based on the modulation signal. The conversion unit 104 outputs the first magnification signal HBS and the second magnification signal LBS based on the amplitude of the modulation signal AMS.
[0011]
The conversion unit 104 outputs a modulated signal amplifier 222 that outputs an amplified modulated signal obtained by amplifying the amplitude of the modulated signal AMS, and outputs a signal obtained by A / D converting the amplified modulated signal as a magnification designation signal MAS that is an 11-bit digital signal. And a first A / D converter 224. The modulation signal amplifier 222 preferably amplifies the amplitude of the modulation signal AMS to an input amplitude value required by the modulation amplification unit 106. The first A / D converter 224 outputs the upper 5 bits of the magnification designation signal MAS as the first magnification signal HBS and outputs the lower 6 bits as the second magnification signal LBS.
[0012]
The modulation amplification unit 106 receives the carrier signal CWS, the first magnification signal HBS, and the second magnification signal LBS, and the amplitude of the carrier signal CWS with an amplification factor based on the first magnification signal HBS and the second magnification signal LBS Is amplified as an amplitude modulation signal AAS. The modulation amplification unit 106 includes a first amplification unit 202, a correction value storage unit 206, a second amplification unit 204, and a synthesis unit 208.
[0013]
The first amplifying unit 202 outputs a first amplified signal EBS obtained by amplifying the amplitude of the carrier signal CWS based on the first magnification signal HBS. The correction value storage unit 206 stores a correction value for correcting the amplitude of the first amplified signal EBS in correspondence with each value indicated by the first magnification signal HBS.
[0014]
Second amplification section 204 outputs second amplified signal BBS obtained by amplifying the amplitude of carrier wave signal CWS based on the correction value and second magnification signal LBS. The second amplification unit 204 preferably outputs the second amplified signal BBS having an amplitude smaller than that of the first amplified signal EBS. The synthesizer 208 synthesizes the first amplified signal EBS and the second amplified signal BBS and outputs them as an amplitude modulation signal AAS.
[0015]
The modulation amplification unit 106 preferably further includes a correction value update unit 210 that corrects the correction value stored in the correction value table 206 based on the amplitude modulation signal AAS and the first magnification signal HBS. In the present embodiment, the modulation amplification unit 106 further includes a correction value update unit 210 that supplies a correction value correction signal CCS based on the amplitude modulation signal AAS and the first magnification signal HBS to the correction value storage unit 206. The correction value storage unit 206 corrects the correction value based on the correction value correction signal CCS. The correction value storage unit 206 may store the value 0 as the initial value of the correction value. Hereinafter, the first amplifying unit 202, the second amplifying unit 204, the correction value updating unit 210, the correction value storing unit 206, and the synthesizing unit 208 that the modulation amplifying unit 106 has will be described in detail.
[0016]
The first amplification unit 202 preferably includes a plurality of first amplifiers 322 and an equal power PA selection unit 324. In the present embodiment, the first amplification unit 202 includes 26 first amplifiers (322-1 to 322-26) and an equal power PA selection unit 324. The first amplifiers (322-1 to 322-26) are power amplifiers having the same amplification factor.
[0017]
Each of the first amplification units 202 receives one first operation signal ESS from the plurality of first operation signals (ESS-1 to ESS-26) output from the equal power PA selection unit 324. The first amplifier 322 receives one first operation signal ESS and a carrier signal CWS, and amplifies the amplitude of the carrier signal CWS with a predetermined amplification factor when the first operation signal ESS has a predetermined logical value. It is preferable to output the first amplified signal EBS. The first amplifier 322-n (n is an integer satisfying 1 ≦ n ≦ 26) receives the first operation signal ESS-n and the carrier signal CWS, and the logical value of the first operation signal ESS-n is When it is 1, the first amplified signal EBS-n obtained by amplifying the amplitude of the carrier signal CWS with a predetermined amplification factor is output.
[0018]
The equal power PA selection unit 324 selects the number of first amplifiers 322 represented by the first magnification signal HBS from the plurality of first amplifiers 322. Here, the number represented by the digital signal refers to a numerical value obtained by converting a value represented by the digital signal as a binary number into a decimal number. For example, when the value indicated by the digital signal as a binary number is “01001”, the number represented by the digital signal is nine. The equal power PA selection unit 324 outputs a plurality of first operation signals ESS based on the first magnification signal HBS. The equal power PA selection unit 324 selects the number of first operation signals ESS represented by the first magnification signal HBS, which is a digital signal, from among the plurality of first operation signals ESS, and outputs a logical value 1. The equal power PA selection unit 324 sets the logical value of the first operation signal ESS to 1 to select the first amplifier 322 that receives the first operation signal ESS.
[0019]
In the present embodiment, the equal power PA selection unit 324 receives the first magnification signal HBS that is a 5-bit digital signal, and generates the first operation signal (ESS-1 to ESS-26) based on the first magnification signal HBS. Output. When the number represented by the first magnification signal HBS is k (k is an integer satisfying 1 ≦ k ≦ 26), the equal power PA selection unit 324 outputs the first operation signal (ESS-1 to ESS-k). Outputs a logical value of 1. When the number represented by the first magnification signal HBS is 0, the equal power PA selection unit 324 outputs a logical value 0 as the first operation signal (ESS-1 to ESS-26). For example, when the value indicated by the first magnification signal HBS as a binary number is “01001”, the equal power PA selection unit 324 outputs a logical value 1 as one operation signal (ESS-1 to ESS-9).
[0020]
The second amplification unit 204 preferably includes a plurality of second amplifiers 342 and a binary PA selection unit 344. In the present embodiment, the second amplification unit 204 includes six second amplifiers (342-1 to 342-6) and a binary PA selection unit 344. The second amplifier 342-k ′ (k ′ is an integer satisfying 1 ≦ k ′ ≦ 6) is (1/2) k ′ × A × when the amplification factor of the first amplifier 322 is A. This is a power amplifier having an amplification factor α (α is a predetermined number). In order for the second amplifying unit 204 to correct the amplitude of the first amplified signal EBS by the second amplified signal BBS, the predetermined number α is preferably 1 or more.
[0021]
Each of the second amplification units 204 receives one second operation signal BSS from the plurality of second operation signals (BSS-1 to BSS-6) output from the binary PA selection unit 344. The second amplifier 342 receives one second operation signal BSS and the carrier signal CWS, and amplifies the amplitude of the carrier signal CWS with a predetermined amplification factor when the second operation signal BSS has a predetermined logical value. It is preferable to output the second amplified signal BBS. The second amplifier 342-n ′ (n ′ is an integer satisfying 1 ≦ n ′ ≦ 6) receives the second operation signal BSS-n ′ and the carrier signal CWS, and receives the second operation signal BSS-n. When the logical value of “1” is 1, the second amplified signal BBS-n ′ obtained by amplifying the amplitude of the carrier wave signal CWS with a predetermined amplification factor is output.
[0022]
The binary PA selection unit 344 selects a predetermined second amplifier 342 from the plurality of second amplifiers 342 based on the second magnification signal LBS and the correction value signal CVS. The binary PA selection unit 344 outputs a plurality of second operation signals BSS based on the second magnification signal LBS and the correction value signal CVS. The binary PA selection unit 344 selects a predetermined second operation signal BSS from the plurality of second operation signals BSS based on the second magnification signal LBS and the correction value signal CVS, and outputs a logical value 1. The binary PA selection unit 344 selects the second amplifier 342 that receives the second operation signal BSS by setting the logical value of the second operation signal BSS to 1.
[0023]
In the present embodiment, the binary PA selection unit 344 includes a multiplier 346 and an adder 348. The multiplier 346 outputs a number obtained by multiplying the number represented by the second magnification signal LBS and the predetermined number 1 / α as the divided second magnification signal DLBS. The adder 348 outputs the sum of the number represented by the second magnification signal DLBS to be divided and the correction value represented by the correction value signal CVS as a 6-bit digital signal. The binary PA selection unit 344 outputs the 6-bit digital signal as second operation signals (BSS-1 to BSS-6). That is, the binary PA selection unit 344 outputs the logical value of the n′-th bit counted from the higher order of the 6-bit digital signal as the second operation signal BSS-n ′.
[0024]
In the present embodiment, the correction value update unit 210 includes a detection unit 366, a second A / D converter 364, a timing adjustment unit 370, a delay signal generation unit 362, and a correction value correction signal generation unit 368. The detector 366 receives the amplitude modulation signal AAS and outputs a demodulated signal of the amplitude modulation signal AAS. The second A / D converter 364 outputs a feedback signal FBS that is a digital signal obtained by A / D converting the demodulated signal. In the present embodiment, the second A / D converter 364 outputs a feedback signal FBS that is an 11-bit digital signal obtained by A / D converting the demodulated signal. The timing adjustment unit 370 adjusts the timing of A / D conversion performed by the second A / D converter 364. For example, the timing adjustment unit 370 adjusts the sample timing of A / D conversion performed by the second A / D converter 364.
[0025]
The delay signal generation unit 362 outputs a delay magnification instruction signal DMS obtained by delaying the magnification designation signal MAS by a predetermined delay time. The delay signal generation unit 362 preferably outputs a delay magnification instruction signal DMS obtained by delaying the magnification designation signal MAS by a delay time equal to the phase difference between the feedback signal FBS and the magnification designation signal MAS.
[0026]
In the present embodiment, the delay signal generation unit 362 outputs the upper 5 bits of the delay magnification instruction signal DMS as the delayed first magnification signal DHS and outputs the lower 6 bits as the delayed second magnification signal DLS. That is, the delay signal generation unit 362 is a delayed first magnification signal DHS obtained by delaying the first magnification signal HBS by the predetermined time, and a delayed second magnification signal DLS obtained by delaying the second magnification signal LBS by the predetermined time. Is output.
[0027]
The correction value correction signal generation unit 368 outputs a correction value correction signal CCS based on the delay magnification instruction signal DMS and the feedback signal FBS. The correction value update unit 210 may output a correction value correction signal CCS having a bit number equal to the bit number of the second magnification signal LBS. In the present embodiment, the correction value update unit 210 outputs the difference between the number represented by the feedback signal FBS and the number represented by the delay magnification instruction signal DMS as a correction value correction signal CCS that is a 6-bit digital signal.
[0028]
The correction value storage unit 206 preferably outputs the correction value corresponding to the first magnification signal HBS as the correction value signal CVS having the number of bits equal to the number of bits of the second magnification signal LBS. In this embodiment, the correction value storage unit 206 outputs the correction value as a correction value signal CVS which is a 6-bit digital signal.
The correction value storage unit 206 further receives the correction value correction signal CCS and the delayed first magnification signal DHS. The correction value storage unit 206 preferably generates a new correction value corresponding to the first magnification signal HBS indicating a value equal to the value indicated by the delayed first magnification signal DHS, based on the correction value correction signal CCS.
[0030]
In the present embodiment, the correction value storage unit 206 represents the old correction value, which is a correction value corresponding to the first magnification signal HBS indicating a value equal to the value indicated by the updated first magnification signal CHS, and the correction value correction signal CCS. The sum with the number is generated as the new correction value. The correction value storage unit 206 stores the new correction value instead of the old correction value.
[0031]
The combining unit 208 is connected to each of the first amplifiers (322-1 to 322-26) and each of the second amplifiers (342-1 to 342-6) by transformer coupling. The synthesizer 208 includes a first amplified signal (EBS-1 to EBS-26) output from each of the first amplifiers (322-1 to 322-26) and a second amplifier (342-) via the transformer coupling. 1 to 342-6) receive the second amplified signal (BBS-1 to BBS-6) output from each. The synthesizer 208 connects the respective secondary coils in the transformer coupling in series. The synthesizer 206 grounds one end of both ends of the secondary coils connected in series, and outputs a signal generated at the other end as the amplitude modulation signal AAS. The synthesizer 206 may output, for example, the amplitude modulation signal AAS as an antenna output.
[0032]
According to the present embodiment, the transmitter 100 corrects the amplitude of the first amplified signal EBS output from the first amplifying unit 202 with the second amplified signal BBS output from the second amplifying unit 204. Thus, the transmitter 100 can compensate for distortion of the output amplitude modulation signal AAS and perform stable transmission.
[0033]
Further, the transmitter 100 may be applied to a wireless transceiver. The radio transceiver may be a base station or a mobile station, for example. In this case, the wireless transceiver includes an antenna, a shared unit, a receiving unit, and a transmitting unit. The shared unit is electrically connected to the antenna, the receiving unit, and the transmitting unit, and removes the interaction between the transmission signal and the received signal when the antenna transmits and receives signals. The receiving unit is a demodulation circuit that demodulates a received signal. The transmitter is the transmitter 100. Also in this case, the radio transceiver can compensate for distortion generated in the amplitude modulation signal output from the transmission unit and perform stable transmission.
[0034]
As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. Various modifications or improvements can be added to the above embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.
【The invention's effect】
[0035]
As is apparent from the above description, according to the present invention, distortion generated in an amplitude modulation signal output from a transmitter can be reduced in an amplitude modulation type transmitter using digital modulation control.
[Brief description of the drawings]
FIG. 1 shows a transmitter 100 according to an embodiment of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 100 ... Transmitter, 102 ... Carrier wave signal generation unit, 104 ... Conversion unit, 106 ... Modulation amplification unit, 202 ... First amplification unit, 204 ... Second amplification unit, 206 ... Correction value storage unit, 208 ... Synthesis unit, 210 ... Correction value update unit, 222 ... Modulation signal amplifier, 224 ... First A / D converter, 322 ... First amplifier , 324 ... Equal power PA selection unit, 342 ... Second amplifier, 344 ... Binary PA selection unit, 346 ... Multiplier, 348 ... Adder, 362 ... Delay signal generation unit , 364 ... 2nd A / D converter, 366 ... detector, 368 ... update correction value signal generator, 370 ... timing adjuster,

Claims (4)

1倍率信号及び第2倍率信号に基づいて被増幅信号の振幅を増幅する増幅装置であって、
順序付けられた複数の第1増幅器を有し、前記複数の第1増幅器から、前記第1倍率信号が表す数の第1増幅器を前記順序に従って選択して、選択した前記第1増幅器によって前記被増幅信号の振幅を増幅した第1増幅信号を出力する第1増幅部と、
前記第1増幅信号の振幅を補正するための補正値を、前記第1倍率信号が表す数に対応して記憶する補正値記憶部と、
前記複数の第1増幅器よりも増幅率が小さい複数の第2増幅器を有し、前記複数の第2増幅器のうち選択対象の第2増幅器を指定する前記第2倍率信号と、前記第1倍率信号が表す数に対応して前記補正値記憶部に記憶された補正値に相当する増幅率を有する前記第2増幅器を指定する補正値信号とに基づいて第2増幅器を選択し、選択した第2増幅器によって前記被増幅信号の振幅を増幅した第2増幅信号を出力する第2増幅部と、
前記第1増幅信号と前記第2増幅信号とを合成して前記増幅装置の出力信号として出力する合成部とを備える増幅装置。
A amplifier that amplifies the amplitude of the amplified signal based on the first ratio signal and the second magnification signal,
A plurality of first amplifiers in order, the number of first amplifiers represented by the first magnification signal selected from the plurality of first amplifiers according to the order, and the amplified by the selected first amplifier; A first amplifier for outputting a first amplified signal obtained by amplifying the amplitude of the signal;
A correction value storage for storing a correction value for correcting the amplitude of the first amplified signal corresponding to the number represented by the first magnification signal;
A plurality of second amplifiers having a smaller amplification factor than the plurality of first amplifiers, the second magnification signal designating a second amplifier to be selected among the plurality of second amplifiers; and the first magnification signal The second amplifier is selected based on the correction value signal designating the second amplifier having an amplification factor corresponding to the correction value stored in the correction value storage unit corresponding to the number represented by A second amplifier for outputting a second amplified signal obtained by amplifying the amplitude of the signal to be amplified by an amplifier;
Said first amplified signal and combined to amplified apparatus Ru and a combining unit for outputting as an output signal of the amplifying device and said second amplified signal.
前記増幅装置の前記出力信号と、前記第1倍率信号とに基づいて、前記補正値記憶部に記憶された前記補正値を更新する補正値更新部を更に備える請求項1に記載の増幅装置。And said output signal of said amplifier, based on the first ratio signal, the correction value according to Motomeko 1 further Ru a correction value updating unit for updating said stored correction value in the storage unit amplification apparatus. 前記補正値更新部は、前記出力信号に基づく帰還信号が表す数と、前記第1倍率信号を予め定められた時間遅延させた遅延第1倍率信号が表す数との差分に基づいて、遅延第1倍率信号が表す数と等しい値を示す第1倍率信号が表す数に対応する補正値を更新する請求項2に記載の増幅装置。The correction value updating unit is configured to determine a delay number based on a difference between a number represented by a feedback signal based on the output signal and a number represented by a delayed first magnification signal obtained by delaying the first magnification signal by a predetermined time. The amplification device according to claim 2, wherein the correction value corresponding to the number represented by the first magnification signal indicating a value equal to the number represented by the one magnification signal is updated. 変調信号に基づく振幅変調信号を出力する送信機であって、
予め定められた周期を有する搬送波信号を出力する搬送波信号生成部と、
前記変調信号の振幅に基づいて、第1倍率信号と、第2倍率信号とを出力する変換部と、
前記第1倍率信号と、前記第2倍率信号とに基づいて前記搬送波信号の振幅を増幅した信号を前記振幅変調信号として出力する変調増幅部とを備え、
前記変調増幅部は、
順序付けられた複数の第1増幅器を有し、前記複数の第1増幅器から、前記第1倍率信号が表す数の第1増幅器を前記順序に従って選択して、選択した前記第1増幅器によって、前記搬送波信号の振幅を増幅した第1増幅信号を出力する第1増幅部と、
前記第1増幅信号の振幅を補正するための補正値を、前記第1倍率信号が表す数に対応して記憶する補正値記憶部と、
前記複数の第1増幅器よりも増幅率が小さい複数の第2増幅器を有し、前記複数の第2増幅器のうち選択対象の第2増幅器を指定する前記第2倍率信号と、前記第1倍率信号が表す数に対応して前記補正値記憶部に記憶された補正値に相当する増幅率を有する前記第2増幅器を指定する補正値信号とに基づいて第2増幅器を選択し、選択した第2増幅器によって前記搬送波信号の振幅を増幅した第2増幅信号を出力する第2増幅部と、
前記第1増幅信号と、前記第2増幅信号とを合成して前記振幅変調信号として出力する合成部とを備える送信機。
A transmitter for outputting an amplitude modulation signal based on a modulation signal,
A carrier wave signal generator for outputting a carrier wave signal having a predetermined period;
A conversion unit that outputs a first magnification signal and a second magnification signal based on the amplitude of the modulation signal;
Comprising a first magnification signal, and the modulation amplifier for outputting a signal amplifying the amplitude of the second magnification signal and the based have been the carrier signal as the amplitude-modulated signal,
The modulation amplification unit includes:
A plurality of first amplifiers in order, the number of first amplifiers represented by the first magnification signal is selected from the plurality of first amplifiers according to the order, and the carrier wave is selected by the selected first amplifier. A first amplifier for outputting a first amplified signal obtained by amplifying the amplitude of the signal;
A correction value storage for storing a correction value for correcting the amplitude of the first amplified signal corresponding to the number represented by the first magnification signal;
A plurality of second amplifiers having a smaller amplification factor than the plurality of first amplifiers, the second magnification signal designating a second amplifier to be selected among the plurality of second amplifiers; and the first magnification signal The second amplifier is selected based on the correction value signal designating the second amplifier having an amplification factor corresponding to the correction value stored in the correction value storage unit corresponding to the number represented by A second amplifying unit that outputs a second amplified signal obtained by amplifying the amplitude of the carrier wave signal by an amplifier ;
Said first amplified signal and the second amplified signal and combined to Shin machine feed that a synthesizing unit for outputting as the amplitude modulated signal.
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