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JP4741538B2 - Solar cell module - Google Patents
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JP4741538B2 - Solar cell module - Google Patents

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JP4741538B2
JP4741538B2 JP2007082899A JP2007082899A JP4741538B2 JP 4741538 B2 JP4741538 B2 JP 4741538B2 JP 2007082899 A JP2007082899 A JP 2007082899A JP 2007082899 A JP2007082899 A JP 2007082899A JP 4741538 B2 JP4741538 B2 JP 4741538B2
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solar cell
copper foil
back electrode
electrode
bus bar
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JP2007173873A (en
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宏明 高橋
健次 福井
勝彦 白沢
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Kyocera Corp
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Description

本発明は太陽電池モジュールに関する。 The present invention relates to solar cell modules.

従来の太陽電池装置を図4(a)(b)に示す。図4(a)は断面図であり、図4(b)は平面図である。図4(a)(b)中、11はシリコン基板、15(15a)は表面電極、16(16a)は裏面電極、18はリード線である。シリコン基板11内にはN型領域12とP型領域13とが形成されている。N型領域12の表面には表面電極15(15a)が設けられ、P型領域13の表面には裏面電極16(16a)が設けられている。この表面電極15はリード線接続用のバスバー部15aと集電用のフィンガー部15bとから成る。また、裏面電極16もバスバー部16aとフィンガー部(不図示)とから成る。裏面電極16のバスバー部16aには、抵抗損失を小さくするために銅箔17がハンダ付されている。   A conventional solar cell device is shown in FIGS. 4A is a cross-sectional view, and FIG. 4B is a plan view. 4A and 4B, 11 is a silicon substrate, 15 (15a) is a front electrode, 16 (16a) is a back electrode, and 18 is a lead wire. An N-type region 12 and a P-type region 13 are formed in the silicon substrate 11. A surface electrode 15 (15 a) is provided on the surface of the N-type region 12, and a back electrode 16 (16 a) is provided on the surface of the P-type region 13. The surface electrode 15 includes a lead bar connecting bus bar portion 15a and a current collecting finger portion 15b. The back electrode 16 also includes a bus bar portion 16a and finger portions (not shown). A copper foil 17 is soldered to the bus bar portion 16a of the back electrode 16 in order to reduce resistance loss.

複数の太陽電池素子を接続するためのリード線18は平角状の銅箔などから成り、一方端が表面電極15(15a)上の略全長にわたって配設され、その複数箇所を表面電極15(15a)と接合することによって表面電極15のバスバー部15aに接続され、他方端が銅箔17を介して裏面電極16のバスバー部16aの端部にハンダ付けされて裏面電極16に接続される。   The lead wire 18 for connecting a plurality of solar cell elements is made of a rectangular copper foil or the like, and one end thereof is disposed over substantially the entire length on the surface electrode 15 (15a). ) And the other end is soldered to the end of the bus bar portion 16a of the back electrode 16 via the copper foil 17 and connected to the back electrode 16.

この従来の太陽電池装置では、太陽電池素子のセル面積の増大化に伴ない、発生電流が増加したり、また表面電極15のバスバー部15aが長くなり、そのために抵抗損失が増大して変換効率が低下するという問題があった。   In this conventional solar cell device, as the cell area of the solar cell element increases, the generated current increases, and the bus bar portion 15a of the surface electrode 15 becomes longer, so that the resistance loss increases and the conversion efficiency increases. There was a problem that decreased.

変換効率の低下を防止するためには、表面電極15部分のリード線18や裏面電極16部分の銅箔17の断面積を増加させればよいが、表面電極15部分のリード線18は、受光面積を減少させないようにするために、その厚みを厚くして断面積を増加させなければならない。   In order to prevent a decrease in conversion efficiency, the cross-sectional area of the lead wire 18 in the front electrode 15 portion and the copper foil 17 in the back electrode 16 portion may be increased. In order not to reduce the area, the thickness must be increased to increase the cross-sectional area.

ところが、リード線18が厚くなると、このリード線18をホットエアーやハンダ鏝で表面電極15に溶着する際に、このホットエアーやハンダ鏝の熱が表面電極15部分のハンダまで伝わりにくく、表面電極15とリード線18の溶着に時間がかかり、リード線18の熱膨張による伸びが大きくなるという問題があった。リード線18が伸びた状態で表面電極15に接合されると、リード線18が縮む際に、シリコン基板11に圧縮応力が印加されて、シリコン基板11に大きな反りが発生し、セル割れや電極剥がれなどを誘発し、製造歩留りが低下するという問題があった。   However, when the lead wire 18 becomes thick, when the lead wire 18 is welded to the surface electrode 15 with hot air or solder, the heat of the hot air or solder is not easily transmitted to the solder of the surface electrode 15 portion. It takes time to weld the lead wire 18 to the lead wire 18 and there is a problem that the elongation of the lead wire 18 due to thermal expansion increases. When the lead wire 18 is joined to the surface electrode 15 in a stretched state, when the lead wire 18 is shrunk, a compressive stress is applied to the silicon substrate 11 to cause a large warp in the silicon substrate 11, thereby causing cell cracks and electrodes. There has been a problem that the production yield is reduced due to peeling.

本発明はこのような従来装置の問題点に鑑みてなされたものであり、セル面積の増大にともなって発生する抵抗損失の増大と、その対向策であるバスバー部の銅箔を厚くすることによって発生するセルの反り、セル割れ、或いは電極剥がれなどの問題を解消した太陽電池装置を提供することを目的とする。   The present invention has been made in view of the problems of such a conventional device, and by increasing the resistance loss that occurs as the cell area increases, and by increasing the copper foil of the bus bar portion, which is the counter measure. It is an object of the present invention to provide a solar cell device that solves problems such as cell warpage, cell cracking, and electrode peeling.

上記目的を達成するために本発明の太陽電池モジュールは、半導体基板と、前記半導体基板の受光面側に形成された表面電極と、前記半導体基板の非受光面側に形成された裏面電極と、前記裏面電極上に形成され銅箔と、を備えた複数の太陽電池素子と、一の太陽電池素子と、前記一の太陽電池素子と隣合う他の前記太陽電池素子とを電気的に接続するリードと、を備えた太陽電池モジュールであって、前記リードは、一端が、前記一の太陽電池素子の裏面電極に、前記銅箔を介して接続され、他端が、前記他の太陽電池素子の表面電極に直接接続されるとともに、前記銅箔は、前記表面電極の短手方向の幅よりも幅が広いことを特徴とする。
ある実施態様においては、前記裏面電極と前記銅箔とが複数箇所で接合されていることを特徴とする。
ある実施態様においては、前記複数の接合箇所の間隔が、前記銅箔の長手方向に沿って等間隔であることを特徴とする。
To achieve the above object, the solar cell module of the present invention includes a semiconductor substrate, a surface electrode formed on the light receiving surface side of the semiconductor substrate, a back electrode formed on the non-light receiving surface side of the semiconductor substrate, a plurality of solar cell elements and a copper foil formed on the back electrode, and the one solar cell element, electrically the other of said solar cell element that fits Ri solar cell element and the adjacent said one A lead connected to the solar cell module, wherein one end of the lead is connected to the back electrode of the one solar cell element via the copper foil, and the other end is connected to the other solar cell. The copper foil is directly connected to the surface electrode of the battery element, and the width of the copper foil is wider than the width of the surface electrode in the short direction .
In a certain embodiment, the said back surface electrode and the said copper foil are joined in multiple places.
In a certain embodiment, the space | interval of these joining locations is equal intervals along the longitudinal direction of the said copper foil, It is characterized by the above-mentioned.

また、本発明に係る発明によれば、銅箔を表面電極に複数箇所で接合することから、基板の反りをより効果的に小さくすることができる。   Moreover, according to the invention which concerns on this invention, since copper foil is joined to a surface electrode in multiple places, the curvature of a board | substrate can be made smaller more effectively.

さらに、本発明に係る発明によれば、太陽電池装置で抵抗損失が増大して変換効率が低下するという問題を抑制することができる。   Furthermore, according to the invention according to the present invention, it is possible to suppress the problem that the resistance loss increases and the conversion efficiency decreases in the solar cell device.

以下、本発明に係る発明の実施形態を添付図面に基づき詳細に説明する。図1(a)は本発明の一実施形態を示す断面図、図1(b)は平面図であり、1は半導体基板、5は表面電極、7は裏面電極、9はリード線である。 Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. 1A is a cross-sectional view showing an embodiment of the present invention , FIG. 1B is a plan view, 1 is a semiconductor substrate, 5 is a surface electrode, 7 is a back electrode, and 9 is a lead wire.

半導体基板1は、厚み0.3mm程度の単結晶シリコンや多結晶シリコンなどから成る。この半導体基板1内には、N型領域2とP型領域3があり、N型領域2とP型領域3との界面部分で半導体接合部4が形成される。このN型領域2はP型のシリコン基板1を拡散炉中に配置して、オキシ塩化リン(POCl)中で加熱することによって、シリコン基板1の全体の表面部にリン原子を拡散させ、その後に側面部と底面部の拡散層を除去することにより、厚み0.3〜0.4μm程度に形成する。なお、この半導体基板1は単結晶ガリウム砒素などで形成してもよい。 The semiconductor substrate 1 is made of single crystal silicon or polycrystalline silicon having a thickness of about 0.3 mm. In this semiconductor substrate 1, there are an N-type region 2 and a P-type region 3, and a semiconductor junction 4 is formed at an interface portion between the N-type region 2 and the P-type region 3. The N-type region 2 has a P-type silicon substrate 1 placed in a diffusion furnace and heated in phosphorus oxychloride (POCl 3 ) to diffuse phosphorus atoms over the entire surface of the silicon substrate 1. Thereafter, the diffusion layers on the side and bottom portions are removed to form a thickness of about 0.3 to 0.4 μm. The semiconductor substrate 1 may be formed of single crystal gallium arsenide or the like.

N型領域2の表面部分には、表面電極5が形成されている。この表面電極5は、リード線9を接続するためのバスバー部5aとこのバスバー部5aと交差して分岐して形成された集電用のフィンガー部5bとから成る。バスバー部5aは基板1の略全域にわたって二本平行に形成されており、フィンガー部5bはバスバー部5bに交差して多数本が基板1の略全長にわたって形成されている。バスバー部5aは例えば2mm程度の幅に形成され、フィンガー部5bは例えば0.2mm程度の幅に形成される。このような表面電極5は、例えば銀粉末、ガラスフリット、結合剤、および溶剤などから成るペーストをスクリーン印刷して700〜800℃程度の温度で焼き付け、全体をハンダ層で被覆することにより形成される。   A surface electrode 5 is formed on the surface portion of the N-type region 2. The surface electrode 5 includes a bus bar portion 5a for connecting the lead wire 9 and a current collecting finger portion 5b formed by crossing the bus bar portion 5a and branching. Two bus bar portions 5 a are formed in parallel over substantially the entire area of the substrate 1, and many finger portions 5 b intersect the bus bar portion 5 b and are formed over substantially the entire length of the substrate 1. The bus bar portion 5a is formed with a width of about 2 mm, for example, and the finger portions 5b are formed with a width of about 0.2 mm, for example. Such a surface electrode 5 is formed by screen-printing a paste made of, for example, silver powder, glass frit, a binder, and a solvent, baking the paste at a temperature of about 700 to 800 ° C., and covering the whole with a solder layer. The

基板1の表面側には、図示されていないが、例えば窒化シリコン膜などから成る反射防止膜が形成される。このような反射防止膜は例えばプラズマCVD法などで形成される。   Although not shown, an antireflection film made of, for example, a silicon nitride film is formed on the surface side of the substrate 1. Such an antireflection film is formed by, for example, a plasma CVD method.

基板1の裏面側には裏面電極7が設けられている。この裏面電極7も、リード線9を接続するためのバスバー部7aとこのバスバー部7aと交差して分岐して多数本形成されるフィンガー部(不図示)とから成る。バスバー部7aは基板1の略全長にわたって二本平行に形成されており、フィンガー部はバスバー部7aに交差して多数本が基板1の略全域にわたって形成されている。バスバー部7aは例えば5mm程度の幅に形成され、フィンガー部は例えば0.5mm程度の幅に形成される。基板1の裏面側は、受光面積の減少を考慮しなくてもよいことから、表面電極5のバスバー部5aよりも幅広に形成でき、裏面電極7側での抵抗損失を低減できる。このような裏面電極7は、例えば銀粉末、ガラスフリット、結合剤、および溶剤などから成るペーストをスクリーン印刷して焼き付け、ハンダ層で被覆することにより形成される。なお、裏面電極7は、バスバー部7aとフィンガー部7bを交差して設ける場合に限らず、基板1の裏面側の全面に設けてもよい。   A back electrode 7 is provided on the back side of the substrate 1. The back electrode 7 is also composed of a bus bar portion 7a for connecting the lead wire 9 and a plurality of finger portions (not shown) formed by branching and intersecting the bus bar portion 7a. Two bus bar portions 7a are formed in parallel over substantially the entire length of the substrate 1, and a plurality of finger portions are formed over substantially the entire area of the substrate 1 so as to intersect the bus bar portion 7a. The bus bar portion 7a is formed with a width of about 5 mm, for example, and the finger portions are formed with a width of about 0.5 mm, for example. Since it is not necessary to consider the reduction of the light receiving area on the back surface side of the substrate 1, it can be formed wider than the bus bar portion 5a of the front electrode 5, and the resistance loss on the back electrode 7 side can be reduced. Such a back electrode 7 is formed by screen-printing and baking a paste made of, for example, silver powder, glass frit, a binder, and a solvent, and coating with a solder layer. The back electrode 7 is not limited to the case where the bus bar portion 7a and the finger portion 7b are provided to intersect with each other, but may be provided on the entire back surface side of the substrate 1.

この裏面電極7上には銅箔8が貼りつけられている。この銅箔8は、幅5mm程度、厚み0.1mm程度に形成される。このような銅箔8を裏面電極7のバスバー部7a上に例えば等間隔に5点で接合する。このように裏面電極7のバスバー部7aと銅箔8を複数箇所のみで接合すると、温度変化によって銅箔8の長さが変化しても、銅箔8が切断したり、基板1に反りを生じることがない。   A copper foil 8 is attached on the back electrode 7. The copper foil 8 is formed with a width of about 5 mm and a thickness of about 0.1 mm. Such copper foil 8 is joined to the bus bar portion 7a of the back electrode 7 at, for example, five points at equal intervals. In this way, when the bus bar portion 7a of the back electrode 7 and the copper foil 8 are joined only at a plurality of locations, even if the length of the copper foil 8 changes due to a temperature change, the copper foil 8 is cut or warped on the substrate 1. It does not occur.

表面電極5のバスバー部5aと裏面電極7のバスバー部7aをリード線9で接続する。このリード線9は、図2(a)(b)に示すように、直径0.05〜0.1mm程度の銅の細線9aが90〜360本程度同心円状に最密充填され、捩じることで縒り線とされている。なお、図2(a)はリード線9の断面図であり、図2(b)はリード線9の側面図である。   The bus bar portion 5 a of the front electrode 5 and the bus bar portion 7 a of the back electrode 7 are connected by lead wires 9. As shown in FIGS. 2 (a) and 2 (b), the lead wire 9 is concentrically filled with about 90 to 360 thin copper wires 9a having a diameter of about 0.05 to 0.1 mm and twisted. It is said that it is a snarling line. 2A is a cross-sectional view of the lead wire 9, and FIG. 2B is a side view of the lead wire 9. As shown in FIG.

このリード線9における表面電極5のバスバー部5a側は、図3 に示すように、バスバー部5aの長さ方向における両端部の二点で接合される。このように、リード線9を縒り線で構成して、表面電極5のバスバー部5aにホットエアー10などで接合する場合、リード線9は縒りの方向xに、基板1とは所定の角度をもって延びたり縮んだりするので、基板1の幅方向yでの伸びや縮みは、従来の平角銅箔に比べてはるかに小さくなる。したがって、基板1が150mm角程度に大型化しても基板1の反りを極力小さくできる。   As shown in FIG. 3, the lead wire 9 is joined at two points at both ends in the length direction of the bus bar portion 5a. As described above, when the lead wire 9 is formed of a twisted wire and joined to the bus bar portion 5a of the surface electrode 5 with hot air 10 or the like, the lead wire 9 has a predetermined angle with the substrate 1 in the turn direction x. Since the substrate 1 extends or contracts, the expansion or contraction in the width direction y of the substrate 1 is much smaller than that of the conventional rectangular copper foil. Therefore, even if the substrate 1 is enlarged to about 150 mm square, the warpage of the substrate 1 can be minimized.

本発明に係る発明の太陽電池装置に用いられる太陽電池素子を示す図であり、(a)は断面図、(b)は平面図である。It is a figure which shows the solar cell element used for the solar cell apparatus of the invention which concerns on this invention, (a) is sectional drawing, (b) is a top view. 本発明に係る発明の太陽電池装置に用いられるリード線を示す図であり、(a)は断面図、(b)は側面図である。It is a figure which shows the lead wire used for the solar cell apparatus of the invention which concerns on this invention, (a) is sectional drawing, (b) is a side view. 本発明に係る太陽電池装置におけるリード線の接続の接続方法を示す図である。It is a figure which shows the connection method of the connection of the lead wire in the solar cell apparatus which concerns on this invention. 太陽電池装置を示す図であり、(a)は断面図、(b)は平面図である。It is a figure which shows a solar cell apparatus, (a) is sectional drawing, (b) is a top view.

符号の説明Explanation of symbols

1:基板
、5a、5b:表面電
7、7a:裏面電極
8:裏面電極の銅箔
9:リード線
1: substrate 5, 5a, 5b: surface electrodes
7, 7a : Back electrode 8: Copper foil of back electrode 9: Lead wire

Claims (3)

半導体基板と、前記半導体基板の受光面側に形成された表面電極と、前記半導体基板の非受光面側に形成された裏面電極と、前記裏面電極上に形成され銅箔と、を備えた複数の太陽電池素子と、
一の太陽電池素子と、前記一の太陽電池素子と隣合う他の太陽電池素子とを電気的に接続するリードと、
を備えた太陽電池モジュールであって、
前記リードは、
一端が、前記一の太陽電池素子の裏面電極に、前記銅箔を介して接続され、
他端が、前記他の太陽電池素子の表面電極に直接接続されるとともに、
前記銅箔は、前記表面電極の短手方向の幅よりも幅が広い
ことを特徴とする、太陽電池モジュール。
A semiconductor substrate; a surface electrode formed on the light receiving surface side of the semiconductor substrate; a back electrode formed on the non-light receiving surface side of the semiconductor substrate; and a copper foil formed on the back electrode. A plurality of solar cell elements;
A lead for electrically connecting the one solar cell element, and another solar cell element that fits Ri solar cell element and the adjacent said one,
A solar cell module comprising:
The lead is
One end is connected to the back electrode of the one solar cell element via the copper foil,
The other end is directly connected to the surface electrode of the other solar cell element ,
The solar cell module , wherein the copper foil is wider than a width of the surface electrode in a short direction .
前記裏面電極と前記銅箔とが複数箇所で接合されていることを特徴とする請求項1に記載の太陽電池モジュール。   The solar cell module according to claim 1, wherein the back electrode and the copper foil are joined at a plurality of locations. 前記複数の接合箇所の間隔が、前記銅箔の長手方向に沿って等間隔であることを特徴とする請求項1又は2に記載の太陽電池モジュール。   3. The solar cell module according to claim 1, wherein the intervals between the plurality of joint portions are equal intervals along the longitudinal direction of the copper foil.
JP2007082899A 2007-03-27 2007-03-27 Solar cell module Expired - Lifetime JP4741538B2 (en)

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JP2007082899A JP4741538B2 (en) 2007-03-27 2007-03-27 Solar cell module

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Application Number Priority Date Filing Date Title
JP2007082899A JP4741538B2 (en) 2007-03-27 2007-03-27 Solar cell module

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2005120233A Division JP2005217450A (en) 2005-04-18 2005-04-18 Solar cell device and manufacturing method thereof

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JPS60202968A (en) * 1984-03-28 1985-10-14 Hitachi Ltd Electrode connection device for solar cells
JPS60239067A (en) * 1984-05-11 1985-11-27 Hitachi Ltd solar cell element
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